diff options
Diffstat (limited to 'sound/soc/codecs/tlv320aic3x.h')
| -rw-r--r-- | sound/soc/codecs/tlv320aic3x.h | 141 |
1 files changed, 65 insertions, 76 deletions
diff --git a/sound/soc/codecs/tlv320aic3x.h b/sound/soc/codecs/tlv320aic3x.h index ac827e578c4..e521ac3ddde 100644 --- a/sound/soc/codecs/tlv320aic3x.h +++ b/sound/soc/codecs/tlv320aic3x.h @@ -13,7 +13,7 @@ #define _AIC3X_H /* AIC3X register space */ -#define AIC3X_CACHEREGNUM 103 +#define AIC3X_CACHEREGNUM 110 /* Page select register */ #define AIC3X_PAGE_SELECT 0 @@ -74,6 +74,8 @@ #define HPLCOM_CFG 37 /* Right High Power Output control registers */ #define HPRCOM_CFG 38 +/* High Power Output Stage Control Register */ +#define HPOUT_SC 40 /* DAC Output Switching control registers */ #define DAC_LINE_MUX 41 /* High Power Output Driver Pop Reduction registers */ @@ -81,50 +83,63 @@ /* DAC Digital control registers */ #define LDAC_VOL 43 #define RDAC_VOL 44 -/* High Power Output control registers */ +/* Left High Power Output control registers */ #define LINE2L_2_HPLOUT_VOL 45 -#define LINE2R_2_HPROUT_VOL 62 #define PGAL_2_HPLOUT_VOL 46 -#define PGAL_2_HPROUT_VOL 60 -#define PGAR_2_HPLOUT_VOL 49 -#define PGAR_2_HPROUT_VOL 63 #define DACL1_2_HPLOUT_VOL 47 -#define DACR1_2_HPROUT_VOL 64 +#define LINE2R_2_HPLOUT_VOL 48 +#define PGAR_2_HPLOUT_VOL 49 +#define DACR1_2_HPLOUT_VOL 50 #define HPLOUT_CTRL 51 -#define HPROUT_CTRL 65 -/* High Power COM control registers */ +/* Left High Power COM control registers */ #define LINE2L_2_HPLCOM_VOL 52 -#define LINE2R_2_HPRCOM_VOL 69 #define PGAL_2_HPLCOM_VOL 53 +#define DACL1_2_HPLCOM_VOL 54 +#define LINE2R_2_HPLCOM_VOL 55 #define PGAR_2_HPLCOM_VOL 56 +#define DACR1_2_HPLCOM_VOL 57 +#define HPLCOM_CTRL 58 +/* Right High Power Output control registers */ +#define LINE2L_2_HPROUT_VOL 59 +#define PGAL_2_HPROUT_VOL 60 +#define DACL1_2_HPROUT_VOL 61 +#define LINE2R_2_HPROUT_VOL 62 +#define PGAR_2_HPROUT_VOL 63 +#define DACR1_2_HPROUT_VOL 64 +#define HPROUT_CTRL 65 +/* Right High Power COM control registers */ +#define LINE2L_2_HPRCOM_VOL 66 #define PGAL_2_HPRCOM_VOL 67 +#define DACL1_2_HPRCOM_VOL 68 +#define LINE2R_2_HPRCOM_VOL 69 #define PGAR_2_HPRCOM_VOL 70 -#define DACL1_2_HPLCOM_VOL 54 #define DACR1_2_HPRCOM_VOL 71 -#define HPLCOM_CTRL 58 #define HPRCOM_CTRL 72 /* Mono Line Output Plus/Minus control registers */ #define LINE2L_2_MONOLOPM_VOL 73 -#define LINE2R_2_MONOLOPM_VOL 76 #define PGAL_2_MONOLOPM_VOL 74 -#define PGAR_2_MONOLOPM_VOL 77 #define DACL1_2_MONOLOPM_VOL 75 +#define LINE2R_2_MONOLOPM_VOL 76 +#define PGAR_2_MONOLOPM_VOL 77 #define DACR1_2_MONOLOPM_VOL 78 #define MONOLOPM_CTRL 79 -/* Line Output Plus/Minus control registers */ +/* Class-D speaker driver on tlv320aic3007 */ +#define CLASSD_CTRL 73 +/* Left Line Output Plus/Minus control registers */ #define LINE2L_2_LLOPM_VOL 80 -#define LINE2L_2_RLOPM_VOL 87 -#define LINE2R_2_LLOPM_VOL 83 -#define LINE2R_2_RLOPM_VOL 90 #define PGAL_2_LLOPM_VOL 81 -#define PGAL_2_RLOPM_VOL 88 -#define PGAR_2_LLOPM_VOL 84 -#define PGAR_2_RLOPM_VOL 91 #define DACL1_2_LLOPM_VOL 82 -#define DACL1_2_RLOPM_VOL 89 -#define DACR1_2_RLOPM_VOL 92 +#define LINE2R_2_LLOPM_VOL 83 +#define PGAR_2_LLOPM_VOL 84 #define DACR1_2_LLOPM_VOL 85 #define LLOPM_CTRL 86 +/* Right Line Output Plus/Minus control registers */ +#define LINE2L_2_RLOPM_VOL 87 +#define PGAL_2_RLOPM_VOL 88 +#define DACL1_2_RLOPM_VOL 89 +#define LINE2R_2_RLOPM_VOL 90 +#define PGAR_2_RLOPM_VOL 91 +#define DACR1_2_RLOPM_VOL 92 #define RLOPM_CTRL 93 /* GPIO/IRQ registers */ #define AIC3X_STICKY_IRQ_FLAGS_REG 96 @@ -135,6 +150,17 @@ #define AIC3X_GPIOB_REG 101 /* Clock generation control register */ #define AIC3X_CLKGEN_CTRL_REG 102 +/* New AGC registers */ +#define LAGCN_ATTACK 103 +#define LAGCN_DECAY 104 +#define RAGCN_ATTACK 105 +#define RAGCN_DECAY 106 +/* New Programmable ADC Digital Path and I2C Bus Condition Register */ +#define NEW_ADC_DIGITALPATH 107 +/* Passive Analog Signal Bypass Selection During Powerdown Register */ +#define PASSIVE_BYPASS 108 +/* DAC Quiescent Current Adjustment Register */ +#define DAC_ICC_ADJ 109 /* Page select register bits */ #define PAGE0_SELECT 0 @@ -150,9 +176,14 @@ #define DUAL_RATE_MODE ((1 << 5) | (1 << 6)) #define LDAC2LCH (0x1 << 3) #define RDAC2RCH (0x1 << 1) +#define LDAC2RCH (0x2 << 3) +#define RDAC2LCH (0x2 << 1) +#define LDAC2MONOMIX (0x3 << 3) +#define RDAC2MONOMIX (0x3 << 1) /* PLL registers bitfields */ #define PLLP_SHIFT 0 +#define PLLP_MASK 7 #define PLLQ_SHIFT 3 #define PLLR_SHIFT 0 #define PLLJ_SHIFT 2 @@ -165,6 +196,14 @@ #define PLL_CLKIN_SHIFT 4 #define MCLK_SOURCE 0x0 #define PLL_CLKDIV_SHIFT 0 +#define PLLCLK_IN_MASK 0x30 +#define PLLCLK_IN_SHIFT 4 +#define CLKDIV_IN_MASK 0xc0 +#define CLKDIV_IN_SHIFT 6 +/* clock in source */ +#define CLKIN_MCLK 0 +#define CLKIN_GPIO2 1 +#define CLKIN_BCLK 2 /* Software reset register bits */ #define SOFT_RESET 0x80 @@ -199,44 +238,9 @@ /* Default input volume */ #define DEFAULT_GAIN 0x20 -/* GPIO API */ -enum { - AIC3X_GPIO1_FUNC_DISABLED = 0, - AIC3X_GPIO1_FUNC_AUDIO_WORDCLK_ADC = 1, - AIC3X_GPIO1_FUNC_CLOCK_MUX = 2, - AIC3X_GPIO1_FUNC_CLOCK_MUX_DIV2 = 3, - AIC3X_GPIO1_FUNC_CLOCK_MUX_DIV4 = 4, - AIC3X_GPIO1_FUNC_CLOCK_MUX_DIV8 = 5, - AIC3X_GPIO1_FUNC_SHORT_CIRCUIT_IRQ = 6, - AIC3X_GPIO1_FUNC_AGC_NOISE_IRQ = 7, - AIC3X_GPIO1_FUNC_INPUT = 8, - AIC3X_GPIO1_FUNC_OUTPUT = 9, - AIC3X_GPIO1_FUNC_DIGITAL_MIC_MODCLK = 10, - AIC3X_GPIO1_FUNC_AUDIO_WORDCLK = 11, - AIC3X_GPIO1_FUNC_BUTTON_IRQ = 12, - AIC3X_GPIO1_FUNC_HEADSET_DETECT_IRQ = 13, - AIC3X_GPIO1_FUNC_HEADSET_DETECT_OR_BUTTON_IRQ = 14, - AIC3X_GPIO1_FUNC_ALL_IRQ = 16 -}; - -enum { - AIC3X_GPIO2_FUNC_DISABLED = 0, - AIC3X_GPIO2_FUNC_HEADSET_DETECT_IRQ = 2, - AIC3X_GPIO2_FUNC_INPUT = 3, - AIC3X_GPIO2_FUNC_OUTPUT = 4, - AIC3X_GPIO2_FUNC_DIGITAL_MIC_INPUT = 5, - AIC3X_GPIO2_FUNC_AUDIO_BITCLK = 8, - AIC3X_GPIO2_FUNC_HEADSET_DETECT_OR_BUTTON_IRQ = 9, - AIC3X_GPIO2_FUNC_ALL_IRQ = 10, - AIC3X_GPIO2_FUNC_SHORT_CIRCUIT_OR_AGC_IRQ = 11, - AIC3X_GPIO2_FUNC_HEADSET_OR_BUTTON_PRESS_OR_SHORT_CIRCUIT_IRQ = 12, - AIC3X_GPIO2_FUNC_SHORT_CIRCUIT_IRQ = 13, - AIC3X_GPIO2_FUNC_AGC_NOISE_IRQ = 14, - AIC3X_GPIO2_FUNC_BUTTON_PRESS_IRQ = 15 -}; - -void aic3x_set_gpio(struct snd_soc_codec *codec, int gpio, int state); -int aic3x_get_gpio(struct snd_soc_codec *codec, int gpio); +/* MICBIAS Control Register */ +#define MICBIAS_LEVEL_SHIFT (6) +#define MICBIAS_LEVEL_MASK (3 << 6) /* headset detection / button API */ @@ -275,19 +279,4 @@ enum { #define AIC3X_BUTTON_DEBOUNCE_SHIFT 0 #define AIC3X_BUTTON_DEBOUNCE_MASK 3 -/* see the enums above for valid parameters to this function */ -void aic3x_set_headset_detection(struct snd_soc_codec *codec, int detect, - int headset_debounce, int button_debounce); -int aic3x_headset_detected(struct snd_soc_codec *codec); -int aic3x_button_pressed(struct snd_soc_codec *codec); - -struct aic3x_setup_data { - int i2c_bus; - unsigned short i2c_address; - unsigned int gpio_func[2]; -}; - -extern struct snd_soc_dai aic3x_dai; -extern struct snd_soc_codec_device soc_codec_dev_aic3x; - #endif /* _AIC3X_H */ |