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-rw-r--r--include/dt-bindings/clk/exynos-audss-clk.h25
-rw-r--r--include/dt-bindings/clk/ti-dra7-atl.h40
2 files changed, 40 insertions, 25 deletions
diff --git a/include/dt-bindings/clk/exynos-audss-clk.h b/include/dt-bindings/clk/exynos-audss-clk.h
deleted file mode 100644
index 8279f427c60..00000000000
--- a/include/dt-bindings/clk/exynos-audss-clk.h
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- * This header provides constants for Samsung audio subsystem
- * clock controller.
- *
- * The constants defined in this header are being used in dts
- * and exynos audss driver.
- */
-
-#ifndef _DT_BINDINGS_CLK_EXYNOS_AUDSS_H
-#define _DT_BINDINGS_CLK_EXYNOS_AUDSS_H
-
-#define EXYNOS_MOUT_AUDSS 0
-#define EXYNOS_MOUT_I2S 1
-#define EXYNOS_DOUT_SRP 2
-#define EXYNOS_DOUT_AUD_BUS 3
-#define EXYNOS_DOUT_I2S 4
-#define EXYNOS_SRP_CLK 5
-#define EXYNOS_I2S_BUS 6
-#define EXYNOS_SCLK_I2S 7
-#define EXYNOS_PCM_BUS 8
-#define EXYNOS_SCLK_PCM 9
-
-#define EXYNOS_AUDSS_MAX_CLKS 10
-
-#endif
diff --git a/include/dt-bindings/clk/ti-dra7-atl.h b/include/dt-bindings/clk/ti-dra7-atl.h
new file mode 100644
index 00000000000..42dd4164f6f
--- /dev/null
+++ b/include/dt-bindings/clk/ti-dra7-atl.h
@@ -0,0 +1,40 @@
+/*
+ * This header provides constants for DRA7 ATL (Audio Tracking Logic)
+ *
+ * The constants defined in this header are used in dts files
+ *
+ * Copyright (C) 2013 Texas Instruments, Inc.
+ *
+ * Peter Ujfalusi <peter.ujfalusi@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _DT_BINDINGS_CLK_DRA7_ATL_H
+#define _DT_BINDINGS_CLK_DRA7_ATL_H
+
+#define DRA7_ATL_WS_MCASP1_FSR 0
+#define DRA7_ATL_WS_MCASP1_FSX 1
+#define DRA7_ATL_WS_MCASP2_FSR 2
+#define DRA7_ATL_WS_MCASP2_FSX 3
+#define DRA7_ATL_WS_MCASP3_FSX 4
+#define DRA7_ATL_WS_MCASP4_FSX 5
+#define DRA7_ATL_WS_MCASP5_FSX 6
+#define DRA7_ATL_WS_MCASP6_FSX 7
+#define DRA7_ATL_WS_MCASP7_FSX 8
+#define DRA7_ATL_WS_MCASP8_FSX 9
+#define DRA7_ATL_WS_MCASP8_AHCLKX 10
+#define DRA7_ATL_WS_XREF_CLK3 11
+#define DRA7_ATL_WS_XREF_CLK0 12
+#define DRA7_ATL_WS_XREF_CLK1 13
+#define DRA7_ATL_WS_XREF_CLK2 14
+#define DRA7_ATL_WS_OSC1_X1 15
+
+#endif