diff options
Diffstat (limited to 'include/asm-sh/cpu-sh2')
| -rw-r--r-- | include/asm-sh/cpu-sh2/addrspace.h | 16 | ||||
| -rw-r--r-- | include/asm-sh/cpu-sh2/cache.h | 31 | ||||
| -rw-r--r-- | include/asm-sh/cpu-sh2/cacheflush.h | 42 | ||||
| -rw-r--r-- | include/asm-sh/cpu-sh2/dma.h | 23 | ||||
| -rw-r--r-- | include/asm-sh/cpu-sh2/shmparam.h | 16 | ||||
| -rw-r--r-- | include/asm-sh/cpu-sh2/sigcontext.h | 17 | ||||
| -rw-r--r-- | include/asm-sh/cpu-sh2/ubc.h | 32 | ||||
| -rw-r--r-- | include/asm-sh/cpu-sh2/watchdog.h | 69 |
8 files changed, 0 insertions, 246 deletions
diff --git a/include/asm-sh/cpu-sh2/addrspace.h b/include/asm-sh/cpu-sh2/addrspace.h deleted file mode 100644 index 8706c903c5a..00000000000 --- a/include/asm-sh/cpu-sh2/addrspace.h +++ /dev/null @@ -1,16 +0,0 @@ -/* - * Definitions for the address spaces of the SH-2 CPUs. - * - * Copyright (C) 2003 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_CPU_SH2_ADDRSPACE_H -#define __ASM_CPU_SH2_ADDRSPACE_H - -/* Should fill here */ - -#endif /* __ASM_CPU_SH2_ADDRSPACE_H */ - diff --git a/include/asm-sh/cpu-sh2/cache.h b/include/asm-sh/cpu-sh2/cache.h deleted file mode 100644 index cd96402e856..00000000000 --- a/include/asm-sh/cpu-sh2/cache.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * include/asm-sh/cpu-sh2/cache.h - * - * Copyright (C) 2003 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_CPU_SH2_CACHE_H -#define __ASM_CPU_SH2_CACHE_H - -#define L1_CACHE_SHIFT 4 - -#define CCR 0xfffffe92 /* Address of Cache Control Register */ - -#define CCR_CACHE_CE 0x01 /* Cache enable */ -#define CCR_CACHE_ID 0x02 /* Instruction Replacement disable */ -#define CCR_CACHE_OD 0x04 /* Data Replacement disable */ -#define CCR_CACHE_TW 0x08 /* Two-way mode */ -#define CCR_CACHE_CP 0x10 /* Cache purge */ - -#define CACHE_OC_ADDRESS_ARRAY 0x60000000 - -#define CCR_CACHE_ENABLE CCR_CACHE_CE -#define CCR_CACHE_INVALIDATE CCR_CACHE_CP -#define CCR_CACHE_ORA CCR_CACHE_TW -#define CCR_CACHE_WT 0x00 /* SH-2 is _always_ write-through */ - -#endif /* __ASM_CPU_SH2_CACHE_H */ - diff --git a/include/asm-sh/cpu-sh2/cacheflush.h b/include/asm-sh/cpu-sh2/cacheflush.h deleted file mode 100644 index f556fa80ea9..00000000000 --- a/include/asm-sh/cpu-sh2/cacheflush.h +++ /dev/null @@ -1,42 +0,0 @@ -/* - * include/asm-sh/cpu-sh2/cacheflush.h - * - * Copyright (C) 2003 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_CPU_SH2_CACHEFLUSH_H -#define __ASM_CPU_SH2_CACHEFLUSH_H - -/* - * Cache flushing: - * - * - flush_cache_all() flushes entire cache - * - flush_cache_mm(mm) flushes the specified mm context's cache lines - * - flush_cache_page(mm, vmaddr, pfn) flushes a single page - * - flush_cache_range(vma, start, end) flushes a range of pages - * - * - flush_dcache_page(pg) flushes(wback&invalidates) a page for dcache - * - flush_icache_range(start, end) flushes(invalidates) a range for icache - * - flush_icache_page(vma, pg) flushes(invalidates) a page for icache - * - * Caches are indexed (effectively) by physical address on SH-2, so - * we don't need them. - */ -#define flush_cache_all() do { } while (0) -#define flush_cache_mm(mm) do { } while (0) -#define flush_cache_range(vma, start, end) do { } while (0) -#define flush_cache_page(vma, vmaddr, pfn) do { } while (0) -#define flush_dcache_page(page) do { } while (0) -#define flush_dcache_mmap_lock(mapping) do { } while (0) -#define flush_dcache_mmap_unlock(mapping) do { } while (0) -#define flush_icache_range(start, end) do { } while (0) -#define flush_icache_page(vma,pg) do { } while (0) -#define flush_icache_user_range(vma,pg,adr,len) do { } while (0) -#define flush_cache_sigtramp(vaddr) do { } while (0) - -#define p3_cache_init() do { } while (0) -#endif /* __ASM_CPU_SH2_CACHEFLUSH_H */ - diff --git a/include/asm-sh/cpu-sh2/dma.h b/include/asm-sh/cpu-sh2/dma.h deleted file mode 100644 index d66b43cdc63..00000000000 --- a/include/asm-sh/cpu-sh2/dma.h +++ /dev/null @@ -1,23 +0,0 @@ -/* - * Definitions for the SH-2 DMAC. - * - * Copyright (C) 2003 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_CPU_SH2_DMA_H -#define __ASM_CPU_SH2_DMA_H - -#define SH_MAX_DMA_CHANNELS 2 - -#define SAR ((unsigned long[]){ 0xffffff80, 0xffffff90 }) -#define DAR ((unsigned long[]){ 0xffffff84, 0xffffff94 }) -#define DMATCR ((unsigned long[]){ 0xffffff88, 0xffffff98 }) -#define CHCR ((unsigned long[]){ 0xfffffffc, 0xffffff9c }) - -#define DMAOR 0xffffffb0 - -#endif /* __ASM_CPU_SH2_DMA_H */ - diff --git a/include/asm-sh/cpu-sh2/shmparam.h b/include/asm-sh/cpu-sh2/shmparam.h deleted file mode 100644 index 817c1821ee4..00000000000 --- a/include/asm-sh/cpu-sh2/shmparam.h +++ /dev/null @@ -1,16 +0,0 @@ -/* - * include/asm-sh/cpu-sh2/shmparam.h - * - * Copyright (C) 2003 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_CPU_SH2_SHMPARAM_H -#define __ASM_CPU_SH2_SHMPARAM_H - -#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */ - -#endif /* __ASM_CPU_SH2_SHMPARAM_H */ - diff --git a/include/asm-sh/cpu-sh2/sigcontext.h b/include/asm-sh/cpu-sh2/sigcontext.h deleted file mode 100644 index fe5c15dd6e8..00000000000 --- a/include/asm-sh/cpu-sh2/sigcontext.h +++ /dev/null @@ -1,17 +0,0 @@ -#ifndef __ASM_CPU_SH2_SIGCONTEXT_H -#define __ASM_CPU_SH2_SIGCONTEXT_H - -struct sigcontext { - unsigned long oldmask; - - /* CPU registers */ - unsigned long sc_regs[16]; - unsigned long sc_pc; - unsigned long sc_pr; - unsigned long sc_sr; - unsigned long sc_gbr; - unsigned long sc_mach; - unsigned long sc_macl; -}; - -#endif /* __ASM_CPU_SH2_SIGCONTEXT_H */ diff --git a/include/asm-sh/cpu-sh2/ubc.h b/include/asm-sh/cpu-sh2/ubc.h deleted file mode 100644 index ba0e87f19c7..00000000000 --- a/include/asm-sh/cpu-sh2/ubc.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * include/asm-sh/cpu-sh2/ubc.h - * - * Copyright (C) 2003 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_CPU_SH2_UBC_H -#define __ASM_CPU_SH2_UBC_H - -#define UBC_BARA 0xffffff40 -#define UBC_BAMRA 0xffffff44 -#define UBC_BBRA 0xffffff48 -#define UBC_BARB 0xffffff60 -#define UBC_BAMRB 0xffffff64 -#define UBC_BBRB 0xffffff68 -#define UBC_BDRB 0xffffff70 -#define UBC_BDMRB 0xffffff74 -#define UBC_BRCR 0xffffff78 - -/* - * We don't have any ASID changes to make in the UBC on the SH-2. - * - * Make these purposely invalid to track misuse. - */ -#define UBC_BASRA 0x00000000 -#define UBC_BASRB 0x00000000 - -#endif /* __ASM_CPU_SH2_UBC_H */ - diff --git a/include/asm-sh/cpu-sh2/watchdog.h b/include/asm-sh/cpu-sh2/watchdog.h deleted file mode 100644 index 393161c9c6d..00000000000 --- a/include/asm-sh/cpu-sh2/watchdog.h +++ /dev/null @@ -1,69 +0,0 @@ -/* - * include/asm-sh/cpu-sh2/watchdog.h - * - * Copyright (C) 2002, 2003 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_CPU_SH2_WATCHDOG_H -#define __ASM_CPU_SH2_WATCHDOG_H - -/* - * More SH-2 brilliance .. its not good enough that we can't read - * and write the same sizes to WTCNT, now we have to read and write - * with different sizes at different addresses for WTCNT _and_ RSTCSR. - * - * At least on the bright side no one has managed to screw over WTCSR - * in this fashion .. yet. - */ -/* Register definitions */ -#define WTCNT 0xfffffe80 -#define WTCSR 0xfffffe80 -#define RSTCSR 0xfffffe82 - -#define WTCNT_R (WTCNT + 1) -#define RSTCSR_R (RSTCSR + 1) - -/* Bit definitions */ -#define WTCSR_IOVF 0x80 -#define WTCSR_WT 0x40 -#define WTCSR_TME 0x20 -#define WTCSR_RSTS 0x00 - -#define RSTCSR_RSTS 0x20 - -/** - * sh_wdt_read_rstcsr - Read from Reset Control/Status Register - * - * Reads back the RSTCSR value. - */ -static inline __u8 sh_wdt_read_rstcsr(void) -{ - /* - * Same read/write brain-damage as for WTCNT here.. - */ - return ctrl_inb(RSTCSR_R); -} - -/** - * sh_wdt_write_csr - Write to Reset Control/Status Register - * - * @val: Value to write - * - * Writes the given value @val to the lower byte of the control/status - * register. The upper byte is set manually on each write. - */ -static inline void sh_wdt_write_rstcsr(__u8 val) -{ - /* - * Note: Due to the brain-damaged nature of this register, - * we can't presently touch the WOVF bit, since the upper byte - * has to be swapped for this. So just leave it alone.. - */ - ctrl_outw((WTCNT_HIGH << 8) | (__u16)val, RSTCSR); -} - -#endif /* __ASM_CPU_SH2_WATCHDOG_H */ - |