diff options
Diffstat (limited to 'drivers/video/omap2')
47 files changed, 0 insertions, 33376 deletions
diff --git a/drivers/video/omap2/Kconfig b/drivers/video/omap2/Kconfig deleted file mode 100644 index d877c361abd..00000000000 --- a/drivers/video/omap2/Kconfig +++ /dev/null @@ -1,9 +0,0 @@ -config OMAP2_VRAM - bool - -config OMAP2_VRFB - bool - -source "drivers/video/omap2/dss/Kconfig" -source "drivers/video/omap2/omapfb/Kconfig" -source "drivers/video/omap2/displays/Kconfig" diff --git a/drivers/video/omap2/Makefile b/drivers/video/omap2/Makefile deleted file mode 100644 index 5ddef129f79..00000000000 --- a/drivers/video/omap2/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -obj-$(CONFIG_OMAP2_VRAM) += vram.o -obj-$(CONFIG_OMAP2_VRFB) += vrfb.o - -obj-$(CONFIG_OMAP2_DSS) += dss/ -obj-$(CONFIG_FB_OMAP2) += omapfb/ -obj-y += displays/ diff --git a/drivers/video/omap2/displays/Kconfig b/drivers/video/omap2/displays/Kconfig deleted file mode 100644 index 74d29b55290..00000000000 --- a/drivers/video/omap2/displays/Kconfig +++ /dev/null @@ -1,75 +0,0 @@ -menu "OMAP2/3 Display Device Drivers" - depends on OMAP2_DSS - -config PANEL_GENERIC_DPI - tristate "Generic DPI Panel" - depends on OMAP2_DSS_DPI - help - Generic DPI panel driver. - Supports DVI output for Beagle and OMAP3 SDP. - Supports LCD Panel used in TI SDP3430 and EVM boards, - OMAP3517 EVM boards and CM-T35. - -config PANEL_DVI - tristate "DVI output" - depends on OMAP2_DSS_DPI - help - Driver for external monitors, connected via DVI. The driver uses i2c - to read EDID information from the monitor. - -config PANEL_LGPHILIPS_LB035Q02 - tristate "LG.Philips LB035Q02 LCD Panel" - depends on OMAP2_DSS_DPI && SPI - help - LCD Panel used on the Gumstix Overo Palo35 - -config PANEL_SHARP_LS037V7DW01 - tristate "Sharp LS037V7DW01 LCD Panel" - depends on OMAP2_DSS_DPI - depends on BACKLIGHT_CLASS_DEVICE - help - LCD Panel used in TI's SDP3430 and EVM boards - -config PANEL_NEC_NL8048HL11_01B - tristate "NEC NL8048HL11-01B Panel" - depends on OMAP2_DSS_DPI - depends on SPI - depends on BACKLIGHT_CLASS_DEVICE - help - This NEC NL8048HL11-01B panel is TFT LCD - used in the Zoom2/3/3630 sdp boards. - -config PANEL_PICODLP - tristate "TI PICO DLP mini-projector" - depends on OMAP2_DSS_DPI && I2C - help - A mini-projector used in TI's SDP4430 and EVM boards - For more info please visit http://www.dlp.com/projector/ - -config PANEL_TAAL - tristate "Taal DSI Panel" - depends on OMAP2_DSS_DSI - depends on BACKLIGHT_CLASS_DEVICE - help - Taal DSI command mode panel from TPO. - -config PANEL_TPO_TD043MTEA1 - tristate "TPO TD043MTEA1 LCD Panel" - depends on OMAP2_DSS_DPI && SPI - help - LCD Panel used in OMAP3 Pandora - -config PANEL_ACX565AKM - tristate "ACX565AKM Panel" - depends on OMAP2_DSS_SDI && SPI - depends on BACKLIGHT_CLASS_DEVICE - help - This is the LCD panel used on Nokia N900 - -config PANEL_N8X0 - tristate "N8X0 Panel" - depends on OMAP2_DSS_RFBI && SPI - depends on BACKLIGHT_CLASS_DEVICE - help - This is the LCD panel used on Nokia N8x0 -endmenu diff --git a/drivers/video/omap2/displays/Makefile b/drivers/video/omap2/displays/Makefile deleted file mode 100644 index fbfafc6eebb..00000000000 --- a/drivers/video/omap2/displays/Makefile +++ /dev/null @@ -1,11 +0,0 @@ -obj-$(CONFIG_PANEL_GENERIC_DPI) += panel-generic-dpi.o -obj-$(CONFIG_PANEL_DVI) += panel-dvi.o -obj-$(CONFIG_PANEL_LGPHILIPS_LB035Q02) += panel-lgphilips-lb035q02.o -obj-$(CONFIG_PANEL_SHARP_LS037V7DW01) += panel-sharp-ls037v7dw01.o -obj-$(CONFIG_PANEL_NEC_NL8048HL11_01B) += panel-nec-nl8048hl11-01b.o - -obj-$(CONFIG_PANEL_TAAL) += panel-taal.o -obj-$(CONFIG_PANEL_PICODLP) += panel-picodlp.o -obj-$(CONFIG_PANEL_TPO_TD043MTEA1) += panel-tpo-td043mtea1.o -obj-$(CONFIG_PANEL_ACX565AKM) += panel-acx565akm.o -obj-$(CONFIG_PANEL_N8X0) += panel-n8x0.o diff --git a/drivers/video/omap2/displays/panel-acx565akm.c b/drivers/video/omap2/displays/panel-acx565akm.c deleted file mode 100644 index 51a87e149e2..00000000000 --- a/drivers/video/omap2/displays/panel-acx565akm.c +++ /dev/null @@ -1,827 +0,0 @@ -/* - * Support for ACX565AKM LCD Panel used on Nokia N900 - * - * Copyright (C) 2010 Nokia Corporation - * - * Original Driver Author: Imre Deak <imre.deak@nokia.com> - * Based on panel-generic.c by Tomi Valkeinen <tomi.valkeinen@nokia.com> - * Adapted to new DSS2 framework: Roger Quadros <roger.quadros@nokia.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program. If not, see <http://www.gnu.org/licenses/>. - */ - -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/platform_device.h> -#include <linux/delay.h> -#include <linux/spi/spi.h> -#include <linux/jiffies.h> -#include <linux/sched.h> -#include <linux/backlight.h> -#include <linux/fb.h> - -#include <video/omapdss.h> - -#define MIPID_CMD_READ_DISP_ID 0x04 -#define MIPID_CMD_READ_RED 0x06 -#define MIPID_CMD_READ_GREEN 0x07 -#define MIPID_CMD_READ_BLUE 0x08 -#define MIPID_CMD_READ_DISP_STATUS 0x09 -#define MIPID_CMD_RDDSDR 0x0F -#define MIPID_CMD_SLEEP_IN 0x10 -#define MIPID_CMD_SLEEP_OUT 0x11 -#define MIPID_CMD_DISP_OFF 0x28 -#define MIPID_CMD_DISP_ON 0x29 -#define MIPID_CMD_WRITE_DISP_BRIGHTNESS 0x51 -#define MIPID_CMD_READ_DISP_BRIGHTNESS 0x52 -#define MIPID_CMD_WRITE_CTRL_DISP 0x53 - -#define CTRL_DISP_BRIGHTNESS_CTRL_ON (1 << 5) -#define CTRL_DISP_AMBIENT_LIGHT_CTRL_ON (1 << 4) -#define CTRL_DISP_BACKLIGHT_ON (1 << 2) -#define CTRL_DISP_AUTO_BRIGHTNESS_ON (1 << 1) - -#define MIPID_CMD_READ_CTRL_DISP 0x54 -#define MIPID_CMD_WRITE_CABC 0x55 -#define MIPID_CMD_READ_CABC 0x56 - -#define MIPID_VER_LPH8923 3 -#define MIPID_VER_LS041Y3 4 -#define MIPID_VER_L4F00311 8 -#define MIPID_VER_ACX565AKM 9 - -struct acx565akm_device { - char *name; - int enabled; - int model; - int revision; - u8 display_id[3]; - unsigned has_bc:1; - unsigned has_cabc:1; - unsigned cabc_mode; - unsigned long hw_guard_end; /* next value of jiffies - when we can issue the - next sleep in/out command */ - unsigned long hw_guard_wait; /* max guard time in jiffies */ - - struct spi_device *spi; - struct mutex mutex; - - struct omap_dss_device *dssdev; - struct backlight_device *bl_dev; -}; - -static struct acx565akm_device acx_dev; -static int acx565akm_bl_update_status(struct backlight_device *dev); - -/*--------------------MIPID interface-----------------------------*/ - -static void acx565akm_transfer(struct acx565akm_device *md, int cmd, - const u8 *wbuf, int wlen, u8 *rbuf, int rlen) -{ - struct spi_message m; - struct spi_transfer *x, xfer[5]; - int r; - - BUG_ON(md->spi == NULL); - - spi_message_init(&m); - - memset(xfer, 0, sizeof(xfer)); - x = &xfer[0]; - - cmd &= 0xff; - x->tx_buf = &cmd; - x->bits_per_word = 9; - x->len = 2; - - if (rlen > 1 && wlen == 0) { - /* - * Between the command and the response data there is a - * dummy clock cycle. Add an extra bit after the command - * word to account for this. - */ - x->bits_per_word = 10; - cmd <<= 1; - } - spi_message_add_tail(x, &m); - - if (wlen) { - x++; - x->tx_buf = wbuf; - x->len = wlen; - x->bits_per_word = 9; - spi_message_add_tail(x, &m); - } - - if (rlen) { - x++; - x->rx_buf = rbuf; - x->len = rlen; - spi_message_add_tail(x, &m); - } - - r = spi_sync(md->spi, &m); - if (r < 0) - dev_dbg(&md->spi->dev, "spi_sync %d\n", r); -} - -static inline void acx565akm_cmd(struct acx565akm_device *md, int cmd) -{ - acx565akm_transfer(md, cmd, NULL, 0, NULL, 0); -} - -static inline void acx565akm_write(struct acx565akm_device *md, - int reg, const u8 *buf, int len) -{ - acx565akm_transfer(md, reg, buf, len, NULL, 0); -} - -static inline void acx565akm_read(struct acx565akm_device *md, - int reg, u8 *buf, int len) -{ - acx565akm_transfer(md, reg, NULL, 0, buf, len); -} - -static void hw_guard_start(struct acx565akm_device *md, int guard_msec) -{ - md->hw_guard_wait = msecs_to_jiffies(guard_msec); - md->hw_guard_end = jiffies + md->hw_guard_wait; -} - -static void hw_guard_wait(struct acx565akm_device *md) -{ - unsigned long wait = md->hw_guard_end - jiffies; - - if ((long)wait > 0 && wait <= md->hw_guard_wait) { - set_current_state(TASK_UNINTERRUPTIBLE); - schedule_timeout(wait); - } -} - -/*----------------------MIPID wrappers----------------------------*/ - -static void set_sleep_mode(struct acx565akm_device *md, int on) -{ - int cmd; - - if (on) - cmd = MIPID_CMD_SLEEP_IN; - else - cmd = MIPID_CMD_SLEEP_OUT; - /* - * We have to keep 120msec between sleep in/out commands. - * (8.2.15, 8.2.16). - */ - hw_guard_wait(md); - acx565akm_cmd(md, cmd); - hw_guard_start(md, 120); -} - -static void set_display_state(struct acx565akm_device *md, int enabled) -{ - int cmd = enabled ? MIPID_CMD_DISP_ON : MIPID_CMD_DISP_OFF; - - acx565akm_cmd(md, cmd); -} - -static int panel_enabled(struct acx565akm_device *md) -{ - u32 disp_status; - int enabled; - - acx565akm_read(md, MIPID_CMD_READ_DISP_STATUS, (u8 *)&disp_status, 4); - disp_status = __be32_to_cpu(disp_status); - enabled = (disp_status & (1 << 17)) && (disp_status & (1 << 10)); - dev_dbg(&md->spi->dev, - "LCD panel %senabled by bootloader (status 0x%04x)\n", - enabled ? "" : "not ", disp_status); - return enabled; -} - -static int panel_detect(struct acx565akm_device *md) -{ - acx565akm_read(md, MIPID_CMD_READ_DISP_ID, md->display_id, 3); - dev_dbg(&md->spi->dev, "MIPI display ID: %02x%02x%02x\n", - md->display_id[0], md->display_id[1], md->display_id[2]); - - switch (md->display_id[0]) { - case 0x10: - md->model = MIPID_VER_ACX565AKM; - md->name = "acx565akm"; - md->has_bc = 1; - md->has_cabc = 1; - break; - case 0x29: - md->model = MIPID_VER_L4F00311; - md->name = "l4f00311"; - break; - case 0x45: - md->model = MIPID_VER_LPH8923; - md->name = "lph8923"; - break; - case 0x83: - md->model = MIPID_VER_LS041Y3; - md->name = "ls041y3"; - break; - default: - md->name = "unknown"; - dev_err(&md->spi->dev, "invalid display ID\n"); - return -ENODEV; - } - - md->revision = md->display_id[1]; - - dev_info(&md->spi->dev, "omapfb: %s rev %02x LCD detected\n", - md->name, md->revision); - - return 0; -} - -/*----------------------Backlight Control-------------------------*/ - -static void enable_backlight_ctrl(struct acx565akm_device *md, int enable) -{ - u16 ctrl; - - acx565akm_read(md, MIPID_CMD_READ_CTRL_DISP, (u8 *)&ctrl, 1); - if (enable) { - ctrl |= CTRL_DISP_BRIGHTNESS_CTRL_ON | - CTRL_DISP_BACKLIGHT_ON; - } else { - ctrl &= ~(CTRL_DISP_BRIGHTNESS_CTRL_ON | - CTRL_DISP_BACKLIGHT_ON); - } - - ctrl |= 1 << 8; - acx565akm_write(md, MIPID_CMD_WRITE_CTRL_DISP, (u8 *)&ctrl, 2); -} - -static void set_cabc_mode(struct acx565akm_device *md, unsigned mode) -{ - u16 cabc_ctrl; - - md->cabc_mode = mode; - if (!md->enabled) - return; - cabc_ctrl = 0; - acx565akm_read(md, MIPID_CMD_READ_CABC, (u8 *)&cabc_ctrl, 1); - cabc_ctrl &= ~3; - cabc_ctrl |= (1 << 8) | (mode & 3); - acx565akm_write(md, MIPID_CMD_WRITE_CABC, (u8 *)&cabc_ctrl, 2); -} - -static unsigned get_cabc_mode(struct acx565akm_device *md) -{ - return md->cabc_mode; -} - -static unsigned get_hw_cabc_mode(struct acx565akm_device *md) -{ - u8 cabc_ctrl; - - acx565akm_read(md, MIPID_CMD_READ_CABC, &cabc_ctrl, 1); - return cabc_ctrl & 3; -} - -static void acx565akm_set_brightness(struct acx565akm_device *md, int level) -{ - int bv; - - bv = level | (1 << 8); - acx565akm_write(md, MIPID_CMD_WRITE_DISP_BRIGHTNESS, (u8 *)&bv, 2); - - if (level) - enable_backlight_ctrl(md, 1); - else - enable_backlight_ctrl(md, 0); -} - -static int acx565akm_get_actual_brightness(struct acx565akm_device *md) -{ - u8 bv; - - acx565akm_read(md, MIPID_CMD_READ_DISP_BRIGHTNESS, &bv, 1); - - return bv; -} - - -static int acx565akm_bl_update_status(struct backlight_device *dev) -{ - struct acx565akm_device *md = dev_get_drvdata(&dev->dev); - int r; - int level; - - dev_dbg(&md->spi->dev, "%s\n", __func__); - - mutex_lock(&md->mutex); - - if (dev->props.fb_blank == FB_BLANK_UNBLANK && - dev->props.power == FB_BLANK_UNBLANK) - level = dev->props.brightness; - else - level = 0; - - r = 0; - if (md->has_bc) - acx565akm_set_brightness(md, level); - else if (md->dssdev->set_backlight) - r = md->dssdev->set_backlight(md->dssdev, level); - else - r = -ENODEV; - - mutex_unlock(&md->mutex); - - return r; -} - -static int acx565akm_bl_get_intensity(struct backlight_device *dev) -{ - struct acx565akm_device *md = dev_get_drvdata(&dev->dev); - - dev_dbg(&dev->dev, "%s\n", __func__); - - if (!md->has_bc && md->dssdev->set_backlight == NULL) - return -ENODEV; - - if (dev->props.fb_blank == FB_BLANK_UNBLANK && - dev->props.power == FB_BLANK_UNBLANK) { - if (md->has_bc) - return acx565akm_get_actual_brightness(md); - else - return dev->props.brightness; - } - - return 0; -} - -static const struct backlight_ops acx565akm_bl_ops = { - .get_brightness = acx565akm_bl_get_intensity, - .update_status = acx565akm_bl_update_status, -}; - -/*--------------------Auto Brightness control via Sysfs---------------------*/ - -static const char *cabc_modes[] = { - "off", /* always used when CABC is not supported */ - "ui", - "still-image", - "moving-image", -}; - -static ssize_t show_cabc_mode(struct device *dev, - struct device_attribute *attr, - char *buf) -{ - struct acx565akm_device *md = dev_get_drvdata(dev); - const char *mode_str; - int mode; - int len; - - if (!md->has_cabc) - mode = 0; - else - mode = get_cabc_mode(md); - mode_str = "unknown"; - if (mode >= 0 && mode < ARRAY_SIZE(cabc_modes)) - mode_str = cabc_modes[mode]; - len = snprintf(buf, PAGE_SIZE, "%s\n", mode_str); - - return len < PAGE_SIZE - 1 ? len : PAGE_SIZE - 1; -} - -static ssize_t store_cabc_mode(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t count) -{ - struct acx565akm_device *md = dev_get_drvdata(dev); - int i; - - for (i = 0; i < ARRAY_SIZE(cabc_modes); i++) { - const char *mode_str = cabc_modes[i]; - int cmp_len = strlen(mode_str); - - if (count > 0 && buf[count - 1] == '\n') - count--; - if (count != cmp_len) - continue; - - if (strncmp(buf, mode_str, cmp_len) == 0) - break; - } - - if (i == ARRAY_SIZE(cabc_modes)) - return -EINVAL; - - if (!md->has_cabc && i != 0) - return -EINVAL; - - mutex_lock(&md->mutex); - set_cabc_mode(md, i); - mutex_unlock(&md->mutex); - - return count; -} - -static ssize_t show_cabc_available_modes(struct device *dev, - struct device_attribute *attr, - char *buf) -{ - struct acx565akm_device *md = dev_get_drvdata(dev); - int len; - int i; - - if (!md->has_cabc) - return snprintf(buf, PAGE_SIZE, "%s\n", cabc_modes[0]); - - for (i = 0, len = 0; - len < PAGE_SIZE && i < ARRAY_SIZE(cabc_modes); i++) - len += snprintf(&buf[len], PAGE_SIZE - len, "%s%s%s", - i ? " " : "", cabc_modes[i], - i == ARRAY_SIZE(cabc_modes) - 1 ? "\n" : ""); - - return len < PAGE_SIZE ? len : PAGE_SIZE - 1; -} - -static DEVICE_ATTR(cabc_mode, S_IRUGO | S_IWUSR, - show_cabc_mode, store_cabc_mode); -static DEVICE_ATTR(cabc_available_modes, S_IRUGO, - show_cabc_available_modes, NULL); - -static struct attribute *bldev_attrs[] = { - &dev_attr_cabc_mode.attr, - &dev_attr_cabc_available_modes.attr, - NULL, -}; - -static struct attribute_group bldev_attr_group = { - .attrs = bldev_attrs, -}; - - -/*---------------------------ACX Panel----------------------------*/ - -static int acx_get_recommended_bpp(struct omap_dss_device *dssdev) -{ - return 16; -} - -static struct omap_video_timings acx_panel_timings = { - .x_res = 800, - .y_res = 480, - .pixel_clock = 24000, - .hfp = 28, - .hsw = 4, - .hbp = 24, - .vfp = 3, - .vsw = 3, - .vbp = 4, -}; - -static int acx_panel_probe(struct omap_dss_device *dssdev) -{ - int r; - struct acx565akm_device *md = &acx_dev; - struct backlight_device *bldev; - int max_brightness, brightness; - struct backlight_properties props; - - dev_dbg(&dssdev->dev, "%s\n", __func__); - dssdev->panel.config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IVS | - OMAP_DSS_LCD_IHS; - /* FIXME AC bias ? */ - dssdev->panel.timings = acx_panel_timings; - - if (dssdev->platform_enable) - dssdev->platform_enable(dssdev); - /* - * After reset we have to wait 5 msec before the first - * command can be sent. - */ - msleep(5); - - md->enabled = panel_enabled(md); - - r = panel_detect(md); - if (r) { - dev_err(&dssdev->dev, "%s panel detect error\n", __func__); - if (!md->enabled && dssdev->platform_disable) - dssdev->platform_disable(dssdev); - return r; - } - - mutex_lock(&acx_dev.mutex); - acx_dev.dssdev = dssdev; - mutex_unlock(&acx_dev.mutex); - - if (!md->enabled) { - if (dssdev->platform_disable) - dssdev->platform_disable(dssdev); - } - - /*------- Backlight control --------*/ - - props.fb_blank = FB_BLANK_UNBLANK; - props.power = FB_BLANK_UNBLANK; - props.type = BACKLIGHT_RAW; - - bldev = backlight_device_register("acx565akm", &md->spi->dev, - md, &acx565akm_bl_ops, &props); - md->bl_dev = bldev; - if (md->has_cabc) { - r = sysfs_create_group(&bldev->dev.kobj, &bldev_attr_group); - if (r) { - dev_err(&bldev->dev, - "%s failed to create sysfs files\n", __func__); - backlight_device_unregister(bldev); - return r; - } - md->cabc_mode = get_hw_cabc_mode(md); - } - - if (md->has_bc) - max_brightness = 255; - else - max_brightness = dssdev->max_backlight_level; - - if (md->has_bc) - brightness = acx565akm_get_actual_brightness(md); - else if (dssdev->get_backlight) - brightness = dssdev->get_backlight(dssdev); - else - brightness = 0; - - bldev->props.max_brightness = max_brightness; - bldev->props.brightness = brightness; - - acx565akm_bl_update_status(bldev); - return 0; -} - -static void acx_panel_remove(struct omap_dss_device *dssdev) -{ - struct acx565akm_device *md = &acx_dev; - - dev_dbg(&dssdev->dev, "%s\n", __func__); - sysfs_remove_group(&md->bl_dev->dev.kobj, &bldev_attr_group); - backlight_device_unregister(md->bl_dev); - mutex_lock(&acx_dev.mutex); - acx_dev.dssdev = NULL; - mutex_unlock(&acx_dev.mutex); -} - -static int acx_panel_power_on(struct omap_dss_device *dssdev) -{ - struct acx565akm_device *md = &acx_dev; - int r; - - dev_dbg(&dssdev->dev, "%s\n", __func__); - - if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE) - return 0; - - mutex_lock(&md->mutex); - - r = omapdss_sdi_display_enable(dssdev); - if (r) { - pr_err("%s sdi enable failed\n", __func__); - goto fail_unlock; - } - - /*FIXME tweak me */ - msleep(50); - - if (dssdev->platform_enable) { - r = dssdev->platform_enable(dssdev); - if (r) - goto fail; - } - - if (md->enabled) { - dev_dbg(&md->spi->dev, "panel already enabled\n"); - mutex_unlock(&md->mutex); - return 0; - } - - /* - * We have to meet all the following delay requirements: - * 1. tRW: reset pulse width 10usec (7.12.1) - * 2. tRT: reset cancel time 5msec (7.12.1) - * 3. Providing PCLK,HS,VS signals for 2 frames = ~50msec worst - * case (7.6.2) - * 4. 120msec before the sleep out command (7.12.1) - */ - msleep(120); - - set_sleep_mode(md, 0); - md->enabled = 1; - - /* 5msec between sleep out and the next command. (8.2.16) */ - msleep(5); - set_display_state(md, 1); - set_cabc_mode(md, md->cabc_mode); - - mutex_unlock(&md->mutex); - - return acx565akm_bl_update_status(md->bl_dev); -fail: - omapdss_sdi_display_disable(dssdev); -fail_unlock: - mutex_unlock(&md->mutex); - return r; -} - -static void acx_panel_power_off(struct omap_dss_device *dssdev) -{ - struct acx565akm_device *md = &acx_dev; - - dev_dbg(&dssdev->dev, "%s\n", __func__); - - if (dssdev->state != OMAP_DSS_DISPLAY_ACTIVE) - return; - - mutex_lock(&md->mutex); - - if (!md->enabled) { - mutex_unlock(&md->mutex); - return; - } - set_display_state(md, 0); - set_sleep_mode(md, 1); - md->enabled = 0; - /* - * We have to provide PCLK,HS,VS signals for 2 frames (worst case - * ~50msec) after sending the sleep in command and asserting the - * reset signal. We probably could assert the reset w/o the delay - * but we still delay to avoid possible artifacts. (7.6.1) - */ - msleep(50); - - if (dssdev->platform_disable) - dssdev->platform_disable(dssdev); - - /* FIXME need to tweak this delay */ - msleep(100); - - omapdss_sdi_display_disable(dssdev); - - mutex_unlock(&md->mutex); -} - -static int acx_panel_enable(struct omap_dss_device *dssdev) -{ - int r; - - dev_dbg(&dssdev->dev, "%s\n", __func__); - r = acx_panel_power_on(dssdev); - - if (r) - return r; - - dssdev->state = OMAP_DSS_DISPLAY_ACTIVE; - return 0; -} - -static void acx_panel_disable(struct omap_dss_device *dssdev) -{ - dev_dbg(&dssdev->dev, "%s\n", __func__); - acx_panel_power_off(dssdev); - dssdev->state = OMAP_DSS_DISPLAY_DISABLED; -} - -static int acx_panel_suspend(struct omap_dss_device *dssdev) -{ - dev_dbg(&dssdev->dev, "%s\n", __func__); - acx_panel_power_off(dssdev); - dssdev->state = OMAP_DSS_DISPLAY_SUSPENDED; - return 0; -} - -static int acx_panel_resume(struct omap_dss_device *dssdev) -{ - int r; - - dev_dbg(&dssdev->dev, "%s\n", __func__); - r = acx_panel_power_on(dssdev); - if (r) - return r; - - dssdev->state = OMAP_DSS_DISPLAY_ACTIVE; - return 0; -} - -static void acx_panel_set_timings(struct omap_dss_device *dssdev, - struct omap_video_timings *timings) -{ - int r; - - if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE) - omapdss_sdi_display_disable(dssdev); - - dssdev->panel.timings = *timings; - - if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE) { - r = omapdss_sdi_display_enable(dssdev); - if (r) - dev_err(&dssdev->dev, "%s enable failed\n", __func__); - } -} - -static void acx_panel_get_timings(struct omap_dss_device *dssdev, - struct omap_video_timings *timings) -{ - *timings = dssdev->panel.timings; -} - -static int acx_panel_check_timings(struct omap_dss_device *dssdev, - struct omap_video_timings *timings) -{ - return 0; -} - - -static struct omap_dss_driver acx_panel_driver = { - .probe = acx_panel_probe, - .remove = acx_panel_remove, - - .enable = acx_panel_enable, - .disable = acx_panel_disable, - .suspend = acx_panel_suspend, - .resume = acx_panel_resume, - - .set_timings = acx_panel_set_timings, - .get_timings = acx_panel_get_timings, - .check_timings = acx_panel_check_timings, - - .get_recommended_bpp = acx_get_recommended_bpp, - - .driver = { - .name = "panel-acx565akm", - .owner = THIS_MODULE, - }, -}; - -/*--------------------SPI probe-------------------------*/ - -static int acx565akm_spi_probe(struct spi_device *spi) -{ - struct acx565akm_device *md = &acx_dev; - - dev_dbg(&spi->dev, "%s\n", __func__); - - spi->mode = SPI_MODE_3; - md->spi = spi; - mutex_init(&md->mutex); - dev_set_drvdata(&spi->dev, md); - - omap_dss_register_driver(&acx_panel_driver); - - return 0; -} - -static int acx565akm_spi_remove(struct spi_device *spi) -{ - struct acx565akm_device *md = dev_get_drvdata(&spi->dev); - - dev_dbg(&md->spi->dev, "%s\n", __func__); - omap_dss_unregister_driver(&acx_panel_driver); - - return 0; -} - -static struct spi_driver acx565akm_spi_driver = { - .driver = { - .name = "acx565akm", - .owner = THIS_MODULE, - }, - .probe = acx565akm_spi_probe, - .remove = __devexit_p(acx565akm_spi_remove), -}; - -static int __init acx565akm_init(void) -{ - return spi_register_driver(&acx565akm_spi_driver); -} - -static void __exit acx565akm_exit(void) -{ - spi_unregister_driver(&acx565akm_spi_driver); -} - -module_init(acx565akm_init); -module_exit(acx565akm_exit); - -MODULE_AUTHOR("Nokia Corporation"); -MODULE_DESCRIPTION("acx565akm LCD Driver"); -MODULE_LICENSE("GPL"); diff --git a/drivers/video/omap2/displays/panel-dvi.c b/drivers/video/omap2/displays/panel-dvi.c deleted file mode 100644 index 03eb14af33e..00000000000 --- a/drivers/video/omap2/displays/panel-dvi.c +++ /dev/null @@ -1,363 +0,0 @@ -/* - * DVI output support - * - * Copyright (C) 2011 Texas Instruments Inc - * Author: Tomi Valkeinen <tomi.valkeinen@ti.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program. If not, see <http://www.gnu.org/licenses/>. - */ - -#include <linux/module.h> -#include <linux/slab.h> -#include <video/omapdss.h> -#include <linux/i2c.h> -#include <drm/drm_edid.h> - -#include <video/omap-panel-dvi.h> - -static const struct omap_video_timings panel_dvi_default_timings = { - .x_res = 640, - .y_res = 480, - - .pixel_clock = 23500, - - .hfp = 48, - .hsw = 32, - .hbp = 80, - - .vfp = 3, - .vsw = 4, - .vbp = 7, -}; - -struct panel_drv_data { - struct omap_dss_device *dssdev; - - struct mutex lock; -}; - -static inline struct panel_dvi_platform_data -*get_pdata(const struct omap_dss_device *dssdev) -{ - return dssdev->data; -} - -static int panel_dvi_power_on(struct omap_dss_device *dssdev) -{ - struct panel_dvi_platform_data *pdata = get_pdata(dssdev); - int r; - - if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE) - return 0; - - r = omapdss_dpi_display_enable(dssdev); - if (r) - goto err0; - - if (pdata->platform_enable) { - r = pdata->platform_enable(dssdev); - if (r) - goto err1; - } - - return 0; -err1: - omapdss_dpi_display_disable(dssdev); -err0: - return r; -} - -static void panel_dvi_power_off(struct omap_dss_device *dssdev) -{ - struct panel_dvi_platform_data *pdata = get_pdata(dssdev); - - if (dssdev->state != OMAP_DSS_DISPLAY_ACTIVE) - return; - - if (pdata->platform_disable) - pdata->platform_disable(dssdev); - - omapdss_dpi_display_disable(dssdev); -} - -static int panel_dvi_probe(struct omap_dss_device *dssdev) -{ - struct panel_drv_data *ddata; - - ddata = kzalloc(sizeof(*ddata), GFP_KERNEL); - if (!ddata) - return -ENOMEM; - - dssdev->panel.timings = panel_dvi_default_timings; - dssdev->panel.config = OMAP_DSS_LCD_TFT; - - ddata->dssdev = dssdev; - mutex_init(&ddata->lock); - - dev_set_drvdata(&dssdev->dev, ddata); - - return 0; -} - -static void __exit panel_dvi_remove(struct omap_dss_device *dssdev) -{ - struct panel_drv_data *ddata = dev_get_drvdata(&dssdev->dev); - - mutex_lock(&ddata->lock); - - dev_set_drvdata(&dssdev->dev, NULL); - - mutex_unlock(&ddata->lock); - - kfree(ddata); -} - -static int panel_dvi_enable(struct omap_dss_device *dssdev) -{ - struct panel_drv_data *ddata = dev_get_drvdata(&dssdev->dev); - int r; - - mutex_lock(&ddata->lock); - - r = panel_dvi_power_on(dssdev); - if (r == 0) - dssdev->state = OMAP_DSS_DISPLAY_ACTIVE; - - mutex_unlock(&ddata->lock); - - return r; -} - -static void panel_dvi_disable(struct omap_dss_device *dssdev) -{ - struct panel_drv_data *ddata = dev_get_drvdata(&dssdev->dev); - - mutex_lock(&ddata->lock); - - panel_dvi_power_off(dssdev); - - dssdev->state = OMAP_DSS_DISPLAY_DISABLED; - - mutex_unlock(&ddata->lock); -} - -static int panel_dvi_suspend(struct omap_dss_device *dssdev) -{ - struct panel_drv_data *ddata = dev_get_drvdata(&dssdev->dev); - - mutex_lock(&ddata->lock); - - panel_dvi_power_off(dssdev); - - dssdev->state = OMAP_DSS_DISPLAY_SUSPENDED; - - mutex_unlock(&ddata->lock); - - return 0; -} - -static int panel_dvi_resume(struct omap_dss_device *dssdev) -{ - struct panel_drv_data *ddata = dev_get_drvdata(&dssdev->dev); - int r; - - mutex_lock(&ddata->lock); - - r = panel_dvi_power_on(dssdev); - if (r == 0) - dssdev->state = OMAP_DSS_DISPLAY_ACTIVE; - - mutex_unlock(&ddata->lock); - - return r; -} - -static void panel_dvi_set_timings(struct omap_dss_device *dssdev, - struct omap_video_timings *timings) -{ - struct panel_drv_data *ddata = dev_get_drvdata(&dssdev->dev); - - mutex_lock(&ddata->lock); - dpi_set_timings(dssdev, timings); - mutex_unlock(&ddata->lock); -} - -static void panel_dvi_get_timings(struct omap_dss_device *dssdev, - struct omap_video_timings *timings) -{ - struct panel_drv_data *ddata = dev_get_drvdata(&dssdev->dev); - - mutex_lock(&ddata->lock); - *timings = dssdev->panel.timings; - mutex_unlock(&ddata->lock); -} - -static int panel_dvi_check_timings(struct omap_dss_device *dssdev, - struct omap_video_timings *timings) -{ - struct panel_drv_data *ddata = dev_get_drvdata(&dssdev->dev); - int r; - - mutex_lock(&ddata->lock); - r = dpi_check_timings(dssdev, timings); - mutex_unlock(&ddata->lock); - - return r; -} - - -static int panel_dvi_ddc_read(struct i2c_adapter *adapter, - unsigned char *buf, u16 count, u8 offset) -{ - int r, retries; - - for (retries = 3; retries > 0; retries--) { - struct i2c_msg msgs[] = { - { - .addr = DDC_ADDR, - .flags = 0, - .len = 1, - .buf = &offset, - }, { - .addr = DDC_ADDR, - .flags = I2C_M_RD, - .len = count, - .buf = buf, - } - }; - - r = i2c_transfer(adapter, msgs, 2); - if (r == 2) - return 0; - - if (r != -EAGAIN) - break; - } - - return r < 0 ? r : -EIO; -} - -static int panel_dvi_read_edid(struct omap_dss_device *dssdev, - u8 *edid, int len) -{ - struct panel_drv_data *ddata = dev_get_drvdata(&dssdev->dev); - struct panel_dvi_platform_data *pdata = get_pdata(dssdev); - struct i2c_adapter *adapter; - int r, l, bytes_read; - - mutex_lock(&ddata->lock); - - if (pdata->i2c_bus_num == 0) { - r = -ENODEV; - goto err; - } - - adapter = i2c_get_adapter(pdata->i2c_bus_num); - if (!adapter) { - dev_err(&dssdev->dev, "Failed to get I2C adapter, bus %d\n", - pdata->i2c_bus_num); - r = -EINVAL; - goto err; - } - - l = min(EDID_LENGTH, len); - r = panel_dvi_ddc_read(adapter, edid, l, 0); - if (r) - goto err; - - bytes_read = l; - - /* if there are extensions, read second block */ - if (len > EDID_LENGTH && edid[0x7e] > 0) { - l = min(EDID_LENGTH, len - EDID_LENGTH); - - r = panel_dvi_ddc_read(adapter, edid + EDID_LENGTH, - l, EDID_LENGTH); - if (r) - goto err; - - bytes_read += l; - } - - mutex_unlock(&ddata->lock); - - return bytes_read; - -err: - mutex_unlock(&ddata->lock); - return r; -} - -static bool panel_dvi_detect(struct omap_dss_device *dssdev) -{ - struct panel_drv_data *ddata = dev_get_drvdata(&dssdev->dev); - struct panel_dvi_platform_data *pdata = get_pdata(dssdev); - struct i2c_adapter *adapter; - unsigned char out; - int r; - - mutex_lock(&ddata->lock); - - if (pdata->i2c_bus_num == 0) - goto out; - - adapter = i2c_get_adapter(pdata->i2c_bus_num); - if (!adapter) - goto out; - - r = panel_dvi_ddc_read(adapter, &out, 1, 0); - - mutex_unlock(&ddata->lock); - - return r == 0; - -out: - mutex_unlock(&ddata->lock); - return true; -} - -static struct omap_dss_driver panel_dvi_driver = { - .probe = panel_dvi_probe, - .remove = __exit_p(panel_dvi_remove), - - .enable = panel_dvi_enable, - .disable = panel_dvi_disable, - .suspend = panel_dvi_suspend, - .resume = panel_dvi_resume, - - .set_timings = panel_dvi_set_timings, - .get_timings = panel_dvi_get_timings, - .check_timings = panel_dvi_check_timings, - - .read_edid = panel_dvi_read_edid, - .detect = panel_dvi_detect, - - .driver = { - .name = "dvi", - .owner = THIS_MODULE, - }, -}; - -static int __init panel_dvi_init(void) -{ - return omap_dss_register_driver(&panel_dvi_driver); -} - -static void __exit panel_dvi_exit(void) -{ - omap_dss_unregister_driver(&panel_dvi_driver); -} - -module_init(panel_dvi_init); -module_exit(panel_dvi_exit); -MODULE_LICENSE("GPL"); diff --git a/drivers/video/omap2/displays/panel-generic-dpi.c b/drivers/video/omap2/displays/panel-generic-dpi.c deleted file mode 100644 index 28b9a6d61b0..00000000000 --- a/drivers/video/omap2/displays/panel-generic-dpi.c +++ /dev/null @@ -1,572 +0,0 @@ -/* - * Generic DPI Panels support - * - * Copyright (C) 2010 Canonical Ltd. - * Author: Bryan Wu <bryan.wu@canonical.com> - * - * LCD panel driver for Sharp LQ043T1DG01 - * - * Copyright (C) 2009 Texas Instruments Inc - * Author: Vaibhav Hiremath <hvaibhav@ti.com> - * - * LCD panel driver for Toppoly TDO35S - * - * Copyright (C) 2009 CompuLab, Ltd. - * Author: Mike Rapoport <mike@compulab.co.il> - * - * Copyright (C) 2008 Nokia Corporation - * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program. If not, see <http://www.gnu.org/licenses/>. - */ - -#include <linux/module.h> -#include <linux/delay.h> -#include <linux/slab.h> -#include <video/omapdss.h> - -#include <video/omap-panel-generic-dpi.h> - -struct panel_config { - struct omap_video_timings timings; - - int acbi; /* ac-bias pin transitions per interrupt */ - /* Unit: line clocks */ - int acb; /* ac-bias pin frequency */ - - enum omap_panel_config config; - - int power_on_delay; - int power_off_delay; - - /* - * Used to match device to panel configuration - * when use generic panel driver - */ - const char *name; -}; - -/* Panel configurations */ -static struct panel_config generic_dpi_panels[] = { - /* Sharp LQ043T1DG01 */ - { - { - .x_res = 480, - .y_res = 272, - - .pixel_clock = 9000, - - .hsw = 42, - .hfp = 3, - .hbp = 2, - - .vsw = 11, - .vfp = 3, - .vbp = 2, - }, - .acbi = 0x0, - .acb = 0x0, - .config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IVS | - OMAP_DSS_LCD_IHS | OMAP_DSS_LCD_IEO, - .power_on_delay = 50, - .power_off_delay = 100, - .name = "sharp_lq", - }, - - /* Sharp LS037V7DW01 */ - { - { - .x_res = 480, - .y_res = 640, - - .pixel_clock = 19200, - - .hsw = 2, - .hfp = 1, - .hbp = 28, - - .vsw = 1, - .vfp = 1, - .vbp = 1, - }, - .acbi = 0x0, - .acb = 0x28, - .config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IVS | - OMAP_DSS_LCD_IHS, - .power_on_delay = 50, - .power_off_delay = 100, - .name = "sharp_ls", - }, - - /* Toppoly TDO35S */ - { - { - .x_res = 480, - .y_res = 640, - - .pixel_clock = 26000, - - .hfp = 104, - .hsw = 8, - .hbp = 8, - - .vfp = 4, - .vsw = 2, - .vbp = 2, - }, - .acbi = 0x0, - .acb = 0x0, - .config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IVS | - OMAP_DSS_LCD_IHS | OMAP_DSS_LCD_IPC | - OMAP_DSS_LCD_ONOFF, - .power_on_delay = 0, - .power_off_delay = 0, - .name = "toppoly_tdo35s", - }, - - /* Samsung LTE430WQ-F0C */ - { - { - .x_res = 480, - .y_res = 272, - - .pixel_clock = 9200, - - .hfp = 8, - .hsw = 41, - .hbp = 45 - 41, - - .vfp = 4, - .vsw = 10, - .vbp = 12 - 10, - }, - .acbi = 0x0, - .acb = 0x0, - .config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IVS | - OMAP_DSS_LCD_IHS, - .power_on_delay = 0, - .power_off_delay = 0, - .name = "samsung_lte430wq_f0c", - }, - - /* Seiko 70WVW1TZ3Z3 */ - { - { - .x_res = 800, - .y_res = 480, - - .pixel_clock = 33000, - - .hsw = 128, - .hfp = 10, - .hbp = 10, - - .vsw = 2, - .vfp = 4, - .vbp = 11, - }, - .acbi = 0x0, - .acb = 0x0, - .config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IVS | - OMAP_DSS_LCD_IHS, - .power_on_delay = 0, - .power_off_delay = 0, - .name = "seiko_70wvw1tz3", - }, - - /* Powertip PH480272T */ - { - { - .x_res = 480, - .y_res = 272, - - .pixel_clock = 9000, - - .hsw = 40, - .hfp = 2, - .hbp = 2, - - .vsw = 10, - .vfp = 2, - .vbp = 2, - }, - .acbi = 0x0, - .acb = 0x0, - .config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IVS | - OMAP_DSS_LCD_IHS | OMAP_DSS_LCD_IEO, - .power_on_delay = 0, - .power_off_delay = 0, - .name = "powertip_ph480272t", - }, - - /* Innolux AT070TN83 */ - { - { - .x_res = 800, - .y_res = 480, - - .pixel_clock = 40000, - - .hsw = 48, - .hfp = 1, - .hbp = 1, - - .vsw = 3, - .vfp = 12, - .vbp = 25, - }, - .acbi = 0x0, - .acb = 0x28, - .config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IVS | - OMAP_DSS_LCD_IHS, - .power_on_delay = 0, - .power_off_delay = 0, - .name = "innolux_at070tn83", - }, - - /* NEC NL2432DR22-11B */ - { - { - .x_res = 240, - .y_res = 320, - - .pixel_clock = 5400, - - .hsw = 3, - .hfp = 3, - .hbp = 39, - - .vsw = 1, - .vfp = 2, - .vbp = 7, - }, - .config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IVS | - OMAP_DSS_LCD_IHS, - .name = "nec_nl2432dr22-11b", - }, - - /* Unknown panel used in OMAP H4 */ - { - { - .x_res = 240, - .y_res = 320, - - .pixel_clock = 6250, - - .hsw = 15, - .hfp = 15, - .hbp = 60, - - .vsw = 1, - .vfp = 1, - .vbp = 1, - }, - .config = OMAP_DSS_LCD_TFT, - - .name = "h4", - }, - - /* Unknown panel used in Samsung OMAP2 Apollon */ - { - { - .x_res = 480, - .y_res = 272, - - .pixel_clock = 6250, - - .hsw = 41, - .hfp = 2, - .hbp = 2, - - .vsw = 10, - .vfp = 2, - .vbp = 2, - }, - .config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IVS | - OMAP_DSS_LCD_IHS, - - .name = "apollon", - }, - /* FocalTech ETM070003DH6 */ - { - { - .x_res = 800, - .y_res = 480, - - .pixel_clock = 28000, - - .hsw = 48, - .hfp = 40, - .hbp = 40, - - .vsw = 3, - .vfp = 13, - .vbp = 29, - }, - .config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IVS | - OMAP_DSS_LCD_IHS, - .name = "focaltech_etm070003dh6", - }, - - /* Microtips Technologies - UMSH-8173MD */ - { - { - .x_res = 800, - .y_res = 480, - - .pixel_clock = 34560, - - .hsw = 13, - .hfp = 101, - .hbp = 101, - - .vsw = 23, - .vfp = 1, - .vbp = 1, - }, - .acbi = 0x0, - .acb = 0x0, - .config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IVS | - OMAP_DSS_LCD_IHS | OMAP_DSS_LCD_IPC, - .power_on_delay = 0, - .power_off_delay = 0, - .name = "microtips_umsh_8173md", - }, - - /* OrtusTech COM43H4M10XTC */ - { - { - .x_res = 480, - .y_res = 272, - - .pixel_clock = 8000, - - .hsw = 41, - .hfp = 8, - .hbp = 4, - - .vsw = 10, - .vfp = 4, - .vbp = 2, - }, - .config = OMAP_DSS_LCD_TFT, - - .name = "ortustech_com43h4m10xtc", - }, -}; - -struct panel_drv_data { - - struct omap_dss_device *dssdev; - - struct panel_config *panel_config; -}; - -static inline struct panel_generic_dpi_data -*get_panel_data(const struct omap_dss_device *dssdev) -{ - return (struct panel_generic_dpi_data *) dssdev->data; -} - -static int generic_dpi_panel_power_on(struct omap_dss_device *dssdev) -{ - int r; - struct panel_generic_dpi_data *panel_data = get_panel_data(dssdev); - struct panel_drv_data *drv_data = dev_get_drvdata(&dssdev->dev); - struct panel_config *panel_config = drv_data->panel_config; - - if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE) - return 0; - - r = omapdss_dpi_display_enable(dssdev); - if (r) - goto err0; - - /* wait couple of vsyncs until enabling the LCD */ - if (panel_config->power_on_delay) - msleep(panel_config->power_on_delay); - - if (panel_data->platform_enable) { - r = panel_data->platform_enable(dssdev); - if (r) - goto err1; - } - - return 0; -err1: - omapdss_dpi_display_disable(dssdev); -err0: - return r; -} - -static void generic_dpi_panel_power_off(struct omap_dss_device *dssdev) -{ - struct panel_generic_dpi_data *panel_data = get_panel_data(dssdev); - struct panel_drv_data *drv_data = dev_get_drvdata(&dssdev->dev); - struct panel_config *panel_config = drv_data->panel_config; - - if (dssdev->state != OMAP_DSS_DISPLAY_ACTIVE) - return; - - if (panel_data->platform_disable) - panel_data->platform_disable(dssdev); - - /* wait couple of vsyncs after disabling the LCD */ - if (panel_config->power_off_delay) - msleep(panel_config->power_off_delay); - - omapdss_dpi_display_disable(dssdev); -} - -static int generic_dpi_panel_probe(struct omap_dss_device *dssdev) -{ - struct panel_generic_dpi_data *panel_data = get_panel_data(dssdev); - struct panel_config *panel_config = NULL; - struct panel_drv_data *drv_data = NULL; - int i; - - dev_dbg(&dssdev->dev, "probe\n"); - - if (!panel_data || !panel_data->name) - return -EINVAL; - - for (i = 0; i < ARRAY_SIZE(generic_dpi_panels); i++) { - if (strcmp(panel_data->name, generic_dpi_panels[i].name) == 0) { - panel_config = &generic_dpi_panels[i]; - break; - } - } - - if (!panel_config) - return -EINVAL; - - dssdev->panel.config = panel_config->config; - dssdev->panel.timings = panel_config->timings; - dssdev->panel.acb = panel_config->acb; - dssdev->panel.acbi = panel_config->acbi; - - drv_data = kzalloc(sizeof(*drv_data), GFP_KERNEL); - if (!drv_data) - return -ENOMEM; - - drv_data->dssdev = dssdev; - drv_data->panel_config = panel_config; - - dev_set_drvdata(&dssdev->dev, drv_data); - - return 0; -} - -static void __exit generic_dpi_panel_remove(struct omap_dss_device *dssdev) -{ - struct panel_drv_data *drv_data = dev_get_drvdata(&dssdev->dev); - - dev_dbg(&dssdev->dev, "remove\n"); - - kfree(drv_data); - - dev_set_drvdata(&dssdev->dev, NULL); -} - -static int generic_dpi_panel_enable(struct omap_dss_device *dssdev) -{ - int r = 0; - - r = generic_dpi_panel_power_on(dssdev); - if (r) - return r; - - dssdev->state = OMAP_DSS_DISPLAY_ACTIVE; - - return 0; -} - -static void generic_dpi_panel_disable(struct omap_dss_device *dssdev) -{ - generic_dpi_panel_power_off(dssdev); - - dssdev->state = OMAP_DSS_DISPLAY_DISABLED; -} - -static int generic_dpi_panel_suspend(struct omap_dss_device *dssdev) -{ - generic_dpi_panel_power_off(dssdev); - - dssdev->state = OMAP_DSS_DISPLAY_SUSPENDED; - - return 0; -} - -static int generic_dpi_panel_resume(struct omap_dss_device *dssdev) -{ - int r = 0; - - r = generic_dpi_panel_power_on(dssdev); - if (r) - return r; - - dssdev->state = OMAP_DSS_DISPLAY_ACTIVE; - - return 0; -} - -static void generic_dpi_panel_set_timings(struct omap_dss_device *dssdev, - struct omap_video_timings *timings) -{ - dpi_set_timings(dssdev, timings); -} - -static void generic_dpi_panel_get_timings(struct omap_dss_device *dssdev, - struct omap_video_timings *timings) -{ - *timings = dssdev->panel.timings; -} - -static int generic_dpi_panel_check_timings(struct omap_dss_device *dssdev, - struct omap_video_timings *timings) -{ - return dpi_check_timings(dssdev, timings); -} - -static struct omap_dss_driver dpi_driver = { - .probe = generic_dpi_panel_probe, - .remove = __exit_p(generic_dpi_panel_remove), - - .enable = generic_dpi_panel_enable, - .disable = generic_dpi_panel_disable, - .suspend = generic_dpi_panel_suspend, - .resume = generic_dpi_panel_resume, - - .set_timings = generic_dpi_panel_set_timings, - .get_timings = generic_dpi_panel_get_timings, - .check_timings = generic_dpi_panel_check_timings, - - .driver = { - .name = "generic_dpi_panel", - .owner = THIS_MODULE, - }, -}; - -static int __init generic_dpi_panel_drv_init(void) -{ - return omap_dss_register_driver(&dpi_driver); -} - -static void __exit generic_dpi_panel_drv_exit(void) -{ - omap_dss_unregister_driver(&dpi_driver); -} - -module_init(generic_dpi_panel_drv_init); -module_exit(generic_dpi_panel_drv_exit); -MODULE_LICENSE("GPL"); diff --git a/drivers/video/omap2/displays/panel-lgphilips-lb035q02.c b/drivers/video/omap2/displays/panel-lgphilips-lb035q02.c deleted file mode 100644 index e0eb35be303..00000000000 --- a/drivers/video/omap2/displays/panel-lgphilips-lb035q02.c +++ /dev/null @@ -1,279 +0,0 @@ -/* - * LCD panel driver for LG.Philips LB035Q02 - * - * Author: Steve Sakoman <steve@sakoman.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program. If not, see <http://www.gnu.org/licenses/>. - */ - -#include <linux/module.h> -#include <linux/delay.h> -#include <linux/spi/spi.h> -#include <linux/mutex.h> - -#include <video/omapdss.h> - -struct lb035q02_data { - struct mutex lock; -}; - -static struct omap_video_timings lb035q02_timings = { - .x_res = 320, - .y_res = 240, - - .pixel_clock = 6500, - - .hsw = 2, - .hfp = 20, - .hbp = 68, - - .vsw = 2, - .vfp = 4, - .vbp = 18, -}; - -static int lb035q02_panel_power_on(struct omap_dss_device *dssdev) -{ - int r; - - if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE) - return 0; - - r = omapdss_dpi_display_enable(dssdev); - if (r) - goto err0; - - if (dssdev->platform_enable) { - r = dssdev->platform_enable(dssdev); - if (r) - goto err1; - } - - return 0; -err1: - omapdss_dpi_display_disable(dssdev); -err0: - return r; -} - -static void lb035q02_panel_power_off(struct omap_dss_device *dssdev) -{ - if (dssdev->state != OMAP_DSS_DISPLAY_ACTIVE) - return; - - if (dssdev->platform_disable) - dssdev->platform_disable(dssdev); - - omapdss_dpi_display_disable(dssdev); -} - -static int lb035q02_panel_probe(struct omap_dss_device *dssdev) -{ - struct lb035q02_data *ld; - int r; - - dssdev->panel.config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IVS | - OMAP_DSS_LCD_IHS; - dssdev->panel.timings = lb035q02_timings; - - ld = kzalloc(sizeof(*ld), GFP_KERNEL); - if (!ld) { - r = -ENOMEM; - goto err; - } - mutex_init(&ld->lock); - dev_set_drvdata(&dssdev->dev, ld); - return 0; -err: - return r; -} - -static void lb035q02_panel_remove(struct omap_dss_device *dssdev) -{ - struct lb035q02_data *ld = dev_get_drvdata(&dssdev->dev); - - kfree(ld); -} - -static int lb035q02_panel_enable(struct omap_dss_device *dssdev) -{ - struct lb035q02_data *ld = dev_get_drvdata(&dssdev->dev); - int r; - - mutex_lock(&ld->lock); - - r = lb035q02_panel_power_on(dssdev); - if (r) - goto err; - dssdev->state = OMAP_DSS_DISPLAY_ACTIVE; - - mutex_unlock(&ld->lock); - return 0; -err: - mutex_unlock(&ld->lock); - return r; -} - -static void lb035q02_panel_disable(struct omap_dss_device *dssdev) -{ - struct lb035q02_data *ld = dev_get_drvdata(&dssdev->dev); - - mutex_lock(&ld->lock); - - lb035q02_panel_power_off(dssdev); - dssdev->state = OMAP_DSS_DISPLAY_DISABLED; - - mutex_unlock(&ld->lock); -} - -static int lb035q02_panel_suspend(struct omap_dss_device *dssdev) -{ - struct lb035q02_data *ld = dev_get_drvdata(&dssdev->dev); - - mutex_lock(&ld->lock); - - lb035q02_panel_power_off(dssdev); - dssdev->state = OMAP_DSS_DISPLAY_SUSPENDED; - - mutex_unlock(&ld->lock); - return 0; -} - -static int lb035q02_panel_resume(struct omap_dss_device *dssdev) -{ - struct lb035q02_data *ld = dev_get_drvdata(&dssdev->dev); - int r; - - mutex_lock(&ld->lock); - - r = lb035q02_panel_power_on(dssdev); - if (r) - goto err; - dssdev->state = OMAP_DSS_DISPLAY_ACTIVE; - - mutex_unlock(&ld->lock); - return 0; -err: - mutex_unlock(&ld->lock); - return r; -} - -static struct omap_dss_driver lb035q02_driver = { - .probe = lb035q02_panel_probe, - .remove = lb035q02_panel_remove, - - .enable = lb035q02_panel_enable, - .disable = lb035q02_panel_disable, - .suspend = lb035q02_panel_suspend, - .resume = lb035q02_panel_resume, - - .driver = { - .name = "lgphilips_lb035q02_panel", - .owner = THIS_MODULE, - }, -}; - -static int lb035q02_write_reg(struct spi_device *spi, u8 reg, u16 val) -{ - struct spi_message msg; - struct spi_transfer index_xfer = { - .len = 3, - .cs_change = 1, - }; - struct spi_transfer value_xfer = { - .len = 3, - }; - u8 buffer[16]; - - spi_message_init(&msg); - - /* register index */ - buffer[0] = 0x70; - buffer[1] = 0x00; - buffer[2] = reg & 0x7f; - index_xfer.tx_buf = buffer; - spi_message_add_tail(&index_xfer, &msg); - - /* register value */ - buffer[4] = 0x72; - buffer[5] = val >> 8; - buffer[6] = val; - value_xfer.tx_buf = buffer + 4; - spi_message_add_tail(&value_xfer, &msg); - - return spi_sync(spi, &msg); -} - -static void init_lb035q02_panel(struct spi_device *spi) -{ - /* Init sequence from page 28 of the lb035q02 spec */ - lb035q02_write_reg(spi, 0x01, 0x6300); - lb035q02_write_reg(spi, 0x02, 0x0200); - lb035q02_write_reg(spi, 0x03, 0x0177); - lb035q02_write_reg(spi, 0x04, 0x04c7); - lb035q02_write_reg(spi, 0x05, 0xffc0); - lb035q02_write_reg(spi, 0x06, 0xe806); - lb035q02_write_reg(spi, 0x0a, 0x4008); - lb035q02_write_reg(spi, 0x0b, 0x0000); - lb035q02_write_reg(spi, 0x0d, 0x0030); - lb035q02_write_reg(spi, 0x0e, 0x2800); - lb035q02_write_reg(spi, 0x0f, 0x0000); - lb035q02_write_reg(spi, 0x16, 0x9f80); - lb035q02_write_reg(spi, 0x17, 0x0a0f); - lb035q02_write_reg(spi, 0x1e, 0x00c1); - lb035q02_write_reg(spi, 0x30, 0x0300); - lb035q02_write_reg(spi, 0x31, 0x0007); - lb035q02_write_reg(spi, 0x32, 0x0000); - lb035q02_write_reg(spi, 0x33, 0x0000); - lb035q02_write_reg(spi, 0x34, 0x0707); - lb035q02_write_reg(spi, 0x35, 0x0004); - lb035q02_write_reg(spi, 0x36, 0x0302); - lb035q02_write_reg(spi, 0x37, 0x0202); - lb035q02_write_reg(spi, 0x3a, 0x0a0d); - lb035q02_write_reg(spi, 0x3b, 0x0806); -} - -static int __devinit lb035q02_panel_spi_probe(struct spi_device *spi) -{ - init_lb035q02_panel(spi); - return omap_dss_register_driver(&lb035q02_driver); -} - -static int __devexit lb035q02_panel_spi_remove(struct spi_device *spi) -{ - omap_dss_unregister_driver(&lb035q02_driver); - return 0; -} - -static struct spi_driver lb035q02_spi_driver = { - .driver = { - .name = "lgphilips_lb035q02_panel-spi", - .owner = THIS_MODULE, - }, - .probe = lb035q02_panel_spi_probe, - .remove = __devexit_p(lb035q02_panel_spi_remove), -}; - -static int __init lb035q02_panel_drv_init(void) -{ - return spi_register_driver(&lb035q02_spi_driver); -} - -static void __exit lb035q02_panel_drv_exit(void) -{ - spi_unregister_driver(&lb035q02_spi_driver); -} - -module_init(lb035q02_panel_drv_init); -module_exit(lb035q02_panel_drv_exit); -MODULE_LICENSE("GPL"); diff --git a/drivers/video/omap2/displays/panel-n8x0.c b/drivers/video/omap2/displays/panel-n8x0.c deleted file mode 100644 index dc9408dc93d..00000000000 --- a/drivers/video/omap2/displays/panel-n8x0.c +++ /dev/null @@ -1,746 +0,0 @@ -/* #define DEBUG */ - -#include <linux/module.h> -#include <linux/delay.h> -#include <linux/slab.h> -#include <linux/gpio.h> -#include <linux/spi/spi.h> -#include <linux/backlight.h> -#include <linux/fb.h> - -#include <video/omapdss.h> -#include <video/omap-panel-n8x0.h> - -#define BLIZZARD_REV_CODE 0x00 -#define BLIZZARD_CONFIG 0x02 -#define BLIZZARD_PLL_DIV 0x04 -#define BLIZZARD_PLL_LOCK_RANGE 0x06 -#define BLIZZARD_PLL_CLOCK_SYNTH_0 0x08 -#define BLIZZARD_PLL_CLOCK_SYNTH_1 0x0a -#define BLIZZARD_PLL_MODE 0x0c -#define BLIZZARD_CLK_SRC 0x0e -#define BLIZZARD_MEM_BANK0_ACTIVATE 0x10 -#define BLIZZARD_MEM_BANK0_STATUS 0x14 -#define BLIZZARD_PANEL_CONFIGURATION 0x28 -#define BLIZZARD_HDISP 0x2a -#define BLIZZARD_HNDP 0x2c -#define BLIZZARD_VDISP0 0x2e -#define BLIZZARD_VDISP1 0x30 -#define BLIZZARD_VNDP 0x32 -#define BLIZZARD_HSW 0x34 -#define BLIZZARD_VSW 0x38 -#define BLIZZARD_DISPLAY_MODE 0x68 -#define BLIZZARD_INPUT_WIN_X_START_0 0x6c -#define BLIZZARD_DATA_SOURCE_SELECT 0x8e -#define BLIZZARD_DISP_MEM_DATA_PORT 0x90 -#define BLIZZARD_DISP_MEM_READ_ADDR0 0x92 -#define BLIZZARD_POWER_SAVE 0xE6 -#define BLIZZARD_NDISP_CTRL_STATUS 0xE8 - -/* Data source select */ -/* For S1D13745 */ -#define BLIZZARD_SRC_WRITE_LCD_BACKGROUND 0x00 -#define BLIZZARD_SRC_WRITE_LCD_DESTRUCTIVE 0x01 -#define BLIZZARD_SRC_WRITE_OVERLAY_ENABLE 0x04 -#define BLIZZARD_SRC_DISABLE_OVERLAY 0x05 -/* For S1D13744 */ -#define BLIZZARD_SRC_WRITE_LCD 0x00 -#define BLIZZARD_SRC_BLT_LCD 0x06 - -#define BLIZZARD_COLOR_RGB565 0x01 -#define BLIZZARD_COLOR_YUV420 0x09 - -#define BLIZZARD_VERSION_S1D13745 0x01 /* Hailstorm */ -#define BLIZZARD_VERSION_S1D13744 0x02 /* Blizzard */ - -#define MIPID_CMD_READ_DISP_ID 0x04 -#define MIPID_CMD_READ_RED 0x06 -#define MIPID_CMD_READ_GREEN 0x07 -#define MIPID_CMD_READ_BLUE 0x08 -#define MIPID_CMD_READ_DISP_STATUS 0x09 -#define MIPID_CMD_RDDSDR 0x0F -#define MIPID_CMD_SLEEP_IN 0x10 -#define MIPID_CMD_SLEEP_OUT 0x11 -#define MIPID_CMD_DISP_OFF 0x28 -#define MIPID_CMD_DISP_ON 0x29 - -static struct panel_drv_data { - struct mutex lock; - - struct omap_dss_device *dssdev; - struct spi_device *spidev; - struct backlight_device *bldev; - - int blizzard_ver; -} s_drv_data; - - -static inline -struct panel_n8x0_data *get_board_data(const struct omap_dss_device *dssdev) -{ - return dssdev->data; -} - -static inline -struct panel_drv_data *get_drv_data(const struct omap_dss_device *dssdev) -{ - return &s_drv_data; -} - - -static inline void blizzard_cmd(u8 cmd) -{ - omap_rfbi_write_command(&cmd, 1); -} - -static inline void blizzard_write(u8 cmd, const u8 *buf, int len) -{ - omap_rfbi_write_command(&cmd, 1); - omap_rfbi_write_data(buf, len); -} - -static inline void blizzard_read(u8 cmd, u8 *buf, int len) -{ - omap_rfbi_write_command(&cmd, 1); - omap_rfbi_read_data(buf, len); -} - -static u8 blizzard_read_reg(u8 cmd) -{ - u8 data; - blizzard_read(cmd, &data, 1); - return data; -} - -static void blizzard_ctrl_setup_update(struct omap_dss_device *dssdev, - int x, int y, int w, int h) -{ - struct panel_drv_data *ddata = get_drv_data(dssdev); - u8 tmp[18]; - int x_end, y_end; - - x_end = x + w - 1; - y_end = y + h - 1; - - tmp[0] = x; - tmp[1] = x >> 8; - tmp[2] = y; - tmp[3] = y >> 8; - tmp[4] = x_end; - tmp[5] = x_end >> 8; - tmp[6] = y_end; - tmp[7] = y_end >> 8; - - /* scaling? */ - tmp[8] = x; - tmp[9] = x >> 8; - tmp[10] = y; - tmp[11] = y >> 8; - tmp[12] = x_end; - tmp[13] = x_end >> 8; - tmp[14] = y_end; - tmp[15] = y_end >> 8; - - tmp[16] = BLIZZARD_COLOR_RGB565; - - if (ddata->blizzard_ver == BLIZZARD_VERSION_S1D13745) - tmp[17] = BLIZZARD_SRC_WRITE_LCD_BACKGROUND; - else - tmp[17] = ddata->blizzard_ver == BLIZZARD_VERSION_S1D13744 ? - BLIZZARD_SRC_WRITE_LCD : - BLIZZARD_SRC_WRITE_LCD_DESTRUCTIVE; - - omap_rfbi_configure(dssdev, 16, 8); - - blizzard_write(BLIZZARD_INPUT_WIN_X_START_0, tmp, 18); - - omap_rfbi_configure(dssdev, 16, 16); -} - -static void mipid_transfer(struct spi_device *spi, int cmd, const u8 *wbuf, - int wlen, u8 *rbuf, int rlen) -{ - struct spi_message m; - struct spi_transfer *x, xfer[4]; - u16 w; - int r; - - spi_message_init(&m); - - memset(xfer, 0, sizeof(xfer)); - x = &xfer[0]; - - cmd &= 0xff; - x->tx_buf = &cmd; - x->bits_per_word = 9; - x->len = 2; - spi_message_add_tail(x, &m); - - if (wlen) { - x++; - x->tx_buf = wbuf; - x->len = wlen; - x->bits_per_word = 9; - spi_message_add_tail(x, &m); - } - - if (rlen) { - x++; - x->rx_buf = &w; - x->len = 1; - spi_message_add_tail(x, &m); - - if (rlen > 1) { - /* Arrange for the extra clock before the first - * data bit. - */ - x->bits_per_word = 9; - x->len = 2; - - x++; - x->rx_buf = &rbuf[1]; - x->len = rlen - 1; - spi_message_add_tail(x, &m); - } - } - - r = spi_sync(spi, &m); - if (r < 0) - dev_dbg(&spi->dev, "spi_sync %d\n", r); - - if (rlen) - rbuf[0] = w & 0xff; -} - -static inline void mipid_cmd(struct spi_device *spi, int cmd) -{ - mipid_transfer(spi, cmd, NULL, 0, NULL, 0); -} - -static inline void mipid_write(struct spi_device *spi, - int reg, const u8 *buf, int len) -{ - mipid_transfer(spi, reg, buf, len, NULL, 0); -} - -static inline void mipid_read(struct spi_device *spi, - int reg, u8 *buf, int len) -{ - mipid_transfer(spi, reg, NULL, 0, buf, len); -} - -static void set_data_lines(struct spi_device *spi, int data_lines) -{ - u16 par; - - switch (data_lines) { - case 16: - par = 0x150; - break; - case 18: - par = 0x160; - break; - case 24: - par = 0x170; - break; - } - - mipid_write(spi, 0x3a, (u8 *)&par, 2); -} - -static void send_init_string(struct spi_device *spi) -{ - u16 initpar[] = { 0x0102, 0x0100, 0x0100 }; - mipid_write(spi, 0xc2, (u8 *)initpar, sizeof(initpar)); -} - -static void send_display_on(struct spi_device *spi) -{ - mipid_cmd(spi, MIPID_CMD_DISP_ON); -} - -static void send_display_off(struct spi_device *spi) -{ - mipid_cmd(spi, MIPID_CMD_DISP_OFF); -} - -static void send_sleep_out(struct spi_device *spi) -{ - mipid_cmd(spi, MIPID_CMD_SLEEP_OUT); - msleep(120); -} - -static void send_sleep_in(struct spi_device *spi) -{ - mipid_cmd(spi, MIPID_CMD_SLEEP_IN); - msleep(50); -} - -static int n8x0_panel_power_on(struct omap_dss_device *dssdev) -{ - int r; - struct panel_n8x0_data *bdata = get_board_data(dssdev); - struct panel_drv_data *ddata = get_drv_data(dssdev); - struct spi_device *spi = ddata->spidev; - u8 rev, conf; - u8 display_id[3]; - const char *panel_name; - - if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE) - return 0; - - gpio_direction_output(bdata->ctrl_pwrdown, 1); - - if (bdata->platform_enable) { - r = bdata->platform_enable(dssdev); - if (r) - goto err_plat_en; - } - - r = omapdss_rfbi_display_enable(dssdev); - if (r) - goto err_rfbi_en; - - rev = blizzard_read_reg(BLIZZARD_REV_CODE); - conf = blizzard_read_reg(BLIZZARD_CONFIG); - - switch (rev & 0xfc) { - case 0x9c: - ddata->blizzard_ver = BLIZZARD_VERSION_S1D13744; - dev_info(&dssdev->dev, "s1d13744 LCD controller rev %d " - "initialized (CNF pins %x)\n", rev & 0x03, conf & 0x07); - break; - case 0xa4: - ddata->blizzard_ver = BLIZZARD_VERSION_S1D13745; - dev_info(&dssdev->dev, "s1d13745 LCD controller rev %d " - "initialized (CNF pins %x)\n", rev & 0x03, conf & 0x07); - break; - default: - dev_err(&dssdev->dev, "invalid s1d1374x revision %02x\n", rev); - r = -ENODEV; - goto err_inv_chip; - } - - /* panel */ - - gpio_direction_output(bdata->panel_reset, 1); - - mipid_read(spi, MIPID_CMD_READ_DISP_ID, display_id, 3); - dev_dbg(&spi->dev, "MIPI display ID: %02x%02x%02x\n", - display_id[0], display_id[1], display_id[2]); - - switch (display_id[0]) { - case 0x45: - panel_name = "lph8923"; - break; - case 0x83: - panel_name = "ls041y3"; - break; - default: - dev_err(&dssdev->dev, "invalid display ID 0x%x\n", - display_id[0]); - r = -ENODEV; - goto err_inv_panel; - } - - dev_info(&dssdev->dev, "%s rev %02x LCD detected\n", - panel_name, display_id[1]); - - send_sleep_out(spi); - send_init_string(spi); - set_data_lines(spi, 24); - send_display_on(spi); - - return 0; - -err_inv_panel: - /* - * HACK: we should turn off the panel here, but there is some problem - * with the initialization sequence, and we fail to init the panel if we - * have turned it off - */ - /* gpio_direction_output(bdata->panel_reset, 0); */ -err_inv_chip: - omapdss_rfbi_display_disable(dssdev); -err_rfbi_en: - if (bdata->platform_disable) - bdata->platform_disable(dssdev); -err_plat_en: - gpio_direction_output(bdata->ctrl_pwrdown, 0); - return r; -} - -static void n8x0_panel_power_off(struct omap_dss_device *dssdev) -{ - struct panel_n8x0_data *bdata = get_board_data(dssdev); - struct panel_drv_data *ddata = get_drv_data(dssdev); - struct spi_device *spi = ddata->spidev; - - if (dssdev->state != OMAP_DSS_DISPLAY_ACTIVE) - return; - - send_display_off(spi); - send_sleep_in(spi); - - if (bdata->platform_disable) - bdata->platform_disable(dssdev); - - /* - * HACK: we should turn off the panel here, but there is some problem - * with the initialization sequence, and we fail to init the panel if we - * have turned it off - */ - /* gpio_direction_output(bdata->panel_reset, 0); */ - gpio_direction_output(bdata->ctrl_pwrdown, 0); - omapdss_rfbi_display_disable(dssdev); -} - -static const struct rfbi_timings n8x0_panel_timings = { - .cs_on_time = 0, - - .we_on_time = 9000, - .we_off_time = 18000, - .we_cycle_time = 36000, - - .re_on_time = 9000, - .re_off_time = 27000, - .re_cycle_time = 36000, - - .access_time = 27000, - .cs_off_time = 36000, - - .cs_pulse_width = 0, -}; - -static int n8x0_bl_update_status(struct backlight_device *dev) -{ - struct omap_dss_device *dssdev = dev_get_drvdata(&dev->dev); - struct panel_n8x0_data *bdata = get_board_data(dssdev); - struct panel_drv_data *ddata = get_drv_data(dssdev); - int r; - int level; - - mutex_lock(&ddata->lock); - - if (dev->props.fb_blank == FB_BLANK_UNBLANK && - dev->props.power == FB_BLANK_UNBLANK) - level = dev->props.brightness; - else - level = 0; - - dev_dbg(&dssdev->dev, "update brightness to %d\n", level); - - if (!bdata->set_backlight) - r = -EINVAL; - else - r = bdata->set_backlight(dssdev, level); - - mutex_unlock(&ddata->lock); - - return r; -} - -static int n8x0_bl_get_intensity(struct backlight_device *dev) -{ - if (dev->props.fb_blank == FB_BLANK_UNBLANK && - dev->props.power == FB_BLANK_UNBLANK) - return dev->props.brightness; - - return 0; -} - -static const struct backlight_ops n8x0_bl_ops = { - .get_brightness = n8x0_bl_get_intensity, - .update_status = n8x0_bl_update_status, -}; - -static int n8x0_panel_probe(struct omap_dss_device *dssdev) -{ - struct panel_n8x0_data *bdata = get_board_data(dssdev); - struct panel_drv_data *ddata; - struct backlight_device *bldev; - struct backlight_properties props; - int r; - - dev_dbg(&dssdev->dev, "probe\n"); - - if (!bdata) - return -EINVAL; - - s_drv_data.dssdev = dssdev; - - ddata = &s_drv_data; - - mutex_init(&ddata->lock); - - dssdev->panel.config = OMAP_DSS_LCD_TFT; - dssdev->panel.timings.x_res = 800; - dssdev->panel.timings.y_res = 480; - dssdev->ctrl.pixel_size = 16; - dssdev->ctrl.rfbi_timings = n8x0_panel_timings; - - memset(&props, 0, sizeof(props)); - props.max_brightness = 127; - props.type = BACKLIGHT_PLATFORM; - bldev = backlight_device_register(dev_name(&dssdev->dev), &dssdev->dev, - dssdev, &n8x0_bl_ops, &props); - if (IS_ERR(bldev)) { - r = PTR_ERR(bldev); - dev_err(&dssdev->dev, "register backlight failed\n"); - return r; - } - - ddata->bldev = bldev; - - bldev->props.fb_blank = FB_BLANK_UNBLANK; - bldev->props.power = FB_BLANK_UNBLANK; - bldev->props.brightness = 127; - - n8x0_bl_update_status(bldev); - - return 0; -} - -static void n8x0_panel_remove(struct omap_dss_device *dssdev) -{ - struct panel_drv_data *ddata = get_drv_data(dssdev); - struct backlight_device *bldev; - - dev_dbg(&dssdev->dev, "remove\n"); - - bldev = ddata->bldev; - bldev->props.power = FB_BLANK_POWERDOWN; - n8x0_bl_update_status(bldev); - backlight_device_unregister(bldev); - - dev_set_drvdata(&dssdev->dev, NULL); -} - -static int n8x0_panel_enable(struct omap_dss_device *dssdev) -{ - struct panel_drv_data *ddata = get_drv_data(dssdev); - int r; - - dev_dbg(&dssdev->dev, "enable\n"); - - mutex_lock(&ddata->lock); - - rfbi_bus_lock(); - - r = n8x0_panel_power_on(dssdev); - - rfbi_bus_unlock(); - - if (r) { - mutex_unlock(&ddata->lock); - return r; - } - - dssdev->state = OMAP_DSS_DISPLAY_ACTIVE; - - mutex_unlock(&ddata->lock); - - return 0; -} - -static void n8x0_panel_disable(struct omap_dss_device *dssdev) -{ - struct panel_drv_data *ddata = get_drv_data(dssdev); - - dev_dbg(&dssdev->dev, "disable\n"); - - mutex_lock(&ddata->lock); - - rfbi_bus_lock(); - - n8x0_panel_power_off(dssdev); - - rfbi_bus_unlock(); - - dssdev->state = OMAP_DSS_DISPLAY_DISABLED; - - mutex_unlock(&ddata->lock); -} - -static int n8x0_panel_suspend(struct omap_dss_device *dssdev) -{ - struct panel_drv_data *ddata = get_drv_data(dssdev); - - dev_dbg(&dssdev->dev, "suspend\n"); - - mutex_lock(&ddata->lock); - - rfbi_bus_lock(); - - n8x0_panel_power_off(dssdev); - - rfbi_bus_unlock(); - - dssdev->state = OMAP_DSS_DISPLAY_SUSPENDED; - - mutex_unlock(&ddata->lock); - - return 0; -} - -static int n8x0_panel_resume(struct omap_dss_device *dssdev) -{ - struct panel_drv_data *ddata = get_drv_data(dssdev); - int r; - - dev_dbg(&dssdev->dev, "resume\n"); - - mutex_lock(&ddata->lock); - - rfbi_bus_lock(); - - r = n8x0_panel_power_on(dssdev); - - rfbi_bus_unlock(); - - if (r) { - mutex_unlock(&ddata->lock); - return r; - } - - dssdev->state = OMAP_DSS_DISPLAY_ACTIVE; - - mutex_unlock(&ddata->lock); - - return 0; -} - -static void n8x0_panel_get_timings(struct omap_dss_device *dssdev, - struct omap_video_timings *timings) -{ - *timings = dssdev->panel.timings; -} - -static void n8x0_panel_get_resolution(struct omap_dss_device *dssdev, - u16 *xres, u16 *yres) -{ - *xres = dssdev->panel.timings.x_res; - *yres = dssdev->panel.timings.y_res; -} - -static void update_done(void *data) -{ - rfbi_bus_unlock(); -} - -static int n8x0_panel_update(struct omap_dss_device *dssdev, - u16 x, u16 y, u16 w, u16 h) -{ - struct panel_drv_data *ddata = get_drv_data(dssdev); - - dev_dbg(&dssdev->dev, "update\n"); - - mutex_lock(&ddata->lock); - rfbi_bus_lock(); - - omap_rfbi_prepare_update(dssdev, &x, &y, &w, &h); - - blizzard_ctrl_setup_update(dssdev, x, y, w, h); - - omap_rfbi_update(dssdev, x, y, w, h, update_done, NULL); - - mutex_unlock(&ddata->lock); - - return 0; -} - -static int n8x0_panel_sync(struct omap_dss_device *dssdev) -{ - struct panel_drv_data *ddata = get_drv_data(dssdev); - - dev_dbg(&dssdev->dev, "sync\n"); - - mutex_lock(&ddata->lock); - rfbi_bus_lock(); - rfbi_bus_unlock(); - mutex_unlock(&ddata->lock); - - return 0; -} - -static struct omap_dss_driver n8x0_panel_driver = { - .probe = n8x0_panel_probe, - .remove = n8x0_panel_remove, - - .enable = n8x0_panel_enable, - .disable = n8x0_panel_disable, - .suspend = n8x0_panel_suspend, - .resume = n8x0_panel_resume, - - .update = n8x0_panel_update, - .sync = n8x0_panel_sync, - - .get_resolution = n8x0_panel_get_resolution, - .get_recommended_bpp = omapdss_default_get_recommended_bpp, - - .get_timings = n8x0_panel_get_timings, - - .driver = { - .name = "n8x0_panel", - .owner = THIS_MODULE, - }, -}; - -/* PANEL */ - -static int mipid_spi_probe(struct spi_device *spi) -{ - dev_dbg(&spi->dev, "mipid_spi_probe\n"); - - spi->mode = SPI_MODE_0; - - s_drv_data.spidev = spi; - - return 0; -} - -static int mipid_spi_remove(struct spi_device *spi) -{ - dev_dbg(&spi->dev, "mipid_spi_remove\n"); - return 0; -} - -static struct spi_driver mipid_spi_driver = { - .driver = { - .name = "lcd_mipid", - .owner = THIS_MODULE, - }, - .probe = mipid_spi_probe, - .remove = __devexit_p(mipid_spi_remove), -}; - -static int __init n8x0_panel_drv_init(void) -{ - int r; - - r = spi_register_driver(&mipid_spi_driver); - if (r) { - pr_err("n8x0_panel: spi driver registration failed\n"); - return r; - } - - r = omap_dss_register_driver(&n8x0_panel_driver); - if (r) { - pr_err("n8x0_panel: dss driver registration failed\n"); - spi_unregister_driver(&mipid_spi_driver); - return r; - } - - return 0; -} - -static void __exit n8x0_panel_drv_exit(void) -{ - spi_unregister_driver(&mipid_spi_driver); - - omap_dss_unregister_driver(&n8x0_panel_driver); -} - -module_init(n8x0_panel_drv_init); -module_exit(n8x0_panel_drv_exit); -MODULE_LICENSE("GPL"); diff --git a/drivers/video/omap2/displays/panel-nec-nl8048hl11-01b.c b/drivers/video/omap2/displays/panel-nec-nl8048hl11-01b.c deleted file mode 100644 index 0eb31caddca..00000000000 --- a/drivers/video/omap2/displays/panel-nec-nl8048hl11-01b.c +++ /dev/null @@ -1,367 +0,0 @@ -/* - * Support for NEC-nl8048hl11-01b panel driver - * - * Copyright (C) 2010 Texas Instruments Inc. - * Author: Erik Gilling <konkers@android.com> - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program. If not, see <http://www.gnu.org/licenses/>. - */ - -#include <linux/module.h> -#include <linux/delay.h> -#include <linux/spi/spi.h> -#include <linux/backlight.h> -#include <linux/fb.h> - -#include <video/omapdss.h> - -#define LCD_XRES 800 -#define LCD_YRES 480 -/* - * NEC PIX Clock Ratings - * MIN:21.8MHz TYP:23.8MHz MAX:25.7MHz - */ -#define LCD_PIXEL_CLOCK 23800 - -struct nec_8048_data { - struct backlight_device *bl; -}; - -static const struct { - unsigned char addr; - unsigned char dat; -} nec_8048_init_seq[] = { - { 3, 0x01 }, { 0, 0x00 }, { 1, 0x01 }, { 4, 0x00 }, { 5, 0x14 }, - { 6, 0x24 }, { 16, 0xD7 }, { 17, 0x00 }, { 18, 0x00 }, { 19, 0x55 }, - { 20, 0x01 }, { 21, 0x70 }, { 22, 0x1E }, { 23, 0x25 }, { 24, 0x25 }, - { 25, 0x02 }, { 26, 0x02 }, { 27, 0xA0 }, { 32, 0x2F }, { 33, 0x0F }, - { 34, 0x0F }, { 35, 0x0F }, { 36, 0x0F }, { 37, 0x0F }, { 38, 0x0F }, - { 39, 0x00 }, { 40, 0x02 }, { 41, 0x02 }, { 42, 0x02 }, { 43, 0x0F }, - { 44, 0x0F }, { 45, 0x0F }, { 46, 0x0F }, { 47, 0x0F }, { 48, 0x0F }, - { 49, 0x0F }, { 50, 0x00 }, { 51, 0x02 }, { 52, 0x02 }, { 53, 0x02 }, - { 80, 0x0C }, { 83, 0x42 }, { 84, 0x42 }, { 85, 0x41 }, { 86, 0x14 }, - { 89, 0x88 }, { 90, 0x01 }, { 91, 0x00 }, { 92, 0x02 }, { 93, 0x0C }, - { 94, 0x1C }, { 95, 0x27 }, { 98, 0x49 }, { 99, 0x27 }, { 102, 0x76 }, - { 103, 0x27 }, { 112, 0x01 }, { 113, 0x0E }, { 114, 0x02 }, - { 115, 0x0C }, { 118, 0x0C }, { 121, 0x30 }, { 130, 0x00 }, - { 131, 0x00 }, { 132, 0xFC }, { 134, 0x00 }, { 136, 0x00 }, - { 138, 0x00 }, { 139, 0x00 }, { 140, 0x00 }, { 141, 0xFC }, - { 143, 0x00 }, { 145, 0x00 }, { 147, 0x00 }, { 148, 0x00 }, - { 149, 0x00 }, { 150, 0xFC }, { 152, 0x00 }, { 154, 0x00 }, - { 156, 0x00 }, { 157, 0x00 }, { 2, 0x00 }, -}; - -/* - * NEC NL8048HL11-01B Manual - * defines HFB, HSW, HBP, VFP, VSW, VBP as shown below - */ - -static struct omap_video_timings nec_8048_panel_timings = { - /* 800 x 480 @ 60 Hz Reduced blanking VESA CVT 0.31M3-R */ - .x_res = LCD_XRES, - .y_res = LCD_YRES, - .pixel_clock = LCD_PIXEL_CLOCK, - .hfp = 6, - .hsw = 1, - .hbp = 4, - .vfp = 3, - .vsw = 1, - .vbp = 4, -}; - -static int nec_8048_bl_update_status(struct backlight_device *bl) -{ - struct omap_dss_device *dssdev = dev_get_drvdata(&bl->dev); - int level; - - if (!dssdev->set_backlight) - return -EINVAL; - - if (bl->props.fb_blank == FB_BLANK_UNBLANK && - bl->props.power == FB_BLANK_UNBLANK) - level = bl->props.brightness; - else - level = 0; - - return dssdev->set_backlight(dssdev, level); -} - -static int nec_8048_bl_get_brightness(struct backlight_device *bl) -{ - if (bl->props.fb_blank == FB_BLANK_UNBLANK && - bl->props.power == FB_BLANK_UNBLANK) - return bl->props.brightness; - - return 0; -} - -static const struct backlight_ops nec_8048_bl_ops = { - .get_brightness = nec_8048_bl_get_brightness, - .update_status = nec_8048_bl_update_status, -}; - -static int nec_8048_panel_probe(struct omap_dss_device *dssdev) -{ - struct backlight_device *bl; - struct nec_8048_data *necd; - struct backlight_properties props; - int r; - - dssdev->panel.config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IVS | - OMAP_DSS_LCD_IHS | OMAP_DSS_LCD_RF | - OMAP_DSS_LCD_ONOFF; - dssdev->panel.timings = nec_8048_panel_timings; - - necd = kzalloc(sizeof(*necd), GFP_KERNEL); - if (!necd) - return -ENOMEM; - - dev_set_drvdata(&dssdev->dev, necd); - - memset(&props, 0, sizeof(struct backlight_properties)); - props.max_brightness = 255; - - bl = backlight_device_register("nec-8048", &dssdev->dev, dssdev, - &nec_8048_bl_ops, &props); - if (IS_ERR(bl)) { - r = PTR_ERR(bl); - kfree(necd); - return r; - } - necd->bl = bl; - - bl->props.fb_blank = FB_BLANK_UNBLANK; - bl->props.power = FB_BLANK_UNBLANK; - bl->props.max_brightness = dssdev->max_backlight_level; - bl->props.brightness = dssdev->max_backlight_level; - - r = nec_8048_bl_update_status(bl); - if (r < 0) - dev_err(&dssdev->dev, "failed to set lcd brightness\n"); - - return 0; -} - -static void nec_8048_panel_remove(struct omap_dss_device *dssdev) -{ - struct nec_8048_data *necd = dev_get_drvdata(&dssdev->dev); - struct backlight_device *bl = necd->bl; - - bl->props.power = FB_BLANK_POWERDOWN; - nec_8048_bl_update_status(bl); - backlight_device_unregister(bl); - - kfree(necd); -} - -static int nec_8048_panel_power_on(struct omap_dss_device *dssdev) -{ - int r; - struct nec_8048_data *necd = dev_get_drvdata(&dssdev->dev); - struct backlight_device *bl = necd->bl; - - if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE) - return 0; - - r = omapdss_dpi_display_enable(dssdev); - if (r) - goto err0; - - if (dssdev->platform_enable) { - r = dssdev->platform_enable(dssdev); - if (r) - goto err1; - } - - r = nec_8048_bl_update_status(bl); - if (r < 0) - dev_err(&dssdev->dev, "failed to set lcd brightness\n"); - - return 0; -err1: - omapdss_dpi_display_disable(dssdev); -err0: - return r; -} - -static void nec_8048_panel_power_off(struct omap_dss_device *dssdev) -{ - struct nec_8048_data *necd = dev_get_drvdata(&dssdev->dev); - struct backlight_device *bl = necd->bl; - - if (dssdev->state != OMAP_DSS_DISPLAY_ACTIVE) - return; - - bl->props.brightness = 0; - nec_8048_bl_update_status(bl); - - if (dssdev->platform_disable) - dssdev->platform_disable(dssdev); - - omapdss_dpi_display_disable(dssdev); -} - -static int nec_8048_panel_enable(struct omap_dss_device *dssdev) -{ - int r; - - r = nec_8048_panel_power_on(dssdev); - if (r) - return r; - - dssdev->state = OMAP_DSS_DISPLAY_ACTIVE; - - return 0; -} - -static void nec_8048_panel_disable(struct omap_dss_device *dssdev) -{ - nec_8048_panel_power_off(dssdev); - - dssdev->state = OMAP_DSS_DISPLAY_DISABLED; -} - -static int nec_8048_panel_suspend(struct omap_dss_device *dssdev) -{ - nec_8048_panel_power_off(dssdev); - - dssdev->state = OMAP_DSS_DISPLAY_SUSPENDED; - - return 0; -} - -static int nec_8048_panel_resume(struct omap_dss_device *dssdev) -{ - int r; - - r = nec_8048_panel_power_on(dssdev); - if (r) - return r; - - dssdev->state = OMAP_DSS_DISPLAY_ACTIVE; - - return 0; -} - -static int nec_8048_recommended_bpp(struct omap_dss_device *dssdev) -{ - return 16; -} - -static struct omap_dss_driver nec_8048_driver = { - .probe = nec_8048_panel_probe, - .remove = nec_8048_panel_remove, - .enable = nec_8048_panel_enable, - .disable = nec_8048_panel_disable, - .suspend = nec_8048_panel_suspend, - .resume = nec_8048_panel_resume, - .get_recommended_bpp = nec_8048_recommended_bpp, - - .driver = { - .name = "NEC_8048_panel", - .owner = THIS_MODULE, - }, -}; - -static int nec_8048_spi_send(struct spi_device *spi, unsigned char reg_addr, - unsigned char reg_data) -{ - int ret = 0; - unsigned int cmd = 0, data = 0; - - cmd = 0x0000 | reg_addr; /* register address write */ - data = 0x0100 | reg_data ; /* register data write */ - data = (cmd << 16) | data; - - ret = spi_write(spi, (unsigned char *)&data, 4); - if (ret) - pr_err("error in spi_write %x\n", data); - - return ret; -} - -static int init_nec_8048_wvga_lcd(struct spi_device *spi) -{ - unsigned int i; - /* Initialization Sequence */ - /* nec_8048_spi_send(spi, REG, VAL) */ - for (i = 0; i < (ARRAY_SIZE(nec_8048_init_seq) - 1); i++) - nec_8048_spi_send(spi, nec_8048_init_seq[i].addr, - nec_8048_init_seq[i].dat); - udelay(20); - nec_8048_spi_send(spi, nec_8048_init_seq[i].addr, - nec_8048_init_seq[i].dat); - return 0; -} - -static int nec_8048_spi_probe(struct spi_device *spi) -{ - spi->mode = SPI_MODE_0; - spi->bits_per_word = 32; - spi_setup(spi); - - init_nec_8048_wvga_lcd(spi); - - return omap_dss_register_driver(&nec_8048_driver); -} - -static int nec_8048_spi_remove(struct spi_device *spi) -{ - omap_dss_unregister_driver(&nec_8048_driver); - - return 0; -} - -static int nec_8048_spi_suspend(struct spi_device *spi, pm_message_t mesg) -{ - nec_8048_spi_send(spi, 2, 0x01); - mdelay(40); - - return 0; -} - -static int nec_8048_spi_resume(struct spi_device *spi) -{ - /* reinitialize the panel */ - spi_setup(spi); - nec_8048_spi_send(spi, 2, 0x00); - init_nec_8048_wvga_lcd(spi); - - return 0; -} - -static struct spi_driver nec_8048_spi_driver = { - .probe = nec_8048_spi_probe, - .remove = __devexit_p(nec_8048_spi_remove), - .suspend = nec_8048_spi_suspend, - .resume = nec_8048_spi_resume, - .driver = { - .name = "nec_8048_spi", - .owner = THIS_MODULE, - }, -}; - -static int __init nec_8048_lcd_init(void) -{ - return spi_register_driver(&nec_8048_spi_driver); -} - -static void __exit nec_8048_lcd_exit(void) -{ - return spi_unregister_driver(&nec_8048_spi_driver); -} - -module_init(nec_8048_lcd_init); -module_exit(nec_8048_lcd_exit); -MODULE_AUTHOR("Erik Gilling <konkers@android.com>"); -MODULE_DESCRIPTION("NEC-nl8048hl11-01b Driver"); -MODULE_LICENSE("GPL"); diff --git a/drivers/video/omap2/displays/panel-picodlp.c b/drivers/video/omap2/displays/panel-picodlp.c deleted file mode 100644 index 98ebdaddab5..00000000000 --- a/drivers/video/omap2/displays/panel-picodlp.c +++ /dev/null @@ -1,594 +0,0 @@ -/* - * picodlp panel driver - * picodlp_i2c_driver: i2c_client driver - * - * Copyright (C) 2009-2011 Texas Instruments - * Author: Mythri P K <mythripk@ti.com> - * Mayuresh Janorkar <mayur@ti.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program. If not, see <http://www.gnu.org/licenses/>. - */ - -#include <linux/module.h> -#include <linux/input.h> -#include <linux/platform_device.h> -#include <linux/interrupt.h> -#include <linux/firmware.h> -#include <linux/slab.h> -#include <linux/mutex.h> -#include <linux/i2c.h> -#include <linux/delay.h> -#include <linux/gpio.h> - -#include <video/omapdss.h> -#include <video/omap-panel-picodlp.h> - -#include "panel-picodlp.h" - -struct picodlp_data { - struct mutex lock; - struct i2c_client *picodlp_i2c_client; -}; - -static struct i2c_board_info picodlp_i2c_board_info = { - I2C_BOARD_INFO("picodlp_i2c_driver", 0x1b), -}; - -struct picodlp_i2c_data { - struct mutex xfer_lock; -}; - -static struct i2c_device_id picodlp_i2c_id[] = { - { "picodlp_i2c_driver", 0 }, -}; - -struct picodlp_i2c_command { - u8 reg; - u32 value; -}; - -static struct omap_video_timings pico_ls_timings = { - .x_res = 864, - .y_res = 480, - .hsw = 7, - .hfp = 11, - .hbp = 7, - - .pixel_clock = 19200, - - .vsw = 2, - .vfp = 3, - .vbp = 14, -}; - -static inline struct picodlp_panel_data - *get_panel_data(const struct omap_dss_device *dssdev) -{ - return (struct picodlp_panel_data *) dssdev->data; -} - -static u32 picodlp_i2c_read(struct i2c_client *client, u8 reg) -{ - u8 read_cmd[] = {READ_REG_SELECT, reg}, data[4]; - struct picodlp_i2c_data *picodlp_i2c_data = i2c_get_clientdata(client); - struct i2c_msg msg[2]; - - mutex_lock(&picodlp_i2c_data->xfer_lock); - - msg[0].addr = client->addr; - msg[0].flags = 0; - msg[0].len = 2; - msg[0].buf = read_cmd; - - msg[1].addr = client->addr; - msg[1].flags = I2C_M_RD; - msg[1].len = 4; - msg[1].buf = data; - - i2c_transfer(client->adapter, msg, 2); - mutex_unlock(&picodlp_i2c_data->xfer_lock); - return (data[3] | (data[2] << 8) | (data[1] << 16) | (data[0] << 24)); -} - -static int picodlp_i2c_write_block(struct i2c_client *client, - u8 *data, int len) -{ - struct i2c_msg msg; - int i, r, msg_count = 1; - - struct picodlp_i2c_data *picodlp_i2c_data = i2c_get_clientdata(client); - - if (len < 1 || len > 32) { - dev_err(&client->dev, - "too long syn_write_block len %d\n", len); - return -EIO; - } - mutex_lock(&picodlp_i2c_data->xfer_lock); - - msg.addr = client->addr; - msg.flags = 0; - msg.len = len; - msg.buf = data; - r = i2c_transfer(client->adapter, &msg, msg_count); - mutex_unlock(&picodlp_i2c_data->xfer_lock); - - /* - * i2c_transfer returns: - * number of messages sent in case of success - * a negative error number in case of failure - */ - if (r != msg_count) - goto err; - - /* In case of success */ - for (i = 0; i < len; i++) - dev_dbg(&client->dev, - "addr %x bw 0x%02x[%d]: 0x%02x\n", - client->addr, data[0] + i, i, data[i]); - - return 0; -err: - dev_err(&client->dev, "picodlp_i2c_write error\n"); - return r; -} - -static int picodlp_i2c_write(struct i2c_client *client, u8 reg, u32 value) -{ - u8 data[5]; - int i; - - data[0] = reg; - for (i = 1; i < 5; i++) - data[i] = (value >> (32 - (i) * 8)) & 0xFF; - - return picodlp_i2c_write_block(client, data, 5); -} - -static int picodlp_i2c_write_array(struct i2c_client *client, - const struct picodlp_i2c_command commands[], - int count) -{ - int i, r = 0; - for (i = 0; i < count; i++) { - r = picodlp_i2c_write(client, commands[i].reg, - commands[i].value); - if (r) - return r; - } - return r; -} - -static int picodlp_wait_for_dma_done(struct i2c_client *client) -{ - u8 trial = 100; - - do { - msleep(1); - if (!trial--) - return -ETIMEDOUT; - } while (picodlp_i2c_read(client, MAIN_STATUS) & DMA_STATUS); - - return 0; -} - -/** - * picodlp_i2c_init: i2c_initialization routine - * client: i2c_client for communication - * - * return - * 0 : Success, no error - * error code : Failure - */ -static int picodlp_i2c_init(struct i2c_client *client) -{ - int r; - static const struct picodlp_i2c_command init_cmd_set1[] = { - {SOFT_RESET, 1}, - {DMD_PARK_TRIGGER, 1}, - {MISC_REG, 5}, - {SEQ_CONTROL, 0}, - {SEQ_VECTOR, 0x100}, - {DMD_BLOCK_COUNT, 7}, - {DMD_VCC_CONTROL, 0x109}, - {DMD_PARK_PULSE_COUNT, 0xA}, - {DMD_PARK_PULSE_WIDTH, 0xB}, - {DMD_PARK_DELAY, 0x2ED}, - {DMD_SHADOW_ENABLE, 0}, - {FLASH_OPCODE, 0xB}, - {FLASH_DUMMY_BYTES, 1}, - {FLASH_ADDR_BYTES, 3}, - {PBC_CONTROL, 0}, - {FLASH_START_ADDR, CMT_LUT_0_START_ADDR}, - {FLASH_READ_BYTES, CMT_LUT_0_SIZE}, - {CMT_SPLASH_LUT_START_ADDR, 0}, - {CMT_SPLASH_LUT_DEST_SELECT, CMT_LUT_ALL}, - {PBC_CONTROL, 1}, - }; - - static const struct picodlp_i2c_command init_cmd_set2[] = { - {PBC_CONTROL, 0}, - {CMT_SPLASH_LUT_DEST_SELECT, 0}, - {PBC_CONTROL, 0}, - {FLASH_START_ADDR, SEQUENCE_0_START_ADDR}, - {FLASH_READ_BYTES, SEQUENCE_0_SIZE}, - {SEQ_RESET_LUT_START_ADDR, 0}, - {SEQ_RESET_LUT_DEST_SELECT, SEQ_SEQ_LUT}, - {PBC_CONTROL, 1}, - }; - - static const struct picodlp_i2c_command init_cmd_set3[] = { - {PBC_CONTROL, 0}, - {SEQ_RESET_LUT_DEST_SELECT, 0}, - {PBC_CONTROL, 0}, - {FLASH_START_ADDR, DRC_TABLE_0_START_ADDR}, - {FLASH_READ_BYTES, DRC_TABLE_0_SIZE}, - {SEQ_RESET_LUT_START_ADDR, 0}, - {SEQ_RESET_LUT_DEST_SELECT, SEQ_DRC_LUT_ALL}, - {PBC_CONTROL, 1}, - }; - - static const struct picodlp_i2c_command init_cmd_set4[] = { - {PBC_CONTROL, 0}, - {SEQ_RESET_LUT_DEST_SELECT, 0}, - {SDC_ENABLE, 1}, - {AGC_CTRL, 7}, - {CCA_C1A, 0x100}, - {CCA_C1B, 0x0}, - {CCA_C1C, 0x0}, - {CCA_C2A, 0x0}, - {CCA_C2B, 0x100}, - {CCA_C2C, 0x0}, - {CCA_C3A, 0x0}, - {CCA_C3B, 0x0}, - {CCA_C3C, 0x100}, - {CCA_C7A, 0x100}, - {CCA_C7B, 0x100}, - {CCA_C7C, 0x100}, - {CCA_ENABLE, 1}, - {CPU_IF_MODE, 1}, - {SHORT_FLIP, 1}, - {CURTAIN_CONTROL, 0}, - {DMD_PARK_TRIGGER, 0}, - {R_DRIVE_CURRENT, 0x298}, - {G_DRIVE_CURRENT, 0x298}, - {B_DRIVE_CURRENT, 0x298}, - {RGB_DRIVER_ENABLE, 7}, - {SEQ_CONTROL, 0}, - {ACTGEN_CONTROL, 0x10}, - {SEQUENCE_MODE, SEQ_LOCK}, - {DATA_FORMAT, RGB888}, - {INPUT_RESOLUTION, WVGA_864_LANDSCAPE}, - {INPUT_SOURCE, PARALLEL_RGB}, - {CPU_IF_SYNC_METHOD, 1}, - {SEQ_CONTROL, 1} - }; - - r = picodlp_i2c_write_array(client, init_cmd_set1, - ARRAY_SIZE(init_cmd_set1)); - if (r) - return r; - - r = picodlp_wait_for_dma_done(client); - if (r) - return r; - - r = picodlp_i2c_write_array(client, init_cmd_set2, - ARRAY_SIZE(init_cmd_set2)); - if (r) - return r; - - r = picodlp_wait_for_dma_done(client); - if (r) - return r; - - r = picodlp_i2c_write_array(client, init_cmd_set3, - ARRAY_SIZE(init_cmd_set3)); - if (r) - return r; - - r = picodlp_wait_for_dma_done(client); - if (r) - return r; - - r = picodlp_i2c_write_array(client, init_cmd_set4, - ARRAY_SIZE(init_cmd_set4)); - if (r) - return r; - - return 0; -} - -static int picodlp_i2c_probe(struct i2c_client *client, - const struct i2c_device_id *id) -{ - struct picodlp_i2c_data *picodlp_i2c_data; - - picodlp_i2c_data = kzalloc(sizeof(struct picodlp_i2c_data), GFP_KERNEL); - - if (!picodlp_i2c_data) - return -ENOMEM; - - mutex_init(&picodlp_i2c_data->xfer_lock); - i2c_set_clientdata(client, picodlp_i2c_data); - - return 0; -} - -static int picodlp_i2c_remove(struct i2c_client *client) -{ - struct picodlp_i2c_data *picodlp_i2c_data = - i2c_get_clientdata(client); - kfree(picodlp_i2c_data); - return 0; -} - -static struct i2c_driver picodlp_i2c_driver = { - .driver = { - .name = "picodlp_i2c_driver", - }, - .probe = picodlp_i2c_probe, - .remove = picodlp_i2c_remove, - .id_table = picodlp_i2c_id, -}; - -static int picodlp_panel_power_on(struct omap_dss_device *dssdev) -{ - int r, trial = 100; - struct picodlp_data *picod = dev_get_drvdata(&dssdev->dev); - struct picodlp_panel_data *picodlp_pdata = get_panel_data(dssdev); - - if (dssdev->platform_enable) { - r = dssdev->platform_enable(dssdev); - if (r) - return r; - } - - gpio_set_value(picodlp_pdata->pwrgood_gpio, 0); - msleep(1); - gpio_set_value(picodlp_pdata->pwrgood_gpio, 1); - - while (!gpio_get_value(picodlp_pdata->emu_done_gpio)) { - if (!trial--) { - dev_err(&dssdev->dev, "emu_done signal not" - " going high\n"); - return -ETIMEDOUT; - } - msleep(5); - } - /* - * As per dpp2600 programming guide, - * it is required to sleep for 1000ms after emu_done signal goes high - * then only i2c commands can be successfully sent to dpp2600 - */ - msleep(1000); - r = omapdss_dpi_display_enable(dssdev); - if (r) { - dev_err(&dssdev->dev, "failed to enable DPI\n"); - goto err1; - } - - r = picodlp_i2c_init(picod->picodlp_i2c_client); - if (r) - goto err; - - dssdev->state = OMAP_DSS_DISPLAY_ACTIVE; - - return r; -err: - omapdss_dpi_display_disable(dssdev); -err1: - if (dssdev->platform_disable) - dssdev->platform_disable(dssdev); - - return r; -} - -static void picodlp_panel_power_off(struct omap_dss_device *dssdev) -{ - struct picodlp_panel_data *picodlp_pdata = get_panel_data(dssdev); - - omapdss_dpi_display_disable(dssdev); - - gpio_set_value(picodlp_pdata->emu_done_gpio, 0); - gpio_set_value(picodlp_pdata->pwrgood_gpio, 0); - - if (dssdev->platform_disable) - dssdev->platform_disable(dssdev); -} - -static int picodlp_panel_probe(struct omap_dss_device *dssdev) -{ - struct picodlp_data *picod; - struct picodlp_panel_data *picodlp_pdata = get_panel_data(dssdev); - struct i2c_adapter *adapter; - struct i2c_client *picodlp_i2c_client; - int r = 0, picodlp_adapter_id; - - dssdev->panel.config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_ONOFF | - OMAP_DSS_LCD_IHS | OMAP_DSS_LCD_IVS; - dssdev->panel.acb = 0x0; - dssdev->panel.timings = pico_ls_timings; - - picod = kzalloc(sizeof(struct picodlp_data), GFP_KERNEL); - if (!picod) - return -ENOMEM; - - mutex_init(&picod->lock); - - picodlp_adapter_id = picodlp_pdata->picodlp_adapter_id; - - adapter = i2c_get_adapter(picodlp_adapter_id); - if (!adapter) { - dev_err(&dssdev->dev, "can't get i2c adapter\n"); - r = -ENODEV; - goto err; - } - - picodlp_i2c_client = i2c_new_device(adapter, &picodlp_i2c_board_info); - if (!picodlp_i2c_client) { - dev_err(&dssdev->dev, "can't add i2c device::" - " picodlp_i2c_client is NULL\n"); - r = -ENODEV; - goto err; - } - - picod->picodlp_i2c_client = picodlp_i2c_client; - - dev_set_drvdata(&dssdev->dev, picod); - return r; -err: - kfree(picod); - return r; -} - -static void picodlp_panel_remove(struct omap_dss_device *dssdev) -{ - struct picodlp_data *picod = dev_get_drvdata(&dssdev->dev); - - i2c_unregister_device(picod->picodlp_i2c_client); - dev_set_drvdata(&dssdev->dev, NULL); - dev_dbg(&dssdev->dev, "removing picodlp panel\n"); - - kfree(picod); -} - -static int picodlp_panel_enable(struct omap_dss_device *dssdev) -{ - struct picodlp_data *picod = dev_get_drvdata(&dssdev->dev); - int r; - - dev_dbg(&dssdev->dev, "enabling picodlp panel\n"); - - mutex_lock(&picod->lock); - if (dssdev->state != OMAP_DSS_DISPLAY_DISABLED) { - mutex_unlock(&picod->lock); - return -EINVAL; - } - - r = picodlp_panel_power_on(dssdev); - mutex_unlock(&picod->lock); - - return r; -} - -static void picodlp_panel_disable(struct omap_dss_device *dssdev) -{ - struct picodlp_data *picod = dev_get_drvdata(&dssdev->dev); - - mutex_lock(&picod->lock); - /* Turn off DLP Power */ - if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE) - picodlp_panel_power_off(dssdev); - - dssdev->state = OMAP_DSS_DISPLAY_DISABLED; - mutex_unlock(&picod->lock); - - dev_dbg(&dssdev->dev, "disabling picodlp panel\n"); -} - -static int picodlp_panel_suspend(struct omap_dss_device *dssdev) -{ - struct picodlp_data *picod = dev_get_drvdata(&dssdev->dev); - - mutex_lock(&picod->lock); - /* Turn off DLP Power */ - if (dssdev->state != OMAP_DSS_DISPLAY_ACTIVE) { - mutex_unlock(&picod->lock); - dev_err(&dssdev->dev, "unable to suspend picodlp panel," - " panel is not ACTIVE\n"); - return -EINVAL; - } - - picodlp_panel_power_off(dssdev); - - dssdev->state = OMAP_DSS_DISPLAY_SUSPENDED; - mutex_unlock(&picod->lock); - - dev_dbg(&dssdev->dev, "suspending picodlp panel\n"); - return 0; -} - -static int picodlp_panel_resume(struct omap_dss_device *dssdev) -{ - struct picodlp_data *picod = dev_get_drvdata(&dssdev->dev); - int r; - - mutex_lock(&picod->lock); - if (dssdev->state != OMAP_DSS_DISPLAY_SUSPENDED) { - mutex_unlock(&picod->lock); - dev_err(&dssdev->dev, "unable to resume picodlp panel," - " panel is not ACTIVE\n"); - return -EINVAL; - } - - r = picodlp_panel_power_on(dssdev); - mutex_unlock(&picod->lock); - dev_dbg(&dssdev->dev, "resuming picodlp panel\n"); - return r; -} - -static void picodlp_get_resolution(struct omap_dss_device *dssdev, - u16 *xres, u16 *yres) -{ - *xres = dssdev->panel.timings.x_res; - *yres = dssdev->panel.timings.y_res; -} - -static struct omap_dss_driver picodlp_driver = { - .probe = picodlp_panel_probe, - .remove = picodlp_panel_remove, - - .enable = picodlp_panel_enable, - .disable = picodlp_panel_disable, - - .get_resolution = picodlp_get_resolution, - - .suspend = picodlp_panel_suspend, - .resume = picodlp_panel_resume, - - .driver = { - .name = "picodlp_panel", - .owner = THIS_MODULE, - }, -}; - -static int __init picodlp_init(void) -{ - int r = 0; - - r = i2c_add_driver(&picodlp_i2c_driver); - if (r) { - printk(KERN_WARNING "picodlp_i2c_driver" \ - " registration failed\n"); - return r; - } - - r = omap_dss_register_driver(&picodlp_driver); - if (r) - i2c_del_driver(&picodlp_i2c_driver); - - return r; -} - -static void __exit picodlp_exit(void) -{ - i2c_del_driver(&picodlp_i2c_driver); - omap_dss_unregister_driver(&picodlp_driver); -} - -module_init(picodlp_init); -module_exit(picodlp_exit); - -MODULE_AUTHOR("Mythri P K <mythripk@ti.com>"); -MODULE_DESCRIPTION("picodlp driver"); -MODULE_LICENSE("GPL"); diff --git a/drivers/video/omap2/displays/panel-picodlp.h b/drivers/video/omap2/displays/panel-picodlp.h deleted file mode 100644 index a34b431a726..00000000000 --- a/drivers/video/omap2/displays/panel-picodlp.h +++ /dev/null @@ -1,288 +0,0 @@ -/* - * Header file required by picodlp panel driver - * - * Copyright (C) 2009-2011 Texas Instruments - * Author: Mythri P K <mythripk@ti.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program. If not, see <http://www.gnu.org/licenses/>. -*/ - -#ifndef __OMAP2_DISPLAY_PANEL_PICODLP_H -#define __OMAP2_DISPLAY_PANEL_PICODLP_H - -/* Commands used for configuring picodlp panel */ - -#define MAIN_STATUS 0x03 -#define PBC_CONTROL 0x08 -#define INPUT_SOURCE 0x0B -#define INPUT_RESOLUTION 0x0C -#define DATA_FORMAT 0x0D -#define IMG_ROTATION 0x0E -#define LONG_FLIP 0x0F -#define SHORT_FLIP 0x10 -#define TEST_PAT_SELECT 0x11 -#define R_DRIVE_CURRENT 0x12 -#define G_DRIVE_CURRENT 0x13 -#define B_DRIVE_CURRENT 0x14 -#define READ_REG_SELECT 0x15 -#define RGB_DRIVER_ENABLE 0x16 - -#define CPU_IF_MODE 0x18 -#define FRAME_RATE 0x19 -#define CPU_IF_SYNC_METHOD 0x1A -#define CPU_IF_SOF 0x1B -#define CPU_IF_EOF 0x1C -#define CPU_IF_SLEEP 0x1D - -#define SEQUENCE_MODE 0x1E -#define SOFT_RESET 0x1F -#define FRONT_END_RESET 0x21 -#define AUTO_PWR_ENABLE 0x22 - -#define VSYNC_LINE_DELAY 0x23 -#define CPU_PI_HORIZ_START 0x24 -#define CPU_PI_VERT_START 0x25 -#define CPU_PI_HORIZ_WIDTH 0x26 -#define CPU_PI_VERT_HEIGHT 0x27 - -#define PIXEL_MASK_CROP 0x28 -#define CROP_FIRST_LINE 0x29 -#define CROP_LAST_LINE 0x2A -#define CROP_FIRST_PIXEL 0x2B -#define CROP_LAST_PIXEL 0x2C -#define DMD_PARK_TRIGGER 0x2D - -#define MISC_REG 0x30 - -/* AGC registers */ -#define AGC_CTRL 0x50 -#define AGC_CLIPPED_PIXS 0x55 -#define AGC_BRIGHT_PIXS 0x56 -#define AGC_BG_PIXS 0x57 -#define AGC_SAFETY_MARGIN 0x17 - -/* Color Coordinate Adjustment registers */ -#define CCA_ENABLE 0x5E -#define CCA_C1A 0x5F -#define CCA_C1B 0x60 -#define CCA_C1C 0x61 -#define CCA_C2A 0x62 -#define CCA_C2B 0x63 -#define CCA_C2C 0x64 -#define CCA_C3A 0x65 -#define CCA_C3B 0x66 -#define CCA_C3C 0x67 -#define CCA_C7A 0x71 -#define CCA_C7B 0x72 -#define CCA_C7C 0x73 - -/** - * DLP Pico Processor 2600 comes with flash - * We can do DMA operations from flash for accessing Look Up Tables - */ -#define DMA_STATUS 0x100 -#define FLASH_ADDR_BYTES 0x74 -#define FLASH_DUMMY_BYTES 0x75 -#define FLASH_WRITE_BYTES 0x76 -#define FLASH_READ_BYTES 0x77 -#define FLASH_OPCODE 0x78 -#define FLASH_START_ADDR 0x79 -#define FLASH_DUMMY2 0x7A -#define FLASH_WRITE_DATA 0x7B - -#define TEMPORAL_DITH_DISABLE 0x7E -#define SEQ_CONTROL 0x82 -#define SEQ_VECTOR 0x83 - -/* DMD is Digital Micromirror Device */ -#define DMD_BLOCK_COUNT 0x84 -#define DMD_VCC_CONTROL 0x86 -#define DMD_PARK_PULSE_COUNT 0x87 -#define DMD_PARK_PULSE_WIDTH 0x88 -#define DMD_PARK_DELAY 0x89 -#define DMD_SHADOW_ENABLE 0x8E -#define SEQ_STATUS 0x8F -#define FLASH_CLOCK_CONTROL 0x98 -#define DMD_PARK 0x2D - -#define SDRAM_BIST_ENABLE 0x46 -#define DDR_DRIVER_STRENGTH 0x9A -#define SDC_ENABLE 0x9D -#define SDC_BUFF_SWAP_DISABLE 0xA3 -#define CURTAIN_CONTROL 0xA6 -#define DDR_BUS_SWAP_ENABLE 0xA7 -#define DMD_TRC_ENABLE 0xA8 -#define DMD_BUS_SWAP_ENABLE 0xA9 - -#define ACTGEN_ENABLE 0xAE -#define ACTGEN_CONTROL 0xAF -#define ACTGEN_HORIZ_BP 0xB0 -#define ACTGEN_VERT_BP 0xB1 - -/* Look Up Table access */ -#define CMT_SPLASH_LUT_START_ADDR 0xFA -#define CMT_SPLASH_LUT_DEST_SELECT 0xFB -#define CMT_SPLASH_LUT_DATA 0xFC -#define SEQ_RESET_LUT_START_ADDR 0xFD -#define SEQ_RESET_LUT_DEST_SELECT 0xFE -#define SEQ_RESET_LUT_DATA 0xFF - -/* Input source definitions */ -#define PARALLEL_RGB 0 -#define INT_TEST_PATTERN 1 -#define SPLASH_SCREEN 2 -#define CPU_INTF 3 -#define BT656 4 - -/* Standard input resolution definitions */ -#define QWVGA_LANDSCAPE 3 /* (427h*240v) */ -#define WVGA_864_LANDSCAPE 21 /* (864h*480v) */ -#define WVGA_DMD_OPTICAL_TEST 35 /* (608h*684v) */ - -/* Standard data format definitions */ -#define RGB565 0 -#define RGB666 1 -#define RGB888 2 - -/* Test Pattern definitions */ -#define TPG_CHECKERBOARD 0 -#define TPG_BLACK 1 -#define TPG_WHITE 2 -#define TPG_RED 3 -#define TPG_BLUE 4 -#define TPG_GREEN 5 -#define TPG_VLINES_BLACK 6 -#define TPG_HLINES_BLACK 7 -#define TPG_VLINES_ALT 8 -#define TPG_HLINES_ALT 9 -#define TPG_DIAG_LINES 10 -#define TPG_GREYRAMP_VERT 11 -#define TPG_GREYRAMP_HORIZ 12 -#define TPG_ANSI_CHECKERBOARD 13 - -/* sequence mode definitions */ -#define SEQ_FREE_RUN 0 -#define SEQ_LOCK 1 - -/* curtain color definitions */ -#define CURTAIN_BLACK 0 -#define CURTAIN_RED 1 -#define CURTAIN_GREEN 2 -#define CURTAIN_BLUE 3 -#define CURTAIN_YELLOW 4 -#define CURTAIN_MAGENTA 5 -#define CURTAIN_CYAN 6 -#define CURTAIN_WHITE 7 - -/* LUT definitions */ -#define CMT_LUT_NONE 0 -#define CMT_LUT_GREEN 1 -#define CMT_LUT_RED 2 -#define CMT_LUT_BLUE 3 -#define CMT_LUT_ALL 4 -#define SPLASH_LUT 5 - -#define SEQ_LUT_NONE 0 -#define SEQ_DRC_LUT_0 1 -#define SEQ_DRC_LUT_1 2 -#define SEQ_DRC_LUT_2 3 -#define SEQ_DRC_LUT_3 4 -#define SEQ_SEQ_LUT 5 -#define SEQ_DRC_LUT_ALL 6 -#define WPC_PROGRAM_LUT 7 - -#define BITSTREAM_START_ADDR 0x00000000 -#define BITSTREAM_SIZE 0x00040000 - -#define WPC_FW_0_START_ADDR 0x00040000 -#define WPC_FW_0_SIZE 0x00000ce8 - -#define SEQUENCE_0_START_ADDR 0x00044000 -#define SEQUENCE_0_SIZE 0x00001000 - -#define SEQUENCE_1_START_ADDR 0x00045000 -#define SEQUENCE_1_SIZE 0x00000d10 - -#define SEQUENCE_2_START_ADDR 0x00046000 -#define SEQUENCE_2_SIZE 0x00000d10 - -#define SEQUENCE_3_START_ADDR 0x00047000 -#define SEQUENCE_3_SIZE 0x00000d10 - -#define SEQUENCE_4_START_ADDR 0x00048000 -#define SEQUENCE_4_SIZE 0x00000d10 - -#define SEQUENCE_5_START_ADDR 0x00049000 -#define SEQUENCE_5_SIZE 0x00000d10 - -#define SEQUENCE_6_START_ADDR 0x0004a000 -#define SEQUENCE_6_SIZE 0x00000d10 - -#define CMT_LUT_0_START_ADDR 0x0004b200 -#define CMT_LUT_0_SIZE 0x00000600 - -#define CMT_LUT_1_START_ADDR 0x0004b800 -#define CMT_LUT_1_SIZE 0x00000600 - -#define CMT_LUT_2_START_ADDR 0x0004be00 -#define CMT_LUT_2_SIZE 0x00000600 - -#define CMT_LUT_3_START_ADDR 0x0004c400 -#define CMT_LUT_3_SIZE 0x00000600 - -#define CMT_LUT_4_START_ADDR 0x0004ca00 -#define CMT_LUT_4_SIZE 0x00000600 - -#define CMT_LUT_5_START_ADDR 0x0004d000 -#define CMT_LUT_5_SIZE 0x00000600 - -#define CMT_LUT_6_START_ADDR 0x0004d600 -#define CMT_LUT_6_SIZE 0x00000600 - -#define DRC_TABLE_0_START_ADDR 0x0004dc00 -#define DRC_TABLE_0_SIZE 0x00000100 - -#define SPLASH_0_START_ADDR 0x0004dd00 -#define SPLASH_0_SIZE 0x00032280 - -#define SEQUENCE_7_START_ADDR 0x00080000 -#define SEQUENCE_7_SIZE 0x00000d10 - -#define SEQUENCE_8_START_ADDR 0x00081800 -#define SEQUENCE_8_SIZE 0x00000d10 - -#define SEQUENCE_9_START_ADDR 0x00083000 -#define SEQUENCE_9_SIZE 0x00000d10 - -#define CMT_LUT_7_START_ADDR 0x0008e000 -#define CMT_LUT_7_SIZE 0x00000600 - -#define CMT_LUT_8_START_ADDR 0x0008e800 -#define CMT_LUT_8_SIZE 0x00000600 - -#define CMT_LUT_9_START_ADDR 0x0008f000 -#define CMT_LUT_9_SIZE 0x00000600 - -#define SPLASH_1_START_ADDR 0x0009a000 -#define SPLASH_1_SIZE 0x00032280 - -#define SPLASH_2_START_ADDR 0x000cd000 -#define SPLASH_2_SIZE 0x00032280 - -#define SPLASH_3_START_ADDR 0x00100000 -#define SPLASH_3_SIZE 0x00032280 - -#define OPT_SPLASH_0_START_ADDR 0x00134000 -#define OPT_SPLASH_0_SIZE 0x000cb100 - -#endif diff --git a/drivers/video/omap2/displays/panel-sharp-ls037v7dw01.c b/drivers/video/omap2/displays/panel-sharp-ls037v7dw01.c deleted file mode 100644 index ba38b3ad17d..00000000000 --- a/drivers/video/omap2/displays/panel-sharp-ls037v7dw01.c +++ /dev/null @@ -1,233 +0,0 @@ -/* - * LCD panel driver for Sharp LS037V7DW01 - * - * Copyright (C) 2008 Nokia Corporation - * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program. If not, see <http://www.gnu.org/licenses/>. - */ - -#include <linux/module.h> -#include <linux/delay.h> -#include <linux/device.h> -#include <linux/backlight.h> -#include <linux/fb.h> -#include <linux/err.h> -#include <linux/slab.h> - -#include <video/omapdss.h> - -struct sharp_data { - struct backlight_device *bl; -}; - -static struct omap_video_timings sharp_ls_timings = { - .x_res = 480, - .y_res = 640, - - .pixel_clock = 19200, - - .hsw = 2, - .hfp = 1, - .hbp = 28, - - .vsw = 1, - .vfp = 1, - .vbp = 1, -}; - -static int sharp_ls_bl_update_status(struct backlight_device *bl) -{ - struct omap_dss_device *dssdev = dev_get_drvdata(&bl->dev); - int level; - - if (!dssdev->set_backlight) - return -EINVAL; - - if (bl->props.fb_blank == FB_BLANK_UNBLANK && - bl->props.power == FB_BLANK_UNBLANK) - level = bl->props.brightness; - else - level = 0; - - return dssdev->set_backlight(dssdev, level); -} - -static int sharp_ls_bl_get_brightness(struct backlight_device *bl) -{ - if (bl->props.fb_blank == FB_BLANK_UNBLANK && - bl->props.power == FB_BLANK_UNBLANK) - return bl->props.brightness; - - return 0; -} - -static const struct backlight_ops sharp_ls_bl_ops = { - .get_brightness = sharp_ls_bl_get_brightness, - .update_status = sharp_ls_bl_update_status, -}; - - - -static int sharp_ls_panel_probe(struct omap_dss_device *dssdev) -{ - struct backlight_properties props; - struct backlight_device *bl; - struct sharp_data *sd; - int r; - - dssdev->panel.config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IVS | - OMAP_DSS_LCD_IHS; - dssdev->panel.acb = 0x28; - dssdev->panel.timings = sharp_ls_timings; - - sd = kzalloc(sizeof(*sd), GFP_KERNEL); - if (!sd) - return -ENOMEM; - - dev_set_drvdata(&dssdev->dev, sd); - - memset(&props, 0, sizeof(struct backlight_properties)); - props.max_brightness = dssdev->max_backlight_level; - props.type = BACKLIGHT_RAW; - - bl = backlight_device_register("sharp-ls", &dssdev->dev, dssdev, - &sharp_ls_bl_ops, &props); - if (IS_ERR(bl)) { - r = PTR_ERR(bl); - kfree(sd); - return r; - } - sd->bl = bl; - - bl->props.fb_blank = FB_BLANK_UNBLANK; - bl->props.power = FB_BLANK_UNBLANK; - bl->props.brightness = dssdev->max_backlight_level; - r = sharp_ls_bl_update_status(bl); - if (r < 0) - dev_err(&dssdev->dev, "failed to set lcd brightness\n"); - - return 0; -} - -static void __exit sharp_ls_panel_remove(struct omap_dss_device *dssdev) -{ - struct sharp_data *sd = dev_get_drvdata(&dssdev->dev); - struct backlight_device *bl = sd->bl; - - bl->props.power = FB_BLANK_POWERDOWN; - sharp_ls_bl_update_status(bl); - backlight_device_unregister(bl); - - kfree(sd); -} - -static int sharp_ls_power_on(struct omap_dss_device *dssdev) -{ - int r = 0; - - if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE) - return 0; - - r = omapdss_dpi_display_enable(dssdev); - if (r) - goto err0; - - /* wait couple of vsyncs until enabling the LCD */ - msleep(50); - - if (dssdev->platform_enable) { - r = dssdev->platform_enable(dssdev); - if (r) - goto err1; - } - - return 0; -err1: - omapdss_dpi_display_disable(dssdev); -err0: - return r; -} - -static void sharp_ls_power_off(struct omap_dss_device *dssdev) -{ - if (dssdev->state != OMAP_DSS_DISPLAY_ACTIVE) - return; - - if (dssdev->platform_disable) - dssdev->platform_disable(dssdev); - - /* wait at least 5 vsyncs after disabling the LCD */ - - msleep(100); - - omapdss_dpi_display_disable(dssdev); -} - -static int sharp_ls_panel_enable(struct omap_dss_device *dssdev) -{ - int r; - r = sharp_ls_power_on(dssdev); - dssdev->state = OMAP_DSS_DISPLAY_ACTIVE; - return r; -} - -static void sharp_ls_panel_disable(struct omap_dss_device *dssdev) -{ - sharp_ls_power_off(dssdev); - dssdev->state = OMAP_DSS_DISPLAY_DISABLED; -} - -static int sharp_ls_panel_suspend(struct omap_dss_device *dssdev) -{ - sharp_ls_power_off(dssdev); - dssdev->state = OMAP_DSS_DISPLAY_SUSPENDED; - return 0; -} - -static int sharp_ls_panel_resume(struct omap_dss_device *dssdev) -{ - int r; - r = sharp_ls_power_on(dssdev); - dssdev->state = OMAP_DSS_DISPLAY_ACTIVE; - return r; -} - -static struct omap_dss_driver sharp_ls_driver = { - .probe = sharp_ls_panel_probe, - .remove = __exit_p(sharp_ls_panel_remove), - - .enable = sharp_ls_panel_enable, - .disable = sharp_ls_panel_disable, - .suspend = sharp_ls_panel_suspend, - .resume = sharp_ls_panel_resume, - - .driver = { - .name = "sharp_ls_panel", - .owner = THIS_MODULE, - }, -}; - -static int __init sharp_ls_panel_drv_init(void) -{ - return omap_dss_register_driver(&sharp_ls_driver); -} - -static void __exit sharp_ls_panel_drv_exit(void) -{ - omap_dss_unregister_driver(&sharp_ls_driver); -} - -module_init(sharp_ls_panel_drv_init); -module_exit(sharp_ls_panel_drv_exit); -MODULE_LICENSE("GPL"); diff --git a/drivers/video/omap2/displays/panel-taal.c b/drivers/video/omap2/displays/panel-taal.c deleted file mode 100644 index 00c5c615585..00000000000 --- a/drivers/video/omap2/displays/panel-taal.c +++ /dev/null @@ -1,1917 +0,0 @@ -/* - * Taal DSI command mode panel - * - * Copyright (C) 2009 Nokia Corporation - * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program. If not, see <http://www.gnu.org/licenses/>. - */ - -/*#define DEBUG*/ - -#include <linux/module.h> -#include <linux/delay.h> -#include <linux/err.h> -#include <linux/jiffies.h> -#include <linux/sched.h> -#include <linux/backlight.h> -#include <linux/fb.h> -#include <linux/interrupt.h> -#include <linux/gpio.h> -#include <linux/workqueue.h> -#include <linux/slab.h> -#include <linux/regulator/consumer.h> -#include <linux/mutex.h> - -#include <video/omapdss.h> -#include <video/omap-panel-nokia-dsi.h> -#include <video/mipi_display.h> - -/* DSI Virtual channel. Hardcoded for now. */ -#define TCH 0 - -#define DCS_READ_NUM_ERRORS 0x05 -#define DCS_BRIGHTNESS 0x51 -#define DCS_CTRL_DISPLAY 0x53 -#define DCS_WRITE_CABC 0x55 -#define DCS_READ_CABC 0x56 -#define DCS_GET_ID1 0xda -#define DCS_GET_ID2 0xdb -#define DCS_GET_ID3 0xdc - -static irqreturn_t taal_te_isr(int irq, void *data); -static void taal_te_timeout_work_callback(struct work_struct *work); -static int _taal_enable_te(struct omap_dss_device *dssdev, bool enable); - -static int taal_panel_reset(struct omap_dss_device *dssdev); - -struct panel_regulator { - struct regulator *regulator; - const char *name; - int min_uV; - int max_uV; -}; - -static void free_regulators(struct panel_regulator *regulators, int n) -{ - int i; - - for (i = 0; i < n; i++) { - /* disable/put in reverse order */ - regulator_disable(regulators[n - i - 1].regulator); - regulator_put(regulators[n - i - 1].regulator); - } -} - -static int init_regulators(struct omap_dss_device *dssdev, - struct panel_regulator *regulators, int n) -{ - int r, i, v; - - for (i = 0; i < n; i++) { - struct regulator *reg; - - reg = regulator_get(&dssdev->dev, regulators[i].name); - if (IS_ERR(reg)) { - dev_err(&dssdev->dev, "failed to get regulator %s\n", - regulators[i].name); - r = PTR_ERR(reg); - goto err; - } - - /* FIXME: better handling of fixed vs. variable regulators */ - v = regulator_get_voltage(reg); - if (v < regulators[i].min_uV || v > regulators[i].max_uV) { - r = regulator_set_voltage(reg, regulators[i].min_uV, - regulators[i].max_uV); - if (r) { - dev_err(&dssdev->dev, - "failed to set regulator %s voltage\n", - regulators[i].name); - regulator_put(reg); - goto err; - } - } - - r = regulator_enable(reg); - if (r) { - dev_err(&dssdev->dev, "failed to enable regulator %s\n", - regulators[i].name); - regulator_put(reg); - goto err; - } - - regulators[i].regulator = reg; - } - - return 0; - -err: - free_regulators(regulators, i); - - return r; -} - -/** - * struct panel_config - panel configuration - * @name: panel name - * @type: panel type - * @timings: panel resolution - * @sleep: various panel specific delays, passed to msleep() if non-zero - * @reset_sequence: reset sequence timings, passed to udelay() if non-zero - * @regulators: array of panel regulators - * @num_regulators: number of regulators in the array - */ -struct panel_config { - const char *name; - int type; - - struct omap_video_timings timings; - - struct { - unsigned int sleep_in; - unsigned int sleep_out; - unsigned int hw_reset; - unsigned int enable_te; - } sleep; - - struct { - unsigned int high; - unsigned int low; - } reset_sequence; - - struct panel_regulator *regulators; - int num_regulators; -}; - -enum { - PANEL_TAAL, -}; - -static struct panel_config panel_configs[] = { - { - .name = "taal", - .type = PANEL_TAAL, - .timings = { - .x_res = 864, - .y_res = 480, - }, - .sleep = { - .sleep_in = 5, - .sleep_out = 5, - .hw_reset = 5, - .enable_te = 100, /* possible panel bug */ - }, - .reset_sequence = { - .high = 10, - .low = 10, - }, - }, -}; - -struct taal_data { - struct mutex lock; - - struct backlight_device *bldev; - - unsigned long hw_guard_end; /* next value of jiffies when we can - * issue the next sleep in/out command - */ - unsigned long hw_guard_wait; /* max guard time in jiffies */ - - struct omap_dss_device *dssdev; - - bool enabled; - u8 rotate; - bool mirror; - - bool te_enabled; - - atomic_t do_update; - int channel; - - struct delayed_work te_timeout_work; - - bool cabc_broken; - unsigned cabc_mode; - - bool intro_printed; - - struct workqueue_struct *workqueue; - - struct delayed_work esd_work; - unsigned esd_interval; - - bool ulps_enabled; - unsigned ulps_timeout; - struct delayed_work ulps_work; - - struct panel_config *panel_config; -}; - -static inline struct nokia_dsi_panel_data -*get_panel_data(const struct omap_dss_device *dssdev) -{ - return (struct nokia_dsi_panel_data *) dssdev->data; -} - -static void taal_esd_work(struct work_struct *work); -static void taal_ulps_work(struct work_struct *work); - -static void hw_guard_start(struct taal_data *td, int guard_msec) -{ - td->hw_guard_wait = msecs_to_jiffies(guard_msec); - td->hw_guard_end = jiffies + td->hw_guard_wait; -} - -static void hw_guard_wait(struct taal_data *td) -{ - unsigned long wait = td->hw_guard_end - jiffies; - - if ((long)wait > 0 && wait <= td->hw_guard_wait) { - set_current_state(TASK_UNINTERRUPTIBLE); - schedule_timeout(wait); - } -} - -static int taal_dcs_read_1(struct taal_data *td, u8 dcs_cmd, u8 *data) -{ - int r; - u8 buf[1]; - - r = dsi_vc_dcs_read(td->dssdev, td->channel, dcs_cmd, buf, 1); - - if (r < 0) - return r; - - *data = buf[0]; - - return 0; -} - -static int taal_dcs_write_0(struct taal_data *td, u8 dcs_cmd) -{ - return dsi_vc_dcs_write(td->dssdev, td->channel, &dcs_cmd, 1); -} - -static int taal_dcs_write_1(struct taal_data *td, u8 dcs_cmd, u8 param) -{ - u8 buf[2]; - buf[0] = dcs_cmd; - buf[1] = param; - return dsi_vc_dcs_write(td->dssdev, td->channel, buf, 2); -} - -static int taal_sleep_in(struct taal_data *td) - -{ - u8 cmd; - int r; - - hw_guard_wait(td); - - cmd = MIPI_DCS_ENTER_SLEEP_MODE; - r = dsi_vc_dcs_write_nosync(td->dssdev, td->channel, &cmd, 1); - if (r) - return r; - - hw_guard_start(td, 120); - - if (td->panel_config->sleep.sleep_in) - msleep(td->panel_config->sleep.sleep_in); - - return 0; -} - -static int taal_sleep_out(struct taal_data *td) -{ - int r; - - hw_guard_wait(td); - - r = taal_dcs_write_0(td, MIPI_DCS_EXIT_SLEEP_MODE); - if (r) - return r; - - hw_guard_start(td, 120); - - if (td->panel_config->sleep.sleep_out) - msleep(td->panel_config->sleep.sleep_out); - - return 0; -} - -static int taal_get_id(struct taal_data *td, u8 *id1, u8 *id2, u8 *id3) -{ - int r; - - r = taal_dcs_read_1(td, DCS_GET_ID1, id1); - if (r) - return r; - r = taal_dcs_read_1(td, DCS_GET_ID2, id2); - if (r) - return r; - r = taal_dcs_read_1(td, DCS_GET_ID3, id3); - if (r) - return r; - - return 0; -} - -static int taal_set_addr_mode(struct taal_data *td, u8 rotate, bool mirror) -{ - int r; - u8 mode; - int b5, b6, b7; - - r = taal_dcs_read_1(td, MIPI_DCS_GET_ADDRESS_MODE, &mode); - if (r) - return r; - - switch (rotate) { - default: - case 0: - b7 = 0; - b6 = 0; - b5 = 0; - break; - case 1: - b7 = 0; - b6 = 1; - b5 = 1; - break; - case 2: - b7 = 1; - b6 = 1; - b5 = 0; - break; - case 3: - b7 = 1; - b6 = 0; - b5 = 1; - break; - } - - if (mirror) - b6 = !b6; - - mode &= ~((1<<7) | (1<<6) | (1<<5)); - mode |= (b7 << 7) | (b6 << 6) | (b5 << 5); - - return taal_dcs_write_1(td, MIPI_DCS_SET_ADDRESS_MODE, mode); -} - -static int taal_set_update_window(struct taal_data *td, - u16 x, u16 y, u16 w, u16 h) -{ - int r; - u16 x1 = x; - u16 x2 = x + w - 1; - u16 y1 = y; - u16 y2 = y + h - 1; - - u8 buf[5]; - buf[0] = MIPI_DCS_SET_COLUMN_ADDRESS; - buf[1] = (x1 >> 8) & 0xff; - buf[2] = (x1 >> 0) & 0xff; - buf[3] = (x2 >> 8) & 0xff; - buf[4] = (x2 >> 0) & 0xff; - - r = dsi_vc_dcs_write_nosync(td->dssdev, td->channel, buf, sizeof(buf)); - if (r) - return r; - - buf[0] = MIPI_DCS_SET_PAGE_ADDRESS; - buf[1] = (y1 >> 8) & 0xff; - buf[2] = (y1 >> 0) & 0xff; - buf[3] = (y2 >> 8) & 0xff; - buf[4] = (y2 >> 0) & 0xff; - - r = dsi_vc_dcs_write_nosync(td->dssdev, td->channel, buf, sizeof(buf)); - if (r) - return r; - - dsi_vc_send_bta_sync(td->dssdev, td->channel); - - return r; -} - -static void taal_queue_esd_work(struct omap_dss_device *dssdev) -{ - struct taal_data *td = dev_get_drvdata(&dssdev->dev); - - if (td->esd_interval > 0) - queue_delayed_work(td->workqueue, &td->esd_work, - msecs_to_jiffies(td->esd_interval)); -} - -static void taal_cancel_esd_work(struct omap_dss_device *dssdev) -{ - struct taal_data *td = dev_get_drvdata(&dssdev->dev); - - cancel_delayed_work(&td->esd_work); -} - -static void taal_queue_ulps_work(struct omap_dss_device *dssdev) -{ - struct taal_data *td = dev_get_drvdata(&dssdev->dev); - - if (td->ulps_timeout > 0) - queue_delayed_work(td->workqueue, &td->ulps_work, - msecs_to_jiffies(td->ulps_timeout)); -} - -static void taal_cancel_ulps_work(struct omap_dss_device *dssdev) -{ - struct taal_data *td = dev_get_drvdata(&dssdev->dev); - - cancel_delayed_work(&td->ulps_work); -} - -static int taal_enter_ulps(struct omap_dss_device *dssdev) -{ - struct taal_data *td = dev_get_drvdata(&dssdev->dev); - struct nokia_dsi_panel_data *panel_data = get_panel_data(dssdev); - int r; - - if (td->ulps_enabled) - return 0; - - taal_cancel_ulps_work(dssdev); - - r = _taal_enable_te(dssdev, false); - if (r) - goto err; - - disable_irq(gpio_to_irq(panel_data->ext_te_gpio)); - - omapdss_dsi_display_disable(dssdev, false, true); - - td->ulps_enabled = true; - - return 0; - -err: - dev_err(&dssdev->dev, "enter ULPS failed"); - taal_panel_reset(dssdev); - - td->ulps_enabled = false; - - taal_queue_ulps_work(dssdev); - - return r; -} - -static int taal_exit_ulps(struct omap_dss_device *dssdev) -{ - struct taal_data *td = dev_get_drvdata(&dssdev->dev); - struct nokia_dsi_panel_data *panel_data = get_panel_data(dssdev); - int r; - - if (!td->ulps_enabled) - return 0; - - r = omapdss_dsi_display_enable(dssdev); - if (r) { - dev_err(&dssdev->dev, "failed to enable DSI\n"); - goto err1; - } - - omapdss_dsi_vc_enable_hs(dssdev, td->channel, true); - - r = _taal_enable_te(dssdev, true); - if (r) { - dev_err(&dssdev->dev, "failed to re-enable TE"); - goto err2; - } - - enable_irq(gpio_to_irq(panel_data->ext_te_gpio)); - - taal_queue_ulps_work(dssdev); - - td->ulps_enabled = false; - - return 0; - -err2: - dev_err(&dssdev->dev, "failed to exit ULPS"); - - r = taal_panel_reset(dssdev); - if (!r) { - enable_irq(gpio_to_irq(panel_data->ext_te_gpio)); - td->ulps_enabled = false; - } -err1: - taal_queue_ulps_work(dssdev); - - return r; -} - -static int taal_wake_up(struct omap_dss_device *dssdev) -{ - struct taal_data *td = dev_get_drvdata(&dssdev->dev); - - if (td->ulps_enabled) - return taal_exit_ulps(dssdev); - - taal_cancel_ulps_work(dssdev); - taal_queue_ulps_work(dssdev); - return 0; -} - -static int taal_bl_update_status(struct backlight_device *dev) -{ - struct omap_dss_device *dssdev = dev_get_drvdata(&dev->dev); - struct taal_data *td = dev_get_drvdata(&dssdev->dev); - int r; - int level; - - if (dev->props.fb_blank == FB_BLANK_UNBLANK && - dev->props.power == FB_BLANK_UNBLANK) - level = dev->props.brightness; - else - level = 0; - - dev_dbg(&dssdev->dev, "update brightness to %d\n", level); - - mutex_lock(&td->lock); - - if (td->enabled) { - dsi_bus_lock(dssdev); - - r = taal_wake_up(dssdev); - if (!r) - r = taal_dcs_write_1(td, DCS_BRIGHTNESS, level); - - dsi_bus_unlock(dssdev); - } else { - r = 0; - } - - mutex_unlock(&td->lock); - - return r; -} - -static int taal_bl_get_intensity(struct backlight_device *dev) -{ - if (dev->props.fb_blank == FB_BLANK_UNBLANK && - dev->props.power == FB_BLANK_UNBLANK) - return dev->props.brightness; - - return 0; -} - -static const struct backlight_ops taal_bl_ops = { - .get_brightness = taal_bl_get_intensity, - .update_status = taal_bl_update_status, -}; - -static void taal_get_timings(struct omap_dss_device *dssdev, - struct omap_video_timings *timings) -{ - *timings = dssdev->panel.timings; -} - -static void taal_get_resolution(struct omap_dss_device *dssdev, - u16 *xres, u16 *yres) -{ - struct taal_data *td = dev_get_drvdata(&dssdev->dev); - - if (td->rotate == 0 || td->rotate == 2) { - *xres = dssdev->panel.timings.x_res; - *yres = dssdev->panel.timings.y_res; - } else { - *yres = dssdev->panel.timings.x_res; - *xres = dssdev->panel.timings.y_res; - } -} - -static ssize_t taal_num_errors_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - struct omap_dss_device *dssdev = to_dss_device(dev); - struct taal_data *td = dev_get_drvdata(&dssdev->dev); - u8 errors; - int r; - - mutex_lock(&td->lock); - - if (td->enabled) { - dsi_bus_lock(dssdev); - - r = taal_wake_up(dssdev); - if (!r) - r = taal_dcs_read_1(td, DCS_READ_NUM_ERRORS, &errors); - - dsi_bus_unlock(dssdev); - } else { - r = -ENODEV; - } - - mutex_unlock(&td->lock); - - if (r) - return r; - - return snprintf(buf, PAGE_SIZE, "%d\n", errors); -} - -static ssize_t taal_hw_revision_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - struct omap_dss_device *dssdev = to_dss_device(dev); - struct taal_data *td = dev_get_drvdata(&dssdev->dev); - u8 id1, id2, id3; - int r; - - mutex_lock(&td->lock); - - if (td->enabled) { - dsi_bus_lock(dssdev); - - r = taal_wake_up(dssdev); - if (!r) - r = taal_get_id(td, &id1, &id2, &id3); - - dsi_bus_unlock(dssdev); - } else { - r = -ENODEV; - } - - mutex_unlock(&td->lock); - - if (r) - return r; - - return snprintf(buf, PAGE_SIZE, "%02x.%02x.%02x\n", id1, id2, id3); -} - -static const char *cabc_modes[] = { - "off", /* used also always when CABC is not supported */ - "ui", - "still-image", - "moving-image", -}; - -static ssize_t show_cabc_mode(struct device *dev, - struct device_attribute *attr, - char *buf) -{ - struct omap_dss_device *dssdev = to_dss_device(dev); - struct taal_data *td = dev_get_drvdata(&dssdev->dev); - const char *mode_str; - int mode; - int len; - - mode = td->cabc_mode; - - mode_str = "unknown"; - if (mode >= 0 && mode < ARRAY_SIZE(cabc_modes)) - mode_str = cabc_modes[mode]; - len = snprintf(buf, PAGE_SIZE, "%s\n", mode_str); - - return len < PAGE_SIZE - 1 ? len : PAGE_SIZE - 1; -} - -static ssize_t store_cabc_mode(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t count) -{ - struct omap_dss_device *dssdev = to_dss_device(dev); - struct taal_data *td = dev_get_drvdata(&dssdev->dev); - int i; - int r; - - for (i = 0; i < ARRAY_SIZE(cabc_modes); i++) { - if (sysfs_streq(cabc_modes[i], buf)) - break; - } - - if (i == ARRAY_SIZE(cabc_modes)) - return -EINVAL; - - mutex_lock(&td->lock); - - if (td->enabled) { - dsi_bus_lock(dssdev); - - if (!td->cabc_broken) { - r = taal_wake_up(dssdev); - if (r) - goto err; - - r = taal_dcs_write_1(td, DCS_WRITE_CABC, i); - if (r) - goto err; - } - - dsi_bus_unlock(dssdev); - } - - td->cabc_mode = i; - - mutex_unlock(&td->lock); - - return count; -err: - dsi_bus_unlock(dssdev); - mutex_unlock(&td->lock); - return r; -} - -static ssize_t show_cabc_available_modes(struct device *dev, - struct device_attribute *attr, - char *buf) -{ - int len; - int i; - - for (i = 0, len = 0; - len < PAGE_SIZE && i < ARRAY_SIZE(cabc_modes); i++) - len += snprintf(&buf[len], PAGE_SIZE - len, "%s%s%s", - i ? " " : "", cabc_modes[i], - i == ARRAY_SIZE(cabc_modes) - 1 ? "\n" : ""); - - return len < PAGE_SIZE ? len : PAGE_SIZE - 1; -} - -static ssize_t taal_store_esd_interval(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t count) -{ - struct omap_dss_device *dssdev = to_dss_device(dev); - struct taal_data *td = dev_get_drvdata(&dssdev->dev); - - unsigned long t; - int r; - - r = strict_strtoul(buf, 10, &t); - if (r) - return r; - - mutex_lock(&td->lock); - taal_cancel_esd_work(dssdev); - td->esd_interval = t; - if (td->enabled) - taal_queue_esd_work(dssdev); - mutex_unlock(&td->lock); - - return count; -} - -static ssize_t taal_show_esd_interval(struct device *dev, - struct device_attribute *attr, - char *buf) -{ - struct omap_dss_device *dssdev = to_dss_device(dev); - struct taal_data *td = dev_get_drvdata(&dssdev->dev); - unsigned t; - - mutex_lock(&td->lock); - t = td->esd_interval; - mutex_unlock(&td->lock); - - return snprintf(buf, PAGE_SIZE, "%u\n", t); -} - -static ssize_t taal_store_ulps(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t count) -{ - struct omap_dss_device *dssdev = to_dss_device(dev); - struct taal_data *td = dev_get_drvdata(&dssdev->dev); - unsigned long t; - int r; - - r = strict_strtoul(buf, 10, &t); - if (r) - return r; - - mutex_lock(&td->lock); - - if (td->enabled) { - dsi_bus_lock(dssdev); - - if (t) - r = taal_enter_ulps(dssdev); - else - r = taal_wake_up(dssdev); - - dsi_bus_unlock(dssdev); - } - - mutex_unlock(&td->lock); - - if (r) - return r; - - return count; -} - -static ssize_t taal_show_ulps(struct device *dev, - struct device_attribute *attr, - char *buf) -{ - struct omap_dss_device *dssdev = to_dss_device(dev); - struct taal_data *td = dev_get_drvdata(&dssdev->dev); - unsigned t; - - mutex_lock(&td->lock); - t = td->ulps_enabled; - mutex_unlock(&td->lock); - - return snprintf(buf, PAGE_SIZE, "%u\n", t); -} - -static ssize_t taal_store_ulps_timeout(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t count) -{ - struct omap_dss_device *dssdev = to_dss_device(dev); - struct taal_data *td = dev_get_drvdata(&dssdev->dev); - unsigned long t; - int r; - - r = strict_strtoul(buf, 10, &t); - if (r) - return r; - - mutex_lock(&td->lock); - td->ulps_timeout = t; - - if (td->enabled) { - /* taal_wake_up will restart the timer */ - dsi_bus_lock(dssdev); - r = taal_wake_up(dssdev); - dsi_bus_unlock(dssdev); - } - - mutex_unlock(&td->lock); - - if (r) - return r; - - return count; -} - -static ssize_t taal_show_ulps_timeout(struct device *dev, - struct device_attribute *attr, - char *buf) -{ - struct omap_dss_device *dssdev = to_dss_device(dev); - struct taal_data *td = dev_get_drvdata(&dssdev->dev); - unsigned t; - - mutex_lock(&td->lock); - t = td->ulps_timeout; - mutex_unlock(&td->lock); - - return snprintf(buf, PAGE_SIZE, "%u\n", t); -} - -static DEVICE_ATTR(num_dsi_errors, S_IRUGO, taal_num_errors_show, NULL); -static DEVICE_ATTR(hw_revision, S_IRUGO, taal_hw_revision_show, NULL); -static DEVICE_ATTR(cabc_mode, S_IRUGO | S_IWUSR, - show_cabc_mode, store_cabc_mode); -static DEVICE_ATTR(cabc_available_modes, S_IRUGO, - show_cabc_available_modes, NULL); -static DEVICE_ATTR(esd_interval, S_IRUGO | S_IWUSR, - taal_show_esd_interval, taal_store_esd_interval); -static DEVICE_ATTR(ulps, S_IRUGO | S_IWUSR, - taal_show_ulps, taal_store_ulps); -static DEVICE_ATTR(ulps_timeout, S_IRUGO | S_IWUSR, - taal_show_ulps_timeout, taal_store_ulps_timeout); - -static struct attribute *taal_attrs[] = { - &dev_attr_num_dsi_errors.attr, - &dev_attr_hw_revision.attr, - &dev_attr_cabc_mode.attr, - &dev_attr_cabc_available_modes.attr, - &dev_attr_esd_interval.attr, - &dev_attr_ulps.attr, - &dev_attr_ulps_timeout.attr, - NULL, -}; - -static struct attribute_group taal_attr_group = { - .attrs = taal_attrs, -}; - -static void taal_hw_reset(struct omap_dss_device *dssdev) -{ - struct taal_data *td = dev_get_drvdata(&dssdev->dev); - struct nokia_dsi_panel_data *panel_data = get_panel_data(dssdev); - - if (panel_data->reset_gpio == -1) - return; - - gpio_set_value(panel_data->reset_gpio, 1); - if (td->panel_config->reset_sequence.high) - udelay(td->panel_config->reset_sequence.high); - /* reset the panel */ - gpio_set_value(panel_data->reset_gpio, 0); - /* assert reset */ - if (td->panel_config->reset_sequence.low) - udelay(td->panel_config->reset_sequence.low); - gpio_set_value(panel_data->reset_gpio, 1); - /* wait after releasing reset */ - if (td->panel_config->sleep.hw_reset) - msleep(td->panel_config->sleep.hw_reset); -} - -static int taal_probe(struct omap_dss_device *dssdev) -{ - struct backlight_properties props; - struct taal_data *td; - struct backlight_device *bldev = NULL; - struct nokia_dsi_panel_data *panel_data = get_panel_data(dssdev); - struct panel_config *panel_config = NULL; - int r, i; - - dev_dbg(&dssdev->dev, "probe\n"); - - if (!panel_data || !panel_data->name) { - r = -EINVAL; - goto err; - } - - for (i = 0; i < ARRAY_SIZE(panel_configs); i++) { - if (strcmp(panel_data->name, panel_configs[i].name) == 0) { - panel_config = &panel_configs[i]; - break; - } - } - - if (!panel_config) { - r = -EINVAL; - goto err; - } - - dssdev->panel.config = OMAP_DSS_LCD_TFT; - dssdev->panel.timings = panel_config->timings; - dssdev->panel.dsi_pix_fmt = OMAP_DSS_DSI_FMT_RGB888; - - td = kzalloc(sizeof(*td), GFP_KERNEL); - if (!td) { - r = -ENOMEM; - goto err; - } - td->dssdev = dssdev; - td->panel_config = panel_config; - td->esd_interval = panel_data->esd_interval; - td->ulps_enabled = false; - td->ulps_timeout = panel_data->ulps_timeout; - - mutex_init(&td->lock); - - atomic_set(&td->do_update, 0); - - r = init_regulators(dssdev, panel_config->regulators, - panel_config->num_regulators); - if (r) - goto err_reg; - - td->workqueue = create_singlethread_workqueue("taal_esd"); - if (td->workqueue == NULL) { - dev_err(&dssdev->dev, "can't create ESD workqueue\n"); - r = -ENOMEM; - goto err_wq; - } - INIT_DELAYED_WORK_DEFERRABLE(&td->esd_work, taal_esd_work); - INIT_DELAYED_WORK(&td->ulps_work, taal_ulps_work); - - dev_set_drvdata(&dssdev->dev, td); - - taal_hw_reset(dssdev); - - if (panel_data->use_dsi_backlight) { - memset(&props, 0, sizeof(struct backlight_properties)); - props.max_brightness = 255; - - props.type = BACKLIGHT_RAW; - bldev = backlight_device_register(dev_name(&dssdev->dev), - &dssdev->dev, dssdev, &taal_bl_ops, &props); - if (IS_ERR(bldev)) { - r = PTR_ERR(bldev); - goto err_bl; - } - - td->bldev = bldev; - - bldev->props.fb_blank = FB_BLANK_UNBLANK; - bldev->props.power = FB_BLANK_UNBLANK; - bldev->props.brightness = 255; - - taal_bl_update_status(bldev); - } - - if (panel_data->use_ext_te) { - int gpio = panel_data->ext_te_gpio; - - r = gpio_request(gpio, "taal irq"); - if (r) { - dev_err(&dssdev->dev, "GPIO request failed\n"); - goto err_gpio; - } - - gpio_direction_input(gpio); - - r = request_irq(gpio_to_irq(gpio), taal_te_isr, - IRQF_TRIGGER_RISING, - "taal vsync", dssdev); - - if (r) { - dev_err(&dssdev->dev, "IRQ request failed\n"); - gpio_free(gpio); - goto err_irq; - } - - INIT_DELAYED_WORK_DEFERRABLE(&td->te_timeout_work, - taal_te_timeout_work_callback); - - dev_dbg(&dssdev->dev, "Using GPIO TE\n"); - } - - r = omap_dsi_request_vc(dssdev, &td->channel); - if (r) { - dev_err(&dssdev->dev, "failed to get virtual channel\n"); - goto err_req_vc; - } - - r = omap_dsi_set_vc_id(dssdev, td->channel, TCH); - if (r) { - dev_err(&dssdev->dev, "failed to set VC_ID\n"); - goto err_vc_id; - } - - r = sysfs_create_group(&dssdev->dev.kobj, &taal_attr_group); - if (r) { - dev_err(&dssdev->dev, "failed to create sysfs files\n"); - goto err_vc_id; - } - - return 0; - -err_vc_id: - omap_dsi_release_vc(dssdev, td->channel); -err_req_vc: - if (panel_data->use_ext_te) - free_irq(gpio_to_irq(panel_data->ext_te_gpio), dssdev); -err_irq: - if (panel_data->use_ext_te) - gpio_free(panel_data->ext_te_gpio); -err_gpio: - if (bldev != NULL) - backlight_device_unregister(bldev); -err_bl: - destroy_workqueue(td->workqueue); -err_wq: - free_regulators(panel_config->regulators, panel_config->num_regulators); -err_reg: - kfree(td); -err: - return r; -} - -static void __exit taal_remove(struct omap_dss_device *dssdev) -{ - struct taal_data *td = dev_get_drvdata(&dssdev->dev); - struct nokia_dsi_panel_data *panel_data = get_panel_data(dssdev); - struct backlight_device *bldev; - - dev_dbg(&dssdev->dev, "remove\n"); - - sysfs_remove_group(&dssdev->dev.kobj, &taal_attr_group); - omap_dsi_release_vc(dssdev, td->channel); - - if (panel_data->use_ext_te) { - int gpio = panel_data->ext_te_gpio; - free_irq(gpio_to_irq(gpio), dssdev); - gpio_free(gpio); - } - - bldev = td->bldev; - if (bldev != NULL) { - bldev->props.power = FB_BLANK_POWERDOWN; - taal_bl_update_status(bldev); - backlight_device_unregister(bldev); - } - - taal_cancel_ulps_work(dssdev); - taal_cancel_esd_work(dssdev); - destroy_workqueue(td->workqueue); - - /* reset, to be sure that the panel is in a valid state */ - taal_hw_reset(dssdev); - - free_regulators(td->panel_config->regulators, - td->panel_config->num_regulators); - - kfree(td); -} - -static int taal_power_on(struct omap_dss_device *dssdev) -{ - struct taal_data *td = dev_get_drvdata(&dssdev->dev); - u8 id1, id2, id3; - int r; - - r = omapdss_dsi_display_enable(dssdev); - if (r) { - dev_err(&dssdev->dev, "failed to enable DSI\n"); - goto err0; - } - - taal_hw_reset(dssdev); - - omapdss_dsi_vc_enable_hs(dssdev, td->channel, false); - - r = taal_sleep_out(td); - if (r) - goto err; - - r = taal_get_id(td, &id1, &id2, &id3); - if (r) - goto err; - - /* on early Taal revisions CABC is broken */ - if (td->panel_config->type == PANEL_TAAL && - (id2 == 0x00 || id2 == 0xff || id2 == 0x81)) - td->cabc_broken = true; - - r = taal_dcs_write_1(td, DCS_BRIGHTNESS, 0xff); - if (r) - goto err; - - r = taal_dcs_write_1(td, DCS_CTRL_DISPLAY, - (1<<2) | (1<<5)); /* BL | BCTRL */ - if (r) - goto err; - - r = taal_dcs_write_1(td, MIPI_DCS_SET_PIXEL_FORMAT, - MIPI_DCS_PIXEL_FMT_24BIT); - if (r) - goto err; - - r = taal_set_addr_mode(td, td->rotate, td->mirror); - if (r) - goto err; - - if (!td->cabc_broken) { - r = taal_dcs_write_1(td, DCS_WRITE_CABC, td->cabc_mode); - if (r) - goto err; - } - - r = taal_dcs_write_0(td, MIPI_DCS_SET_DISPLAY_ON); - if (r) - goto err; - - r = _taal_enable_te(dssdev, td->te_enabled); - if (r) - goto err; - - r = dsi_enable_video_output(dssdev, td->channel); - if (r) - goto err; - - td->enabled = 1; - - if (!td->intro_printed) { - dev_info(&dssdev->dev, "%s panel revision %02x.%02x.%02x\n", - td->panel_config->name, id1, id2, id3); - if (td->cabc_broken) - dev_info(&dssdev->dev, - "old Taal version, CABC disabled\n"); - td->intro_printed = true; - } - - omapdss_dsi_vc_enable_hs(dssdev, td->channel, true); - - return 0; -err: - dev_err(&dssdev->dev, "error while enabling panel, issuing HW reset\n"); - - taal_hw_reset(dssdev); - - omapdss_dsi_display_disable(dssdev, true, false); -err0: - return r; -} - -static void taal_power_off(struct omap_dss_device *dssdev) -{ - struct taal_data *td = dev_get_drvdata(&dssdev->dev); - int r; - - dsi_disable_video_output(dssdev, td->channel); - - r = taal_dcs_write_0(td, MIPI_DCS_SET_DISPLAY_OFF); - if (!r) - r = taal_sleep_in(td); - - if (r) { - dev_err(&dssdev->dev, - "error disabling panel, issuing HW reset\n"); - taal_hw_reset(dssdev); - } - - omapdss_dsi_display_disable(dssdev, true, false); - - td->enabled = 0; -} - -static int taal_panel_reset(struct omap_dss_device *dssdev) -{ - dev_err(&dssdev->dev, "performing LCD reset\n"); - - taal_power_off(dssdev); - taal_hw_reset(dssdev); - return taal_power_on(dssdev); -} - -static int taal_enable(struct omap_dss_device *dssdev) -{ - struct taal_data *td = dev_get_drvdata(&dssdev->dev); - int r; - - dev_dbg(&dssdev->dev, "enable\n"); - - mutex_lock(&td->lock); - - if (dssdev->state != OMAP_DSS_DISPLAY_DISABLED) { - r = -EINVAL; - goto err; - } - - dsi_bus_lock(dssdev); - - r = taal_power_on(dssdev); - - dsi_bus_unlock(dssdev); - - if (r) - goto err; - - taal_queue_esd_work(dssdev); - - dssdev->state = OMAP_DSS_DISPLAY_ACTIVE; - - mutex_unlock(&td->lock); - - return 0; -err: - dev_dbg(&dssdev->dev, "enable failed\n"); - mutex_unlock(&td->lock); - return r; -} - -static void taal_disable(struct omap_dss_device *dssdev) -{ - struct taal_data *td = dev_get_drvdata(&dssdev->dev); - - dev_dbg(&dssdev->dev, "disable\n"); - - mutex_lock(&td->lock); - - taal_cancel_ulps_work(dssdev); - taal_cancel_esd_work(dssdev); - - dsi_bus_lock(dssdev); - - if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE) { - int r; - - r = taal_wake_up(dssdev); - if (!r) - taal_power_off(dssdev); - } - - dsi_bus_unlock(dssdev); - - dssdev->state = OMAP_DSS_DISPLAY_DISABLED; - - mutex_unlock(&td->lock); -} - -static int taal_suspend(struct omap_dss_device *dssdev) -{ - struct taal_data *td = dev_get_drvdata(&dssdev->dev); - int r; - - dev_dbg(&dssdev->dev, "suspend\n"); - - mutex_lock(&td->lock); - - if (dssdev->state != OMAP_DSS_DISPLAY_ACTIVE) { - r = -EINVAL; - goto err; - } - - taal_cancel_ulps_work(dssdev); - taal_cancel_esd_work(dssdev); - - dsi_bus_lock(dssdev); - - r = taal_wake_up(dssdev); - if (!r) - taal_power_off(dssdev); - - dsi_bus_unlock(dssdev); - - dssdev->state = OMAP_DSS_DISPLAY_SUSPENDED; - - mutex_unlock(&td->lock); - - return 0; -err: - mutex_unlock(&td->lock); - return r; -} - -static int taal_resume(struct omap_dss_device *dssdev) -{ - struct taal_data *td = dev_get_drvdata(&dssdev->dev); - int r; - - dev_dbg(&dssdev->dev, "resume\n"); - - mutex_lock(&td->lock); - - if (dssdev->state != OMAP_DSS_DISPLAY_SUSPENDED) { - r = -EINVAL; - goto err; - } - - dsi_bus_lock(dssdev); - - r = taal_power_on(dssdev); - - dsi_bus_unlock(dssdev); - - if (r) { - dssdev->state = OMAP_DSS_DISPLAY_DISABLED; - } else { - dssdev->state = OMAP_DSS_DISPLAY_ACTIVE; - taal_queue_esd_work(dssdev); - } - - mutex_unlock(&td->lock); - - return r; -err: - mutex_unlock(&td->lock); - return r; -} - -static void taal_framedone_cb(int err, void *data) -{ - struct omap_dss_device *dssdev = data; - dev_dbg(&dssdev->dev, "framedone, err %d\n", err); - dsi_bus_unlock(dssdev); -} - -static irqreturn_t taal_te_isr(int irq, void *data) -{ - struct omap_dss_device *dssdev = data; - struct taal_data *td = dev_get_drvdata(&dssdev->dev); - int old; - int r; - - old = atomic_cmpxchg(&td->do_update, 1, 0); - - if (old) { - cancel_delayed_work(&td->te_timeout_work); - - r = omap_dsi_update(dssdev, td->channel, taal_framedone_cb, - dssdev); - if (r) - goto err; - } - - return IRQ_HANDLED; -err: - dev_err(&dssdev->dev, "start update failed\n"); - dsi_bus_unlock(dssdev); - return IRQ_HANDLED; -} - -static void taal_te_timeout_work_callback(struct work_struct *work) -{ - struct taal_data *td = container_of(work, struct taal_data, - te_timeout_work.work); - struct omap_dss_device *dssdev = td->dssdev; - - dev_err(&dssdev->dev, "TE not received for 250ms!\n"); - - atomic_set(&td->do_update, 0); - dsi_bus_unlock(dssdev); -} - -static int taal_update(struct omap_dss_device *dssdev, - u16 x, u16 y, u16 w, u16 h) -{ - struct taal_data *td = dev_get_drvdata(&dssdev->dev); - struct nokia_dsi_panel_data *panel_data = get_panel_data(dssdev); - int r; - - dev_dbg(&dssdev->dev, "update %d, %d, %d x %d\n", x, y, w, h); - - mutex_lock(&td->lock); - dsi_bus_lock(dssdev); - - r = taal_wake_up(dssdev); - if (r) - goto err; - - if (!td->enabled) { - r = 0; - goto err; - } - - /* XXX no need to send this every frame, but dsi break if not done */ - r = taal_set_update_window(td, 0, 0, - td->panel_config->timings.x_res, - td->panel_config->timings.y_res); - if (r) - goto err; - - if (td->te_enabled && panel_data->use_ext_te) { - schedule_delayed_work(&td->te_timeout_work, - msecs_to_jiffies(250)); - atomic_set(&td->do_update, 1); - } else { - r = omap_dsi_update(dssdev, td->channel, taal_framedone_cb, - dssdev); - if (r) - goto err; - } - - /* note: no bus_unlock here. unlock is in framedone_cb */ - mutex_unlock(&td->lock); - return 0; -err: - dsi_bus_unlock(dssdev); - mutex_unlock(&td->lock); - return r; -} - -static int taal_sync(struct omap_dss_device *dssdev) -{ - struct taal_data *td = dev_get_drvdata(&dssdev->dev); - - dev_dbg(&dssdev->dev, "sync\n"); - - mutex_lock(&td->lock); - dsi_bus_lock(dssdev); - dsi_bus_unlock(dssdev); - mutex_unlock(&td->lock); - - dev_dbg(&dssdev->dev, "sync done\n"); - - return 0; -} - -static int _taal_enable_te(struct omap_dss_device *dssdev, bool enable) -{ - struct taal_data *td = dev_get_drvdata(&dssdev->dev); - struct nokia_dsi_panel_data *panel_data = get_panel_data(dssdev); - int r; - - if (enable) - r = taal_dcs_write_1(td, MIPI_DCS_SET_TEAR_ON, 0); - else - r = taal_dcs_write_0(td, MIPI_DCS_SET_TEAR_OFF); - - if (!panel_data->use_ext_te) - omapdss_dsi_enable_te(dssdev, enable); - - if (td->panel_config->sleep.enable_te) - msleep(td->panel_config->sleep.enable_te); - - return r; -} - -static int taal_enable_te(struct omap_dss_device *dssdev, bool enable) -{ - struct taal_data *td = dev_get_drvdata(&dssdev->dev); - int r; - - mutex_lock(&td->lock); - - if (td->te_enabled == enable) - goto end; - - dsi_bus_lock(dssdev); - - if (td->enabled) { - r = taal_wake_up(dssdev); - if (r) - goto err; - - r = _taal_enable_te(dssdev, enable); - if (r) - goto err; - } - - td->te_enabled = enable; - - dsi_bus_unlock(dssdev); -end: - mutex_unlock(&td->lock); - - return 0; -err: - dsi_bus_unlock(dssdev); - mutex_unlock(&td->lock); - - return r; -} - -static int taal_get_te(struct omap_dss_device *dssdev) -{ - struct taal_data *td = dev_get_drvdata(&dssdev->dev); - int r; - - mutex_lock(&td->lock); - r = td->te_enabled; - mutex_unlock(&td->lock); - - return r; -} - -static int taal_rotate(struct omap_dss_device *dssdev, u8 rotate) -{ - struct taal_data *td = dev_get_drvdata(&dssdev->dev); - int r; - - dev_dbg(&dssdev->dev, "rotate %d\n", rotate); - - mutex_lock(&td->lock); - - if (td->rotate == rotate) - goto end; - - dsi_bus_lock(dssdev); - - if (td->enabled) { - r = taal_wake_up(dssdev); - if (r) - goto err; - - r = taal_set_addr_mode(td, rotate, td->mirror); - if (r) - goto err; - } - - td->rotate = rotate; - - dsi_bus_unlock(dssdev); -end: - mutex_unlock(&td->lock); - return 0; -err: - dsi_bus_unlock(dssdev); - mutex_unlock(&td->lock); - return r; -} - -static u8 taal_get_rotate(struct omap_dss_device *dssdev) -{ - struct taal_data *td = dev_get_drvdata(&dssdev->dev); - int r; - - mutex_lock(&td->lock); - r = td->rotate; - mutex_unlock(&td->lock); - - return r; -} - -static int taal_mirror(struct omap_dss_device *dssdev, bool enable) -{ - struct taal_data *td = dev_get_drvdata(&dssdev->dev); - int r; - - dev_dbg(&dssdev->dev, "mirror %d\n", enable); - - mutex_lock(&td->lock); - - if (td->mirror == enable) - goto end; - - dsi_bus_lock(dssdev); - if (td->enabled) { - r = taal_wake_up(dssdev); - if (r) - goto err; - - r = taal_set_addr_mode(td, td->rotate, enable); - if (r) - goto err; - } - - td->mirror = enable; - - dsi_bus_unlock(dssdev); -end: - mutex_unlock(&td->lock); - return 0; -err: - dsi_bus_unlock(dssdev); - mutex_unlock(&td->lock); - return r; -} - -static bool taal_get_mirror(struct omap_dss_device *dssdev) -{ - struct taal_data *td = dev_get_drvdata(&dssdev->dev); - int r; - - mutex_lock(&td->lock); - r = td->mirror; - mutex_unlock(&td->lock); - - return r; -} - -static int taal_run_test(struct omap_dss_device *dssdev, int test_num) -{ - struct taal_data *td = dev_get_drvdata(&dssdev->dev); - u8 id1, id2, id3; - int r; - - mutex_lock(&td->lock); - - if (!td->enabled) { - r = -ENODEV; - goto err1; - } - - dsi_bus_lock(dssdev); - - r = taal_wake_up(dssdev); - if (r) - goto err2; - - r = taal_dcs_read_1(td, DCS_GET_ID1, &id1); - if (r) - goto err2; - r = taal_dcs_read_1(td, DCS_GET_ID2, &id2); - if (r) - goto err2; - r = taal_dcs_read_1(td, DCS_GET_ID3, &id3); - if (r) - goto err2; - - dsi_bus_unlock(dssdev); - mutex_unlock(&td->lock); - return 0; -err2: - dsi_bus_unlock(dssdev); -err1: - mutex_unlock(&td->lock); - return r; -} - -static int taal_memory_read(struct omap_dss_device *dssdev, - void *buf, size_t size, - u16 x, u16 y, u16 w, u16 h) -{ - int r; - int first = 1; - int plen; - unsigned buf_used = 0; - struct taal_data *td = dev_get_drvdata(&dssdev->dev); - - if (size < w * h * 3) - return -ENOMEM; - - mutex_lock(&td->lock); - - if (!td->enabled) { - r = -ENODEV; - goto err1; - } - - size = min(w * h * 3, - dssdev->panel.timings.x_res * - dssdev->panel.timings.y_res * 3); - - dsi_bus_lock(dssdev); - - r = taal_wake_up(dssdev); - if (r) - goto err2; - - /* plen 1 or 2 goes into short packet. until checksum error is fixed, - * use short packets. plen 32 works, but bigger packets seem to cause - * an error. */ - if (size % 2) - plen = 1; - else - plen = 2; - - taal_set_update_window(td, x, y, w, h); - - r = dsi_vc_set_max_rx_packet_size(dssdev, td->channel, plen); - if (r) - goto err2; - - while (buf_used < size) { - u8 dcs_cmd = first ? 0x2e : 0x3e; - first = 0; - - r = dsi_vc_dcs_read(dssdev, td->channel, dcs_cmd, - buf + buf_used, size - buf_used); - - if (r < 0) { - dev_err(&dssdev->dev, "read error\n"); - goto err3; - } - - buf_used += r; - - if (r < plen) { - dev_err(&dssdev->dev, "short read\n"); - break; - } - - if (signal_pending(current)) { - dev_err(&dssdev->dev, "signal pending, " - "aborting memory read\n"); - r = -ERESTARTSYS; - goto err3; - } - } - - r = buf_used; - -err3: - dsi_vc_set_max_rx_packet_size(dssdev, td->channel, 1); -err2: - dsi_bus_unlock(dssdev); -err1: - mutex_unlock(&td->lock); - return r; -} - -static void taal_ulps_work(struct work_struct *work) -{ - struct taal_data *td = container_of(work, struct taal_data, - ulps_work.work); - struct omap_dss_device *dssdev = td->dssdev; - - mutex_lock(&td->lock); - - if (dssdev->state != OMAP_DSS_DISPLAY_ACTIVE || !td->enabled) { - mutex_unlock(&td->lock); - return; - } - - dsi_bus_lock(dssdev); - - taal_enter_ulps(dssdev); - - dsi_bus_unlock(dssdev); - mutex_unlock(&td->lock); -} - -static void taal_esd_work(struct work_struct *work) -{ - struct taal_data *td = container_of(work, struct taal_data, - esd_work.work); - struct omap_dss_device *dssdev = td->dssdev; - struct nokia_dsi_panel_data *panel_data = get_panel_data(dssdev); - u8 state1, state2; - int r; - - mutex_lock(&td->lock); - - if (!td->enabled) { - mutex_unlock(&td->lock); - return; - } - - dsi_bus_lock(dssdev); - - r = taal_wake_up(dssdev); - if (r) { - dev_err(&dssdev->dev, "failed to exit ULPS\n"); - goto err; - } - - r = taal_dcs_read_1(td, MIPI_DCS_GET_DIAGNOSTIC_RESULT, &state1); - if (r) { - dev_err(&dssdev->dev, "failed to read Taal status\n"); - goto err; - } - - /* Run self diagnostics */ - r = taal_sleep_out(td); - if (r) { - dev_err(&dssdev->dev, "failed to run Taal self-diagnostics\n"); - goto err; - } - - r = taal_dcs_read_1(td, MIPI_DCS_GET_DIAGNOSTIC_RESULT, &state2); - if (r) { - dev_err(&dssdev->dev, "failed to read Taal status\n"); - goto err; - } - - /* Each sleep out command will trigger a self diagnostic and flip - * Bit6 if the test passes. - */ - if (!((state1 ^ state2) & (1 << 6))) { - dev_err(&dssdev->dev, "LCD self diagnostics failed\n"); - goto err; - } - /* Self-diagnostics result is also shown on TE GPIO line. We need - * to re-enable TE after self diagnostics */ - if (td->te_enabled && panel_data->use_ext_te) { - r = taal_dcs_write_1(td, MIPI_DCS_SET_TEAR_ON, 0); - if (r) - goto err; - } - - dsi_bus_unlock(dssdev); - - taal_queue_esd_work(dssdev); - - mutex_unlock(&td->lock); - return; -err: - dev_err(&dssdev->dev, "performing LCD reset\n"); - - taal_panel_reset(dssdev); - - dsi_bus_unlock(dssdev); - - taal_queue_esd_work(dssdev); - - mutex_unlock(&td->lock); -} - -static struct omap_dss_driver taal_driver = { - .probe = taal_probe, - .remove = __exit_p(taal_remove), - - .enable = taal_enable, - .disable = taal_disable, - .suspend = taal_suspend, - .resume = taal_resume, - - .update = taal_update, - .sync = taal_sync, - - .get_resolution = taal_get_resolution, - .get_recommended_bpp = omapdss_default_get_recommended_bpp, - - .enable_te = taal_enable_te, - .get_te = taal_get_te, - - .set_rotate = taal_rotate, - .get_rotate = taal_get_rotate, - .set_mirror = taal_mirror, - .get_mirror = taal_get_mirror, - .run_test = taal_run_test, - .memory_read = taal_memory_read, - - .get_timings = taal_get_timings, - - .driver = { - .name = "taal", - .owner = THIS_MODULE, - }, -}; - -static int __init taal_init(void) -{ - omap_dss_register_driver(&taal_driver); - - return 0; -} - -static void __exit taal_exit(void) -{ - omap_dss_unregister_driver(&taal_driver); -} - -module_init(taal_init); -module_exit(taal_exit); - -MODULE_AUTHOR("Tomi Valkeinen <tomi.valkeinen@nokia.com>"); -MODULE_DESCRIPTION("Taal Driver"); -MODULE_LICENSE("GPL"); diff --git a/drivers/video/omap2/displays/panel-tpo-td043mtea1.c b/drivers/video/omap2/displays/panel-tpo-td043mtea1.c deleted file mode 100644 index e6649aa8959..00000000000 --- a/drivers/video/omap2/displays/panel-tpo-td043mtea1.c +++ /dev/null @@ -1,536 +0,0 @@ -/* - * LCD panel driver for TPO TD043MTEA1 - * - * Author: Gražvydas Ignotas <notasas@gmail.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#include <linux/module.h> -#include <linux/delay.h> -#include <linux/spi/spi.h> -#include <linux/regulator/consumer.h> -#include <linux/gpio.h> -#include <linux/err.h> -#include <linux/slab.h> - -#include <video/omapdss.h> - -#define TPO_R02_MODE(x) ((x) & 7) -#define TPO_R02_MODE_800x480 7 -#define TPO_R02_NCLK_RISING BIT(3) -#define TPO_R02_HSYNC_HIGH BIT(4) -#define TPO_R02_VSYNC_HIGH BIT(5) - -#define TPO_R03_NSTANDBY BIT(0) -#define TPO_R03_EN_CP_CLK BIT(1) -#define TPO_R03_EN_VGL_PUMP BIT(2) -#define TPO_R03_EN_PWM BIT(3) -#define TPO_R03_DRIVING_CAP_100 BIT(4) -#define TPO_R03_EN_PRE_CHARGE BIT(6) -#define TPO_R03_SOFTWARE_CTL BIT(7) - -#define TPO_R04_NFLIP_H BIT(0) -#define TPO_R04_NFLIP_V BIT(1) -#define TPO_R04_CP_CLK_FREQ_1H BIT(2) -#define TPO_R04_VGL_FREQ_1H BIT(4) - -#define TPO_R03_VAL_NORMAL (TPO_R03_NSTANDBY | TPO_R03_EN_CP_CLK | \ - TPO_R03_EN_VGL_PUMP | TPO_R03_EN_PWM | \ - TPO_R03_DRIVING_CAP_100 | TPO_R03_EN_PRE_CHARGE | \ - TPO_R03_SOFTWARE_CTL) - -#define TPO_R03_VAL_STANDBY (TPO_R03_DRIVING_CAP_100 | \ - TPO_R03_EN_PRE_CHARGE | TPO_R03_SOFTWARE_CTL) - -static const u16 tpo_td043_def_gamma[12] = { - 106, 200, 289, 375, 460, 543, 625, 705, 785, 864, 942, 1020 -}; - -struct tpo_td043_device { - struct spi_device *spi; - struct regulator *vcc_reg; - u16 gamma[12]; - u32 mode; - u32 hmirror:1; - u32 vmirror:1; -}; - -static int tpo_td043_write(struct spi_device *spi, u8 addr, u8 data) -{ - struct spi_message m; - struct spi_transfer xfer; - u16 w; - int r; - - spi_message_init(&m); - - memset(&xfer, 0, sizeof(xfer)); - - w = ((u16)addr << 10) | (1 << 8) | data; - xfer.tx_buf = &w; - xfer.bits_per_word = 16; - xfer.len = 2; - spi_message_add_tail(&xfer, &m); - - r = spi_sync(spi, &m); - if (r < 0) - dev_warn(&spi->dev, "failed to write to LCD reg (%d)\n", r); - return r; -} - -static void tpo_td043_write_gamma(struct spi_device *spi, u16 gamma[12]) -{ - u8 i, val; - - /* gamma bits [9:8] */ - for (val = i = 0; i < 4; i++) - val |= (gamma[i] & 0x300) >> ((i + 1) * 2); - tpo_td043_write(spi, 0x11, val); - - for (val = i = 0; i < 4; i++) - val |= (gamma[i+4] & 0x300) >> ((i + 1) * 2); - tpo_td043_write(spi, 0x12, val); - - for (val = i = 0; i < 4; i++) - val |= (gamma[i+8] & 0x300) >> ((i + 1) * 2); - tpo_td043_write(spi, 0x13, val); - - /* gamma bits [7:0] */ - for (val = i = 0; i < 12; i++) - tpo_td043_write(spi, 0x14 + i, gamma[i] & 0xff); -} - -static int tpo_td043_write_mirror(struct spi_device *spi, bool h, bool v) -{ - u8 reg4 = TPO_R04_NFLIP_H | TPO_R04_NFLIP_V | \ - TPO_R04_CP_CLK_FREQ_1H | TPO_R04_VGL_FREQ_1H; - if (h) - reg4 &= ~TPO_R04_NFLIP_H; - if (v) - reg4 &= ~TPO_R04_NFLIP_V; - - return tpo_td043_write(spi, 4, reg4); -} - -static int tpo_td043_set_hmirror(struct omap_dss_device *dssdev, bool enable) -{ - struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev); - - tpo_td043->hmirror = enable; - return tpo_td043_write_mirror(tpo_td043->spi, tpo_td043->hmirror, - tpo_td043->vmirror); -} - -static bool tpo_td043_get_hmirror(struct omap_dss_device *dssdev) -{ - struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev); - - return tpo_td043->hmirror; -} - -static ssize_t tpo_td043_vmirror_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev); - - return snprintf(buf, PAGE_SIZE, "%d\n", tpo_td043->vmirror); -} - -static ssize_t tpo_td043_vmirror_store(struct device *dev, - struct device_attribute *attr, const char *buf, size_t count) -{ - struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev); - int val; - int ret; - - ret = kstrtoint(buf, 0, &val); - if (ret < 0) - return ret; - - val = !!val; - - ret = tpo_td043_write_mirror(tpo_td043->spi, tpo_td043->hmirror, val); - if (ret < 0) - return ret; - - tpo_td043->vmirror = val; - - return count; -} - -static ssize_t tpo_td043_mode_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev); - - return snprintf(buf, PAGE_SIZE, "%d\n", tpo_td043->mode); -} - -static ssize_t tpo_td043_mode_store(struct device *dev, - struct device_attribute *attr, const char *buf, size_t count) -{ - struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev); - long val; - int ret; - - ret = kstrtol(buf, 0, &val); - if (ret != 0 || val & ~7) - return -EINVAL; - - tpo_td043->mode = val; - - val |= TPO_R02_NCLK_RISING; - tpo_td043_write(tpo_td043->spi, 2, val); - - return count; -} - -static ssize_t tpo_td043_gamma_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev); - ssize_t len = 0; - int ret; - int i; - - for (i = 0; i < ARRAY_SIZE(tpo_td043->gamma); i++) { - ret = snprintf(buf + len, PAGE_SIZE - len, "%u ", - tpo_td043->gamma[i]); - if (ret < 0) - return ret; - len += ret; - } - buf[len - 1] = '\n'; - - return len; -} - -static ssize_t tpo_td043_gamma_store(struct device *dev, - struct device_attribute *attr, const char *buf, size_t count) -{ - struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev); - unsigned int g[12]; - int ret; - int i; - - ret = sscanf(buf, "%u %u %u %u %u %u %u %u %u %u %u %u", - &g[0], &g[1], &g[2], &g[3], &g[4], &g[5], - &g[6], &g[7], &g[8], &g[9], &g[10], &g[11]); - - if (ret != 12) - return -EINVAL; - - for (i = 0; i < 12; i++) - tpo_td043->gamma[i] = g[i]; - - tpo_td043_write_gamma(tpo_td043->spi, tpo_td043->gamma); - - return count; -} - -static DEVICE_ATTR(vmirror, S_IRUGO | S_IWUSR, - tpo_td043_vmirror_show, tpo_td043_vmirror_store); -static DEVICE_ATTR(mode, S_IRUGO | S_IWUSR, - tpo_td043_mode_show, tpo_td043_mode_store); -static DEVICE_ATTR(gamma, S_IRUGO | S_IWUSR, - tpo_td043_gamma_show, tpo_td043_gamma_store); - -static struct attribute *tpo_td043_attrs[] = { - &dev_attr_vmirror.attr, - &dev_attr_mode.attr, - &dev_attr_gamma.attr, - NULL, -}; - -static struct attribute_group tpo_td043_attr_group = { - .attrs = tpo_td043_attrs, -}; - -static const struct omap_video_timings tpo_td043_timings = { - .x_res = 800, - .y_res = 480, - - .pixel_clock = 36000, - - .hsw = 1, - .hfp = 68, - .hbp = 214, - - .vsw = 1, - .vfp = 39, - .vbp = 34, -}; - -static int tpo_td043_power_on(struct omap_dss_device *dssdev) -{ - struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev); - int nreset_gpio = dssdev->reset_gpio; - int r; - - if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE) - return 0; - - r = omapdss_dpi_display_enable(dssdev); - if (r) - goto err0; - - if (dssdev->platform_enable) { - r = dssdev->platform_enable(dssdev); - if (r) - goto err1; - } - - regulator_enable(tpo_td043->vcc_reg); - - /* wait for power up */ - msleep(160); - - if (gpio_is_valid(nreset_gpio)) - gpio_set_value(nreset_gpio, 1); - - tpo_td043_write(tpo_td043->spi, 2, - TPO_R02_MODE(tpo_td043->mode) | TPO_R02_NCLK_RISING); - tpo_td043_write(tpo_td043->spi, 3, TPO_R03_VAL_NORMAL); - tpo_td043_write(tpo_td043->spi, 0x20, 0xf0); - tpo_td043_write(tpo_td043->spi, 0x21, 0xf0); - tpo_td043_write_mirror(tpo_td043->spi, tpo_td043->hmirror, - tpo_td043->vmirror); - tpo_td043_write_gamma(tpo_td043->spi, tpo_td043->gamma); - - return 0; -err1: - omapdss_dpi_display_disable(dssdev); -err0: - return r; -} - -static void tpo_td043_power_off(struct omap_dss_device *dssdev) -{ - struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev); - int nreset_gpio = dssdev->reset_gpio; - - if (dssdev->state != OMAP_DSS_DISPLAY_ACTIVE) - return; - - tpo_td043_write(tpo_td043->spi, 3, - TPO_R03_VAL_STANDBY | TPO_R03_EN_PWM); - - if (gpio_is_valid(nreset_gpio)) - gpio_set_value(nreset_gpio, 0); - - /* wait for at least 2 vsyncs before cutting off power */ - msleep(50); - - tpo_td043_write(tpo_td043->spi, 3, TPO_R03_VAL_STANDBY); - - regulator_disable(tpo_td043->vcc_reg); - - if (dssdev->platform_disable) - dssdev->platform_disable(dssdev); - - omapdss_dpi_display_disable(dssdev); -} - -static int tpo_td043_enable(struct omap_dss_device *dssdev) -{ - int ret; - - dev_dbg(&dssdev->dev, "enable\n"); - - ret = tpo_td043_power_on(dssdev); - if (ret) - return ret; - - dssdev->state = OMAP_DSS_DISPLAY_ACTIVE; - - return 0; -} - -static void tpo_td043_disable(struct omap_dss_device *dssdev) -{ - dev_dbg(&dssdev->dev, "disable\n"); - - tpo_td043_power_off(dssdev); - - dssdev->state = OMAP_DSS_DISPLAY_DISABLED; -} - -static int tpo_td043_suspend(struct omap_dss_device *dssdev) -{ - tpo_td043_power_off(dssdev); - dssdev->state = OMAP_DSS_DISPLAY_SUSPENDED; - return 0; -} - -static int tpo_td043_resume(struct omap_dss_device *dssdev) -{ - int r = 0; - - r = tpo_td043_power_on(dssdev); - if (r) - return r; - - dssdev->state = OMAP_DSS_DISPLAY_ACTIVE; - - return 0; -} - -static int tpo_td043_probe(struct omap_dss_device *dssdev) -{ - struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev); - int nreset_gpio = dssdev->reset_gpio; - int ret = 0; - - dev_dbg(&dssdev->dev, "probe\n"); - - if (tpo_td043 == NULL) { - dev_err(&dssdev->dev, "missing tpo_td043_device\n"); - return -ENODEV; - } - - dssdev->panel.config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IHS | - OMAP_DSS_LCD_IVS | OMAP_DSS_LCD_IPC; - dssdev->panel.timings = tpo_td043_timings; - dssdev->ctrl.pixel_size = 24; - - tpo_td043->mode = TPO_R02_MODE_800x480; - memcpy(tpo_td043->gamma, tpo_td043_def_gamma, sizeof(tpo_td043->gamma)); - - tpo_td043->vcc_reg = regulator_get(&dssdev->dev, "vcc"); - if (IS_ERR(tpo_td043->vcc_reg)) { - dev_err(&dssdev->dev, "failed to get LCD VCC regulator\n"); - ret = PTR_ERR(tpo_td043->vcc_reg); - goto fail_regulator; - } - - if (gpio_is_valid(nreset_gpio)) { - ret = gpio_request(nreset_gpio, "lcd reset"); - if (ret < 0) { - dev_err(&dssdev->dev, "couldn't request reset GPIO\n"); - goto fail_gpio_req; - } - - ret = gpio_direction_output(nreset_gpio, 0); - if (ret < 0) { - dev_err(&dssdev->dev, "couldn't set GPIO direction\n"); - goto fail_gpio_direction; - } - } - - ret = sysfs_create_group(&dssdev->dev.kobj, &tpo_td043_attr_group); - if (ret) - dev_warn(&dssdev->dev, "failed to create sysfs files\n"); - - return 0; - -fail_gpio_direction: - gpio_free(nreset_gpio); -fail_gpio_req: - regulator_put(tpo_td043->vcc_reg); -fail_regulator: - kfree(tpo_td043); - return ret; -} - -static void tpo_td043_remove(struct omap_dss_device *dssdev) -{ - struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev); - int nreset_gpio = dssdev->reset_gpio; - - dev_dbg(&dssdev->dev, "remove\n"); - - sysfs_remove_group(&dssdev->dev.kobj, &tpo_td043_attr_group); - regulator_put(tpo_td043->vcc_reg); - if (gpio_is_valid(nreset_gpio)) - gpio_free(nreset_gpio); -} - -static struct omap_dss_driver tpo_td043_driver = { - .probe = tpo_td043_probe, - .remove = tpo_td043_remove, - - .enable = tpo_td043_enable, - .disable = tpo_td043_disable, - .suspend = tpo_td043_suspend, - .resume = tpo_td043_resume, - .set_mirror = tpo_td043_set_hmirror, - .get_mirror = tpo_td043_get_hmirror, - - .driver = { - .name = "tpo_td043mtea1_panel", - .owner = THIS_MODULE, - }, -}; - -static int tpo_td043_spi_probe(struct spi_device *spi) -{ - struct omap_dss_device *dssdev = spi->dev.platform_data; - struct tpo_td043_device *tpo_td043; - int ret; - - if (dssdev == NULL) { - dev_err(&spi->dev, "missing dssdev\n"); - return -ENODEV; - } - - spi->bits_per_word = 16; - spi->mode = SPI_MODE_0; - - ret = spi_setup(spi); - if (ret < 0) { - dev_err(&spi->dev, "spi_setup failed: %d\n", ret); - return ret; - } - - tpo_td043 = kzalloc(sizeof(*tpo_td043), GFP_KERNEL); - if (tpo_td043 == NULL) - return -ENOMEM; - - tpo_td043->spi = spi; - dev_set_drvdata(&spi->dev, tpo_td043); - dev_set_drvdata(&dssdev->dev, tpo_td043); - - omap_dss_register_driver(&tpo_td043_driver); - - return 0; -} - -static int __devexit tpo_td043_spi_remove(struct spi_device *spi) -{ - struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&spi->dev); - - omap_dss_unregister_driver(&tpo_td043_driver); - kfree(tpo_td043); - - return 0; -} - -static struct spi_driver tpo_td043_spi_driver = { - .driver = { - .name = "tpo_td043mtea1_panel_spi", - .owner = THIS_MODULE, - }, - .probe = tpo_td043_spi_probe, - .remove = __devexit_p(tpo_td043_spi_remove), -}; - -static int __init tpo_td043_init(void) -{ - return spi_register_driver(&tpo_td043_spi_driver); -} - -static void __exit tpo_td043_exit(void) -{ - spi_unregister_driver(&tpo_td043_spi_driver); -} - -module_init(tpo_td043_init); -module_exit(tpo_td043_exit); - -MODULE_AUTHOR("Gražvydas Ignotas <notasas@gmail.com>"); -MODULE_DESCRIPTION("TPO TD043MTEA1 LCD Driver"); -MODULE_LICENSE("GPL"); diff --git a/drivers/video/omap2/dss/Kconfig b/drivers/video/omap2/dss/Kconfig deleted file mode 100644 index 7be7c06a249..00000000000 --- a/drivers/video/omap2/dss/Kconfig +++ /dev/null @@ -1,131 +0,0 @@ -menuconfig OMAP2_DSS - tristate "OMAP2+ Display Subsystem support" - depends on ARCH_OMAP2PLUS - help - OMAP2+ Display Subsystem support. - -if OMAP2_DSS - -config OMAP2_VRAM_SIZE - int "VRAM size (MB)" - range 0 32 - default 0 - help - The amount of SDRAM to reserve at boot time for video RAM use. - This VRAM will be used by omapfb and other drivers that need - large continuous RAM area for video use. - - You can also set this with "vram=<bytes>" kernel argument, or - in the board file. - -config OMAP2_DSS_DEBUG_SUPPORT - bool "Debug support" - default y - help - This enables debug messages. You need to enable printing - with 'debug' module parameter. - -config OMAP2_DSS_COLLECT_IRQ_STATS - bool "Collect DSS IRQ statistics" - depends on OMAP2_DSS_DEBUG_SUPPORT - default n - help - Collect DSS IRQ statistics, printable via debugfs. - - The statistics can be found from - <debugfs>/omapdss/dispc_irq for DISPC interrupts, and - <debugfs>/omapdss/dsi_irq for DSI interrupts. - -config OMAP2_DSS_DPI - bool "DPI support" - default y - help - DPI Interface. This is the Parallel Display Interface. - -config OMAP2_DSS_RFBI - bool "RFBI support" - default n - help - MIPI DBI support (RFBI, Remote Framebuffer Interface, in Texas - Instrument's terminology). - - DBI is a bus between the host processor and a peripheral, - such as a display or a framebuffer chip. - - See http://www.mipi.org/ for DBI spesifications. - -config OMAP2_DSS_VENC - bool "VENC support" - default y - help - OMAP Video Encoder support for S-Video and composite TV-out. - -config OMAP4_DSS_HDMI - bool "HDMI support" - depends on ARCH_OMAP4 - default y - help - HDMI Interface. This adds the High Definition Multimedia Interface. - See http://www.hdmi.org/ for HDMI specification. - -config OMAP2_DSS_SDI - bool "SDI support" - depends on ARCH_OMAP3 - default n - help - SDI (Serial Display Interface) support. - - SDI is a high speed one-way display serial bus between the host - processor and a display. - -config OMAP2_DSS_DSI - bool "DSI support" - depends on ARCH_OMAP3 || ARCH_OMAP4 - default n - help - MIPI DSI (Display Serial Interface) support. - - DSI is a high speed half-duplex serial interface between the host - processor and a peripheral, such as a display or a framebuffer chip. - - See http://www.mipi.org/ for DSI spesifications. - -config OMAP2_DSS_FAKE_VSYNC - bool "Fake VSYNC irq from manual update displays" - default n - help - If this is selected, DSI will generate a fake DISPC VSYNC interrupt - when DSI has sent a frame. This is only needed with DSI or RFBI - displays using manual mode, and you want VSYNC to, for example, - time animation. - -config OMAP2_DSS_MIN_FCK_PER_PCK - int "Minimum FCK/PCK ratio (for scaling)" - range 0 32 - default 0 - help - This can be used to adjust the minimum FCK/PCK ratio. - - With this you can make sure that DISPC FCK is at least - n x PCK. Video plane scaling requires higher FCK than - normally. - - If this is set to 0, there's no extra constraint on the - DISPC FCK. However, the FCK will at minimum be - 2xPCK (if active matrix) or 3xPCK (if passive matrix). - - Max FCK is 173MHz, so this doesn't work if your PCK - is very high. - -config OMAP2_DSS_SLEEP_AFTER_VENC_RESET - bool "Sleep 20ms after VENC reset" - default y - help - There is a 20ms sleep after VENC reset which seemed to fix the - reset. The reason for the bug is unclear, and it's also unclear - on what platforms this happens. - - This option enables the sleep, and is enabled by default. You can - disable the sleep if it doesn't cause problems on your platform. - -endif diff --git a/drivers/video/omap2/dss/Makefile b/drivers/video/omap2/dss/Makefile deleted file mode 100644 index 5c450b0f94d..00000000000 --- a/drivers/video/omap2/dss/Makefile +++ /dev/null @@ -1,10 +0,0 @@ -obj-$(CONFIG_OMAP2_DSS) += omapdss.o -omapdss-y := core.o dss.o dss_features.o dispc.o dispc_coefs.o display.o \ - manager.o overlay.o apply.o -omapdss-$(CONFIG_OMAP2_DSS_DPI) += dpi.o -omapdss-$(CONFIG_OMAP2_DSS_RFBI) += rfbi.o -omapdss-$(CONFIG_OMAP2_DSS_VENC) += venc.o -omapdss-$(CONFIG_OMAP2_DSS_SDI) += sdi.o -omapdss-$(CONFIG_OMAP2_DSS_DSI) += dsi.o -omapdss-$(CONFIG_OMAP4_DSS_HDMI) += hdmi.o \ - hdmi_panel.o ti_hdmi_4xxx_ip.o diff --git a/drivers/video/omap2/dss/apply.c b/drivers/video/omap2/dss/apply.c deleted file mode 100644 index 052dc874cd3..00000000000 --- a/drivers/video/omap2/dss/apply.c +++ /dev/null @@ -1,1324 +0,0 @@ -/* - * Copyright (C) 2011 Texas Instruments - * Author: Tomi Valkeinen <tomi.valkeinen@ti.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program. If not, see <http://www.gnu.org/licenses/>. - */ - -#define DSS_SUBSYS_NAME "APPLY" - -#include <linux/kernel.h> -#include <linux/slab.h> -#include <linux/spinlock.h> -#include <linux/jiffies.h> - -#include <video/omapdss.h> - -#include "dss.h" -#include "dss_features.h" - -/* - * We have 4 levels of cache for the dispc settings. First two are in SW and - * the latter two in HW. - * - * set_info() - * v - * +--------------------+ - * | user_info | - * +--------------------+ - * v - * apply() - * v - * +--------------------+ - * | info | - * +--------------------+ - * v - * write_regs() - * v - * +--------------------+ - * | shadow registers | - * +--------------------+ - * v - * VFP or lcd/digit_enable - * v - * +--------------------+ - * | registers | - * +--------------------+ - */ - -struct ovl_priv_data { - - bool user_info_dirty; - struct omap_overlay_info user_info; - - bool info_dirty; - struct omap_overlay_info info; - - bool shadow_info_dirty; - - bool extra_info_dirty; - bool shadow_extra_info_dirty; - - bool enabled; - enum omap_channel channel; - u32 fifo_low, fifo_high; - - /* - * True if overlay is to be enabled. Used to check and calculate configs - * for the overlay before it is enabled in the HW. - */ - bool enabling; -}; - -struct mgr_priv_data { - - bool user_info_dirty; - struct omap_overlay_manager_info user_info; - - bool info_dirty; - struct omap_overlay_manager_info info; - - bool shadow_info_dirty; - - /* If true, GO bit is up and shadow registers cannot be written. - * Never true for manual update displays */ - bool busy; - - /* If true, dispc output is enabled */ - bool updating; - - /* If true, a display is enabled using this manager */ - bool enabled; -}; - -static struct { - struct ovl_priv_data ovl_priv_data_array[MAX_DSS_OVERLAYS]; - struct mgr_priv_data mgr_priv_data_array[MAX_DSS_MANAGERS]; - - bool irq_enabled; -} dss_data; - -/* protects dss_data */ -static spinlock_t data_lock; -/* lock for blocking functions */ -static DEFINE_MUTEX(apply_lock); -static DECLARE_COMPLETION(extra_updated_completion); - -static void dss_register_vsync_isr(void); - -static struct ovl_priv_data *get_ovl_priv(struct omap_overlay *ovl) -{ - return &dss_data.ovl_priv_data_array[ovl->id]; -} - -static struct mgr_priv_data *get_mgr_priv(struct omap_overlay_manager *mgr) -{ - return &dss_data.mgr_priv_data_array[mgr->id]; -} - -void dss_apply_init(void) -{ - const int num_ovls = dss_feat_get_num_ovls(); - int i; - - spin_lock_init(&data_lock); - - for (i = 0; i < num_ovls; ++i) { - struct ovl_priv_data *op; - - op = &dss_data.ovl_priv_data_array[i]; - - op->info.global_alpha = 255; - - switch (i) { - case 0: - op->info.zorder = 0; - break; - case 1: - op->info.zorder = - dss_has_feature(FEAT_ALPHA_FREE_ZORDER) ? 3 : 0; - break; - case 2: - op->info.zorder = - dss_has_feature(FEAT_ALPHA_FREE_ZORDER) ? 2 : 0; - break; - case 3: - op->info.zorder = - dss_has_feature(FEAT_ALPHA_FREE_ZORDER) ? 1 : 0; - break; - } - - op->user_info = op->info; - } -} - -static bool ovl_manual_update(struct omap_overlay *ovl) -{ - return ovl->manager->device->caps & OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE; -} - -static bool mgr_manual_update(struct omap_overlay_manager *mgr) -{ - return mgr->device->caps & OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE; -} - -static int dss_check_settings_low(struct omap_overlay_manager *mgr, - struct omap_dss_device *dssdev, bool applying) -{ - struct omap_overlay_info *oi; - struct omap_overlay_manager_info *mi; - struct omap_overlay *ovl; - struct omap_overlay_info *ois[MAX_DSS_OVERLAYS]; - struct ovl_priv_data *op; - struct mgr_priv_data *mp; - - mp = get_mgr_priv(mgr); - - if (applying && mp->user_info_dirty) - mi = &mp->user_info; - else - mi = &mp->info; - - /* collect the infos to be tested into the array */ - list_for_each_entry(ovl, &mgr->overlays, list) { - op = get_ovl_priv(ovl); - - if (!op->enabled && !op->enabling) - oi = NULL; - else if (applying && op->user_info_dirty) - oi = &op->user_info; - else - oi = &op->info; - - ois[ovl->id] = oi; - } - - return dss_mgr_check(mgr, dssdev, mi, ois); -} - -/* - * check manager and overlay settings using overlay_info from data->info - */ -static int dss_check_settings(struct omap_overlay_manager *mgr, - struct omap_dss_device *dssdev) -{ - return dss_check_settings_low(mgr, dssdev, false); -} - -/* - * check manager and overlay settings using overlay_info from ovl->info if - * dirty and from data->info otherwise - */ -static int dss_check_settings_apply(struct omap_overlay_manager *mgr, - struct omap_dss_device *dssdev) -{ - return dss_check_settings_low(mgr, dssdev, true); -} - -static bool need_isr(void) -{ - const int num_mgrs = dss_feat_get_num_mgrs(); - int i; - - for (i = 0; i < num_mgrs; ++i) { - struct omap_overlay_manager *mgr; - struct mgr_priv_data *mp; - struct omap_overlay *ovl; - - mgr = omap_dss_get_overlay_manager(i); - mp = get_mgr_priv(mgr); - - if (!mp->enabled) - continue; - - if (mgr_manual_update(mgr)) { - /* to catch FRAMEDONE */ - if (mp->updating) - return true; - } else { - /* to catch GO bit going down */ - if (mp->busy) - return true; - - /* to write new values to registers */ - if (mp->info_dirty) - return true; - - /* to set GO bit */ - if (mp->shadow_info_dirty) - return true; - - list_for_each_entry(ovl, &mgr->overlays, list) { - struct ovl_priv_data *op; - - op = get_ovl_priv(ovl); - - /* - * NOTE: we check extra_info flags even for - * disabled overlays, as extra_infos need to be - * always written. - */ - - /* to write new values to registers */ - if (op->extra_info_dirty) - return true; - - /* to set GO bit */ - if (op->shadow_extra_info_dirty) - return true; - - if (!op->enabled) - continue; - - /* to write new values to registers */ - if (op->info_dirty) - return true; - - /* to set GO bit */ - if (op->shadow_info_dirty) - return true; - } - } - } - - return false; -} - -static bool need_go(struct omap_overlay_manager *mgr) -{ - struct omap_overlay *ovl; - struct mgr_priv_data *mp; - struct ovl_priv_data *op; - - mp = get_mgr_priv(mgr); - - if (mp->shadow_info_dirty) - return true; - - list_for_each_entry(ovl, &mgr->overlays, list) { - op = get_ovl_priv(ovl); - if (op->shadow_info_dirty || op->shadow_extra_info_dirty) - return true; - } - - return false; -} - -/* returns true if an extra_info field is currently being updated */ -static bool extra_info_update_ongoing(void) -{ - const int num_ovls = omap_dss_get_num_overlays(); - struct ovl_priv_data *op; - struct omap_overlay *ovl; - struct mgr_priv_data *mp; - int i; - - for (i = 0; i < num_ovls; ++i) { - ovl = omap_dss_get_overlay(i); - op = get_ovl_priv(ovl); - - if (!ovl->manager) - continue; - - mp = get_mgr_priv(ovl->manager); - - if (!mp->enabled) - continue; - - if (!mp->updating) - continue; - - if (op->extra_info_dirty || op->shadow_extra_info_dirty) - return true; - } - - return false; -} - -/* wait until no extra_info updates are pending */ -static void wait_pending_extra_info_updates(void) -{ - bool updating; - unsigned long flags; - unsigned long t; - - spin_lock_irqsave(&data_lock, flags); - - updating = extra_info_update_ongoing(); - - if (!updating) { - spin_unlock_irqrestore(&data_lock, flags); - return; - } - - init_completion(&extra_updated_completion); - - spin_unlock_irqrestore(&data_lock, flags); - - t = msecs_to_jiffies(500); - wait_for_completion_timeout(&extra_updated_completion, t); - - updating = extra_info_update_ongoing(); - - WARN_ON(updating); -} - -int dss_mgr_wait_for_go(struct omap_overlay_manager *mgr) -{ - unsigned long timeout = msecs_to_jiffies(500); - struct mgr_priv_data *mp; - u32 irq; - int r; - int i; - struct omap_dss_device *dssdev = mgr->device; - - if (!dssdev || dssdev->state != OMAP_DSS_DISPLAY_ACTIVE) - return 0; - - if (mgr_manual_update(mgr)) - return 0; - - irq = dispc_mgr_get_vsync_irq(mgr->id); - - mp = get_mgr_priv(mgr); - i = 0; - while (1) { - unsigned long flags; - bool shadow_dirty, dirty; - - spin_lock_irqsave(&data_lock, flags); - dirty = mp->info_dirty; - shadow_dirty = mp->shadow_info_dirty; - spin_unlock_irqrestore(&data_lock, flags); - - if (!dirty && !shadow_dirty) { - r = 0; - break; - } - - /* 4 iterations is the worst case: - * 1 - initial iteration, dirty = true (between VFP and VSYNC) - * 2 - first VSYNC, dirty = true - * 3 - dirty = false, shadow_dirty = true - * 4 - shadow_dirty = false */ - if (i++ == 3) { - DSSERR("mgr(%d)->wait_for_go() not finishing\n", - mgr->id); - r = 0; - break; - } - - r = omap_dispc_wait_for_irq_interruptible_timeout(irq, timeout); - if (r == -ERESTARTSYS) - break; - - if (r) { - DSSERR("mgr(%d)->wait_for_go() timeout\n", mgr->id); - break; - } - } - - return r; -} - -int dss_mgr_wait_for_go_ovl(struct omap_overlay *ovl) -{ - unsigned long timeout = msecs_to_jiffies(500); - struct ovl_priv_data *op; - struct omap_dss_device *dssdev; - u32 irq; - int r; - int i; - - if (!ovl->manager) - return 0; - - dssdev = ovl->manager->device; - - if (!dssdev || dssdev->state != OMAP_DSS_DISPLAY_ACTIVE) - return 0; - - if (ovl_manual_update(ovl)) - return 0; - - irq = dispc_mgr_get_vsync_irq(ovl->manager->id); - - op = get_ovl_priv(ovl); - i = 0; - while (1) { - unsigned long flags; - bool shadow_dirty, dirty; - - spin_lock_irqsave(&data_lock, flags); - dirty = op->info_dirty; - shadow_dirty = op->shadow_info_dirty; - spin_unlock_irqrestore(&data_lock, flags); - - if (!dirty && !shadow_dirty) { - r = 0; - break; - } - - /* 4 iterations is the worst case: - * 1 - initial iteration, dirty = true (between VFP and VSYNC) - * 2 - first VSYNC, dirty = true - * 3 - dirty = false, shadow_dirty = true - * 4 - shadow_dirty = false */ - if (i++ == 3) { - DSSERR("ovl(%d)->wait_for_go() not finishing\n", - ovl->id); - r = 0; - break; - } - - r = omap_dispc_wait_for_irq_interruptible_timeout(irq, timeout); - if (r == -ERESTARTSYS) - break; - - if (r) { - DSSERR("ovl(%d)->wait_for_go() timeout\n", ovl->id); - break; - } - } - - return r; -} - -static void dss_ovl_write_regs(struct omap_overlay *ovl) -{ - struct ovl_priv_data *op = get_ovl_priv(ovl); - struct omap_overlay_info *oi; - bool ilace, replication; - struct mgr_priv_data *mp; - int r; - - DSSDBGF("%d", ovl->id); - - if (!op->enabled || !op->info_dirty) - return; - - oi = &op->info; - - replication = dss_use_replication(ovl->manager->device, oi->color_mode); - - ilace = ovl->manager->device->type == OMAP_DISPLAY_TYPE_VENC; - - r = dispc_ovl_setup(ovl->id, oi, ilace, replication); - if (r) { - /* - * We can't do much here, as this function can be called from - * vsync interrupt. - */ - DSSERR("dispc_ovl_setup failed for ovl %d\n", ovl->id); - - /* This will leave fifo configurations in a nonoptimal state */ - op->enabled = false; - dispc_ovl_enable(ovl->id, false); - return; - } - - mp = get_mgr_priv(ovl->manager); - - op->info_dirty = false; - if (mp->updating) - op->shadow_info_dirty = true; -} - -static void dss_ovl_write_regs_extra(struct omap_overlay *ovl) -{ - struct ovl_priv_data *op = get_ovl_priv(ovl); - struct mgr_priv_data *mp; - - DSSDBGF("%d", ovl->id); - - if (!op->extra_info_dirty) - return; - - /* note: write also when op->enabled == false, so that the ovl gets - * disabled */ - - dispc_ovl_enable(ovl->id, op->enabled); - dispc_ovl_set_channel_out(ovl->id, op->channel); - dispc_ovl_set_fifo_threshold(ovl->id, op->fifo_low, op->fifo_high); - - mp = get_mgr_priv(ovl->manager); - - op->extra_info_dirty = false; - if (mp->updating) - op->shadow_extra_info_dirty = true; -} - -static void dss_mgr_write_regs(struct omap_overlay_manager *mgr) -{ - struct mgr_priv_data *mp = get_mgr_priv(mgr); - struct omap_overlay *ovl; - - DSSDBGF("%d", mgr->id); - - if (!mp->enabled) - return; - - WARN_ON(mp->busy); - - /* Commit overlay settings */ - list_for_each_entry(ovl, &mgr->overlays, list) { - dss_ovl_write_regs(ovl); - dss_ovl_write_regs_extra(ovl); - } - - if (mp->info_dirty) { - dispc_mgr_setup(mgr->id, &mp->info); - - mp->info_dirty = false; - if (mp->updating) - mp->shadow_info_dirty = true; - } -} - -static void dss_write_regs(void) -{ - const int num_mgrs = omap_dss_get_num_overlay_managers(); - int i; - - for (i = 0; i < num_mgrs; ++i) { - struct omap_overlay_manager *mgr; - struct mgr_priv_data *mp; - int r; - - mgr = omap_dss_get_overlay_manager(i); - mp = get_mgr_priv(mgr); - - if (!mp->enabled || mgr_manual_update(mgr) || mp->busy) - continue; - - r = dss_check_settings(mgr, mgr->device); - if (r) { - DSSERR("cannot write registers for manager %s: " - "illegal configuration\n", mgr->name); - continue; - } - - dss_mgr_write_regs(mgr); - } -} - -static void dss_set_go_bits(void) -{ - const int num_mgrs = omap_dss_get_num_overlay_managers(); - int i; - - for (i = 0; i < num_mgrs; ++i) { - struct omap_overlay_manager *mgr; - struct mgr_priv_data *mp; - - mgr = omap_dss_get_overlay_manager(i); - mp = get_mgr_priv(mgr); - - if (!mp->enabled || mgr_manual_update(mgr) || mp->busy) - continue; - - if (!need_go(mgr)) - continue; - - mp->busy = true; - - if (!dss_data.irq_enabled && need_isr()) - dss_register_vsync_isr(); - - dispc_mgr_go(mgr->id); - } - -} - -void dss_mgr_start_update(struct omap_overlay_manager *mgr) -{ - struct mgr_priv_data *mp = get_mgr_priv(mgr); - unsigned long flags; - int r; - - spin_lock_irqsave(&data_lock, flags); - - WARN_ON(mp->updating); - - r = dss_check_settings(mgr, mgr->device); - if (r) { - DSSERR("cannot start manual update: illegal configuration\n"); - spin_unlock_irqrestore(&data_lock, flags); - return; - } - - dss_mgr_write_regs(mgr); - - mp->updating = true; - - if (!dss_data.irq_enabled && need_isr()) - dss_register_vsync_isr(); - - dispc_mgr_enable(mgr->id, true); - - spin_unlock_irqrestore(&data_lock, flags); -} - -static void dss_apply_irq_handler(void *data, u32 mask); - -static void dss_register_vsync_isr(void) -{ - const int num_mgrs = dss_feat_get_num_mgrs(); - u32 mask; - int r, i; - - mask = 0; - for (i = 0; i < num_mgrs; ++i) - mask |= dispc_mgr_get_vsync_irq(i); - - for (i = 0; i < num_mgrs; ++i) - mask |= dispc_mgr_get_framedone_irq(i); - - r = omap_dispc_register_isr(dss_apply_irq_handler, NULL, mask); - WARN_ON(r); - - dss_data.irq_enabled = true; -} - -static void dss_unregister_vsync_isr(void) -{ - const int num_mgrs = dss_feat_get_num_mgrs(); - u32 mask; - int r, i; - - mask = 0; - for (i = 0; i < num_mgrs; ++i) - mask |= dispc_mgr_get_vsync_irq(i); - - for (i = 0; i < num_mgrs; ++i) - mask |= dispc_mgr_get_framedone_irq(i); - - r = omap_dispc_unregister_isr(dss_apply_irq_handler, NULL, mask); - WARN_ON(r); - - dss_data.irq_enabled = false; -} - -static void mgr_clear_shadow_dirty(struct omap_overlay_manager *mgr) -{ - struct omap_overlay *ovl; - struct mgr_priv_data *mp; - struct ovl_priv_data *op; - - mp = get_mgr_priv(mgr); - mp->shadow_info_dirty = false; - - list_for_each_entry(ovl, &mgr->overlays, list) { - op = get_ovl_priv(ovl); - op->shadow_info_dirty = false; - op->shadow_extra_info_dirty = false; - } -} - -static void dss_apply_irq_handler(void *data, u32 mask) -{ - const int num_mgrs = dss_feat_get_num_mgrs(); - int i; - bool extra_updating; - - spin_lock(&data_lock); - - /* clear busy, updating flags, shadow_dirty flags */ - for (i = 0; i < num_mgrs; i++) { - struct omap_overlay_manager *mgr; - struct mgr_priv_data *mp; - bool was_updating; - - mgr = omap_dss_get_overlay_manager(i); - mp = get_mgr_priv(mgr); - - if (!mp->enabled) - continue; - - was_updating = mp->updating; - mp->updating = dispc_mgr_is_enabled(i); - - if (!mgr_manual_update(mgr)) { - bool was_busy = mp->busy; - mp->busy = dispc_mgr_go_busy(i); - - if (was_busy && !mp->busy) - mgr_clear_shadow_dirty(mgr); - } else { - if (was_updating && !mp->updating) - mgr_clear_shadow_dirty(mgr); - } - } - - dss_write_regs(); - dss_set_go_bits(); - - extra_updating = extra_info_update_ongoing(); - if (!extra_updating) - complete_all(&extra_updated_completion); - - if (!need_isr()) - dss_unregister_vsync_isr(); - - spin_unlock(&data_lock); -} - -static void omap_dss_mgr_apply_ovl(struct omap_overlay *ovl) -{ - struct ovl_priv_data *op; - - op = get_ovl_priv(ovl); - - if (!op->user_info_dirty) - return; - - op->user_info_dirty = false; - op->info_dirty = true; - op->info = op->user_info; -} - -static void omap_dss_mgr_apply_mgr(struct omap_overlay_manager *mgr) -{ - struct mgr_priv_data *mp; - - mp = get_mgr_priv(mgr); - - if (!mp->user_info_dirty) - return; - - mp->user_info_dirty = false; - mp->info_dirty = true; - mp->info = mp->user_info; -} - -int omap_dss_mgr_apply(struct omap_overlay_manager *mgr) -{ - unsigned long flags; - struct omap_overlay *ovl; - int r; - - DSSDBG("omap_dss_mgr_apply(%s)\n", mgr->name); - - spin_lock_irqsave(&data_lock, flags); - - r = dss_check_settings_apply(mgr, mgr->device); - if (r) { - spin_unlock_irqrestore(&data_lock, flags); - DSSERR("failed to apply settings: illegal configuration.\n"); - return r; - } - - /* Configure overlays */ - list_for_each_entry(ovl, &mgr->overlays, list) - omap_dss_mgr_apply_ovl(ovl); - - /* Configure manager */ - omap_dss_mgr_apply_mgr(mgr); - - dss_write_regs(); - dss_set_go_bits(); - - spin_unlock_irqrestore(&data_lock, flags); - - return 0; -} - -static void dss_apply_ovl_enable(struct omap_overlay *ovl, bool enable) -{ - struct ovl_priv_data *op; - - op = get_ovl_priv(ovl); - - if (op->enabled == enable) - return; - - op->enabled = enable; - op->extra_info_dirty = true; -} - -static void dss_apply_ovl_fifo_thresholds(struct omap_overlay *ovl, - u32 fifo_low, u32 fifo_high) -{ - struct ovl_priv_data *op = get_ovl_priv(ovl); - - if (op->fifo_low == fifo_low && op->fifo_high == fifo_high) - return; - - op->fifo_low = fifo_low; - op->fifo_high = fifo_high; - op->extra_info_dirty = true; -} - -static void dss_ovl_setup_fifo(struct omap_overlay *ovl) -{ - struct ovl_priv_data *op = get_ovl_priv(ovl); - struct omap_dss_device *dssdev; - u32 size, burst_size; - u32 fifo_low, fifo_high; - - if (!op->enabled && !op->enabling) - return; - - dssdev = ovl->manager->device; - - size = dispc_ovl_get_fifo_size(ovl->id); - - burst_size = dispc_ovl_get_burst_size(ovl->id); - - switch (dssdev->type) { - case OMAP_DISPLAY_TYPE_DPI: - case OMAP_DISPLAY_TYPE_DBI: - case OMAP_DISPLAY_TYPE_SDI: - case OMAP_DISPLAY_TYPE_VENC: - case OMAP_DISPLAY_TYPE_HDMI: - default_get_overlay_fifo_thresholds(ovl->id, size, - burst_size, &fifo_low, &fifo_high); - break; -#ifdef CONFIG_OMAP2_DSS_DSI - case OMAP_DISPLAY_TYPE_DSI: - dsi_get_overlay_fifo_thresholds(ovl->id, size, - burst_size, &fifo_low, &fifo_high); - break; -#endif - default: - BUG(); - } - - dss_apply_ovl_fifo_thresholds(ovl, fifo_low, fifo_high); -} - -static void dss_mgr_setup_fifos(struct omap_overlay_manager *mgr) -{ - struct omap_overlay *ovl; - struct mgr_priv_data *mp; - - mp = get_mgr_priv(mgr); - - if (!mp->enabled) - return; - - list_for_each_entry(ovl, &mgr->overlays, list) - dss_ovl_setup_fifo(ovl); -} - -static void dss_setup_fifos(void) -{ - const int num_mgrs = omap_dss_get_num_overlay_managers(); - struct omap_overlay_manager *mgr; - int i; - - for (i = 0; i < num_mgrs; ++i) { - mgr = omap_dss_get_overlay_manager(i); - dss_mgr_setup_fifos(mgr); - } -} - -int dss_mgr_enable(struct omap_overlay_manager *mgr) -{ - struct mgr_priv_data *mp = get_mgr_priv(mgr); - unsigned long flags; - int r; - - mutex_lock(&apply_lock); - - if (mp->enabled) - goto out; - - spin_lock_irqsave(&data_lock, flags); - - mp->enabled = true; - - r = dss_check_settings(mgr, mgr->device); - if (r) { - DSSERR("failed to enable manager %d: check_settings failed\n", - mgr->id); - goto err; - } - - dss_setup_fifos(); - - dss_write_regs(); - dss_set_go_bits(); - - if (!mgr_manual_update(mgr)) - mp->updating = true; - - spin_unlock_irqrestore(&data_lock, flags); - - if (!mgr_manual_update(mgr)) - dispc_mgr_enable(mgr->id, true); - -out: - mutex_unlock(&apply_lock); - - return 0; - -err: - mp->enabled = false; - spin_unlock_irqrestore(&data_lock, flags); - mutex_unlock(&apply_lock); - return r; -} - -void dss_mgr_disable(struct omap_overlay_manager *mgr) -{ - struct mgr_priv_data *mp = get_mgr_priv(mgr); - unsigned long flags; - - mutex_lock(&apply_lock); - - if (!mp->enabled) - goto out; - - if (!mgr_manual_update(mgr)) - dispc_mgr_enable(mgr->id, false); - - spin_lock_irqsave(&data_lock, flags); - - mp->updating = false; - mp->enabled = false; - - spin_unlock_irqrestore(&data_lock, flags); - -out: - mutex_unlock(&apply_lock); -} - -int dss_mgr_set_info(struct omap_overlay_manager *mgr, - struct omap_overlay_manager_info *info) -{ - struct mgr_priv_data *mp = get_mgr_priv(mgr); - unsigned long flags; - int r; - - r = dss_mgr_simple_check(mgr, info); - if (r) - return r; - - spin_lock_irqsave(&data_lock, flags); - - mp->user_info = *info; - mp->user_info_dirty = true; - - spin_unlock_irqrestore(&data_lock, flags); - - return 0; -} - -void dss_mgr_get_info(struct omap_overlay_manager *mgr, - struct omap_overlay_manager_info *info) -{ - struct mgr_priv_data *mp = get_mgr_priv(mgr); - unsigned long flags; - - spin_lock_irqsave(&data_lock, flags); - - *info = mp->user_info; - - spin_unlock_irqrestore(&data_lock, flags); -} - -int dss_mgr_set_device(struct omap_overlay_manager *mgr, - struct omap_dss_device *dssdev) -{ - int r; - - mutex_lock(&apply_lock); - - if (dssdev->manager) { - DSSERR("display '%s' already has a manager '%s'\n", - dssdev->name, dssdev->manager->name); - r = -EINVAL; - goto err; - } - - if ((mgr->supported_displays & dssdev->type) == 0) { - DSSERR("display '%s' does not support manager '%s'\n", - dssdev->name, mgr->name); - r = -EINVAL; - goto err; - } - - dssdev->manager = mgr; - mgr->device = dssdev; - - mutex_unlock(&apply_lock); - - return 0; -err: - mutex_unlock(&apply_lock); - return r; -} - -int dss_mgr_unset_device(struct omap_overlay_manager *mgr) -{ - int r; - - mutex_lock(&apply_lock); - - if (!mgr->device) { - DSSERR("failed to unset display, display not set.\n"); - r = -EINVAL; - goto err; - } - - /* - * Don't allow currently enabled displays to have the overlay manager - * pulled out from underneath them - */ - if (mgr->device->state != OMAP_DSS_DISPLAY_DISABLED) { - r = -EINVAL; - goto err; - } - - mgr->device->manager = NULL; - mgr->device = NULL; - - mutex_unlock(&apply_lock); - - return 0; -err: - mutex_unlock(&apply_lock); - return r; -} - - -int dss_ovl_set_info(struct omap_overlay *ovl, - struct omap_overlay_info *info) -{ - struct ovl_priv_data *op = get_ovl_priv(ovl); - unsigned long flags; - int r; - - r = dss_ovl_simple_check(ovl, info); - if (r) - return r; - - spin_lock_irqsave(&data_lock, flags); - - op->user_info = *info; - op->user_info_dirty = true; - - spin_unlock_irqrestore(&data_lock, flags); - - return 0; -} - -void dss_ovl_get_info(struct omap_overlay *ovl, - struct omap_overlay_info *info) -{ - struct ovl_priv_data *op = get_ovl_priv(ovl); - unsigned long flags; - - spin_lock_irqsave(&data_lock, flags); - - *info = op->user_info; - - spin_unlock_irqrestore(&data_lock, flags); -} - -int dss_ovl_set_manager(struct omap_overlay *ovl, - struct omap_overlay_manager *mgr) -{ - struct ovl_priv_data *op = get_ovl_priv(ovl); - unsigned long flags; - int r; - - if (!mgr) - return -EINVAL; - - mutex_lock(&apply_lock); - - if (ovl->manager) { - DSSERR("overlay '%s' already has a manager '%s'\n", - ovl->name, ovl->manager->name); - r = -EINVAL; - goto err; - } - - spin_lock_irqsave(&data_lock, flags); - - if (op->enabled) { - spin_unlock_irqrestore(&data_lock, flags); - DSSERR("overlay has to be disabled to change the manager\n"); - r = -EINVAL; - goto err; - } - - op->channel = mgr->id; - op->extra_info_dirty = true; - - ovl->manager = mgr; - list_add_tail(&ovl->list, &mgr->overlays); - - spin_unlock_irqrestore(&data_lock, flags); - - /* XXX: When there is an overlay on a DSI manual update display, and - * the overlay is first disabled, then moved to tv, and enabled, we - * seem to get SYNC_LOST_DIGIT error. - * - * Waiting doesn't seem to help, but updating the manual update display - * after disabling the overlay seems to fix this. This hints that the - * overlay is perhaps somehow tied to the LCD output until the output - * is updated. - * - * Userspace workaround for this is to update the LCD after disabling - * the overlay, but before moving the overlay to TV. - */ - - mutex_unlock(&apply_lock); - - return 0; -err: - mutex_unlock(&apply_lock); - return r; -} - -int dss_ovl_unset_manager(struct omap_overlay *ovl) -{ - struct ovl_priv_data *op = get_ovl_priv(ovl); - unsigned long flags; - int r; - - mutex_lock(&apply_lock); - - if (!ovl->manager) { - DSSERR("failed to detach overlay: manager not set\n"); - r = -EINVAL; - goto err; - } - - spin_lock_irqsave(&data_lock, flags); - - if (op->enabled) { - spin_unlock_irqrestore(&data_lock, flags); - DSSERR("overlay has to be disabled to unset the manager\n"); - r = -EINVAL; - goto err; - } - - op->channel = -1; - - ovl->manager = NULL; - list_del(&ovl->list); - - spin_unlock_irqrestore(&data_lock, flags); - - mutex_unlock(&apply_lock); - - return 0; -err: - mutex_unlock(&apply_lock); - return r; -} - -bool dss_ovl_is_enabled(struct omap_overlay *ovl) -{ - struct ovl_priv_data *op = get_ovl_priv(ovl); - unsigned long flags; - bool e; - - spin_lock_irqsave(&data_lock, flags); - - e = op->enabled; - - spin_unlock_irqrestore(&data_lock, flags); - - return e; -} - -int dss_ovl_enable(struct omap_overlay *ovl) -{ - struct ovl_priv_data *op = get_ovl_priv(ovl); - unsigned long flags; - int r; - - mutex_lock(&apply_lock); - - if (op->enabled) { - r = 0; - goto err1; - } - - if (ovl->manager == NULL || ovl->manager->device == NULL) { - r = -EINVAL; - goto err1; - } - - spin_lock_irqsave(&data_lock, flags); - - op->enabling = true; - - r = dss_check_settings(ovl->manager, ovl->manager->device); - if (r) { - DSSERR("failed to enable overlay %d: check_settings failed\n", - ovl->id); - goto err2; - } - - dss_setup_fifos(); - - op->enabling = false; - dss_apply_ovl_enable(ovl, true); - - dss_write_regs(); - dss_set_go_bits(); - - spin_unlock_irqrestore(&data_lock, flags); - - mutex_unlock(&apply_lock); - - return 0; -err2: - op->enabling = false; - spin_unlock_irqrestore(&data_lock, flags); -err1: - mutex_unlock(&apply_lock); - return r; -} - -int dss_ovl_disable(struct omap_overlay *ovl) -{ - struct ovl_priv_data *op = get_ovl_priv(ovl); - unsigned long flags; - int r; - - mutex_lock(&apply_lock); - - if (!op->enabled) { - r = 0; - goto err; - } - - if (ovl->manager == NULL || ovl->manager->device == NULL) { - r = -EINVAL; - goto err; - } - - spin_lock_irqsave(&data_lock, flags); - - dss_apply_ovl_enable(ovl, false); - dss_write_regs(); - dss_set_go_bits(); - - spin_unlock_irqrestore(&data_lock, flags); - - mutex_unlock(&apply_lock); - - return 0; - -err: - mutex_unlock(&apply_lock); - return r; -} - diff --git a/drivers/video/omap2/dss/core.c b/drivers/video/omap2/dss/core.c deleted file mode 100644 index 8613f86fb56..00000000000 --- a/drivers/video/omap2/dss/core.c +++ /dev/null @@ -1,590 +0,0 @@ -/* - * linux/drivers/video/omap2/dss/core.c - * - * Copyright (C) 2009 Nokia Corporation - * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com> - * - * Some code and ideas taken from drivers/video/omap/ driver - * by Imre Deak. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program. If not, see <http://www.gnu.org/licenses/>. - */ - -#define DSS_SUBSYS_NAME "CORE" - -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/clk.h> -#include <linux/err.h> -#include <linux/platform_device.h> -#include <linux/seq_file.h> -#include <linux/debugfs.h> -#include <linux/io.h> -#include <linux/device.h> -#include <linux/regulator/consumer.h> - -#include <video/omapdss.h> - -#include "dss.h" -#include "dss_features.h" - -static struct { - struct platform_device *pdev; - - struct regulator *vdds_dsi_reg; - struct regulator *vdds_sdi_reg; -} core; - -static char *def_disp_name; -module_param_named(def_disp, def_disp_name, charp, 0); -MODULE_PARM_DESC(def_disp, "default display name"); - -#ifdef DEBUG -bool dss_debug; -module_param_named(debug, dss_debug, bool, 0644); -#endif - -static int omap_dss_register_device(struct omap_dss_device *); -static void omap_dss_unregister_device(struct omap_dss_device *); - -/* REGULATORS */ - -struct regulator *dss_get_vdds_dsi(void) -{ - struct regulator *reg; - - if (core.vdds_dsi_reg != NULL) - return core.vdds_dsi_reg; - - reg = regulator_get(&core.pdev->dev, "vdds_dsi"); - if (!IS_ERR(reg)) - core.vdds_dsi_reg = reg; - - return reg; -} - -struct regulator *dss_get_vdds_sdi(void) -{ - struct regulator *reg; - - if (core.vdds_sdi_reg != NULL) - return core.vdds_sdi_reg; - - reg = regulator_get(&core.pdev->dev, "vdds_sdi"); - if (!IS_ERR(reg)) - core.vdds_sdi_reg = reg; - - return reg; -} - -#if defined(CONFIG_DEBUG_FS) && defined(CONFIG_OMAP2_DSS_DEBUG_SUPPORT) -static int dss_debug_show(struct seq_file *s, void *unused) -{ - void (*func)(struct seq_file *) = s->private; - func(s); - return 0; -} - -static int dss_debug_open(struct inode *inode, struct file *file) -{ - return single_open(file, dss_debug_show, inode->i_private); -} - -static const struct file_operations dss_debug_fops = { - .open = dss_debug_open, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; - -static struct dentry *dss_debugfs_dir; - -static int dss_initialize_debugfs(void) -{ - dss_debugfs_dir = debugfs_create_dir("omapdss", NULL); - if (IS_ERR(dss_debugfs_dir)) { - int err = PTR_ERR(dss_debugfs_dir); - dss_debugfs_dir = NULL; - return err; - } - - debugfs_create_file("clk", S_IRUGO, dss_debugfs_dir, - &dss_debug_dump_clocks, &dss_debug_fops); - -#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS - debugfs_create_file("dispc_irq", S_IRUGO, dss_debugfs_dir, - &dispc_dump_irqs, &dss_debug_fops); -#endif - -#if defined(CONFIG_OMAP2_DSS_DSI) && defined(CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS) - dsi_create_debugfs_files_irq(dss_debugfs_dir, &dss_debug_fops); -#endif - - debugfs_create_file("dss", S_IRUGO, dss_debugfs_dir, - &dss_dump_regs, &dss_debug_fops); - debugfs_create_file("dispc", S_IRUGO, dss_debugfs_dir, - &dispc_dump_regs, &dss_debug_fops); -#ifdef CONFIG_OMAP2_DSS_RFBI - debugfs_create_file("rfbi", S_IRUGO, dss_debugfs_dir, - &rfbi_dump_regs, &dss_debug_fops); -#endif -#ifdef CONFIG_OMAP2_DSS_DSI - dsi_create_debugfs_files_reg(dss_debugfs_dir, &dss_debug_fops); -#endif -#ifdef CONFIG_OMAP2_DSS_VENC - debugfs_create_file("venc", S_IRUGO, dss_debugfs_dir, - &venc_dump_regs, &dss_debug_fops); -#endif -#ifdef CONFIG_OMAP4_DSS_HDMI - debugfs_create_file("hdmi", S_IRUGO, dss_debugfs_dir, - &hdmi_dump_regs, &dss_debug_fops); -#endif - return 0; -} - -static void dss_uninitialize_debugfs(void) -{ - if (dss_debugfs_dir) - debugfs_remove_recursive(dss_debugfs_dir); -} -#else /* CONFIG_DEBUG_FS && CONFIG_OMAP2_DSS_DEBUG_SUPPORT */ -static inline int dss_initialize_debugfs(void) -{ - return 0; -} -static inline void dss_uninitialize_debugfs(void) -{ -} -#endif /* CONFIG_DEBUG_FS && CONFIG_OMAP2_DSS_DEBUG_SUPPORT */ - -/* PLATFORM DEVICE */ -static int omap_dss_probe(struct platform_device *pdev) -{ - struct omap_dss_board_info *pdata = pdev->dev.platform_data; - int r; - int i; - - core.pdev = pdev; - - dss_features_init(); - - dss_apply_init(); - - dss_init_overlay_managers(pdev); - dss_init_overlays(pdev); - - r = dss_init_platform_driver(); - if (r) { - DSSERR("Failed to initialize DSS platform driver\n"); - goto err_dss; - } - - r = dispc_init_platform_driver(); - if (r) { - DSSERR("Failed to initialize dispc platform driver\n"); - goto err_dispc; - } - - r = rfbi_init_platform_driver(); - if (r) { - DSSERR("Failed to initialize rfbi platform driver\n"); - goto err_rfbi; - } - - r = venc_init_platform_driver(); - if (r) { - DSSERR("Failed to initialize venc platform driver\n"); - goto err_venc; - } - - r = dsi_init_platform_driver(); - if (r) { - DSSERR("Failed to initialize DSI platform driver\n"); - goto err_dsi; - } - - r = hdmi_init_platform_driver(); - if (r) { - DSSERR("Failed to initialize hdmi\n"); - goto err_hdmi; - } - - r = dss_initialize_debugfs(); - if (r) - goto err_debugfs; - - for (i = 0; i < pdata->num_devices; ++i) { - struct omap_dss_device *dssdev = pdata->devices[i]; - - r = omap_dss_register_device(dssdev); - if (r) { - DSSERR("device %d %s register failed %d\n", i, - dssdev->name ?: "unnamed", r); - - while (--i >= 0) - omap_dss_unregister_device(pdata->devices[i]); - - goto err_register; - } - - if (def_disp_name && strcmp(def_disp_name, dssdev->name) == 0) - pdata->default_device = dssdev; - } - - return 0; - -err_register: - dss_uninitialize_debugfs(); -err_debugfs: - hdmi_uninit_platform_driver(); -err_hdmi: - dsi_uninit_platform_driver(); -err_dsi: - venc_uninit_platform_driver(); -err_venc: - dispc_uninit_platform_driver(); -err_dispc: - rfbi_uninit_platform_driver(); -err_rfbi: - dss_uninit_platform_driver(); -err_dss: - - return r; -} - -static int omap_dss_remove(struct platform_device *pdev) -{ - struct omap_dss_board_info *pdata = pdev->dev.platform_data; - int i; - - dss_uninitialize_debugfs(); - - hdmi_uninit_platform_driver(); - dsi_uninit_platform_driver(); - venc_uninit_platform_driver(); - rfbi_uninit_platform_driver(); - dispc_uninit_platform_driver(); - dss_uninit_platform_driver(); - - dss_uninit_overlays(pdev); - dss_uninit_overlay_managers(pdev); - - for (i = 0; i < pdata->num_devices; ++i) - omap_dss_unregister_device(pdata->devices[i]); - - return 0; -} - -static void omap_dss_shutdown(struct platform_device *pdev) -{ - DSSDBG("shutdown\n"); - dss_disable_all_devices(); -} - -static int omap_dss_suspend(struct platform_device *pdev, pm_message_t state) -{ - DSSDBG("suspend %d\n", state.event); - - return dss_suspend_all_devices(); -} - -static int omap_dss_resume(struct platform_device *pdev) -{ - DSSDBG("resume\n"); - - return dss_resume_all_devices(); -} - -static struct platform_driver omap_dss_driver = { - .probe = omap_dss_probe, - .remove = omap_dss_remove, - .shutdown = omap_dss_shutdown, - .suspend = omap_dss_suspend, - .resume = omap_dss_resume, - .driver = { - .name = "omapdss", - .owner = THIS_MODULE, - }, -}; - -/* BUS */ -static int dss_bus_match(struct device *dev, struct device_driver *driver) -{ - struct omap_dss_device *dssdev = to_dss_device(dev); - - DSSDBG("bus_match. dev %s/%s, drv %s\n", - dev_name(dev), dssdev->driver_name, driver->name); - - return strcmp(dssdev->driver_name, driver->name) == 0; -} - -static ssize_t device_name_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - struct omap_dss_device *dssdev = to_dss_device(dev); - return snprintf(buf, PAGE_SIZE, "%s\n", - dssdev->name ? - dssdev->name : ""); -} - -static struct device_attribute default_dev_attrs[] = { - __ATTR(name, S_IRUGO, device_name_show, NULL), - __ATTR_NULL, -}; - -static ssize_t driver_name_show(struct device_driver *drv, char *buf) -{ - struct omap_dss_driver *dssdrv = to_dss_driver(drv); - return snprintf(buf, PAGE_SIZE, "%s\n", - dssdrv->driver.name ? - dssdrv->driver.name : ""); -} -static struct driver_attribute default_drv_attrs[] = { - __ATTR(name, S_IRUGO, driver_name_show, NULL), - __ATTR_NULL, -}; - -static struct bus_type dss_bus_type = { - .name = "omapdss", - .match = dss_bus_match, - .dev_attrs = default_dev_attrs, - .drv_attrs = default_drv_attrs, -}; - -static void dss_bus_release(struct device *dev) -{ - DSSDBG("bus_release\n"); -} - -static struct device dss_bus = { - .release = dss_bus_release, -}; - -struct bus_type *dss_get_bus(void) -{ - return &dss_bus_type; -} - -/* DRIVER */ -static int dss_driver_probe(struct device *dev) -{ - int r; - struct omap_dss_driver *dssdrv = to_dss_driver(dev->driver); - struct omap_dss_device *dssdev = to_dss_device(dev); - struct omap_dss_board_info *pdata = core.pdev->dev.platform_data; - bool force; - - DSSDBG("driver_probe: dev %s/%s, drv %s\n", - dev_name(dev), dssdev->driver_name, - dssdrv->driver.name); - - dss_init_device(core.pdev, dssdev); - - force = pdata->default_device == dssdev; - dss_recheck_connections(dssdev, force); - - r = dssdrv->probe(dssdev); - - if (r) { - DSSERR("driver probe failed: %d\n", r); - dss_uninit_device(core.pdev, dssdev); - return r; - } - - DSSDBG("probe done for device %s\n", dev_name(dev)); - - dssdev->driver = dssdrv; - - return 0; -} - -static int dss_driver_remove(struct device *dev) -{ - struct omap_dss_driver *dssdrv = to_dss_driver(dev->driver); - struct omap_dss_device *dssdev = to_dss_device(dev); - - DSSDBG("driver_remove: dev %s/%s\n", dev_name(dev), - dssdev->driver_name); - - dssdrv->remove(dssdev); - - dss_uninit_device(core.pdev, dssdev); - - dssdev->driver = NULL; - - return 0; -} - -int omap_dss_register_driver(struct omap_dss_driver *dssdriver) -{ - dssdriver->driver.bus = &dss_bus_type; - dssdriver->driver.probe = dss_driver_probe; - dssdriver->driver.remove = dss_driver_remove; - - if (dssdriver->get_resolution == NULL) - dssdriver->get_resolution = omapdss_default_get_resolution; - if (dssdriver->get_recommended_bpp == NULL) - dssdriver->get_recommended_bpp = - omapdss_default_get_recommended_bpp; - - return driver_register(&dssdriver->driver); -} -EXPORT_SYMBOL(omap_dss_register_driver); - -void omap_dss_unregister_driver(struct omap_dss_driver *dssdriver) -{ - driver_unregister(&dssdriver->driver); -} -EXPORT_SYMBOL(omap_dss_unregister_driver); - -/* DEVICE */ -static void reset_device(struct device *dev, int check) -{ - u8 *dev_p = (u8 *)dev; - u8 *dev_end = dev_p + sizeof(*dev); - void *saved_pdata; - - saved_pdata = dev->platform_data; - if (check) { - /* - * Check if there is any other setting than platform_data - * in struct device; warn that these will be reset by our - * init. - */ - dev->platform_data = NULL; - while (dev_p < dev_end) { - if (*dev_p) { - WARN("%s: struct device fields will be " - "discarded\n", - __func__); - break; - } - dev_p++; - } - } - memset(dev, 0, sizeof(*dev)); - dev->platform_data = saved_pdata; -} - - -static void omap_dss_dev_release(struct device *dev) -{ - reset_device(dev, 0); -} - -static int omap_dss_register_device(struct omap_dss_device *dssdev) -{ - static int dev_num; - - WARN_ON(!dssdev->driver_name); - - reset_device(&dssdev->dev, 1); - dssdev->dev.bus = &dss_bus_type; - dssdev->dev.parent = &dss_bus; - dssdev->dev.release = omap_dss_dev_release; - dev_set_name(&dssdev->dev, "display%d", dev_num++); - return device_register(&dssdev->dev); -} - -static void omap_dss_unregister_device(struct omap_dss_device *dssdev) -{ - device_unregister(&dssdev->dev); -} - -/* BUS */ -static int omap_dss_bus_register(void) -{ - int r; - - r = bus_register(&dss_bus_type); - if (r) { - DSSERR("bus register failed\n"); - return r; - } - - dev_set_name(&dss_bus, "omapdss"); - r = device_register(&dss_bus); - if (r) { - DSSERR("bus driver register failed\n"); - bus_unregister(&dss_bus_type); - return r; - } - - return 0; -} - -/* INIT */ - -#ifdef CONFIG_OMAP2_DSS_MODULE -static void omap_dss_bus_unregister(void) -{ - device_unregister(&dss_bus); - - bus_unregister(&dss_bus_type); -} - -static int __init omap_dss_init(void) -{ - int r; - - r = omap_dss_bus_register(); - if (r) - return r; - - r = platform_driver_register(&omap_dss_driver); - if (r) { - omap_dss_bus_unregister(); - return r; - } - - return 0; -} - -static void __exit omap_dss_exit(void) -{ - if (core.vdds_dsi_reg != NULL) { - regulator_put(core.vdds_dsi_reg); - core.vdds_dsi_reg = NULL; - } - - if (core.vdds_sdi_reg != NULL) { - regulator_put(core.vdds_sdi_reg); - core.vdds_sdi_reg = NULL; - } - - platform_driver_unregister(&omap_dss_driver); - - omap_dss_bus_unregister(); -} - -module_init(omap_dss_init); -module_exit(omap_dss_exit); -#else -static int __init omap_dss_init(void) -{ - return omap_dss_bus_register(); -} - -static int __init omap_dss_init2(void) -{ - return platform_driver_register(&omap_dss_driver); -} - -core_initcall(omap_dss_init); -device_initcall(omap_dss_init2); -#endif - -MODULE_AUTHOR("Tomi Valkeinen <tomi.valkeinen@nokia.com>"); -MODULE_DESCRIPTION("OMAP2/3 Display Subsystem"); -MODULE_LICENSE("GPL v2"); - diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c deleted file mode 100644 index e1626a1d5c4..00000000000 --- a/drivers/video/omap2/dss/dispc.c +++ /dev/null @@ -1,3429 +0,0 @@ -/* - * linux/drivers/video/omap2/dss/dispc.c - * - * Copyright (C) 2009 Nokia Corporation - * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com> - * - * Some code and ideas taken from drivers/video/omap/ driver - * by Imre Deak. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program. If not, see <http://www.gnu.org/licenses/>. - */ - -#define DSS_SUBSYS_NAME "DISPC" - -#include <linux/kernel.h> -#include <linux/dma-mapping.h> -#include <linux/vmalloc.h> -#include <linux/export.h> -#include <linux/clk.h> -#include <linux/io.h> -#include <linux/jiffies.h> -#include <linux/seq_file.h> -#include <linux/delay.h> -#include <linux/workqueue.h> -#include <linux/hardirq.h> -#include <linux/interrupt.h> -#include <linux/platform_device.h> -#include <linux/pm_runtime.h> - -#include <plat/sram.h> -#include <plat/clock.h> - -#include <video/omapdss.h> - -#include "dss.h" -#include "dss_features.h" -#include "dispc.h" - -/* DISPC */ -#define DISPC_SZ_REGS SZ_4K - -#define DISPC_IRQ_MASK_ERROR (DISPC_IRQ_GFX_FIFO_UNDERFLOW | \ - DISPC_IRQ_OCP_ERR | \ - DISPC_IRQ_VID1_FIFO_UNDERFLOW | \ - DISPC_IRQ_VID2_FIFO_UNDERFLOW | \ - DISPC_IRQ_SYNC_LOST | \ - DISPC_IRQ_SYNC_LOST_DIGIT) - -#define DISPC_MAX_NR_ISRS 8 - -struct omap_dispc_isr_data { - omap_dispc_isr_t isr; - void *arg; - u32 mask; -}; - -enum omap_burst_size { - BURST_SIZE_X2 = 0, - BURST_SIZE_X4 = 1, - BURST_SIZE_X8 = 2, -}; - -#define REG_GET(idx, start, end) \ - FLD_GET(dispc_read_reg(idx), start, end) - -#define REG_FLD_MOD(idx, val, start, end) \ - dispc_write_reg(idx, FLD_MOD(dispc_read_reg(idx), val, start, end)) - -struct dispc_irq_stats { - unsigned long last_reset; - unsigned irq_count; - unsigned irqs[32]; -}; - -static struct { - struct platform_device *pdev; - void __iomem *base; - - int ctx_loss_cnt; - - int irq; - struct clk *dss_clk; - - u32 fifo_size[MAX_DSS_OVERLAYS]; - - spinlock_t irq_lock; - u32 irq_error_mask; - struct omap_dispc_isr_data registered_isr[DISPC_MAX_NR_ISRS]; - u32 error_irqs; - struct work_struct error_work; - - bool ctx_valid; - u32 ctx[DISPC_SZ_REGS / sizeof(u32)]; - -#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS - spinlock_t irq_stats_lock; - struct dispc_irq_stats irq_stats; -#endif -} dispc; - -enum omap_color_component { - /* used for all color formats for OMAP3 and earlier - * and for RGB and Y color component on OMAP4 - */ - DISPC_COLOR_COMPONENT_RGB_Y = 1 << 0, - /* used for UV component for - * OMAP_DSS_COLOR_YUV2, OMAP_DSS_COLOR_UYVY, OMAP_DSS_COLOR_NV12 - * color formats on OMAP4 - */ - DISPC_COLOR_COMPONENT_UV = 1 << 1, -}; - -static void _omap_dispc_set_irqs(void); - -static inline void dispc_write_reg(const u16 idx, u32 val) -{ - __raw_writel(val, dispc.base + idx); -} - -static inline u32 dispc_read_reg(const u16 idx) -{ - return __raw_readl(dispc.base + idx); -} - -static int dispc_get_ctx_loss_count(void) -{ - struct device *dev = &dispc.pdev->dev; - struct omap_display_platform_data *pdata = dev->platform_data; - struct omap_dss_board_info *board_data = pdata->board_data; - int cnt; - - if (!board_data->get_context_loss_count) - return -ENOENT; - - cnt = board_data->get_context_loss_count(dev); - - WARN_ONCE(cnt < 0, "get_context_loss_count failed: %d\n", cnt); - - return cnt; -} - -#define SR(reg) \ - dispc.ctx[DISPC_##reg / sizeof(u32)] = dispc_read_reg(DISPC_##reg) -#define RR(reg) \ - dispc_write_reg(DISPC_##reg, dispc.ctx[DISPC_##reg / sizeof(u32)]) - -static void dispc_save_context(void) -{ - int i, j; - - DSSDBG("dispc_save_context\n"); - - SR(IRQENABLE); - SR(CONTROL); - SR(CONFIG); - SR(LINE_NUMBER); - if (dss_has_feature(FEAT_ALPHA_FIXED_ZORDER) || - dss_has_feature(FEAT_ALPHA_FREE_ZORDER)) - SR(GLOBAL_ALPHA); - if (dss_has_feature(FEAT_MGR_LCD2)) { - SR(CONTROL2); - SR(CONFIG2); - } - - for (i = 0; i < dss_feat_get_num_mgrs(); i++) { - SR(DEFAULT_COLOR(i)); - SR(TRANS_COLOR(i)); - SR(SIZE_MGR(i)); - if (i == OMAP_DSS_CHANNEL_DIGIT) - continue; - SR(TIMING_H(i)); - SR(TIMING_V(i)); - SR(POL_FREQ(i)); - SR(DIVISORo(i)); - - SR(DATA_CYCLE1(i)); - SR(DATA_CYCLE2(i)); - SR(DATA_CYCLE3(i)); - - if (dss_has_feature(FEAT_CPR)) { - SR(CPR_COEF_R(i)); - SR(CPR_COEF_G(i)); - SR(CPR_COEF_B(i)); - } - } - - for (i = 0; i < dss_feat_get_num_ovls(); i++) { - SR(OVL_BA0(i)); - SR(OVL_BA1(i)); - SR(OVL_POSITION(i)); - SR(OVL_SIZE(i)); - SR(OVL_ATTRIBUTES(i)); - SR(OVL_FIFO_THRESHOLD(i)); - SR(OVL_ROW_INC(i)); - SR(OVL_PIXEL_INC(i)); - if (dss_has_feature(FEAT_PRELOAD)) - SR(OVL_PRELOAD(i)); - if (i == OMAP_DSS_GFX) { - SR(OVL_WINDOW_SKIP(i)); - SR(OVL_TABLE_BA(i)); - continue; - } - SR(OVL_FIR(i)); - SR(OVL_PICTURE_SIZE(i)); - SR(OVL_ACCU0(i)); - SR(OVL_ACCU1(i)); - - for (j = 0; j < 8; j++) - SR(OVL_FIR_COEF_H(i, j)); - - for (j = 0; j < 8; j++) - SR(OVL_FIR_COEF_HV(i, j)); - - for (j = 0; j < 5; j++) - SR(OVL_CONV_COEF(i, j)); - - if (dss_has_feature(FEAT_FIR_COEF_V)) { - for (j = 0; j < 8; j++) - SR(OVL_FIR_COEF_V(i, j)); - } - - if (dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) { - SR(OVL_BA0_UV(i)); - SR(OVL_BA1_UV(i)); - SR(OVL_FIR2(i)); - SR(OVL_ACCU2_0(i)); - SR(OVL_ACCU2_1(i)); - - for (j = 0; j < 8; j++) - SR(OVL_FIR_COEF_H2(i, j)); - - for (j = 0; j < 8; j++) - SR(OVL_FIR_COEF_HV2(i, j)); - - for (j = 0; j < 8; j++) - SR(OVL_FIR_COEF_V2(i, j)); - } - if (dss_has_feature(FEAT_ATTR2)) - SR(OVL_ATTRIBUTES2(i)); - } - - if (dss_has_feature(FEAT_CORE_CLK_DIV)) - SR(DIVISOR); - - dispc.ctx_loss_cnt = dispc_get_ctx_loss_count(); - dispc.ctx_valid = true; - - DSSDBG("context saved, ctx_loss_count %d\n", dispc.ctx_loss_cnt); -} - -static void dispc_restore_context(void) -{ - int i, j, ctx; - - DSSDBG("dispc_restore_context\n"); - - if (!dispc.ctx_valid) - return; - - ctx = dispc_get_ctx_loss_count(); - - if (ctx >= 0 && ctx == dispc.ctx_loss_cnt) - return; - - DSSDBG("ctx_loss_count: saved %d, current %d\n", - dispc.ctx_loss_cnt, ctx); - - /*RR(IRQENABLE);*/ - /*RR(CONTROL);*/ - RR(CONFIG); - RR(LINE_NUMBER); - if (dss_has_feature(FEAT_ALPHA_FIXED_ZORDER) || - dss_has_feature(FEAT_ALPHA_FREE_ZORDER)) - RR(GLOBAL_ALPHA); - if (dss_has_feature(FEAT_MGR_LCD2)) - RR(CONFIG2); - - for (i = 0; i < dss_feat_get_num_mgrs(); i++) { - RR(DEFAULT_COLOR(i)); - RR(TRANS_COLOR(i)); - RR(SIZE_MGR(i)); - if (i == OMAP_DSS_CHANNEL_DIGIT) - continue; - RR(TIMING_H(i)); - RR(TIMING_V(i)); - RR(POL_FREQ(i)); - RR(DIVISORo(i)); - - RR(DATA_CYCLE1(i)); - RR(DATA_CYCLE2(i)); - RR(DATA_CYCLE3(i)); - - if (dss_has_feature(FEAT_CPR)) { - RR(CPR_COEF_R(i)); - RR(CPR_COEF_G(i)); - RR(CPR_COEF_B(i)); - } - } - - for (i = 0; i < dss_feat_get_num_ovls(); i++) { - RR(OVL_BA0(i)); - RR(OVL_BA1(i)); - RR(OVL_POSITION(i)); - RR(OVL_SIZE(i)); - RR(OVL_ATTRIBUTES(i)); - RR(OVL_FIFO_THRESHOLD(i)); - RR(OVL_ROW_INC(i)); - RR(OVL_PIXEL_INC(i)); - if (dss_has_feature(FEAT_PRELOAD)) - RR(OVL_PRELOAD(i)); - if (i == OMAP_DSS_GFX) { - RR(OVL_WINDOW_SKIP(i)); - RR(OVL_TABLE_BA(i)); - continue; - } - RR(OVL_FIR(i)); - RR(OVL_PICTURE_SIZE(i)); - RR(OVL_ACCU0(i)); - RR(OVL_ACCU1(i)); - - for (j = 0; j < 8; j++) - RR(OVL_FIR_COEF_H(i, j)); - - for (j = 0; j < 8; j++) - RR(OVL_FIR_COEF_HV(i, j)); - - for (j = 0; j < 5; j++) - RR(OVL_CONV_COEF(i, j)); - - if (dss_has_feature(FEAT_FIR_COEF_V)) { - for (j = 0; j < 8; j++) - RR(OVL_FIR_COEF_V(i, j)); - } - - if (dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) { - RR(OVL_BA0_UV(i)); - RR(OVL_BA1_UV(i)); - RR(OVL_FIR2(i)); - RR(OVL_ACCU2_0(i)); - RR(OVL_ACCU2_1(i)); - - for (j = 0; j < 8; j++) - RR(OVL_FIR_COEF_H2(i, j)); - - for (j = 0; j < 8; j++) - RR(OVL_FIR_COEF_HV2(i, j)); - - for (j = 0; j < 8; j++) - RR(OVL_FIR_COEF_V2(i, j)); - } - if (dss_has_feature(FEAT_ATTR2)) - RR(OVL_ATTRIBUTES2(i)); - } - - if (dss_has_feature(FEAT_CORE_CLK_DIV)) - RR(DIVISOR); - - /* enable last, because LCD & DIGIT enable are here */ - RR(CONTROL); - if (dss_has_feature(FEAT_MGR_LCD2)) - RR(CONTROL2); - /* clear spurious SYNC_LOST_DIGIT interrupts */ - dispc_write_reg(DISPC_IRQSTATUS, DISPC_IRQ_SYNC_LOST_DIGIT); - - /* - * enable last so IRQs won't trigger before - * the context is fully restored - */ - RR(IRQENABLE); - - DSSDBG("context restored\n"); -} - -#undef SR -#undef RR - -int dispc_runtime_get(void) -{ - int r; - - DSSDBG("dispc_runtime_get\n"); - - r = pm_runtime_get_sync(&dispc.pdev->dev); - WARN_ON(r < 0); - return r < 0 ? r : 0; -} - -void dispc_runtime_put(void) -{ - int r; - - DSSDBG("dispc_runtime_put\n"); - - r = pm_runtime_put_sync(&dispc.pdev->dev); - WARN_ON(r < 0); -} - -static inline bool dispc_mgr_is_lcd(enum omap_channel channel) -{ - if (channel == OMAP_DSS_CHANNEL_LCD || - channel == OMAP_DSS_CHANNEL_LCD2) - return true; - else - return false; -} - -static struct omap_dss_device *dispc_mgr_get_device(enum omap_channel channel) -{ - struct omap_overlay_manager *mgr = - omap_dss_get_overlay_manager(channel); - - return mgr ? mgr->device : NULL; -} - -u32 dispc_mgr_get_vsync_irq(enum omap_channel channel) -{ - switch (channel) { - case OMAP_DSS_CHANNEL_LCD: - return DISPC_IRQ_VSYNC; - case OMAP_DSS_CHANNEL_LCD2: - return DISPC_IRQ_VSYNC2; - case OMAP_DSS_CHANNEL_DIGIT: - return DISPC_IRQ_EVSYNC_ODD | DISPC_IRQ_EVSYNC_EVEN; - default: - BUG(); - } -} - -u32 dispc_mgr_get_framedone_irq(enum omap_channel channel) -{ - switch (channel) { - case OMAP_DSS_CHANNEL_LCD: - return DISPC_IRQ_FRAMEDONE; - case OMAP_DSS_CHANNEL_LCD2: - return DISPC_IRQ_FRAMEDONE2; - case OMAP_DSS_CHANNEL_DIGIT: - return 0; - default: - BUG(); - } -} - -bool dispc_mgr_go_busy(enum omap_channel channel) -{ - int bit; - - if (dispc_mgr_is_lcd(channel)) - bit = 5; /* GOLCD */ - else - bit = 6; /* GODIGIT */ - - if (channel == OMAP_DSS_CHANNEL_LCD2) - return REG_GET(DISPC_CONTROL2, bit, bit) == 1; - else - return REG_GET(DISPC_CONTROL, bit, bit) == 1; -} - -void dispc_mgr_go(enum omap_channel channel) -{ - int bit; - bool enable_bit, go_bit; - - if (dispc_mgr_is_lcd(channel)) - bit = 0; /* LCDENABLE */ - else - bit = 1; /* DIGITALENABLE */ - - /* if the channel is not enabled, we don't need GO */ - if (channel == OMAP_DSS_CHANNEL_LCD2) - enable_bit = REG_GET(DISPC_CONTROL2, bit, bit) == 1; - else - enable_bit = REG_GET(DISPC_CONTROL, bit, bit) == 1; - - if (!enable_bit) - return; - - if (dispc_mgr_is_lcd(channel)) - bit = 5; /* GOLCD */ - else - bit = 6; /* GODIGIT */ - - if (channel == OMAP_DSS_CHANNEL_LCD2) - go_bit = REG_GET(DISPC_CONTROL2, bit, bit) == 1; - else - go_bit = REG_GET(DISPC_CONTROL, bit, bit) == 1; - - if (go_bit) { - DSSERR("GO bit not down for channel %d\n", channel); - return; - } - - DSSDBG("GO %s\n", channel == OMAP_DSS_CHANNEL_LCD ? "LCD" : - (channel == OMAP_DSS_CHANNEL_LCD2 ? "LCD2" : "DIGIT")); - - if (channel == OMAP_DSS_CHANNEL_LCD2) - REG_FLD_MOD(DISPC_CONTROL2, 1, bit, bit); - else - REG_FLD_MOD(DISPC_CONTROL, 1, bit, bit); -} - -static void dispc_ovl_write_firh_reg(enum omap_plane plane, int reg, u32 value) -{ - dispc_write_reg(DISPC_OVL_FIR_COEF_H(plane, reg), value); -} - -static void dispc_ovl_write_firhv_reg(enum omap_plane plane, int reg, u32 value) -{ - dispc_write_reg(DISPC_OVL_FIR_COEF_HV(plane, reg), value); -} - -static void dispc_ovl_write_firv_reg(enum omap_plane plane, int reg, u32 value) -{ - dispc_write_reg(DISPC_OVL_FIR_COEF_V(plane, reg), value); -} - -static void dispc_ovl_write_firh2_reg(enum omap_plane plane, int reg, u32 value) -{ - BUG_ON(plane == OMAP_DSS_GFX); - - dispc_write_reg(DISPC_OVL_FIR_COEF_H2(plane, reg), value); -} - -static void dispc_ovl_write_firhv2_reg(enum omap_plane plane, int reg, - u32 value) -{ - BUG_ON(plane == OMAP_DSS_GFX); - - dispc_write_reg(DISPC_OVL_FIR_COEF_HV2(plane, reg), value); -} - -static void dispc_ovl_write_firv2_reg(enum omap_plane plane, int reg, u32 value) -{ - BUG_ON(plane == OMAP_DSS_GFX); - - dispc_write_reg(DISPC_OVL_FIR_COEF_V2(plane, reg), value); -} - -static void dispc_ovl_set_scale_coef(enum omap_plane plane, int fir_hinc, - int fir_vinc, int five_taps, - enum omap_color_component color_comp) -{ - const struct dispc_coef *h_coef, *v_coef; - int i; - - h_coef = dispc_ovl_get_scale_coef(fir_hinc, true); - v_coef = dispc_ovl_get_scale_coef(fir_vinc, five_taps); - - for (i = 0; i < 8; i++) { - u32 h, hv; - - h = FLD_VAL(h_coef[i].hc0_vc00, 7, 0) - | FLD_VAL(h_coef[i].hc1_vc0, 15, 8) - | FLD_VAL(h_coef[i].hc2_vc1, 23, 16) - | FLD_VAL(h_coef[i].hc3_vc2, 31, 24); - hv = FLD_VAL(h_coef[i].hc4_vc22, 7, 0) - | FLD_VAL(v_coef[i].hc1_vc0, 15, 8) - | FLD_VAL(v_coef[i].hc2_vc1, 23, 16) - | FLD_VAL(v_coef[i].hc3_vc2, 31, 24); - - if (color_comp == DISPC_COLOR_COMPONENT_RGB_Y) { - dispc_ovl_write_firh_reg(plane, i, h); - dispc_ovl_write_firhv_reg(plane, i, hv); - } else { - dispc_ovl_write_firh2_reg(plane, i, h); - dispc_ovl_write_firhv2_reg(plane, i, hv); - } - - } - - if (five_taps) { - for (i = 0; i < 8; i++) { - u32 v; - v = FLD_VAL(v_coef[i].hc0_vc00, 7, 0) - | FLD_VAL(v_coef[i].hc4_vc22, 15, 8); - if (color_comp == DISPC_COLOR_COMPONENT_RGB_Y) - dispc_ovl_write_firv_reg(plane, i, v); - else - dispc_ovl_write_firv2_reg(plane, i, v); - } - } -} - -static void _dispc_setup_color_conv_coef(void) -{ - int i; - const struct color_conv_coef { - int ry, rcr, rcb, gy, gcr, gcb, by, bcr, bcb; - int full_range; - } ctbl_bt601_5 = { - 298, 409, 0, 298, -208, -100, 298, 0, 517, 0, - }; - - const struct color_conv_coef *ct; - -#define CVAL(x, y) (FLD_VAL(x, 26, 16) | FLD_VAL(y, 10, 0)) - - ct = &ctbl_bt601_5; - - for (i = 1; i < dss_feat_get_num_ovls(); i++) { - dispc_write_reg(DISPC_OVL_CONV_COEF(i, 0), - CVAL(ct->rcr, ct->ry)); - dispc_write_reg(DISPC_OVL_CONV_COEF(i, 1), - CVAL(ct->gy, ct->rcb)); - dispc_write_reg(DISPC_OVL_CONV_COEF(i, 2), - CVAL(ct->gcb, ct->gcr)); - dispc_write_reg(DISPC_OVL_CONV_COEF(i, 3), - CVAL(ct->bcr, ct->by)); - dispc_write_reg(DISPC_OVL_CONV_COEF(i, 4), - CVAL(0, ct->bcb)); - - REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(i), ct->full_range, - 11, 11); - } - -#undef CVAL -} - - -static void dispc_ovl_set_ba0(enum omap_plane plane, u32 paddr) -{ - dispc_write_reg(DISPC_OVL_BA0(plane), paddr); -} - -static void dispc_ovl_set_ba1(enum omap_plane plane, u32 paddr) -{ - dispc_write_reg(DISPC_OVL_BA1(plane), paddr); -} - -static void dispc_ovl_set_ba0_uv(enum omap_plane plane, u32 paddr) -{ - dispc_write_reg(DISPC_OVL_BA0_UV(plane), paddr); -} - -static void dispc_ovl_set_ba1_uv(enum omap_plane plane, u32 paddr) -{ - dispc_write_reg(DISPC_OVL_BA1_UV(plane), paddr); -} - -static void dispc_ovl_set_pos(enum omap_plane plane, int x, int y) -{ - u32 val = FLD_VAL(y, 26, 16) | FLD_VAL(x, 10, 0); - - dispc_write_reg(DISPC_OVL_POSITION(plane), val); -} - -static void dispc_ovl_set_pic_size(enum omap_plane plane, int width, int height) -{ - u32 val = FLD_VAL(height - 1, 26, 16) | FLD_VAL(width - 1, 10, 0); - - if (plane == OMAP_DSS_GFX) - dispc_write_reg(DISPC_OVL_SIZE(plane), val); - else - dispc_write_reg(DISPC_OVL_PICTURE_SIZE(plane), val); -} - -static void dispc_ovl_set_vid_size(enum omap_plane plane, int width, int height) -{ - u32 val; - - BUG_ON(plane == OMAP_DSS_GFX); - - val = FLD_VAL(height - 1, 26, 16) | FLD_VAL(width - 1, 10, 0); - - dispc_write_reg(DISPC_OVL_SIZE(plane), val); -} - -static void dispc_ovl_set_zorder(enum omap_plane plane, u8 zorder) -{ - struct omap_overlay *ovl = omap_dss_get_overlay(plane); - - if ((ovl->caps & OMAP_DSS_OVL_CAP_ZORDER) == 0) - return; - - REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), zorder, 27, 26); -} - -static void dispc_ovl_enable_zorder_planes(void) -{ - int i; - - if (!dss_has_feature(FEAT_ALPHA_FREE_ZORDER)) - return; - - for (i = 0; i < dss_feat_get_num_ovls(); i++) - REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(i), 1, 25, 25); -} - -static void dispc_ovl_set_pre_mult_alpha(enum omap_plane plane, bool enable) -{ - struct omap_overlay *ovl = omap_dss_get_overlay(plane); - - if ((ovl->caps & OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA) == 0) - return; - - REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), enable ? 1 : 0, 28, 28); -} - -static void dispc_ovl_setup_global_alpha(enum omap_plane plane, u8 global_alpha) -{ - static const unsigned shifts[] = { 0, 8, 16, 24, }; - int shift; - struct omap_overlay *ovl = omap_dss_get_overlay(plane); - - if ((ovl->caps & OMAP_DSS_OVL_CAP_GLOBAL_ALPHA) == 0) - return; - - shift = shifts[plane]; - REG_FLD_MOD(DISPC_GLOBAL_ALPHA, global_alpha, shift + 7, shift); -} - -static void dispc_ovl_set_pix_inc(enum omap_plane plane, s32 inc) -{ - dispc_write_reg(DISPC_OVL_PIXEL_INC(plane), inc); -} - -static void dispc_ovl_set_row_inc(enum omap_plane plane, s32 inc) -{ - dispc_write_reg(DISPC_OVL_ROW_INC(plane), inc); -} - -static void dispc_ovl_set_color_mode(enum omap_plane plane, - enum omap_color_mode color_mode) -{ - u32 m = 0; - if (plane != OMAP_DSS_GFX) { - switch (color_mode) { - case OMAP_DSS_COLOR_NV12: - m = 0x0; break; - case OMAP_DSS_COLOR_RGB12U: - m = 0x1; break; - case OMAP_DSS_COLOR_RGBA16: - m = 0x2; break; - case OMAP_DSS_COLOR_RGBX16: - m = 0x4; break; - case OMAP_DSS_COLOR_ARGB16: - m = 0x5; break; - case OMAP_DSS_COLOR_RGB16: - m = 0x6; break; - case OMAP_DSS_COLOR_ARGB16_1555: - m = 0x7; break; - case OMAP_DSS_COLOR_RGB24U: - m = 0x8; break; - case OMAP_DSS_COLOR_RGB24P: - m = 0x9; break; - case OMAP_DSS_COLOR_YUV2: - m = 0xa; break; - case OMAP_DSS_COLOR_UYVY: - m = 0xb; break; - case OMAP_DSS_COLOR_ARGB32: - m = 0xc; break; - case OMAP_DSS_COLOR_RGBA32: - m = 0xd; break; - case OMAP_DSS_COLOR_RGBX32: - m = 0xe; break; - case OMAP_DSS_COLOR_XRGB16_1555: - m = 0xf; break; - default: - BUG(); break; - } - } else { - switch (color_mode) { - case OMAP_DSS_COLOR_CLUT1: - m = 0x0; break; - case OMAP_DSS_COLOR_CLUT2: - m = 0x1; break; - case OMAP_DSS_COLOR_CLUT4: - m = 0x2; break; - case OMAP_DSS_COLOR_CLUT8: - m = 0x3; break; - case OMAP_DSS_COLOR_RGB12U: - m = 0x4; break; - case OMAP_DSS_COLOR_ARGB16: - m = 0x5; break; - case OMAP_DSS_COLOR_RGB16: - m = 0x6; break; - case OMAP_DSS_COLOR_ARGB16_1555: - m = 0x7; break; - case OMAP_DSS_COLOR_RGB24U: - m = 0x8; break; - case OMAP_DSS_COLOR_RGB24P: - m = 0x9; break; - case OMAP_DSS_COLOR_YUV2: - m = 0xa; break; - case OMAP_DSS_COLOR_UYVY: - m = 0xb; break; - case OMAP_DSS_COLOR_ARGB32: - m = 0xc; break; - case OMAP_DSS_COLOR_RGBA32: - m = 0xd; break; - case OMAP_DSS_COLOR_RGBX32: - m = 0xe; break; - case OMAP_DSS_COLOR_XRGB16_1555: - m = 0xf; break; - default: - BUG(); break; - } - } - - REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), m, 4, 1); -} - -void dispc_ovl_set_channel_out(enum omap_plane plane, enum omap_channel channel) -{ - int shift; - u32 val; - int chan = 0, chan2 = 0; - - switch (plane) { - case OMAP_DSS_GFX: - shift = 8; - break; - case OMAP_DSS_VIDEO1: - case OMAP_DSS_VIDEO2: - case OMAP_DSS_VIDEO3: - shift = 16; - break; - default: - BUG(); - return; - } - - val = dispc_read_reg(DISPC_OVL_ATTRIBUTES(plane)); - if (dss_has_feature(FEAT_MGR_LCD2)) { - switch (channel) { - case OMAP_DSS_CHANNEL_LCD: - chan = 0; - chan2 = 0; - break; - case OMAP_DSS_CHANNEL_DIGIT: - chan = 1; - chan2 = 0; - break; - case OMAP_DSS_CHANNEL_LCD2: - chan = 0; - chan2 = 1; - break; - default: - BUG(); - } - - val = FLD_MOD(val, chan, shift, shift); - val = FLD_MOD(val, chan2, 31, 30); - } else { - val = FLD_MOD(val, channel, shift, shift); - } - dispc_write_reg(DISPC_OVL_ATTRIBUTES(plane), val); -} - -static enum omap_channel dispc_ovl_get_channel_out(enum omap_plane plane) -{ - int shift; - u32 val; - enum omap_channel channel; - - switch (plane) { - case OMAP_DSS_GFX: - shift = 8; - break; - case OMAP_DSS_VIDEO1: - case OMAP_DSS_VIDEO2: - case OMAP_DSS_VIDEO3: - shift = 16; - break; - default: - BUG(); - } - - val = dispc_read_reg(DISPC_OVL_ATTRIBUTES(plane)); - - if (dss_has_feature(FEAT_MGR_LCD2)) { - if (FLD_GET(val, 31, 30) == 0) - channel = FLD_GET(val, shift, shift); - else - channel = OMAP_DSS_CHANNEL_LCD2; - } else { - channel = FLD_GET(val, shift, shift); - } - - return channel; -} - -static void dispc_ovl_set_burst_size(enum omap_plane plane, - enum omap_burst_size burst_size) -{ - static const unsigned shifts[] = { 6, 14, 14, 14, }; - int shift; - - shift = shifts[plane]; - REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), burst_size, shift + 1, shift); -} - -static void dispc_configure_burst_sizes(void) -{ - int i; - const int burst_size = BURST_SIZE_X8; - - /* Configure burst size always to maximum size */ - for (i = 0; i < omap_dss_get_num_overlays(); ++i) - dispc_ovl_set_burst_size(i, burst_size); -} - -u32 dispc_ovl_get_burst_size(enum omap_plane plane) -{ - unsigned unit = dss_feat_get_burst_size_unit(); - /* burst multiplier is always x8 (see dispc_configure_burst_sizes()) */ - return unit * 8; -} - -void dispc_enable_gamma_table(bool enable) -{ - /* - * This is partially implemented to support only disabling of - * the gamma table. - */ - if (enable) { - DSSWARN("Gamma table enabling for TV not yet supported"); - return; - } - - REG_FLD_MOD(DISPC_CONFIG, enable, 9, 9); -} - -static void dispc_mgr_enable_cpr(enum omap_channel channel, bool enable) -{ - u16 reg; - - if (channel == OMAP_DSS_CHANNEL_LCD) - reg = DISPC_CONFIG; - else if (channel == OMAP_DSS_CHANNEL_LCD2) - reg = DISPC_CONFIG2; - else - return; - - REG_FLD_MOD(reg, enable, 15, 15); -} - -static void dispc_mgr_set_cpr_coef(enum omap_channel channel, - struct omap_dss_cpr_coefs *coefs) -{ - u32 coef_r, coef_g, coef_b; - - if (!dispc_mgr_is_lcd(channel)) - return; - - coef_r = FLD_VAL(coefs->rr, 31, 22) | FLD_VAL(coefs->rg, 20, 11) | - FLD_VAL(coefs->rb, 9, 0); - coef_g = FLD_VAL(coefs->gr, 31, 22) | FLD_VAL(coefs->gg, 20, 11) | - FLD_VAL(coefs->gb, 9, 0); - coef_b = FLD_VAL(coefs->br, 31, 22) | FLD_VAL(coefs->bg, 20, 11) | - FLD_VAL(coefs->bb, 9, 0); - - dispc_write_reg(DISPC_CPR_COEF_R(channel), coef_r); - dispc_write_reg(DISPC_CPR_COEF_G(channel), coef_g); - dispc_write_reg(DISPC_CPR_COEF_B(channel), coef_b); -} - -static void dispc_ovl_set_vid_color_conv(enum omap_plane plane, bool enable) -{ - u32 val; - - BUG_ON(plane == OMAP_DSS_GFX); - - val = dispc_read_reg(DISPC_OVL_ATTRIBUTES(plane)); - val = FLD_MOD(val, enable, 9, 9); - dispc_write_reg(DISPC_OVL_ATTRIBUTES(plane), val); -} - -static void dispc_ovl_enable_replication(enum omap_plane plane, bool enable) -{ - static const unsigned shifts[] = { 5, 10, 10, 10 }; - int shift; - - shift = shifts[plane]; - REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), enable, shift, shift); -} - -void dispc_mgr_set_lcd_size(enum omap_channel channel, u16 width, u16 height) -{ - u32 val; - BUG_ON((width > (1 << 11)) || (height > (1 << 11))); - val = FLD_VAL(height - 1, 26, 16) | FLD_VAL(width - 1, 10, 0); - dispc_write_reg(DISPC_SIZE_MGR(channel), val); -} - -void dispc_set_digit_size(u16 width, u16 height) -{ - u32 val; - BUG_ON((width > (1 << 11)) || (height > (1 << 11))); - val = FLD_VAL(height - 1, 26, 16) | FLD_VAL(width - 1, 10, 0); - dispc_write_reg(DISPC_SIZE_MGR(OMAP_DSS_CHANNEL_DIGIT), val); -} - -static void dispc_read_plane_fifo_sizes(void) -{ - u32 size; - int plane; - u8 start, end; - u32 unit; - - unit = dss_feat_get_buffer_size_unit(); - - dss_feat_get_reg_field(FEAT_REG_FIFOSIZE, &start, &end); - - for (plane = 0; plane < dss_feat_get_num_ovls(); ++plane) { - size = REG_GET(DISPC_OVL_FIFO_SIZE_STATUS(plane), start, end); - size *= unit; - dispc.fifo_size[plane] = size; - } -} - -u32 dispc_ovl_get_fifo_size(enum omap_plane plane) -{ - return dispc.fifo_size[plane]; -} - -void dispc_ovl_set_fifo_threshold(enum omap_plane plane, u32 low, u32 high) -{ - u8 hi_start, hi_end, lo_start, lo_end; - u32 unit; - - unit = dss_feat_get_buffer_size_unit(); - - WARN_ON(low % unit != 0); - WARN_ON(high % unit != 0); - - low /= unit; - high /= unit; - - dss_feat_get_reg_field(FEAT_REG_FIFOHIGHTHRESHOLD, &hi_start, &hi_end); - dss_feat_get_reg_field(FEAT_REG_FIFOLOWTHRESHOLD, &lo_start, &lo_end); - - DSSDBG("fifo(%d) low/high old %u/%u, new %u/%u\n", - plane, - REG_GET(DISPC_OVL_FIFO_THRESHOLD(plane), - lo_start, lo_end), - REG_GET(DISPC_OVL_FIFO_THRESHOLD(plane), - hi_start, hi_end), - low, high); - - dispc_write_reg(DISPC_OVL_FIFO_THRESHOLD(plane), - FLD_VAL(high, hi_start, hi_end) | - FLD_VAL(low, lo_start, lo_end)); -} - -void dispc_enable_fifomerge(bool enable) -{ - DSSDBG("FIFO merge %s\n", enable ? "enabled" : "disabled"); - REG_FLD_MOD(DISPC_CONFIG, enable ? 1 : 0, 14, 14); -} - -static void dispc_ovl_set_fir(enum omap_plane plane, - int hinc, int vinc, - enum omap_color_component color_comp) -{ - u32 val; - - if (color_comp == DISPC_COLOR_COMPONENT_RGB_Y) { - u8 hinc_start, hinc_end, vinc_start, vinc_end; - - dss_feat_get_reg_field(FEAT_REG_FIRHINC, - &hinc_start, &hinc_end); - dss_feat_get_reg_field(FEAT_REG_FIRVINC, - &vinc_start, &vinc_end); - val = FLD_VAL(vinc, vinc_start, vinc_end) | - FLD_VAL(hinc, hinc_start, hinc_end); - - dispc_write_reg(DISPC_OVL_FIR(plane), val); - } else { - val = FLD_VAL(vinc, 28, 16) | FLD_VAL(hinc, 12, 0); - dispc_write_reg(DISPC_OVL_FIR2(plane), val); - } -} - -static void dispc_ovl_set_vid_accu0(enum omap_plane plane, int haccu, int vaccu) -{ - u32 val; - u8 hor_start, hor_end, vert_start, vert_end; - - dss_feat_get_reg_field(FEAT_REG_HORIZONTALACCU, &hor_start, &hor_end); - dss_feat_get_reg_field(FEAT_REG_VERTICALACCU, &vert_start, &vert_end); - - val = FLD_VAL(vaccu, vert_start, vert_end) | - FLD_VAL(haccu, hor_start, hor_end); - - dispc_write_reg(DISPC_OVL_ACCU0(plane), val); -} - -static void dispc_ovl_set_vid_accu1(enum omap_plane plane, int haccu, int vaccu) -{ - u32 val; - u8 hor_start, hor_end, vert_start, vert_end; - - dss_feat_get_reg_field(FEAT_REG_HORIZONTALACCU, &hor_start, &hor_end); - dss_feat_get_reg_field(FEAT_REG_VERTICALACCU, &vert_start, &vert_end); - - val = FLD_VAL(vaccu, vert_start, vert_end) | - FLD_VAL(haccu, hor_start, hor_end); - - dispc_write_reg(DISPC_OVL_ACCU1(plane), val); -} - -static void dispc_ovl_set_vid_accu2_0(enum omap_plane plane, int haccu, - int vaccu) -{ - u32 val; - - val = FLD_VAL(vaccu, 26, 16) | FLD_VAL(haccu, 10, 0); - dispc_write_reg(DISPC_OVL_ACCU2_0(plane), val); -} - -static void dispc_ovl_set_vid_accu2_1(enum omap_plane plane, int haccu, - int vaccu) -{ - u32 val; - - val = FLD_VAL(vaccu, 26, 16) | FLD_VAL(haccu, 10, 0); - dispc_write_reg(DISPC_OVL_ACCU2_1(plane), val); -} - -static void dispc_ovl_set_scale_param(enum omap_plane plane, - u16 orig_width, u16 orig_height, - u16 out_width, u16 out_height, - bool five_taps, u8 rotation, - enum omap_color_component color_comp) -{ - int fir_hinc, fir_vinc; - - fir_hinc = 1024 * orig_width / out_width; - fir_vinc = 1024 * orig_height / out_height; - - dispc_ovl_set_scale_coef(plane, fir_hinc, fir_vinc, five_taps, - color_comp); - dispc_ovl_set_fir(plane, fir_hinc, fir_vinc, color_comp); -} - -static void dispc_ovl_set_scaling_common(enum omap_plane plane, - u16 orig_width, u16 orig_height, - u16 out_width, u16 out_height, - bool ilace, bool five_taps, - bool fieldmode, enum omap_color_mode color_mode, - u8 rotation) -{ - int accu0 = 0; - int accu1 = 0; - u32 l; - - dispc_ovl_set_scale_param(plane, orig_width, orig_height, - out_width, out_height, five_taps, - rotation, DISPC_COLOR_COMPONENT_RGB_Y); - l = dispc_read_reg(DISPC_OVL_ATTRIBUTES(plane)); - - /* RESIZEENABLE and VERTICALTAPS */ - l &= ~((0x3 << 5) | (0x1 << 21)); - l |= (orig_width != out_width) ? (1 << 5) : 0; - l |= (orig_height != out_height) ? (1 << 6) : 0; - l |= five_taps ? (1 << 21) : 0; - - /* VRESIZECONF and HRESIZECONF */ - if (dss_has_feature(FEAT_RESIZECONF)) { - l &= ~(0x3 << 7); - l |= (orig_width <= out_width) ? 0 : (1 << 7); - l |= (orig_height <= out_height) ? 0 : (1 << 8); - } - - /* LINEBUFFERSPLIT */ - if (dss_has_feature(FEAT_LINEBUFFERSPLIT)) { - l &= ~(0x1 << 22); - l |= five_taps ? (1 << 22) : 0; - } - - dispc_write_reg(DISPC_OVL_ATTRIBUTES(plane), l); - - /* - * field 0 = even field = bottom field - * field 1 = odd field = top field - */ - if (ilace && !fieldmode) { - accu1 = 0; - accu0 = ((1024 * orig_height / out_height) / 2) & 0x3ff; - if (accu0 >= 1024/2) { - accu1 = 1024/2; - accu0 -= accu1; - } - } - - dispc_ovl_set_vid_accu0(plane, 0, accu0); - dispc_ovl_set_vid_accu1(plane, 0, accu1); -} - -static void dispc_ovl_set_scaling_uv(enum omap_plane plane, - u16 orig_width, u16 orig_height, - u16 out_width, u16 out_height, - bool ilace, bool five_taps, - bool fieldmode, enum omap_color_mode color_mode, - u8 rotation) -{ - int scale_x = out_width != orig_width; - int scale_y = out_height != orig_height; - - if (!dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) - return; - if ((color_mode != OMAP_DSS_COLOR_YUV2 && - color_mode != OMAP_DSS_COLOR_UYVY && - color_mode != OMAP_DSS_COLOR_NV12)) { - /* reset chroma resampling for RGB formats */ - REG_FLD_MOD(DISPC_OVL_ATTRIBUTES2(plane), 0, 8, 8); - return; - } - switch (color_mode) { - case OMAP_DSS_COLOR_NV12: - /* UV is subsampled by 2 vertically*/ - orig_height >>= 1; - /* UV is subsampled by 2 horz.*/ - orig_width >>= 1; - break; - case OMAP_DSS_COLOR_YUV2: - case OMAP_DSS_COLOR_UYVY: - /*For YUV422 with 90/270 rotation, - *we don't upsample chroma - */ - if (rotation == OMAP_DSS_ROT_0 || - rotation == OMAP_DSS_ROT_180) - /* UV is subsampled by 2 hrz*/ - orig_width >>= 1; - /* must use FIR for YUV422 if rotated */ - if (rotation != OMAP_DSS_ROT_0) - scale_x = scale_y = true; - break; - default: - BUG(); - } - - if (out_width != orig_width) - scale_x = true; - if (out_height != orig_height) - scale_y = true; - - dispc_ovl_set_scale_param(plane, orig_width, orig_height, - out_width, out_height, five_taps, - rotation, DISPC_COLOR_COMPONENT_UV); - - REG_FLD_MOD(DISPC_OVL_ATTRIBUTES2(plane), - (scale_x || scale_y) ? 1 : 0, 8, 8); - /* set H scaling */ - REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), scale_x ? 1 : 0, 5, 5); - /* set V scaling */ - REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), scale_y ? 1 : 0, 6, 6); - - dispc_ovl_set_vid_accu2_0(plane, 0x80, 0); - dispc_ovl_set_vid_accu2_1(plane, 0x80, 0); -} - -static void dispc_ovl_set_scaling(enum omap_plane plane, - u16 orig_width, u16 orig_height, - u16 out_width, u16 out_height, - bool ilace, bool five_taps, - bool fieldmode, enum omap_color_mode color_mode, - u8 rotation) -{ - BUG_ON(plane == OMAP_DSS_GFX); - - dispc_ovl_set_scaling_common(plane, - orig_width, orig_height, - out_width, out_height, - ilace, five_taps, - fieldmode, color_mode, - rotation); - - dispc_ovl_set_scaling_uv(plane, - orig_width, orig_height, - out_width, out_height, - ilace, five_taps, - fieldmode, color_mode, - rotation); -} - -static void dispc_ovl_set_rotation_attrs(enum omap_plane plane, u8 rotation, - bool mirroring, enum omap_color_mode color_mode) -{ - bool row_repeat = false; - int vidrot = 0; - - if (color_mode == OMAP_DSS_COLOR_YUV2 || - color_mode == OMAP_DSS_COLOR_UYVY) { - - if (mirroring) { - switch (rotation) { - case OMAP_DSS_ROT_0: - vidrot = 2; - break; - case OMAP_DSS_ROT_90: - vidrot = 1; - break; - case OMAP_DSS_ROT_180: - vidrot = 0; - break; - case OMAP_DSS_ROT_270: - vidrot = 3; - break; - } - } else { - switch (rotation) { - case OMAP_DSS_ROT_0: - vidrot = 0; - break; - case OMAP_DSS_ROT_90: - vidrot = 1; - break; - case OMAP_DSS_ROT_180: - vidrot = 2; - break; - case OMAP_DSS_ROT_270: - vidrot = 3; - break; - } - } - - if (rotation == OMAP_DSS_ROT_90 || rotation == OMAP_DSS_ROT_270) - row_repeat = true; - else - row_repeat = false; - } - - REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), vidrot, 13, 12); - if (dss_has_feature(FEAT_ROWREPEATENABLE)) - REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), - row_repeat ? 1 : 0, 18, 18); -} - -static int color_mode_to_bpp(enum omap_color_mode color_mode) -{ - switch (color_mode) { - case OMAP_DSS_COLOR_CLUT1: - return 1; - case OMAP_DSS_COLOR_CLUT2: - return 2; - case OMAP_DSS_COLOR_CLUT4: - return 4; - case OMAP_DSS_COLOR_CLUT8: - case OMAP_DSS_COLOR_NV12: - return 8; - case OMAP_DSS_COLOR_RGB12U: - case OMAP_DSS_COLOR_RGB16: - case OMAP_DSS_COLOR_ARGB16: - case OMAP_DSS_COLOR_YUV2: - case OMAP_DSS_COLOR_UYVY: - case OMAP_DSS_COLOR_RGBA16: - case OMAP_DSS_COLOR_RGBX16: - case OMAP_DSS_COLOR_ARGB16_1555: - case OMAP_DSS_COLOR_XRGB16_1555: - return 16; - case OMAP_DSS_COLOR_RGB24P: - return 24; - case OMAP_DSS_COLOR_RGB24U: - case OMAP_DSS_COLOR_ARGB32: - case OMAP_DSS_COLOR_RGBA32: - case OMAP_DSS_COLOR_RGBX32: - return 32; - default: - BUG(); - } -} - -static s32 pixinc(int pixels, u8 ps) -{ - if (pixels == 1) - return 1; - else if (pixels > 1) - return 1 + (pixels - 1) * ps; - else if (pixels < 0) - return 1 - (-pixels + 1) * ps; - else - BUG(); -} - -static void calc_vrfb_rotation_offset(u8 rotation, bool mirror, - u16 screen_width, - u16 width, u16 height, - enum omap_color_mode color_mode, bool fieldmode, - unsigned int field_offset, - unsigned *offset0, unsigned *offset1, - s32 *row_inc, s32 *pix_inc) -{ - u8 ps; - - /* FIXME CLUT formats */ - switch (color_mode) { - case OMAP_DSS_COLOR_CLUT1: - case OMAP_DSS_COLOR_CLUT2: - case OMAP_DSS_COLOR_CLUT4: - case OMAP_DSS_COLOR_CLUT8: - BUG(); - return; - case OMAP_DSS_COLOR_YUV2: - case OMAP_DSS_COLOR_UYVY: - ps = 4; - break; - default: - ps = color_mode_to_bpp(color_mode) / 8; - break; - } - - DSSDBG("calc_rot(%d): scrw %d, %dx%d\n", rotation, screen_width, - width, height); - - /* - * field 0 = even field = bottom field - * field 1 = odd field = top field - */ - switch (rotation + mirror * 4) { - case OMAP_DSS_ROT_0: - case OMAP_DSS_ROT_180: - /* - * If the pixel format is YUV or UYVY divide the width - * of the image by 2 for 0 and 180 degree rotation. - */ - if (color_mode == OMAP_DSS_COLOR_YUV2 || - color_mode == OMAP_DSS_COLOR_UYVY) - width = width >> 1; - case OMAP_DSS_ROT_90: - case OMAP_DSS_ROT_270: - *offset1 = 0; - if (field_offset) - *offset0 = field_offset * screen_width * ps; - else - *offset0 = 0; - - *row_inc = pixinc(1 + (screen_width - width) + - (fieldmode ? screen_width : 0), - ps); - *pix_inc = pixinc(1, ps); - break; - - case OMAP_DSS_ROT_0 + 4: - case OMAP_DSS_ROT_180 + 4: - /* If the pixel format is YUV or UYVY divide the width - * of the image by 2 for 0 degree and 180 degree - */ - if (color_mode == OMAP_DSS_COLOR_YUV2 || - color_mode == OMAP_DSS_COLOR_UYVY) - width = width >> 1; - case OMAP_DSS_ROT_90 + 4: - case OMAP_DSS_ROT_270 + 4: - *offset1 = 0; - if (field_offset) - *offset0 = field_offset * screen_width * ps; - else - *offset0 = 0; - *row_inc = pixinc(1 - (screen_width + width) - - (fieldmode ? screen_width : 0), - ps); - *pix_inc = pixinc(1, ps); - break; - - default: - BUG(); - } -} - -static void calc_dma_rotation_offset(u8 rotation, bool mirror, - u16 screen_width, - u16 width, u16 height, - enum omap_color_mode color_mode, bool fieldmode, - unsigned int field_offset, - unsigned *offset0, unsigned *offset1, - s32 *row_inc, s32 *pix_inc) -{ - u8 ps; - u16 fbw, fbh; - - /* FIXME CLUT formats */ - switch (color_mode) { - case OMAP_DSS_COLOR_CLUT1: - case OMAP_DSS_COLOR_CLUT2: - case OMAP_DSS_COLOR_CLUT4: - case OMAP_DSS_COLOR_CLUT8: - BUG(); - return; - default: - ps = color_mode_to_bpp(color_mode) / 8; - break; - } - - DSSDBG("calc_rot(%d): scrw %d, %dx%d\n", rotation, screen_width, - width, height); - - /* width & height are overlay sizes, convert to fb sizes */ - - if (rotation == OMAP_DSS_ROT_0 || rotation == OMAP_DSS_ROT_180) { - fbw = width; - fbh = height; - } else { - fbw = height; - fbh = width; - } - - /* - * field 0 = even field = bottom field - * field 1 = odd field = top field - */ - switch (rotation + mirror * 4) { - case OMAP_DSS_ROT_0: - *offset1 = 0; - if (field_offset) - *offset0 = *offset1 + field_offset * screen_width * ps; - else - *offset0 = *offset1; - *row_inc = pixinc(1 + (screen_width - fbw) + - (fieldmode ? screen_width : 0), - ps); - *pix_inc = pixinc(1, ps); - break; - case OMAP_DSS_ROT_90: - *offset1 = screen_width * (fbh - 1) * ps; - if (field_offset) - *offset0 = *offset1 + field_offset * ps; - else - *offset0 = *offset1; - *row_inc = pixinc(screen_width * (fbh - 1) + 1 + - (fieldmode ? 1 : 0), ps); - *pix_inc = pixinc(-screen_width, ps); - break; - case OMAP_DSS_ROT_180: - *offset1 = (screen_width * (fbh - 1) + fbw - 1) * ps; - if (field_offset) - *offset0 = *offset1 - field_offset * screen_width * ps; - else - *offset0 = *offset1; - *row_inc = pixinc(-1 - - (screen_width - fbw) - - (fieldmode ? screen_width : 0), - ps); - *pix_inc = pixinc(-1, ps); - break; - case OMAP_DSS_ROT_270: - *offset1 = (fbw - 1) * ps; - if (field_offset) - *offset0 = *offset1 - field_offset * ps; - else - *offset0 = *offset1; - *row_inc = pixinc(-screen_width * (fbh - 1) - 1 - - (fieldmode ? 1 : 0), ps); - *pix_inc = pixinc(screen_width, ps); - break; - - /* mirroring */ - case OMAP_DSS_ROT_0 + 4: - *offset1 = (fbw - 1) * ps; - if (field_offset) - *offset0 = *offset1 + field_offset * screen_width * ps; - else - *offset0 = *offset1; - *row_inc = pixinc(screen_width * 2 - 1 + - (fieldmode ? screen_width : 0), - ps); - *pix_inc = pixinc(-1, ps); - break; - - case OMAP_DSS_ROT_90 + 4: - *offset1 = 0; - if (field_offset) - *offset0 = *offset1 + field_offset * ps; - else - *offset0 = *offset1; - *row_inc = pixinc(-screen_width * (fbh - 1) + 1 + - (fieldmode ? 1 : 0), - ps); - *pix_inc = pixinc(screen_width, ps); - break; - - case OMAP_DSS_ROT_180 + 4: - *offset1 = screen_width * (fbh - 1) * ps; - if (field_offset) - *offset0 = *offset1 - field_offset * screen_width * ps; - else - *offset0 = *offset1; - *row_inc = pixinc(1 - screen_width * 2 - - (fieldmode ? screen_width : 0), - ps); - *pix_inc = pixinc(1, ps); - break; - - case OMAP_DSS_ROT_270 + 4: - *offset1 = (screen_width * (fbh - 1) + fbw - 1) * ps; - if (field_offset) - *offset0 = *offset1 - field_offset * ps; - else - *offset0 = *offset1; - *row_inc = pixinc(screen_width * (fbh - 1) - 1 - - (fieldmode ? 1 : 0), - ps); - *pix_inc = pixinc(-screen_width, ps); - break; - - default: - BUG(); - } -} - -static unsigned long calc_fclk_five_taps(enum omap_channel channel, u16 width, - u16 height, u16 out_width, u16 out_height, - enum omap_color_mode color_mode) -{ - u32 fclk = 0; - u64 tmp, pclk = dispc_mgr_pclk_rate(channel); - - if (height <= out_height && width <= out_width) - return (unsigned long) pclk; - - if (height > out_height) { - struct omap_dss_device *dssdev = dispc_mgr_get_device(channel); - unsigned int ppl = dssdev->panel.timings.x_res; - - tmp = pclk * height * out_width; - do_div(tmp, 2 * out_height * ppl); - fclk = tmp; - - if (height > 2 * out_height) { - if (ppl == out_width) - return 0; - - tmp = pclk * (height - 2 * out_height) * out_width; - do_div(tmp, 2 * out_height * (ppl - out_width)); - fclk = max(fclk, (u32) tmp); - } - } - - if (width > out_width) { - tmp = pclk * width; - do_div(tmp, out_width); - fclk = max(fclk, (u32) tmp); - - if (color_mode == OMAP_DSS_COLOR_RGB24U) - fclk <<= 1; - } - - return fclk; -} - -static unsigned long calc_fclk(enum omap_channel channel, u16 width, - u16 height, u16 out_width, u16 out_height) -{ - unsigned int hf, vf; - - /* - * FIXME how to determine the 'A' factor - * for the no downscaling case ? - */ - - if (width > 3 * out_width) - hf = 4; - else if (width > 2 * out_width) - hf = 3; - else if (width > out_width) - hf = 2; - else - hf = 1; - - if (height > out_height) - vf = 2; - else - vf = 1; - - if (cpu_is_omap24xx()) { - if (vf > 1 && hf > 1) - return dispc_mgr_pclk_rate(channel) * 4; - else - return dispc_mgr_pclk_rate(channel) * 2; - } else if (cpu_is_omap34xx()) { - return dispc_mgr_pclk_rate(channel) * vf * hf; - } else { - return dispc_mgr_pclk_rate(channel) * hf; - } -} - -static int dispc_ovl_calc_scaling(enum omap_plane plane, - enum omap_channel channel, u16 width, u16 height, - u16 out_width, u16 out_height, - enum omap_color_mode color_mode, bool *five_taps) -{ - struct omap_overlay *ovl = omap_dss_get_overlay(plane); - const int maxdownscale = dss_feat_get_param_max(FEAT_PARAM_DOWNSCALE); - const int maxsinglelinewidth = - dss_feat_get_param_max(FEAT_PARAM_LINEWIDTH); - unsigned long fclk = 0; - - if (width == out_width && height == out_height) - return 0; - - if ((ovl->caps & OMAP_DSS_OVL_CAP_SCALE) == 0) - return -EINVAL; - - if (out_width < width / maxdownscale || - out_width > width * 8) - return -EINVAL; - - if (out_height < height / maxdownscale || - out_height > height * 8) - return -EINVAL; - - if (cpu_is_omap24xx()) { - if (width > maxsinglelinewidth) - DSSERR("Cannot scale max input width exceeded"); - *five_taps = false; - fclk = calc_fclk(channel, width, height, out_width, - out_height); - } else if (cpu_is_omap34xx()) { - if (width > (maxsinglelinewidth * 2)) { - DSSERR("Cannot setup scaling"); - DSSERR("width exceeds maximum width possible"); - return -EINVAL; - } - fclk = calc_fclk_five_taps(channel, width, height, out_width, - out_height, color_mode); - if (width > maxsinglelinewidth) { - if (height > out_height && height < out_height * 2) - *five_taps = false; - else { - DSSERR("cannot setup scaling with five taps"); - return -EINVAL; - } - } - if (!*five_taps) - fclk = calc_fclk(channel, width, height, out_width, - out_height); - } else { - if (width > maxsinglelinewidth) { - DSSERR("Cannot scale width exceeds max line width"); - return -EINVAL; - } - fclk = calc_fclk(channel, width, height, out_width, - out_height); - } - - DSSDBG("required fclk rate = %lu Hz\n", fclk); - DSSDBG("current fclk rate = %lu Hz\n", dispc_fclk_rate()); - - if (!fclk || fclk > dispc_fclk_rate()) { - DSSERR("failed to set up scaling, " - "required fclk rate = %lu Hz, " - "current fclk rate = %lu Hz\n", - fclk, dispc_fclk_rate()); - return -EINVAL; - } - - return 0; -} - -int dispc_ovl_setup(enum omap_plane plane, struct omap_overlay_info *oi, - bool ilace, bool replication) -{ - struct omap_overlay *ovl = omap_dss_get_overlay(plane); - bool five_taps = true; - bool fieldmode = 0; - int r, cconv = 0; - unsigned offset0, offset1; - s32 row_inc; - s32 pix_inc; - u16 frame_height = oi->height; - unsigned int field_offset = 0; - u16 outw, outh; - enum omap_channel channel; - - channel = dispc_ovl_get_channel_out(plane); - - DSSDBG("dispc_ovl_setup %d, pa %x, pa_uv %x, sw %d, %d,%d, %dx%d -> " - "%dx%d, cmode %x, rot %d, mir %d, ilace %d chan %d repl %d\n", - plane, oi->paddr, oi->p_uv_addr, - oi->screen_width, oi->pos_x, oi->pos_y, oi->width, oi->height, - oi->out_width, oi->out_height, oi->color_mode, oi->rotation, - oi->mirror, ilace, channel, replication); - - if (oi->paddr == 0) - return -EINVAL; - - outw = oi->out_width == 0 ? oi->width : oi->out_width; - outh = oi->out_height == 0 ? oi->height : oi->out_height; - - if (ilace && oi->height == outh) - fieldmode = 1; - - if (ilace) { - if (fieldmode) - oi->height /= 2; - oi->pos_y /= 2; - outh /= 2; - - DSSDBG("adjusting for ilace: height %d, pos_y %d, " - "out_height %d\n", - oi->height, oi->pos_y, outh); - } - - if (!dss_feat_color_mode_supported(plane, oi->color_mode)) - return -EINVAL; - - r = dispc_ovl_calc_scaling(plane, channel, oi->width, oi->height, - outw, outh, oi->color_mode, - &five_taps); - if (r) - return r; - - if (oi->color_mode == OMAP_DSS_COLOR_YUV2 || - oi->color_mode == OMAP_DSS_COLOR_UYVY || - oi->color_mode == OMAP_DSS_COLOR_NV12) - cconv = 1; - - if (ilace && !fieldmode) { - /* - * when downscaling the bottom field may have to start several - * source lines below the top field. Unfortunately ACCUI - * registers will only hold the fractional part of the offset - * so the integer part must be added to the base address of the - * bottom field. - */ - if (!oi->height || oi->height == outh) - field_offset = 0; - else - field_offset = oi->height / outh / 2; - } - - /* Fields are independent but interleaved in memory. */ - if (fieldmode) - field_offset = 1; - - if (oi->rotation_type == OMAP_DSS_ROT_DMA) - calc_dma_rotation_offset(oi->rotation, oi->mirror, - oi->screen_width, oi->width, frame_height, - oi->color_mode, fieldmode, field_offset, - &offset0, &offset1, &row_inc, &pix_inc); - else - calc_vrfb_rotation_offset(oi->rotation, oi->mirror, - oi->screen_width, oi->width, frame_height, - oi->color_mode, fieldmode, field_offset, - &offset0, &offset1, &row_inc, &pix_inc); - - DSSDBG("offset0 %u, offset1 %u, row_inc %d, pix_inc %d\n", - offset0, offset1, row_inc, pix_inc); - - dispc_ovl_set_color_mode(plane, oi->color_mode); - - dispc_ovl_set_ba0(plane, oi->paddr + offset0); - dispc_ovl_set_ba1(plane, oi->paddr + offset1); - - if (OMAP_DSS_COLOR_NV12 == oi->color_mode) { - dispc_ovl_set_ba0_uv(plane, oi->p_uv_addr + offset0); - dispc_ovl_set_ba1_uv(plane, oi->p_uv_addr + offset1); - } - - - dispc_ovl_set_row_inc(plane, row_inc); - dispc_ovl_set_pix_inc(plane, pix_inc); - - DSSDBG("%d,%d %dx%d -> %dx%d\n", oi->pos_x, oi->pos_y, oi->width, - oi->height, outw, outh); - - dispc_ovl_set_pos(plane, oi->pos_x, oi->pos_y); - - dispc_ovl_set_pic_size(plane, oi->width, oi->height); - - if (ovl->caps & OMAP_DSS_OVL_CAP_SCALE) { - dispc_ovl_set_scaling(plane, oi->width, oi->height, - outw, outh, - ilace, five_taps, fieldmode, - oi->color_mode, oi->rotation); - dispc_ovl_set_vid_size(plane, outw, outh); - dispc_ovl_set_vid_color_conv(plane, cconv); - } - - dispc_ovl_set_rotation_attrs(plane, oi->rotation, oi->mirror, - oi->color_mode); - - dispc_ovl_set_zorder(plane, oi->zorder); - dispc_ovl_set_pre_mult_alpha(plane, oi->pre_mult_alpha); - dispc_ovl_setup_global_alpha(plane, oi->global_alpha); - - dispc_ovl_enable_replication(plane, replication); - - return 0; -} - -int dispc_ovl_enable(enum omap_plane plane, bool enable) -{ - DSSDBG("dispc_enable_plane %d, %d\n", plane, enable); - - REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), enable ? 1 : 0, 0, 0); - - return 0; -} - -static void dispc_disable_isr(void *data, u32 mask) -{ - struct completion *compl = data; - complete(compl); -} - -static void _enable_lcd_out(enum omap_channel channel, bool enable) -{ - if (channel == OMAP_DSS_CHANNEL_LCD2) { - REG_FLD_MOD(DISPC_CONTROL2, enable ? 1 : 0, 0, 0); - /* flush posted write */ - dispc_read_reg(DISPC_CONTROL2); - } else { - REG_FLD_MOD(DISPC_CONTROL, enable ? 1 : 0, 0, 0); - dispc_read_reg(DISPC_CONTROL); - } -} - -static void dispc_mgr_enable_lcd_out(enum omap_channel channel, bool enable) -{ - struct completion frame_done_completion; - bool is_on; - int r; - u32 irq; - - /* When we disable LCD output, we need to wait until frame is done. - * Otherwise the DSS is still working, and turning off the clocks - * prevents DSS from going to OFF mode */ - is_on = channel == OMAP_DSS_CHANNEL_LCD2 ? - REG_GET(DISPC_CONTROL2, 0, 0) : - REG_GET(DISPC_CONTROL, 0, 0); - - irq = channel == OMAP_DSS_CHANNEL_LCD2 ? DISPC_IRQ_FRAMEDONE2 : - DISPC_IRQ_FRAMEDONE; - - if (!enable && is_on) { - init_completion(&frame_done_completion); - - r = omap_dispc_register_isr(dispc_disable_isr, - &frame_done_completion, irq); - - if (r) - DSSERR("failed to register FRAMEDONE isr\n"); - } - - _enable_lcd_out(channel, enable); - - if (!enable && is_on) { - if (!wait_for_completion_timeout(&frame_done_completion, - msecs_to_jiffies(100))) - DSSERR("timeout waiting for FRAME DONE\n"); - - r = omap_dispc_unregister_isr(dispc_disable_isr, - &frame_done_completion, irq); - - if (r) - DSSERR("failed to unregister FRAMEDONE isr\n"); - } -} - -static void _enable_digit_out(bool enable) -{ - REG_FLD_MOD(DISPC_CONTROL, enable ? 1 : 0, 1, 1); - /* flush posted write */ - dispc_read_reg(DISPC_CONTROL); -} - -static void dispc_mgr_enable_digit_out(bool enable) -{ - struct completion frame_done_completion; - enum dss_hdmi_venc_clk_source_select src; - int r, i; - u32 irq_mask; - int num_irqs; - - if (REG_GET(DISPC_CONTROL, 1, 1) == enable) - return; - - src = dss_get_hdmi_venc_clk_source(); - - if (enable) { - unsigned long flags; - /* When we enable digit output, we'll get an extra digit - * sync lost interrupt, that we need to ignore */ - spin_lock_irqsave(&dispc.irq_lock, flags); - dispc.irq_error_mask &= ~DISPC_IRQ_SYNC_LOST_DIGIT; - _omap_dispc_set_irqs(); - spin_unlock_irqrestore(&dispc.irq_lock, flags); - } - - /* When we disable digit output, we need to wait until fields are done. - * Otherwise the DSS is still working, and turning off the clocks - * prevents DSS from going to OFF mode. And when enabling, we need to - * wait for the extra sync losts */ - init_completion(&frame_done_completion); - - if (src == DSS_HDMI_M_PCLK && enable == false) { - irq_mask = DISPC_IRQ_FRAMEDONETV; - num_irqs = 1; - } else { - irq_mask = DISPC_IRQ_EVSYNC_EVEN | DISPC_IRQ_EVSYNC_ODD; - /* XXX I understand from TRM that we should only wait for the - * current field to complete. But it seems we have to wait for - * both fields */ - num_irqs = 2; - } - - r = omap_dispc_register_isr(dispc_disable_isr, &frame_done_completion, - irq_mask); - if (r) - DSSERR("failed to register %x isr\n", irq_mask); - - _enable_digit_out(enable); - - for (i = 0; i < num_irqs; ++i) { - if (!wait_for_completion_timeout(&frame_done_completion, - msecs_to_jiffies(100))) - DSSERR("timeout waiting for digit out to %s\n", - enable ? "start" : "stop"); - } - - r = omap_dispc_unregister_isr(dispc_disable_isr, &frame_done_completion, - irq_mask); - if (r) - DSSERR("failed to unregister %x isr\n", irq_mask); - - if (enable) { - unsigned long flags; - spin_lock_irqsave(&dispc.irq_lock, flags); - dispc.irq_error_mask |= DISPC_IRQ_SYNC_LOST_DIGIT; - dispc_write_reg(DISPC_IRQSTATUS, DISPC_IRQ_SYNC_LOST_DIGIT); - _omap_dispc_set_irqs(); - spin_unlock_irqrestore(&dispc.irq_lock, flags); - } -} - -bool dispc_mgr_is_enabled(enum omap_channel channel) -{ - if (channel == OMAP_DSS_CHANNEL_LCD) - return !!REG_GET(DISPC_CONTROL, 0, 0); - else if (channel == OMAP_DSS_CHANNEL_DIGIT) - return !!REG_GET(DISPC_CONTROL, 1, 1); - else if (channel == OMAP_DSS_CHANNEL_LCD2) - return !!REG_GET(DISPC_CONTROL2, 0, 0); - else - BUG(); -} - -void dispc_mgr_enable(enum omap_channel channel, bool enable) -{ - if (dispc_mgr_is_lcd(channel)) - dispc_mgr_enable_lcd_out(channel, enable); - else if (channel == OMAP_DSS_CHANNEL_DIGIT) - dispc_mgr_enable_digit_out(enable); - else - BUG(); -} - -void dispc_lcd_enable_signal_polarity(bool act_high) -{ - if (!dss_has_feature(FEAT_LCDENABLEPOL)) - return; - - REG_FLD_MOD(DISPC_CONTROL, act_high ? 1 : 0, 29, 29); -} - -void dispc_lcd_enable_signal(bool enable) -{ - if (!dss_has_feature(FEAT_LCDENABLESIGNAL)) - return; - - REG_FLD_MOD(DISPC_CONTROL, enable ? 1 : 0, 28, 28); -} - -void dispc_pck_free_enable(bool enable) -{ - if (!dss_has_feature(FEAT_PCKFREEENABLE)) - return; - - REG_FLD_MOD(DISPC_CONTROL, enable ? 1 : 0, 27, 27); -} - -void dispc_mgr_enable_fifohandcheck(enum omap_channel channel, bool enable) -{ - if (channel == OMAP_DSS_CHANNEL_LCD2) - REG_FLD_MOD(DISPC_CONFIG2, enable ? 1 : 0, 16, 16); - else - REG_FLD_MOD(DISPC_CONFIG, enable ? 1 : 0, 16, 16); -} - - -void dispc_mgr_set_lcd_display_type(enum omap_channel channel, - enum omap_lcd_display_type type) -{ - int mode; - - switch (type) { - case OMAP_DSS_LCD_DISPLAY_STN: - mode = 0; - break; - - case OMAP_DSS_LCD_DISPLAY_TFT: - mode = 1; - break; - - default: - BUG(); - return; - } - - if (channel == OMAP_DSS_CHANNEL_LCD2) - REG_FLD_MOD(DISPC_CONTROL2, mode, 3, 3); - else - REG_FLD_MOD(DISPC_CONTROL, mode, 3, 3); -} - -void dispc_set_loadmode(enum omap_dss_load_mode mode) -{ - REG_FLD_MOD(DISPC_CONFIG, mode, 2, 1); -} - - -static void dispc_mgr_set_default_color(enum omap_channel channel, u32 color) -{ - dispc_write_reg(DISPC_DEFAULT_COLOR(channel), color); -} - -static void dispc_mgr_set_trans_key(enum omap_channel ch, - enum omap_dss_trans_key_type type, - u32 trans_key) -{ - if (ch == OMAP_DSS_CHANNEL_LCD) - REG_FLD_MOD(DISPC_CONFIG, type, 11, 11); - else if (ch == OMAP_DSS_CHANNEL_DIGIT) - REG_FLD_MOD(DISPC_CONFIG, type, 13, 13); - else /* OMAP_DSS_CHANNEL_LCD2 */ - REG_FLD_MOD(DISPC_CONFIG2, type, 11, 11); - - dispc_write_reg(DISPC_TRANS_COLOR(ch), trans_key); -} - -static void dispc_mgr_enable_trans_key(enum omap_channel ch, bool enable) -{ - if (ch == OMAP_DSS_CHANNEL_LCD) - REG_FLD_MOD(DISPC_CONFIG, enable, 10, 10); - else if (ch == OMAP_DSS_CHANNEL_DIGIT) - REG_FLD_MOD(DISPC_CONFIG, enable, 12, 12); - else /* OMAP_DSS_CHANNEL_LCD2 */ - REG_FLD_MOD(DISPC_CONFIG2, enable, 10, 10); -} - -static void dispc_mgr_enable_alpha_fixed_zorder(enum omap_channel ch, - bool enable) -{ - if (!dss_has_feature(FEAT_ALPHA_FIXED_ZORDER)) - return; - - if (ch == OMAP_DSS_CHANNEL_LCD) - REG_FLD_MOD(DISPC_CONFIG, enable, 18, 18); - else if (ch == OMAP_DSS_CHANNEL_DIGIT) - REG_FLD_MOD(DISPC_CONFIG, enable, 19, 19); -} - -void dispc_mgr_setup(enum omap_channel channel, - struct omap_overlay_manager_info *info) -{ - dispc_mgr_set_default_color(channel, info->default_color); - dispc_mgr_set_trans_key(channel, info->trans_key_type, info->trans_key); - dispc_mgr_enable_trans_key(channel, info->trans_enabled); - dispc_mgr_enable_alpha_fixed_zorder(channel, - info->partial_alpha_enabled); - if (dss_has_feature(FEAT_CPR)) { - dispc_mgr_enable_cpr(channel, info->cpr_enable); - dispc_mgr_set_cpr_coef(channel, &info->cpr_coefs); - } -} - -void dispc_mgr_set_tft_data_lines(enum omap_channel channel, u8 data_lines) -{ - int code; - - switch (data_lines) { - case 12: - code = 0; - break; - case 16: - code = 1; - break; - case 18: - code = 2; - break; - case 24: - code = 3; - break; - default: - BUG(); - return; - } - - if (channel == OMAP_DSS_CHANNEL_LCD2) - REG_FLD_MOD(DISPC_CONTROL2, code, 9, 8); - else - REG_FLD_MOD(DISPC_CONTROL, code, 9, 8); -} - -void dispc_mgr_set_io_pad_mode(enum dss_io_pad_mode mode) -{ - u32 l; - int gpout0, gpout1; - - switch (mode) { - case DSS_IO_PAD_MODE_RESET: - gpout0 = 0; - gpout1 = 0; - break; - case DSS_IO_PAD_MODE_RFBI: - gpout0 = 1; - gpout1 = 0; - break; - case DSS_IO_PAD_MODE_BYPASS: - gpout0 = 1; - gpout1 = 1; - break; - default: - BUG(); - return; - } - - l = dispc_read_reg(DISPC_CONTROL); - l = FLD_MOD(l, gpout0, 15, 15); - l = FLD_MOD(l, gpout1, 16, 16); - dispc_write_reg(DISPC_CONTROL, l); -} - -void dispc_mgr_enable_stallmode(enum omap_channel channel, bool enable) -{ - if (channel == OMAP_DSS_CHANNEL_LCD2) - REG_FLD_MOD(DISPC_CONTROL2, enable, 11, 11); - else - REG_FLD_MOD(DISPC_CONTROL, enable, 11, 11); -} - -static bool _dispc_lcd_timings_ok(int hsw, int hfp, int hbp, - int vsw, int vfp, int vbp) -{ - if (cpu_is_omap24xx() || omap_rev() < OMAP3430_REV_ES3_0) { - if (hsw < 1 || hsw > 64 || - hfp < 1 || hfp > 256 || - hbp < 1 || hbp > 256 || - vsw < 1 || vsw > 64 || - vfp < 0 || vfp > 255 || - vbp < 0 || vbp > 255) - return false; - } else { - if (hsw < 1 || hsw > 256 || - hfp < 1 || hfp > 4096 || - hbp < 1 || hbp > 4096 || - vsw < 1 || vsw > 256 || - vfp < 0 || vfp > 4095 || - vbp < 0 || vbp > 4095) - return false; - } - - return true; -} - -bool dispc_lcd_timings_ok(struct omap_video_timings *timings) -{ - return _dispc_lcd_timings_ok(timings->hsw, timings->hfp, - timings->hbp, timings->vsw, - timings->vfp, timings->vbp); -} - -static void _dispc_mgr_set_lcd_timings(enum omap_channel channel, int hsw, - int hfp, int hbp, int vsw, int vfp, int vbp) -{ - u32 timing_h, timing_v; - - if (cpu_is_omap24xx() || omap_rev() < OMAP3430_REV_ES3_0) { - timing_h = FLD_VAL(hsw-1, 5, 0) | FLD_VAL(hfp-1, 15, 8) | - FLD_VAL(hbp-1, 27, 20); - - timing_v = FLD_VAL(vsw-1, 5, 0) | FLD_VAL(vfp, 15, 8) | - FLD_VAL(vbp, 27, 20); - } else { - timing_h = FLD_VAL(hsw-1, 7, 0) | FLD_VAL(hfp-1, 19, 8) | - FLD_VAL(hbp-1, 31, 20); - - timing_v = FLD_VAL(vsw-1, 7, 0) | FLD_VAL(vfp, 19, 8) | - FLD_VAL(vbp, 31, 20); - } - - dispc_write_reg(DISPC_TIMING_H(channel), timing_h); - dispc_write_reg(DISPC_TIMING_V(channel), timing_v); -} - -/* change name to mode? */ -void dispc_mgr_set_lcd_timings(enum omap_channel channel, - struct omap_video_timings *timings) -{ - unsigned xtot, ytot; - unsigned long ht, vt; - - if (!_dispc_lcd_timings_ok(timings->hsw, timings->hfp, - timings->hbp, timings->vsw, - timings->vfp, timings->vbp)) - BUG(); - - _dispc_mgr_set_lcd_timings(channel, timings->hsw, timings->hfp, - timings->hbp, timings->vsw, timings->vfp, - timings->vbp); - - dispc_mgr_set_lcd_size(channel, timings->x_res, timings->y_res); - - xtot = timings->x_res + timings->hfp + timings->hsw + timings->hbp; - ytot = timings->y_res + timings->vfp + timings->vsw + timings->vbp; - - ht = (timings->pixel_clock * 1000) / xtot; - vt = (timings->pixel_clock * 1000) / xtot / ytot; - - DSSDBG("channel %d xres %u yres %u\n", channel, timings->x_res, - timings->y_res); - DSSDBG("pck %u\n", timings->pixel_clock); - DSSDBG("hsw %d hfp %d hbp %d vsw %d vfp %d vbp %d\n", - timings->hsw, timings->hfp, timings->hbp, - timings->vsw, timings->vfp, timings->vbp); - - DSSDBG("hsync %luHz, vsync %luHz\n", ht, vt); -} - -static void dispc_mgr_set_lcd_divisor(enum omap_channel channel, u16 lck_div, - u16 pck_div) -{ - BUG_ON(lck_div < 1); - BUG_ON(pck_div < 1); - - dispc_write_reg(DISPC_DIVISORo(channel), - FLD_VAL(lck_div, 23, 16) | FLD_VAL(pck_div, 7, 0)); -} - -static void dispc_mgr_get_lcd_divisor(enum omap_channel channel, int *lck_div, - int *pck_div) -{ - u32 l; - l = dispc_read_reg(DISPC_DIVISORo(channel)); - *lck_div = FLD_GET(l, 23, 16); - *pck_div = FLD_GET(l, 7, 0); -} - -unsigned long dispc_fclk_rate(void) -{ - struct platform_device *dsidev; - unsigned long r = 0; - - switch (dss_get_dispc_clk_source()) { - case OMAP_DSS_CLK_SRC_FCK: - r = clk_get_rate(dispc.dss_clk); - break; - case OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC: - dsidev = dsi_get_dsidev_from_id(0); - r = dsi_get_pll_hsdiv_dispc_rate(dsidev); - break; - case OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC: - dsidev = dsi_get_dsidev_from_id(1); - r = dsi_get_pll_hsdiv_dispc_rate(dsidev); - break; - default: - BUG(); - } - - return r; -} - -unsigned long dispc_mgr_lclk_rate(enum omap_channel channel) -{ - struct platform_device *dsidev; - int lcd; - unsigned long r; - u32 l; - - l = dispc_read_reg(DISPC_DIVISORo(channel)); - - lcd = FLD_GET(l, 23, 16); - - switch (dss_get_lcd_clk_source(channel)) { - case OMAP_DSS_CLK_SRC_FCK: - r = clk_get_rate(dispc.dss_clk); - break; - case OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC: - dsidev = dsi_get_dsidev_from_id(0); - r = dsi_get_pll_hsdiv_dispc_rate(dsidev); - break; - case OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC: - dsidev = dsi_get_dsidev_from_id(1); - r = dsi_get_pll_hsdiv_dispc_rate(dsidev); - break; - default: - BUG(); - } - - return r / lcd; -} - -unsigned long dispc_mgr_pclk_rate(enum omap_channel channel) -{ - unsigned long r; - - if (dispc_mgr_is_lcd(channel)) { - int pcd; - u32 l; - - l = dispc_read_reg(DISPC_DIVISORo(channel)); - - pcd = FLD_GET(l, 7, 0); - - r = dispc_mgr_lclk_rate(channel); - - return r / pcd; - } else { - struct omap_dss_device *dssdev = - dispc_mgr_get_device(channel); - - switch (dssdev->type) { - case OMAP_DISPLAY_TYPE_VENC: - return venc_get_pixel_clock(); - case OMAP_DISPLAY_TYPE_HDMI: - return hdmi_get_pixel_clock(); - default: - BUG(); - } - } -} - -void dispc_dump_clocks(struct seq_file *s) -{ - int lcd, pcd; - u32 l; - enum omap_dss_clk_source dispc_clk_src = dss_get_dispc_clk_source(); - enum omap_dss_clk_source lcd_clk_src; - - if (dispc_runtime_get()) - return; - - seq_printf(s, "- DISPC -\n"); - - seq_printf(s, "dispc fclk source = %s (%s)\n", - dss_get_generic_clk_source_name(dispc_clk_src), - dss_feat_get_clk_source_name(dispc_clk_src)); - - seq_printf(s, "fck\t\t%-16lu\n", dispc_fclk_rate()); - - if (dss_has_feature(FEAT_CORE_CLK_DIV)) { - seq_printf(s, "- DISPC-CORE-CLK -\n"); - l = dispc_read_reg(DISPC_DIVISOR); - lcd = FLD_GET(l, 23, 16); - - seq_printf(s, "lck\t\t%-16lulck div\t%u\n", - (dispc_fclk_rate()/lcd), lcd); - } - seq_printf(s, "- LCD1 -\n"); - - lcd_clk_src = dss_get_lcd_clk_source(OMAP_DSS_CHANNEL_LCD); - - seq_printf(s, "lcd1_clk source = %s (%s)\n", - dss_get_generic_clk_source_name(lcd_clk_src), - dss_feat_get_clk_source_name(lcd_clk_src)); - - dispc_mgr_get_lcd_divisor(OMAP_DSS_CHANNEL_LCD, &lcd, &pcd); - - seq_printf(s, "lck\t\t%-16lulck div\t%u\n", - dispc_mgr_lclk_rate(OMAP_DSS_CHANNEL_LCD), lcd); - seq_printf(s, "pck\t\t%-16lupck div\t%u\n", - dispc_mgr_pclk_rate(OMAP_DSS_CHANNEL_LCD), pcd); - if (dss_has_feature(FEAT_MGR_LCD2)) { - seq_printf(s, "- LCD2 -\n"); - - lcd_clk_src = dss_get_lcd_clk_source(OMAP_DSS_CHANNEL_LCD2); - - seq_printf(s, "lcd2_clk source = %s (%s)\n", - dss_get_generic_clk_source_name(lcd_clk_src), - dss_feat_get_clk_source_name(lcd_clk_src)); - - dispc_mgr_get_lcd_divisor(OMAP_DSS_CHANNEL_LCD2, &lcd, &pcd); - - seq_printf(s, "lck\t\t%-16lulck div\t%u\n", - dispc_mgr_lclk_rate(OMAP_DSS_CHANNEL_LCD2), lcd); - seq_printf(s, "pck\t\t%-16lupck div\t%u\n", - dispc_mgr_pclk_rate(OMAP_DSS_CHANNEL_LCD2), pcd); - } - - dispc_runtime_put(); -} - -#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS -void dispc_dump_irqs(struct seq_file *s) -{ - unsigned long flags; - struct dispc_irq_stats stats; - - spin_lock_irqsave(&dispc.irq_stats_lock, flags); - - stats = dispc.irq_stats; - memset(&dispc.irq_stats, 0, sizeof(dispc.irq_stats)); - dispc.irq_stats.last_reset = jiffies; - - spin_unlock_irqrestore(&dispc.irq_stats_lock, flags); - - seq_printf(s, "period %u ms\n", - jiffies_to_msecs(jiffies - stats.last_reset)); - - seq_printf(s, "irqs %d\n", stats.irq_count); -#define PIS(x) \ - seq_printf(s, "%-20s %10d\n", #x, stats.irqs[ffs(DISPC_IRQ_##x)-1]); - - PIS(FRAMEDONE); - PIS(VSYNC); - PIS(EVSYNC_EVEN); - PIS(EVSYNC_ODD); - PIS(ACBIAS_COUNT_STAT); - PIS(PROG_LINE_NUM); - PIS(GFX_FIFO_UNDERFLOW); - PIS(GFX_END_WIN); - PIS(PAL_GAMMA_MASK); - PIS(OCP_ERR); - PIS(VID1_FIFO_UNDERFLOW); - PIS(VID1_END_WIN); - PIS(VID2_FIFO_UNDERFLOW); - PIS(VID2_END_WIN); - if (dss_feat_get_num_ovls() > 3) { - PIS(VID3_FIFO_UNDERFLOW); - PIS(VID3_END_WIN); - } - PIS(SYNC_LOST); - PIS(SYNC_LOST_DIGIT); - PIS(WAKEUP); - if (dss_has_feature(FEAT_MGR_LCD2)) { - PIS(FRAMEDONE2); - PIS(VSYNC2); - PIS(ACBIAS_COUNT_STAT2); - PIS(SYNC_LOST2); - } -#undef PIS -} -#endif - -void dispc_dump_regs(struct seq_file *s) -{ - int i, j; - const char *mgr_names[] = { - [OMAP_DSS_CHANNEL_LCD] = "LCD", - [OMAP_DSS_CHANNEL_DIGIT] = "TV", - [OMAP_DSS_CHANNEL_LCD2] = "LCD2", - }; - const char *ovl_names[] = { - [OMAP_DSS_GFX] = "GFX", - [OMAP_DSS_VIDEO1] = "VID1", - [OMAP_DSS_VIDEO2] = "VID2", - [OMAP_DSS_VIDEO3] = "VID3", - }; - const char **p_names; - -#define DUMPREG(r) seq_printf(s, "%-50s %08x\n", #r, dispc_read_reg(r)) - - if (dispc_runtime_get()) - return; - - /* DISPC common registers */ - DUMPREG(DISPC_REVISION); - DUMPREG(DISPC_SYSCONFIG); - DUMPREG(DISPC_SYSSTATUS); - DUMPREG(DISPC_IRQSTATUS); - DUMPREG(DISPC_IRQENABLE); - DUMPREG(DISPC_CONTROL); - DUMPREG(DISPC_CONFIG); - DUMPREG(DISPC_CAPABLE); - DUMPREG(DISPC_LINE_STATUS); - DUMPREG(DISPC_LINE_NUMBER); - if (dss_has_feature(FEAT_ALPHA_FIXED_ZORDER) || - dss_has_feature(FEAT_ALPHA_FREE_ZORDER)) - DUMPREG(DISPC_GLOBAL_ALPHA); - if (dss_has_feature(FEAT_MGR_LCD2)) { - DUMPREG(DISPC_CONTROL2); - DUMPREG(DISPC_CONFIG2); - } - -#undef DUMPREG - -#define DISPC_REG(i, name) name(i) -#define DUMPREG(i, r) seq_printf(s, "%s(%s)%*s %08x\n", #r, p_names[i], \ - 48 - strlen(#r) - strlen(p_names[i]), " ", \ - dispc_read_reg(DISPC_REG(i, r))) - - p_names = mgr_names; - - /* DISPC channel specific registers */ - for (i = 0; i < dss_feat_get_num_mgrs(); i++) { - DUMPREG(i, DISPC_DEFAULT_COLOR); - DUMPREG(i, DISPC_TRANS_COLOR); - DUMPREG(i, DISPC_SIZE_MGR); - - if (i == OMAP_DSS_CHANNEL_DIGIT) - continue; - - DUMPREG(i, DISPC_DEFAULT_COLOR); - DUMPREG(i, DISPC_TRANS_COLOR); - DUMPREG(i, DISPC_TIMING_H); - DUMPREG(i, DISPC_TIMING_V); - DUMPREG(i, DISPC_POL_FREQ); - DUMPREG(i, DISPC_DIVISORo); - DUMPREG(i, DISPC_SIZE_MGR); - - DUMPREG(i, DISPC_DATA_CYCLE1); - DUMPREG(i, DISPC_DATA_CYCLE2); - DUMPREG(i, DISPC_DATA_CYCLE3); - - if (dss_has_feature(FEAT_CPR)) { - DUMPREG(i, DISPC_CPR_COEF_R); - DUMPREG(i, DISPC_CPR_COEF_G); - DUMPREG(i, DISPC_CPR_COEF_B); - } - } - - p_names = ovl_names; - - for (i = 0; i < dss_feat_get_num_ovls(); i++) { - DUMPREG(i, DISPC_OVL_BA0); - DUMPREG(i, DISPC_OVL_BA1); - DUMPREG(i, DISPC_OVL_POSITION); - DUMPREG(i, DISPC_OVL_SIZE); - DUMPREG(i, DISPC_OVL_ATTRIBUTES); - DUMPREG(i, DISPC_OVL_FIFO_THRESHOLD); - DUMPREG(i, DISPC_OVL_FIFO_SIZE_STATUS); - DUMPREG(i, DISPC_OVL_ROW_INC); - DUMPREG(i, DISPC_OVL_PIXEL_INC); - if (dss_has_feature(FEAT_PRELOAD)) - DUMPREG(i, DISPC_OVL_PRELOAD); - - if (i == OMAP_DSS_GFX) { - DUMPREG(i, DISPC_OVL_WINDOW_SKIP); - DUMPREG(i, DISPC_OVL_TABLE_BA); - continue; - } - - DUMPREG(i, DISPC_OVL_FIR); - DUMPREG(i, DISPC_OVL_PICTURE_SIZE); - DUMPREG(i, DISPC_OVL_ACCU0); - DUMPREG(i, DISPC_OVL_ACCU1); - if (dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) { - DUMPREG(i, DISPC_OVL_BA0_UV); - DUMPREG(i, DISPC_OVL_BA1_UV); - DUMPREG(i, DISPC_OVL_FIR2); - DUMPREG(i, DISPC_OVL_ACCU2_0); - DUMPREG(i, DISPC_OVL_ACCU2_1); - } - if (dss_has_feature(FEAT_ATTR2)) - DUMPREG(i, DISPC_OVL_ATTRIBUTES2); - if (dss_has_feature(FEAT_PRELOAD)) - DUMPREG(i, DISPC_OVL_PRELOAD); - } - -#undef DISPC_REG -#undef DUMPREG - -#define DISPC_REG(plane, name, i) name(plane, i) -#define DUMPREG(plane, name, i) \ - seq_printf(s, "%s_%d(%s)%*s %08x\n", #name, i, p_names[plane], \ - 46 - strlen(#name) - strlen(p_names[plane]), " ", \ - dispc_read_reg(DISPC_REG(plane, name, i))) - - /* Video pipeline coefficient registers */ - - /* start from OMAP_DSS_VIDEO1 */ - for (i = 1; i < dss_feat_get_num_ovls(); i++) { - for (j = 0; j < 8; j++) - DUMPREG(i, DISPC_OVL_FIR_COEF_H, j); - - for (j = 0; j < 8; j++) - DUMPREG(i, DISPC_OVL_FIR_COEF_HV, j); - - for (j = 0; j < 5; j++) - DUMPREG(i, DISPC_OVL_CONV_COEF, j); - - if (dss_has_feature(FEAT_FIR_COEF_V)) { - for (j = 0; j < 8; j++) - DUMPREG(i, DISPC_OVL_FIR_COEF_V, j); - } - - if (dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) { - for (j = 0; j < 8; j++) - DUMPREG(i, DISPC_OVL_FIR_COEF_H2, j); - - for (j = 0; j < 8; j++) - DUMPREG(i, DISPC_OVL_FIR_COEF_HV2, j); - - for (j = 0; j < 8; j++) - DUMPREG(i, DISPC_OVL_FIR_COEF_V2, j); - } - } - - dispc_runtime_put(); - -#undef DISPC_REG -#undef DUMPREG -} - -static void _dispc_mgr_set_pol_freq(enum omap_channel channel, bool onoff, - bool rf, bool ieo, bool ipc, bool ihs, bool ivs, u8 acbi, - u8 acb) -{ - u32 l = 0; - - DSSDBG("onoff %d rf %d ieo %d ipc %d ihs %d ivs %d acbi %d acb %d\n", - onoff, rf, ieo, ipc, ihs, ivs, acbi, acb); - - l |= FLD_VAL(onoff, 17, 17); - l |= FLD_VAL(rf, 16, 16); - l |= FLD_VAL(ieo, 15, 15); - l |= FLD_VAL(ipc, 14, 14); - l |= FLD_VAL(ihs, 13, 13); - l |= FLD_VAL(ivs, 12, 12); - l |= FLD_VAL(acbi, 11, 8); - l |= FLD_VAL(acb, 7, 0); - - dispc_write_reg(DISPC_POL_FREQ(channel), l); -} - -void dispc_mgr_set_pol_freq(enum omap_channel channel, - enum omap_panel_config config, u8 acbi, u8 acb) -{ - _dispc_mgr_set_pol_freq(channel, (config & OMAP_DSS_LCD_ONOFF) != 0, - (config & OMAP_DSS_LCD_RF) != 0, - (config & OMAP_DSS_LCD_IEO) != 0, - (config & OMAP_DSS_LCD_IPC) != 0, - (config & OMAP_DSS_LCD_IHS) != 0, - (config & OMAP_DSS_LCD_IVS) != 0, - acbi, acb); -} - -/* with fck as input clock rate, find dispc dividers that produce req_pck */ -void dispc_find_clk_divs(bool is_tft, unsigned long req_pck, unsigned long fck, - struct dispc_clock_info *cinfo) -{ - u16 pcd_min, pcd_max; - unsigned long best_pck; - u16 best_ld, cur_ld; - u16 best_pd, cur_pd; - - pcd_min = dss_feat_get_param_min(FEAT_PARAM_DSS_PCD); - pcd_max = dss_feat_get_param_max(FEAT_PARAM_DSS_PCD); - - if (!is_tft) - pcd_min = 3; - - best_pck = 0; - best_ld = 0; - best_pd = 0; - - for (cur_ld = 1; cur_ld <= 255; ++cur_ld) { - unsigned long lck = fck / cur_ld; - - for (cur_pd = pcd_min; cur_pd <= pcd_max; ++cur_pd) { - unsigned long pck = lck / cur_pd; - long old_delta = abs(best_pck - req_pck); - long new_delta = abs(pck - req_pck); - - if (best_pck == 0 || new_delta < old_delta) { - best_pck = pck; - best_ld = cur_ld; - best_pd = cur_pd; - - if (pck == req_pck) - goto found; - } - - if (pck < req_pck) - break; - } - - if (lck / pcd_min < req_pck) - break; - } - -found: - cinfo->lck_div = best_ld; - cinfo->pck_div = best_pd; - cinfo->lck = fck / cinfo->lck_div; - cinfo->pck = cinfo->lck / cinfo->pck_div; -} - -/* calculate clock rates using dividers in cinfo */ -int dispc_calc_clock_rates(unsigned long dispc_fclk_rate, - struct dispc_clock_info *cinfo) -{ - if (cinfo->lck_div > 255 || cinfo->lck_div == 0) - return -EINVAL; - if (cinfo->pck_div < 1 || cinfo->pck_div > 255) - return -EINVAL; - - cinfo->lck = dispc_fclk_rate / cinfo->lck_div; - cinfo->pck = cinfo->lck / cinfo->pck_div; - - return 0; -} - -int dispc_mgr_set_clock_div(enum omap_channel channel, - struct dispc_clock_info *cinfo) -{ - DSSDBG("lck = %lu (%u)\n", cinfo->lck, cinfo->lck_div); - DSSDBG("pck = %lu (%u)\n", cinfo->pck, cinfo->pck_div); - - dispc_mgr_set_lcd_divisor(channel, cinfo->lck_div, cinfo->pck_div); - - return 0; -} - -int dispc_mgr_get_clock_div(enum omap_channel channel, - struct dispc_clock_info *cinfo) -{ - unsigned long fck; - - fck = dispc_fclk_rate(); - - cinfo->lck_div = REG_GET(DISPC_DIVISORo(channel), 23, 16); - cinfo->pck_div = REG_GET(DISPC_DIVISORo(channel), 7, 0); - - cinfo->lck = fck / cinfo->lck_div; - cinfo->pck = cinfo->lck / cinfo->pck_div; - - return 0; -} - -/* dispc.irq_lock has to be locked by the caller */ -static void _omap_dispc_set_irqs(void) -{ - u32 mask; - u32 old_mask; - int i; - struct omap_dispc_isr_data *isr_data; - - mask = dispc.irq_error_mask; - - for (i = 0; i < DISPC_MAX_NR_ISRS; i++) { - isr_data = &dispc.registered_isr[i]; - - if (isr_data->isr == NULL) - continue; - - mask |= isr_data->mask; - } - - old_mask = dispc_read_reg(DISPC_IRQENABLE); - /* clear the irqstatus for newly enabled irqs */ - dispc_write_reg(DISPC_IRQSTATUS, (mask ^ old_mask) & mask); - - dispc_write_reg(DISPC_IRQENABLE, mask); -} - -int omap_dispc_register_isr(omap_dispc_isr_t isr, void *arg, u32 mask) -{ - int i; - int ret; - unsigned long flags; - struct omap_dispc_isr_data *isr_data; - - if (isr == NULL) - return -EINVAL; - - spin_lock_irqsave(&dispc.irq_lock, flags); - - /* check for duplicate entry */ - for (i = 0; i < DISPC_MAX_NR_ISRS; i++) { - isr_data = &dispc.registered_isr[i]; - if (isr_data->isr == isr && isr_data->arg == arg && - isr_data->mask == mask) { - ret = -EINVAL; - goto err; - } - } - - isr_data = NULL; - ret = -EBUSY; - - for (i = 0; i < DISPC_MAX_NR_ISRS; i++) { - isr_data = &dispc.registered_isr[i]; - - if (isr_data->isr != NULL) - continue; - - isr_data->isr = isr; - isr_data->arg = arg; - isr_data->mask = mask; - ret = 0; - - break; - } - - if (ret) - goto err; - - _omap_dispc_set_irqs(); - - spin_unlock_irqrestore(&dispc.irq_lock, flags); - - return 0; -err: - spin_unlock_irqrestore(&dispc.irq_lock, flags); - - return ret; -} -EXPORT_SYMBOL(omap_dispc_register_isr); - -int omap_dispc_unregister_isr(omap_dispc_isr_t isr, void *arg, u32 mask) -{ - int i; - unsigned long flags; - int ret = -EINVAL; - struct omap_dispc_isr_data *isr_data; - - spin_lock_irqsave(&dispc.irq_lock, flags); - - for (i = 0; i < DISPC_MAX_NR_ISRS; i++) { - isr_data = &dispc.registered_isr[i]; - if (isr_data->isr != isr || isr_data->arg != arg || - isr_data->mask != mask) - continue; - - /* found the correct isr */ - - isr_data->isr = NULL; - isr_data->arg = NULL; - isr_data->mask = 0; - - ret = 0; - break; - } - - if (ret == 0) - _omap_dispc_set_irqs(); - - spin_unlock_irqrestore(&dispc.irq_lock, flags); - - return ret; -} -EXPORT_SYMBOL(omap_dispc_unregister_isr); - -#ifdef DEBUG -static void print_irq_status(u32 status) -{ - if ((status & dispc.irq_error_mask) == 0) - return; - - printk(KERN_DEBUG "DISPC IRQ: 0x%x: ", status); - -#define PIS(x) \ - if (status & DISPC_IRQ_##x) \ - printk(#x " "); - PIS(GFX_FIFO_UNDERFLOW); - PIS(OCP_ERR); - PIS(VID1_FIFO_UNDERFLOW); - PIS(VID2_FIFO_UNDERFLOW); - if (dss_feat_get_num_ovls() > 3) - PIS(VID3_FIFO_UNDERFLOW); - PIS(SYNC_LOST); - PIS(SYNC_LOST_DIGIT); - if (dss_has_feature(FEAT_MGR_LCD2)) - PIS(SYNC_LOST2); -#undef PIS - - printk("\n"); -} -#endif - -/* Called from dss.c. Note that we don't touch clocks here, - * but we presume they are on because we got an IRQ. However, - * an irq handler may turn the clocks off, so we may not have - * clock later in the function. */ -static irqreturn_t omap_dispc_irq_handler(int irq, void *arg) -{ - int i; - u32 irqstatus, irqenable; - u32 handledirqs = 0; - u32 unhandled_errors; - struct omap_dispc_isr_data *isr_data; - struct omap_dispc_isr_data registered_isr[DISPC_MAX_NR_ISRS]; - - spin_lock(&dispc.irq_lock); - - irqstatus = dispc_read_reg(DISPC_IRQSTATUS); - irqenable = dispc_read_reg(DISPC_IRQENABLE); - - /* IRQ is not for us */ - if (!(irqstatus & irqenable)) { - spin_unlock(&dispc.irq_lock); - return IRQ_NONE; - } - -#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS - spin_lock(&dispc.irq_stats_lock); - dispc.irq_stats.irq_count++; - dss_collect_irq_stats(irqstatus, dispc.irq_stats.irqs); - spin_unlock(&dispc.irq_stats_lock); -#endif - -#ifdef DEBUG - if (dss_debug) - print_irq_status(irqstatus); -#endif - /* Ack the interrupt. Do it here before clocks are possibly turned - * off */ - dispc_write_reg(DISPC_IRQSTATUS, irqstatus); - /* flush posted write */ - dispc_read_reg(DISPC_IRQSTATUS); - - /* make a copy and unlock, so that isrs can unregister - * themselves */ - memcpy(registered_isr, dispc.registered_isr, - sizeof(registered_isr)); - - spin_unlock(&dispc.irq_lock); - - for (i = 0; i < DISPC_MAX_NR_ISRS; i++) { - isr_data = ®istered_isr[i]; - - if (!isr_data->isr) - continue; - - if (isr_data->mask & irqstatus) { - isr_data->isr(isr_data->arg, irqstatus); - handledirqs |= isr_data->mask; - } - } - - spin_lock(&dispc.irq_lock); - - unhandled_errors = irqstatus & ~handledirqs & dispc.irq_error_mask; - - if (unhandled_errors) { - dispc.error_irqs |= unhandled_errors; - - dispc.irq_error_mask &= ~unhandled_errors; - _omap_dispc_set_irqs(); - - schedule_work(&dispc.error_work); - } - - spin_unlock(&dispc.irq_lock); - - return IRQ_HANDLED; -} - -static void dispc_error_worker(struct work_struct *work) -{ - int i; - u32 errors; - unsigned long flags; - static const unsigned fifo_underflow_bits[] = { - DISPC_IRQ_GFX_FIFO_UNDERFLOW, - DISPC_IRQ_VID1_FIFO_UNDERFLOW, - DISPC_IRQ_VID2_FIFO_UNDERFLOW, - DISPC_IRQ_VID3_FIFO_UNDERFLOW, - }; - - static const unsigned sync_lost_bits[] = { - DISPC_IRQ_SYNC_LOST, - DISPC_IRQ_SYNC_LOST_DIGIT, - DISPC_IRQ_SYNC_LOST2, - }; - - spin_lock_irqsave(&dispc.irq_lock, flags); - errors = dispc.error_irqs; - dispc.error_irqs = 0; - spin_unlock_irqrestore(&dispc.irq_lock, flags); - - dispc_runtime_get(); - - for (i = 0; i < omap_dss_get_num_overlays(); ++i) { - struct omap_overlay *ovl; - unsigned bit; - - ovl = omap_dss_get_overlay(i); - bit = fifo_underflow_bits[i]; - - if (bit & errors) { - DSSERR("FIFO UNDERFLOW on %s, disabling the overlay\n", - ovl->name); - dispc_ovl_enable(ovl->id, false); - dispc_mgr_go(ovl->manager->id); - mdelay(50); - } - } - - for (i = 0; i < omap_dss_get_num_overlay_managers(); ++i) { - struct omap_overlay_manager *mgr; - unsigned bit; - - mgr = omap_dss_get_overlay_manager(i); - bit = sync_lost_bits[i]; - - if (bit & errors) { - struct omap_dss_device *dssdev = mgr->device; - bool enable; - - DSSERR("SYNC_LOST on channel %s, restarting the output " - "with video overlays disabled\n", - mgr->name); - - enable = dssdev->state == OMAP_DSS_DISPLAY_ACTIVE; - dssdev->driver->disable(dssdev); - - for (i = 0; i < omap_dss_get_num_overlays(); ++i) { - struct omap_overlay *ovl; - ovl = omap_dss_get_overlay(i); - - if (ovl->id != OMAP_DSS_GFX && - ovl->manager == mgr) - dispc_ovl_enable(ovl->id, false); - } - - dispc_mgr_go(mgr->id); - mdelay(50); - - if (enable) - dssdev->driver->enable(dssdev); - } - } - - if (errors & DISPC_IRQ_OCP_ERR) { - DSSERR("OCP_ERR\n"); - for (i = 0; i < omap_dss_get_num_overlay_managers(); ++i) { - struct omap_overlay_manager *mgr; - mgr = omap_dss_get_overlay_manager(i); - if (mgr->device && mgr->device->driver) - mgr->device->driver->disable(mgr->device); - } - } - - spin_lock_irqsave(&dispc.irq_lock, flags); - dispc.irq_error_mask |= errors; - _omap_dispc_set_irqs(); - spin_unlock_irqrestore(&dispc.irq_lock, flags); - - dispc_runtime_put(); -} - -int omap_dispc_wait_for_irq_timeout(u32 irqmask, unsigned long timeout) -{ - void dispc_irq_wait_handler(void *data, u32 mask) - { - complete((struct completion *)data); - } - - int r; - DECLARE_COMPLETION_ONSTACK(completion); - - r = omap_dispc_register_isr(dispc_irq_wait_handler, &completion, - irqmask); - - if (r) - return r; - - timeout = wait_for_completion_timeout(&completion, timeout); - - omap_dispc_unregister_isr(dispc_irq_wait_handler, &completion, irqmask); - - if (timeout == 0) - return -ETIMEDOUT; - - if (timeout == -ERESTARTSYS) - return -ERESTARTSYS; - - return 0; -} - -int omap_dispc_wait_for_irq_interruptible_timeout(u32 irqmask, - unsigned long timeout) -{ - void dispc_irq_wait_handler(void *data, u32 mask) - { - complete((struct completion *)data); - } - - int r; - DECLARE_COMPLETION_ONSTACK(completion); - - r = omap_dispc_register_isr(dispc_irq_wait_handler, &completion, - irqmask); - - if (r) - return r; - - timeout = wait_for_completion_interruptible_timeout(&completion, - timeout); - - omap_dispc_unregister_isr(dispc_irq_wait_handler, &completion, irqmask); - - if (timeout == 0) - return -ETIMEDOUT; - - if (timeout == -ERESTARTSYS) - return -ERESTARTSYS; - - return 0; -} - -#ifdef CONFIG_OMAP2_DSS_FAKE_VSYNC -void dispc_fake_vsync_irq(void) -{ - u32 irqstatus = DISPC_IRQ_VSYNC; - int i; - - WARN_ON(!in_interrupt()); - - for (i = 0; i < DISPC_MAX_NR_ISRS; i++) { - struct omap_dispc_isr_data *isr_data; - isr_data = &dispc.registered_isr[i]; - - if (!isr_data->isr) - continue; - - if (isr_data->mask & irqstatus) - isr_data->isr(isr_data->arg, irqstatus); - } -} -#endif - -static void _omap_dispc_initialize_irq(void) -{ - unsigned long flags; - - spin_lock_irqsave(&dispc.irq_lock, flags); - - memset(dispc.registered_isr, 0, sizeof(dispc.registered_isr)); - - dispc.irq_error_mask = DISPC_IRQ_MASK_ERROR; - if (dss_has_feature(FEAT_MGR_LCD2)) - dispc.irq_error_mask |= DISPC_IRQ_SYNC_LOST2; - if (dss_feat_get_num_ovls() > 3) - dispc.irq_error_mask |= DISPC_IRQ_VID3_FIFO_UNDERFLOW; - - /* there's SYNC_LOST_DIGIT waiting after enabling the DSS, - * so clear it */ - dispc_write_reg(DISPC_IRQSTATUS, dispc_read_reg(DISPC_IRQSTATUS)); - - _omap_dispc_set_irqs(); - - spin_unlock_irqrestore(&dispc.irq_lock, flags); -} - -void dispc_enable_sidle(void) -{ - REG_FLD_MOD(DISPC_SYSCONFIG, 2, 4, 3); /* SIDLEMODE: smart idle */ -} - -void dispc_disable_sidle(void) -{ - REG_FLD_MOD(DISPC_SYSCONFIG, 1, 4, 3); /* SIDLEMODE: no idle */ -} - -static void _omap_dispc_initial_config(void) -{ - u32 l; - - /* Exclusively enable DISPC_CORE_CLK and set divider to 1 */ - if (dss_has_feature(FEAT_CORE_CLK_DIV)) { - l = dispc_read_reg(DISPC_DIVISOR); - /* Use DISPC_DIVISOR.LCD, instead of DISPC_DIVISOR1.LCD */ - l = FLD_MOD(l, 1, 0, 0); - l = FLD_MOD(l, 1, 23, 16); - dispc_write_reg(DISPC_DIVISOR, l); - } - - /* FUNCGATED */ - if (dss_has_feature(FEAT_FUNCGATED)) - REG_FLD_MOD(DISPC_CONFIG, 1, 9, 9); - - /* L3 firewall setting: enable access to OCM RAM */ - /* XXX this should be somewhere in plat-omap */ - if (cpu_is_omap24xx()) - __raw_writel(0x402000b0, OMAP2_L3_IO_ADDRESS(0x680050a0)); - - _dispc_setup_color_conv_coef(); - - dispc_set_loadmode(OMAP_DSS_LOAD_FRAME_ONLY); - - dispc_read_plane_fifo_sizes(); - - dispc_configure_burst_sizes(); - - dispc_ovl_enable_zorder_planes(); -} - -/* DISPC HW IP initialisation */ -static int omap_dispchw_probe(struct platform_device *pdev) -{ - u32 rev; - int r = 0; - struct resource *dispc_mem; - struct clk *clk; - - dispc.pdev = pdev; - - clk = clk_get(&pdev->dev, "fck"); - if (IS_ERR(clk)) { - DSSERR("can't get fck\n"); - r = PTR_ERR(clk); - goto err_get_clk; - } - - dispc.dss_clk = clk; - - spin_lock_init(&dispc.irq_lock); - -#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS - spin_lock_init(&dispc.irq_stats_lock); - dispc.irq_stats.last_reset = jiffies; -#endif - - INIT_WORK(&dispc.error_work, dispc_error_worker); - - dispc_mem = platform_get_resource(dispc.pdev, IORESOURCE_MEM, 0); - if (!dispc_mem) { - DSSERR("can't get IORESOURCE_MEM DISPC\n"); - r = -EINVAL; - goto err_ioremap; - } - dispc.base = ioremap(dispc_mem->start, resource_size(dispc_mem)); - if (!dispc.base) { - DSSERR("can't ioremap DISPC\n"); - r = -ENOMEM; - goto err_ioremap; - } - dispc.irq = platform_get_irq(dispc.pdev, 0); - if (dispc.irq < 0) { - DSSERR("platform_get_irq failed\n"); - r = -ENODEV; - goto err_irq; - } - - r = request_irq(dispc.irq, omap_dispc_irq_handler, IRQF_SHARED, - "OMAP DISPC", dispc.pdev); - if (r < 0) { - DSSERR("request_irq failed\n"); - goto err_irq; - } - - pm_runtime_enable(&pdev->dev); - - r = dispc_runtime_get(); - if (r) - goto err_runtime_get; - - _omap_dispc_initial_config(); - - _omap_dispc_initialize_irq(); - - rev = dispc_read_reg(DISPC_REVISION); - dev_dbg(&pdev->dev, "OMAP DISPC rev %d.%d\n", - FLD_GET(rev, 7, 4), FLD_GET(rev, 3, 0)); - - dispc_runtime_put(); - - return 0; - -err_runtime_get: - pm_runtime_disable(&pdev->dev); - free_irq(dispc.irq, dispc.pdev); -err_irq: - iounmap(dispc.base); -err_ioremap: - clk_put(dispc.dss_clk); -err_get_clk: - return r; -} - -static int omap_dispchw_remove(struct platform_device *pdev) -{ - pm_runtime_disable(&pdev->dev); - - clk_put(dispc.dss_clk); - - free_irq(dispc.irq, dispc.pdev); - iounmap(dispc.base); - return 0; -} - -static int dispc_runtime_suspend(struct device *dev) -{ - dispc_save_context(); - dss_runtime_put(); - - return 0; -} - -static int dispc_runtime_resume(struct device *dev) -{ - int r; - - r = dss_runtime_get(); - if (r < 0) - return r; - - dispc_restore_context(); - - return 0; -} - -static const struct dev_pm_ops dispc_pm_ops = { - .runtime_suspend = dispc_runtime_suspend, - .runtime_resume = dispc_runtime_resume, -}; - -static struct platform_driver omap_dispchw_driver = { - .probe = omap_dispchw_probe, - .remove = omap_dispchw_remove, - .driver = { - .name = "omapdss_dispc", - .owner = THIS_MODULE, - .pm = &dispc_pm_ops, - }, -}; - -int dispc_init_platform_driver(void) -{ - return platform_driver_register(&omap_dispchw_driver); -} - -void dispc_uninit_platform_driver(void) -{ - return platform_driver_unregister(&omap_dispchw_driver); -} diff --git a/drivers/video/omap2/dss/dispc.h b/drivers/video/omap2/dss/dispc.h deleted file mode 100644 index 5836bd1650f..00000000000 --- a/drivers/video/omap2/dss/dispc.h +++ /dev/null @@ -1,759 +0,0 @@ -/* - * linux/drivers/video/omap2/dss/dispc.h - * - * Copyright (C) 2011 Texas Instruments - * Author: Archit Taneja <archit@ti.com> - * - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program. If not, see <http://www.gnu.org/licenses/>. - */ - -#ifndef __OMAP2_DISPC_REG_H -#define __OMAP2_DISPC_REG_H - -/* DISPC common registers */ -#define DISPC_REVISION 0x0000 -#define DISPC_SYSCONFIG 0x0010 -#define DISPC_SYSSTATUS 0x0014 -#define DISPC_IRQSTATUS 0x0018 -#define DISPC_IRQENABLE 0x001C -#define DISPC_CONTROL 0x0040 -#define DISPC_CONFIG 0x0044 -#define DISPC_CAPABLE 0x0048 -#define DISPC_LINE_STATUS 0x005C -#define DISPC_LINE_NUMBER 0x0060 -#define DISPC_GLOBAL_ALPHA 0x0074 -#define DISPC_CONTROL2 0x0238 -#define DISPC_CONFIG2 0x0620 -#define DISPC_DIVISOR 0x0804 - -/* DISPC overlay registers */ -#define DISPC_OVL_BA0(n) (DISPC_OVL_BASE(n) + \ - DISPC_BA0_OFFSET(n)) -#define DISPC_OVL_BA1(n) (DISPC_OVL_BASE(n) + \ - DISPC_BA1_OFFSET(n)) -#define DISPC_OVL_BA0_UV(n) (DISPC_OVL_BASE(n) + \ - DISPC_BA0_UV_OFFSET(n)) -#define DISPC_OVL_BA1_UV(n) (DISPC_OVL_BASE(n) + \ - DISPC_BA1_UV_OFFSET(n)) -#define DISPC_OVL_POSITION(n) (DISPC_OVL_BASE(n) + \ - DISPC_POS_OFFSET(n)) -#define DISPC_OVL_SIZE(n) (DISPC_OVL_BASE(n) + \ - DISPC_SIZE_OFFSET(n)) -#define DISPC_OVL_ATTRIBUTES(n) (DISPC_OVL_BASE(n) + \ - DISPC_ATTR_OFFSET(n)) -#define DISPC_OVL_ATTRIBUTES2(n) (DISPC_OVL_BASE(n) + \ - DISPC_ATTR2_OFFSET(n)) -#define DISPC_OVL_FIFO_THRESHOLD(n) (DISPC_OVL_BASE(n) + \ - DISPC_FIFO_THRESH_OFFSET(n)) -#define DISPC_OVL_FIFO_SIZE_STATUS(n) (DISPC_OVL_BASE(n) + \ - DISPC_FIFO_SIZE_STATUS_OFFSET(n)) -#define DISPC_OVL_ROW_INC(n) (DISPC_OVL_BASE(n) + \ - DISPC_ROW_INC_OFFSET(n)) -#define DISPC_OVL_PIXEL_INC(n) (DISPC_OVL_BASE(n) + \ - DISPC_PIX_INC_OFFSET(n)) -#define DISPC_OVL_WINDOW_SKIP(n) (DISPC_OVL_BASE(n) + \ - DISPC_WINDOW_SKIP_OFFSET(n)) -#define DISPC_OVL_TABLE_BA(n) (DISPC_OVL_BASE(n) + \ - DISPC_TABLE_BA_OFFSET(n)) -#define DISPC_OVL_FIR(n) (DISPC_OVL_BASE(n) + \ - DISPC_FIR_OFFSET(n)) -#define DISPC_OVL_FIR2(n) (DISPC_OVL_BASE(n) + \ - DISPC_FIR2_OFFSET(n)) -#define DISPC_OVL_PICTURE_SIZE(n) (DISPC_OVL_BASE(n) + \ - DISPC_PIC_SIZE_OFFSET(n)) -#define DISPC_OVL_ACCU0(n) (DISPC_OVL_BASE(n) + \ - DISPC_ACCU0_OFFSET(n)) -#define DISPC_OVL_ACCU1(n) (DISPC_OVL_BASE(n) + \ - DISPC_ACCU1_OFFSET(n)) -#define DISPC_OVL_ACCU2_0(n) (DISPC_OVL_BASE(n) + \ - DISPC_ACCU2_0_OFFSET(n)) -#define DISPC_OVL_ACCU2_1(n) (DISPC_OVL_BASE(n) + \ - DISPC_ACCU2_1_OFFSET(n)) -#define DISPC_OVL_FIR_COEF_H(n, i) (DISPC_OVL_BASE(n) + \ - DISPC_FIR_COEF_H_OFFSET(n, i)) -#define DISPC_OVL_FIR_COEF_HV(n, i) (DISPC_OVL_BASE(n) + \ - DISPC_FIR_COEF_HV_OFFSET(n, i)) -#define DISPC_OVL_FIR_COEF_H2(n, i) (DISPC_OVL_BASE(n) + \ - DISPC_FIR_COEF_H2_OFFSET(n, i)) -#define DISPC_OVL_FIR_COEF_HV2(n, i) (DISPC_OVL_BASE(n) + \ - DISPC_FIR_COEF_HV2_OFFSET(n, i)) -#define DISPC_OVL_CONV_COEF(n, i) (DISPC_OVL_BASE(n) + \ - DISPC_CONV_COEF_OFFSET(n, i)) -#define DISPC_OVL_FIR_COEF_V(n, i) (DISPC_OVL_BASE(n) + \ - DISPC_FIR_COEF_V_OFFSET(n, i)) -#define DISPC_OVL_FIR_COEF_V2(n, i) (DISPC_OVL_BASE(n) + \ - DISPC_FIR_COEF_V2_OFFSET(n, i)) -#define DISPC_OVL_PRELOAD(n) (DISPC_OVL_BASE(n) + \ - DISPC_PRELOAD_OFFSET(n)) - -/* DISPC up/downsampling FIR filter coefficient structure */ -struct dispc_coef { - s8 hc4_vc22; - s8 hc3_vc2; - u8 hc2_vc1; - s8 hc1_vc0; - s8 hc0_vc00; -}; - -const struct dispc_coef *dispc_ovl_get_scale_coef(int inc, int five_taps); - -/* DISPC manager/channel specific registers */ -static inline u16 DISPC_DEFAULT_COLOR(enum omap_channel channel) -{ - switch (channel) { - case OMAP_DSS_CHANNEL_LCD: - return 0x004C; - case OMAP_DSS_CHANNEL_DIGIT: - return 0x0050; - case OMAP_DSS_CHANNEL_LCD2: - return 0x03AC; - default: - BUG(); - } -} - -static inline u16 DISPC_TRANS_COLOR(enum omap_channel channel) -{ - switch (channel) { - case OMAP_DSS_CHANNEL_LCD: - return 0x0054; - case OMAP_DSS_CHANNEL_DIGIT: - return 0x0058; - case OMAP_DSS_CHANNEL_LCD2: - return 0x03B0; - default: - BUG(); - } -} - -static inline u16 DISPC_TIMING_H(enum omap_channel channel) -{ - switch (channel) { - case OMAP_DSS_CHANNEL_LCD: - return 0x0064; - case OMAP_DSS_CHANNEL_DIGIT: - BUG(); - case OMAP_DSS_CHANNEL_LCD2: - return 0x0400; - default: - BUG(); - } -} - -static inline u16 DISPC_TIMING_V(enum omap_channel channel) -{ - switch (channel) { - case OMAP_DSS_CHANNEL_LCD: - return 0x0068; - case OMAP_DSS_CHANNEL_DIGIT: - BUG(); - case OMAP_DSS_CHANNEL_LCD2: - return 0x0404; - default: - BUG(); - } -} - -static inline u16 DISPC_POL_FREQ(enum omap_channel channel) -{ - switch (channel) { - case OMAP_DSS_CHANNEL_LCD: - return 0x006C; - case OMAP_DSS_CHANNEL_DIGIT: - BUG(); - case OMAP_DSS_CHANNEL_LCD2: - return 0x0408; - default: - BUG(); - } -} - -static inline u16 DISPC_DIVISORo(enum omap_channel channel) -{ - switch (channel) { - case OMAP_DSS_CHANNEL_LCD: - return 0x0070; - case OMAP_DSS_CHANNEL_DIGIT: - BUG(); - case OMAP_DSS_CHANNEL_LCD2: - return 0x040C; - default: - BUG(); - } -} - -/* Named as DISPC_SIZE_LCD, DISPC_SIZE_DIGIT and DISPC_SIZE_LCD2 in TRM */ -static inline u16 DISPC_SIZE_MGR(enum omap_channel channel) -{ - switch (channel) { - case OMAP_DSS_CHANNEL_LCD: - return 0x007C; - case OMAP_DSS_CHANNEL_DIGIT: - return 0x0078; - case OMAP_DSS_CHANNEL_LCD2: - return 0x03CC; - default: - BUG(); - } -} - -static inline u16 DISPC_DATA_CYCLE1(enum omap_channel channel) -{ - switch (channel) { - case OMAP_DSS_CHANNEL_LCD: - return 0x01D4; - case OMAP_DSS_CHANNEL_DIGIT: - BUG(); - case OMAP_DSS_CHANNEL_LCD2: - return 0x03C0; - default: - BUG(); - } -} - -static inline u16 DISPC_DATA_CYCLE2(enum omap_channel channel) -{ - switch (channel) { - case OMAP_DSS_CHANNEL_LCD: - return 0x01D8; - case OMAP_DSS_CHANNEL_DIGIT: - BUG(); - case OMAP_DSS_CHANNEL_LCD2: - return 0x03C4; - default: - BUG(); - } -} - -static inline u16 DISPC_DATA_CYCLE3(enum omap_channel channel) -{ - switch (channel) { - case OMAP_DSS_CHANNEL_LCD: - return 0x01DC; - case OMAP_DSS_CHANNEL_DIGIT: - BUG(); - case OMAP_DSS_CHANNEL_LCD2: - return 0x03C8; - default: - BUG(); - } -} - -static inline u16 DISPC_CPR_COEF_R(enum omap_channel channel) -{ - switch (channel) { - case OMAP_DSS_CHANNEL_LCD: - return 0x0220; - case OMAP_DSS_CHANNEL_DIGIT: - BUG(); - case OMAP_DSS_CHANNEL_LCD2: - return 0x03BC; - default: - BUG(); - } -} - -static inline u16 DISPC_CPR_COEF_G(enum omap_channel channel) -{ - switch (channel) { - case OMAP_DSS_CHANNEL_LCD: - return 0x0224; - case OMAP_DSS_CHANNEL_DIGIT: - BUG(); - case OMAP_DSS_CHANNEL_LCD2: - return 0x03B8; - default: - BUG(); - } -} - -static inline u16 DISPC_CPR_COEF_B(enum omap_channel channel) -{ - switch (channel) { - case OMAP_DSS_CHANNEL_LCD: - return 0x0228; - case OMAP_DSS_CHANNEL_DIGIT: - BUG(); - case OMAP_DSS_CHANNEL_LCD2: - return 0x03B4; - default: - BUG(); - } -} - -/* DISPC overlay register base addresses */ -static inline u16 DISPC_OVL_BASE(enum omap_plane plane) -{ - switch (plane) { - case OMAP_DSS_GFX: - return 0x0080; - case OMAP_DSS_VIDEO1: - return 0x00BC; - case OMAP_DSS_VIDEO2: - return 0x014C; - case OMAP_DSS_VIDEO3: - return 0x0300; - default: - BUG(); - } -} - -/* DISPC overlay register offsets */ -static inline u16 DISPC_BA0_OFFSET(enum omap_plane plane) -{ - switch (plane) { - case OMAP_DSS_GFX: - case OMAP_DSS_VIDEO1: - case OMAP_DSS_VIDEO2: - return 0x0000; - case OMAP_DSS_VIDEO3: - return 0x0008; - default: - BUG(); - } -} - -static inline u16 DISPC_BA1_OFFSET(enum omap_plane plane) -{ - switch (plane) { - case OMAP_DSS_GFX: - case OMAP_DSS_VIDEO1: - case OMAP_DSS_VIDEO2: - return 0x0004; - case OMAP_DSS_VIDEO3: - return 0x000C; - default: - BUG(); - } -} - -static inline u16 DISPC_BA0_UV_OFFSET(enum omap_plane plane) -{ - switch (plane) { - case OMAP_DSS_GFX: - BUG(); - case OMAP_DSS_VIDEO1: - return 0x0544; - case OMAP_DSS_VIDEO2: - return 0x04BC; - case OMAP_DSS_VIDEO3: - return 0x0310; - default: - BUG(); - } -} - -static inline u16 DISPC_BA1_UV_OFFSET(enum omap_plane plane) -{ - switch (plane) { - case OMAP_DSS_GFX: - BUG(); - case OMAP_DSS_VIDEO1: - return 0x0548; - case OMAP_DSS_VIDEO2: - return 0x04C0; - case OMAP_DSS_VIDEO3: - return 0x0314; - default: - BUG(); - } -} - -static inline u16 DISPC_POS_OFFSET(enum omap_plane plane) -{ - switch (plane) { - case OMAP_DSS_GFX: - case OMAP_DSS_VIDEO1: - case OMAP_DSS_VIDEO2: - return 0x0008; - case OMAP_DSS_VIDEO3: - return 0x009C; - default: - BUG(); - } -} - -static inline u16 DISPC_SIZE_OFFSET(enum omap_plane plane) -{ - switch (plane) { - case OMAP_DSS_GFX: - case OMAP_DSS_VIDEO1: - case OMAP_DSS_VIDEO2: - return 0x000C; - case OMAP_DSS_VIDEO3: - return 0x00A8; - default: - BUG(); - } -} - -static inline u16 DISPC_ATTR_OFFSET(enum omap_plane plane) -{ - switch (plane) { - case OMAP_DSS_GFX: - return 0x0020; - case OMAP_DSS_VIDEO1: - case OMAP_DSS_VIDEO2: - return 0x0010; - case OMAP_DSS_VIDEO3: - return 0x0070; - default: - BUG(); - } -} - -static inline u16 DISPC_ATTR2_OFFSET(enum omap_plane plane) -{ - switch (plane) { - case OMAP_DSS_GFX: - BUG(); - case OMAP_DSS_VIDEO1: - return 0x0568; - case OMAP_DSS_VIDEO2: - return 0x04DC; - case OMAP_DSS_VIDEO3: - return 0x032C; - default: - BUG(); - } -} - -static inline u16 DISPC_FIFO_THRESH_OFFSET(enum omap_plane plane) -{ - switch (plane) { - case OMAP_DSS_GFX: - return 0x0024; - case OMAP_DSS_VIDEO1: - case OMAP_DSS_VIDEO2: - return 0x0014; - case OMAP_DSS_VIDEO3: - return 0x008C; - default: - BUG(); - } -} - -static inline u16 DISPC_FIFO_SIZE_STATUS_OFFSET(enum omap_plane plane) -{ - switch (plane) { - case OMAP_DSS_GFX: - return 0x0028; - case OMAP_DSS_VIDEO1: - case OMAP_DSS_VIDEO2: - return 0x0018; - case OMAP_DSS_VIDEO3: - return 0x0088; - default: - BUG(); - } -} - -static inline u16 DISPC_ROW_INC_OFFSET(enum omap_plane plane) -{ - switch (plane) { - case OMAP_DSS_GFX: - return 0x002C; - case OMAP_DSS_VIDEO1: - case OMAP_DSS_VIDEO2: - return 0x001C; - case OMAP_DSS_VIDEO3: - return 0x00A4; - default: - BUG(); - } -} - -static inline u16 DISPC_PIX_INC_OFFSET(enum omap_plane plane) -{ - switch (plane) { - case OMAP_DSS_GFX: - return 0x0030; - case OMAP_DSS_VIDEO1: - case OMAP_DSS_VIDEO2: - return 0x0020; - case OMAP_DSS_VIDEO3: - return 0x0098; - default: - BUG(); - } -} - -static inline u16 DISPC_WINDOW_SKIP_OFFSET(enum omap_plane plane) -{ - switch (plane) { - case OMAP_DSS_GFX: - return 0x0034; - case OMAP_DSS_VIDEO1: - case OMAP_DSS_VIDEO2: - case OMAP_DSS_VIDEO3: - BUG(); - default: - BUG(); - } -} - -static inline u16 DISPC_TABLE_BA_OFFSET(enum omap_plane plane) -{ - switch (plane) { - case OMAP_DSS_GFX: - return 0x0038; - case OMAP_DSS_VIDEO1: - case OMAP_DSS_VIDEO2: - case OMAP_DSS_VIDEO3: - BUG(); - default: - BUG(); - } -} - -static inline u16 DISPC_FIR_OFFSET(enum omap_plane plane) -{ - switch (plane) { - case OMAP_DSS_GFX: - BUG(); - case OMAP_DSS_VIDEO1: - case OMAP_DSS_VIDEO2: - return 0x0024; - case OMAP_DSS_VIDEO3: - return 0x0090; - default: - BUG(); - } -} - -static inline u16 DISPC_FIR2_OFFSET(enum omap_plane plane) -{ - switch (plane) { - case OMAP_DSS_GFX: - BUG(); - case OMAP_DSS_VIDEO1: - return 0x0580; - case OMAP_DSS_VIDEO2: - return 0x055C; - case OMAP_DSS_VIDEO3: - return 0x0424; - default: - BUG(); - } -} - -static inline u16 DISPC_PIC_SIZE_OFFSET(enum omap_plane plane) -{ - switch (plane) { - case OMAP_DSS_GFX: - BUG(); - case OMAP_DSS_VIDEO1: - case OMAP_DSS_VIDEO2: - return 0x0028; - case OMAP_DSS_VIDEO3: - return 0x0094; - default: - BUG(); - } -} - - -static inline u16 DISPC_ACCU0_OFFSET(enum omap_plane plane) -{ - switch (plane) { - case OMAP_DSS_GFX: - BUG(); - case OMAP_DSS_VIDEO1: - case OMAP_DSS_VIDEO2: - return 0x002C; - case OMAP_DSS_VIDEO3: - return 0x0000; - default: - BUG(); - } -} - -static inline u16 DISPC_ACCU2_0_OFFSET(enum omap_plane plane) -{ - switch (plane) { - case OMAP_DSS_GFX: - BUG(); - case OMAP_DSS_VIDEO1: - return 0x0584; - case OMAP_DSS_VIDEO2: - return 0x0560; - case OMAP_DSS_VIDEO3: - return 0x0428; - default: - BUG(); - } -} - -static inline u16 DISPC_ACCU1_OFFSET(enum omap_plane plane) -{ - switch (plane) { - case OMAP_DSS_GFX: - BUG(); - case OMAP_DSS_VIDEO1: - case OMAP_DSS_VIDEO2: - return 0x0030; - case OMAP_DSS_VIDEO3: - return 0x0004; - default: - BUG(); - } -} - -static inline u16 DISPC_ACCU2_1_OFFSET(enum omap_plane plane) -{ - switch (plane) { - case OMAP_DSS_GFX: - BUG(); - case OMAP_DSS_VIDEO1: - return 0x0588; - case OMAP_DSS_VIDEO2: - return 0x0564; - case OMAP_DSS_VIDEO3: - return 0x042C; - default: - BUG(); - } -} - -/* coef index i = {0, 1, 2, 3, 4, 5, 6, 7} */ -static inline u16 DISPC_FIR_COEF_H_OFFSET(enum omap_plane plane, u16 i) -{ - switch (plane) { - case OMAP_DSS_GFX: - BUG(); - case OMAP_DSS_VIDEO1: - case OMAP_DSS_VIDEO2: - return 0x0034 + i * 0x8; - case OMAP_DSS_VIDEO3: - return 0x0010 + i * 0x8; - default: - BUG(); - } -} - -/* coef index i = {0, 1, 2, 3, 4, 5, 6, 7} */ -static inline u16 DISPC_FIR_COEF_H2_OFFSET(enum omap_plane plane, u16 i) -{ - switch (plane) { - case OMAP_DSS_GFX: - BUG(); - case OMAP_DSS_VIDEO1: - return 0x058C + i * 0x8; - case OMAP_DSS_VIDEO2: - return 0x0568 + i * 0x8; - case OMAP_DSS_VIDEO3: - return 0x0430 + i * 0x8; - default: - BUG(); - } -} - -/* coef index i = {0, 1, 2, 3, 4, 5, 6, 7} */ -static inline u16 DISPC_FIR_COEF_HV_OFFSET(enum omap_plane plane, u16 i) -{ - switch (plane) { - case OMAP_DSS_GFX: - BUG(); - case OMAP_DSS_VIDEO1: - case OMAP_DSS_VIDEO2: - return 0x0038 + i * 0x8; - case OMAP_DSS_VIDEO3: - return 0x0014 + i * 0x8; - default: - BUG(); - } -} - -/* coef index i = {0, 1, 2, 3, 4, 5, 6, 7} */ -static inline u16 DISPC_FIR_COEF_HV2_OFFSET(enum omap_plane plane, u16 i) -{ - switch (plane) { - case OMAP_DSS_GFX: - BUG(); - case OMAP_DSS_VIDEO1: - return 0x0590 + i * 8; - case OMAP_DSS_VIDEO2: - return 0x056C + i * 0x8; - case OMAP_DSS_VIDEO3: - return 0x0434 + i * 0x8; - default: - BUG(); - } -} - -/* coef index i = {0, 1, 2, 3, 4,} */ -static inline u16 DISPC_CONV_COEF_OFFSET(enum omap_plane plane, u16 i) -{ - switch (plane) { - case OMAP_DSS_GFX: - BUG(); - case OMAP_DSS_VIDEO1: - case OMAP_DSS_VIDEO2: - case OMAP_DSS_VIDEO3: - return 0x0074 + i * 0x4; - default: - BUG(); - } -} - -/* coef index i = {0, 1, 2, 3, 4, 5, 6, 7} */ -static inline u16 DISPC_FIR_COEF_V_OFFSET(enum omap_plane plane, u16 i) -{ - switch (plane) { - case OMAP_DSS_GFX: - BUG(); - case OMAP_DSS_VIDEO1: - return 0x0124 + i * 0x4; - case OMAP_DSS_VIDEO2: - return 0x00B4 + i * 0x4; - case OMAP_DSS_VIDEO3: - return 0x0050 + i * 0x4; - default: - BUG(); - } -} - -/* coef index i = {0, 1, 2, 3, 4, 5, 6, 7} */ -static inline u16 DISPC_FIR_COEF_V2_OFFSET(enum omap_plane plane, u16 i) -{ - switch (plane) { - case OMAP_DSS_GFX: - BUG(); - case OMAP_DSS_VIDEO1: - return 0x05CC + i * 0x4; - case OMAP_DSS_VIDEO2: - return 0x05A8 + i * 0x4; - case OMAP_DSS_VIDEO3: - return 0x0470 + i * 0x4; - default: - BUG(); - } -} - -static inline u16 DISPC_PRELOAD_OFFSET(enum omap_plane plane) -{ - switch (plane) { - case OMAP_DSS_GFX: - return 0x01AC; - case OMAP_DSS_VIDEO1: - return 0x0174; - case OMAP_DSS_VIDEO2: - return 0x00E8; - case OMAP_DSS_VIDEO3: - return 0x00A0; - default: - BUG(); - } -} -#endif diff --git a/drivers/video/omap2/dss/dispc_coefs.c b/drivers/video/omap2/dss/dispc_coefs.c deleted file mode 100644 index 069bccbb3f1..00000000000 --- a/drivers/video/omap2/dss/dispc_coefs.c +++ /dev/null @@ -1,326 +0,0 @@ -/* - * linux/drivers/video/omap2/dss/dispc_coefs.c - * - * Copyright (C) 2011 Texas Instruments - * Author: Chandrabhanu Mahapatra <cmahapatra@ti.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program. If not, see <http://www.gnu.org/licenses/>. - */ - -#include <linux/kernel.h> -#include <video/omapdss.h> -#include "dispc.h" - -#define ARRAY_LEN(array) (sizeof(array) / sizeof(array[0])) - -static const struct dispc_coef coef3_M8[8] = { - { 0, 0, 128, 0, 0 }, - { 0, -4, 123, 9, 0 }, - { 0, -4, 108, 87, 0 }, - { 0, -2, 87, 43, 0 }, - { 0, 64, 64, 0, 0 }, - { 0, 43, 87, -2, 0 }, - { 0, 24, 108, -4, 0 }, - { 0, 9, 123, -4, 0 }, -}; - -static const struct dispc_coef coef3_M9[8] = { - { 0, 6, 116, 6, 0 }, - { 0, 0, 112, 16, 0 }, - { 0, -2, 100, 30, 0 }, - { 0, -2, 83, 47, 0 }, - { 0, 64, 64, 0, 0 }, - { 0, 47, 83, -2, 0 }, - { 0, 30, 100, -2, 0 }, - { 0, 16, 112, 0, 0 }, -}; - -static const struct dispc_coef coef3_M10[8] = { - { 0, 10, 108, 10, 0 }, - { 0, 3, 104, 21, 0 }, - { 0, 0, 94, 34, 0 }, - { 0, -1, 80, 49, 0 }, - { 0, 64, 64, 0, 0 }, - { 0, 49, 80, -1, 0 }, - { 0, 34, 94, 0, 0 }, - { 0, 21, 104, 3, 0 }, -}; - -static const struct dispc_coef coef3_M11[8] = { - { 0, 14, 100, 14, 0 }, - { 0, 6, 98, 24, 0 }, - { 0, 2, 90, 36, 0 }, - { 0, 0, 78, 50, 0 }, - { 0, 64, 64, 0, 0 }, - { 0, 50, 78, 0, 0 }, - { 0, 36, 90, 2, 0 }, - { 0, 24, 98, 6, 0 }, -}; - -static const struct dispc_coef coef3_M12[8] = { - { 0, 16, 96, 16, 0 }, - { 0, 9, 93, 26, 0 }, - { 0, 4, 86, 38, 0 }, - { 0, 1, 76, 51, 0 }, - { 0, 64, 64, 0, 0 }, - { 0, 51, 76, 1, 0 }, - { 0, 38, 86, 4, 0 }, - { 0, 26, 93, 9, 0 }, -}; - -static const struct dispc_coef coef3_M13[8] = { - { 0, 18, 92, 18, 0 }, - { 0, 10, 90, 28, 0 }, - { 0, 5, 83, 40, 0 }, - { 0, 1, 75, 52, 0 }, - { 0, 64, 64, 0, 0 }, - { 0, 52, 75, 1, 0 }, - { 0, 40, 83, 5, 0 }, - { 0, 28, 90, 10, 0 }, -}; - -static const struct dispc_coef coef3_M14[8] = { - { 0, 20, 88, 20, 0 }, - { 0, 12, 86, 30, 0 }, - { 0, 6, 81, 41, 0 }, - { 0, 2, 74, 52, 0 }, - { 0, 64, 64, 0, 0 }, - { 0, 52, 74, 2, 0 }, - { 0, 41, 81, 6, 0 }, - { 0, 30, 86, 12, 0 }, -}; - -static const struct dispc_coef coef3_M16[8] = { - { 0, 22, 84, 22, 0 }, - { 0, 14, 82, 32, 0 }, - { 0, 8, 78, 42, 0 }, - { 0, 3, 72, 53, 0 }, - { 0, 64, 64, 0, 0 }, - { 0, 53, 72, 3, 0 }, - { 0, 42, 78, 8, 0 }, - { 0, 32, 82, 14, 0 }, -}; - -static const struct dispc_coef coef3_M19[8] = { - { 0, 24, 80, 24, 0 }, - { 0, 16, 79, 33, 0 }, - { 0, 9, 76, 43, 0 }, - { 0, 4, 70, 54, 0 }, - { 0, 64, 64, 0, 0 }, - { 0, 54, 70, 4, 0 }, - { 0, 43, 76, 9, 0 }, - { 0, 33, 79, 16, 0 }, -}; - -static const struct dispc_coef coef3_M22[8] = { - { 0, 25, 78, 25, 0 }, - { 0, 17, 77, 34, 0 }, - { 0, 10, 74, 44, 0 }, - { 0, 5, 69, 54, 0 }, - { 0, 64, 64, 0, 0 }, - { 0, 54, 69, 5, 0 }, - { 0, 44, 74, 10, 0 }, - { 0, 34, 77, 17, 0 }, -}; - -static const struct dispc_coef coef3_M26[8] = { - { 0, 26, 76, 26, 0 }, - { 0, 19, 74, 35, 0 }, - { 0, 11, 72, 45, 0 }, - { 0, 5, 69, 54, 0 }, - { 0, 64, 64, 0, 0 }, - { 0, 54, 69, 5, 0 }, - { 0, 45, 72, 11, 0 }, - { 0, 35, 74, 19, 0 }, -}; - -static const struct dispc_coef coef3_M32[8] = { - { 0, 27, 74, 27, 0 }, - { 0, 19, 73, 36, 0 }, - { 0, 12, 71, 45, 0 }, - { 0, 6, 68, 54, 0 }, - { 0, 64, 64, 0, 0 }, - { 0, 54, 68, 6, 0 }, - { 0, 45, 71, 12, 0 }, - { 0, 36, 73, 19, 0 }, -}; - -static const struct dispc_coef coef5_M8[8] = { - { 0, 0, 128, 0, 0 }, - { -2, 14, 125, -10, 1 }, - { -6, 33, 114, -15, 2 }, - { -10, 55, 98, -16, 1 }, - { 0, -14, 78, 78, -14 }, - { 1, -16, 98, 55, -10 }, - { 2, -15, 114, 33, -6 }, - { 1, -10, 125, 14, -2 }, -}; - -static const struct dispc_coef coef5_M9[8] = { - { -3, 10, 114, 10, -3 }, - { -6, 24, 110, 0, -1 }, - { -8, 40, 103, -7, 0 }, - { -11, 58, 91, -11, 1 }, - { 0, -12, 76, 76, -12 }, - { 1, -11, 91, 58, -11 }, - { 0, -7, 103, 40, -8 }, - { -1, 0, 111, 24, -6 }, -}; - -static const struct dispc_coef coef5_M10[8] = { - { -4, 18, 100, 18, -4 }, - { -6, 30, 99, 8, -3 }, - { -8, 44, 93, 0, -1 }, - { -9, 58, 84, -5, 0 }, - { 0, -8, 72, 72, -8 }, - { 0, -5, 84, 58, -9 }, - { -1, 0, 93, 44, -8 }, - { -3, 8, 99, 30, -6 }, -}; - -static const struct dispc_coef coef5_M11[8] = { - { -5, 23, 92, 23, -5 }, - { -6, 34, 90, 13, -3 }, - { -6, 45, 85, 6, -2 }, - { -6, 57, 78, 0, -1 }, - { 0, -4, 68, 68, -4 }, - { -1, 0, 78, 57, -6 }, - { -2, 6, 85, 45, -6 }, - { -3, 13, 90, 34, -6 }, -}; - -static const struct dispc_coef coef5_M12[8] = { - { -4, 26, 84, 26, -4 }, - { -5, 36, 82, 18, -3 }, - { -4, 46, 78, 10, -2 }, - { -3, 55, 72, 5, -1 }, - { 0, 0, 64, 64, 0 }, - { -1, 5, 72, 55, -3 }, - { -2, 10, 78, 46, -4 }, - { -3, 18, 82, 36, -5 }, -}; - -static const struct dispc_coef coef5_M13[8] = { - { -3, 28, 78, 28, -3 }, - { -3, 37, 76, 21, -3 }, - { -2, 45, 73, 14, -2 }, - { 0, 53, 68, 8, -1 }, - { 0, 3, 61, 61, 3 }, - { -1, 8, 68, 53, 0 }, - { -2, 14, 73, 45, -2 }, - { -3, 21, 76, 37, -3 }, -}; - -static const struct dispc_coef coef5_M14[8] = { - { -2, 30, 72, 30, -2 }, - { -1, 37, 71, 23, -2 }, - { 0, 45, 69, 16, -2 }, - { 3, 52, 64, 10, -1 }, - { 0, 6, 58, 58, 6 }, - { -1, 10, 64, 52, 3 }, - { -2, 16, 69, 45, 0 }, - { -2, 23, 71, 37, -1 }, -}; - -static const struct dispc_coef coef5_M16[8] = { - { 0, 31, 66, 31, 0 }, - { 1, 38, 65, 25, -1 }, - { 3, 44, 62, 20, -1 }, - { 6, 49, 59, 14, 0 }, - { 0, 10, 54, 54, 10 }, - { 0, 14, 59, 49, 6 }, - { -1, 20, 62, 44, 3 }, - { -1, 25, 65, 38, 1 }, -}; - -static const struct dispc_coef coef5_M19[8] = { - { 3, 32, 58, 32, 3 }, - { 4, 38, 58, 27, 1 }, - { 7, 42, 55, 23, 1 }, - { 10, 46, 54, 18, 0 }, - { 0, 14, 50, 50, 14 }, - { 0, 18, 54, 46, 10 }, - { 1, 23, 55, 42, 7 }, - { 1, 27, 58, 38, 4 }, -}; - -static const struct dispc_coef coef5_M22[8] = { - { 4, 33, 54, 33, 4 }, - { 6, 37, 54, 28, 3 }, - { 9, 41, 53, 24, 1 }, - { 12, 45, 51, 20, 0 }, - { 0, 16, 48, 48, 16 }, - { 0, 20, 51, 45, 12 }, - { 1, 24, 53, 41, 9 }, - { 3, 28, 54, 37, 6 }, -}; - -static const struct dispc_coef coef5_M26[8] = { - { 6, 33, 50, 33, 6 }, - { 8, 36, 51, 29, 4 }, - { 11, 40, 50, 25, 2 }, - { 14, 43, 48, 22, 1 }, - { 0, 18, 46, 46, 18 }, - { 1, 22, 48, 43, 14 }, - { 2, 25, 50, 40, 11 }, - { 4, 29, 51, 36, 8 }, -}; - -static const struct dispc_coef coef5_M32[8] = { - { 7, 33, 48, 33, 7 }, - { 10, 36, 48, 29, 5 }, - { 13, 39, 47, 26, 3 }, - { 16, 42, 46, 23, 1 }, - { 0, 19, 45, 45, 19 }, - { 1, 23, 46, 42, 16 }, - { 3, 26, 47, 39, 13 }, - { 5, 29, 48, 36, 10 }, -}; - -const struct dispc_coef *dispc_ovl_get_scale_coef(int inc, int five_taps) -{ - int i; - static const struct { - int Mmin; - int Mmax; - const struct dispc_coef *coef_3; - const struct dispc_coef *coef_5; - } coefs[] = { - { 27, 32, coef3_M32, coef5_M32 }, - { 23, 26, coef3_M26, coef5_M26 }, - { 20, 22, coef3_M22, coef5_M22 }, - { 17, 19, coef3_M19, coef5_M19 }, - { 15, 16, coef3_M16, coef5_M16 }, - { 14, 14, coef3_M14, coef5_M14 }, - { 13, 13, coef3_M13, coef5_M13 }, - { 12, 12, coef3_M12, coef5_M12 }, - { 11, 11, coef3_M11, coef5_M11 }, - { 10, 10, coef3_M10, coef5_M10 }, - { 9, 9, coef3_M9, coef5_M9 }, - { 4, 8, coef3_M8, coef5_M8 }, - /* - * When upscaling more than two times, blockiness and outlines - * around the image are observed when M8 tables are used. M11, - * M16 and M19 tables are used to prevent this. - */ - { 3, 3, coef3_M11, coef5_M11 }, - { 2, 2, coef3_M16, coef5_M16 }, - { 0, 1, coef3_M19, coef5_M19 }, - }; - - inc /= 128; - for (i = 0; i < ARRAY_LEN(coefs); ++i) - if (inc >= coefs[i].Mmin && inc <= coefs[i].Mmax) - return five_taps ? coefs[i].coef_5 : coefs[i].coef_3; - return NULL; -} diff --git a/drivers/video/omap2/dss/display.c b/drivers/video/omap2/dss/display.c deleted file mode 100644 index be331dc5a61..00000000000 --- a/drivers/video/omap2/dss/display.c +++ /dev/null @@ -1,586 +0,0 @@ -/* - * linux/drivers/video/omap2/dss/display.c - * - * Copyright (C) 2009 Nokia Corporation - * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com> - * - * Some code and ideas taken from drivers/video/omap/ driver - * by Imre Deak. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program. If not, see <http://www.gnu.org/licenses/>. - */ - -#define DSS_SUBSYS_NAME "DISPLAY" - -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/jiffies.h> -#include <linux/platform_device.h> - -#include <video/omapdss.h> -#include "dss.h" -#include "dss_features.h" - -static ssize_t display_enabled_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - struct omap_dss_device *dssdev = to_dss_device(dev); - bool enabled = dssdev->state != OMAP_DSS_DISPLAY_DISABLED; - - return snprintf(buf, PAGE_SIZE, "%d\n", enabled); -} - -static ssize_t display_enabled_store(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t size) -{ - struct omap_dss_device *dssdev = to_dss_device(dev); - int r; - bool enabled; - - r = strtobool(buf, &enabled); - if (r) - return r; - - if (enabled != (dssdev->state != OMAP_DSS_DISPLAY_DISABLED)) { - if (enabled) { - r = dssdev->driver->enable(dssdev); - if (r) - return r; - } else { - dssdev->driver->disable(dssdev); - } - } - - return size; -} - -static ssize_t display_tear_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - struct omap_dss_device *dssdev = to_dss_device(dev); - return snprintf(buf, PAGE_SIZE, "%d\n", - dssdev->driver->get_te ? - dssdev->driver->get_te(dssdev) : 0); -} - -static ssize_t display_tear_store(struct device *dev, - struct device_attribute *attr, const char *buf, size_t size) -{ - struct omap_dss_device *dssdev = to_dss_device(dev); - int r; - bool te; - - if (!dssdev->driver->enable_te || !dssdev->driver->get_te) - return -ENOENT; - - r = strtobool(buf, &te); - if (r) - return r; - - r = dssdev->driver->enable_te(dssdev, te); - if (r) - return r; - - return size; -} - -static ssize_t display_timings_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - struct omap_dss_device *dssdev = to_dss_device(dev); - struct omap_video_timings t; - - if (!dssdev->driver->get_timings) - return -ENOENT; - - dssdev->driver->get_timings(dssdev, &t); - - return snprintf(buf, PAGE_SIZE, "%u,%u/%u/%u/%u,%u/%u/%u/%u\n", - t.pixel_clock, - t.x_res, t.hfp, t.hbp, t.hsw, - t.y_res, t.vfp, t.vbp, t.vsw); -} - -static ssize_t display_timings_store(struct device *dev, - struct device_attribute *attr, const char *buf, size_t size) -{ - struct omap_dss_device *dssdev = to_dss_device(dev); - struct omap_video_timings t; - int r, found; - - if (!dssdev->driver->set_timings || !dssdev->driver->check_timings) - return -ENOENT; - - found = 0; -#ifdef CONFIG_OMAP2_DSS_VENC - if (strncmp("pal", buf, 3) == 0) { - t = omap_dss_pal_timings; - found = 1; - } else if (strncmp("ntsc", buf, 4) == 0) { - t = omap_dss_ntsc_timings; - found = 1; - } -#endif - if (!found && sscanf(buf, "%u,%hu/%hu/%hu/%hu,%hu/%hu/%hu/%hu", - &t.pixel_clock, - &t.x_res, &t.hfp, &t.hbp, &t.hsw, - &t.y_res, &t.vfp, &t.vbp, &t.vsw) != 9) - return -EINVAL; - - r = dssdev->driver->check_timings(dssdev, &t); - if (r) - return r; - - dssdev->driver->set_timings(dssdev, &t); - - return size; -} - -static ssize_t display_rotate_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - struct omap_dss_device *dssdev = to_dss_device(dev); - int rotate; - if (!dssdev->driver->get_rotate) - return -ENOENT; - rotate = dssdev->driver->get_rotate(dssdev); - return snprintf(buf, PAGE_SIZE, "%u\n", rotate); -} - -static ssize_t display_rotate_store(struct device *dev, - struct device_attribute *attr, const char *buf, size_t size) -{ - struct omap_dss_device *dssdev = to_dss_device(dev); - int rot, r; - - if (!dssdev->driver->set_rotate || !dssdev->driver->get_rotate) - return -ENOENT; - - r = kstrtoint(buf, 0, &rot); - if (r) - return r; - - r = dssdev->driver->set_rotate(dssdev, rot); - if (r) - return r; - - return size; -} - -static ssize_t display_mirror_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - struct omap_dss_device *dssdev = to_dss_device(dev); - int mirror; - if (!dssdev->driver->get_mirror) - return -ENOENT; - mirror = dssdev->driver->get_mirror(dssdev); - return snprintf(buf, PAGE_SIZE, "%u\n", mirror); -} - -static ssize_t display_mirror_store(struct device *dev, - struct device_attribute *attr, const char *buf, size_t size) -{ - struct omap_dss_device *dssdev = to_dss_device(dev); - int r; - bool mirror; - - if (!dssdev->driver->set_mirror || !dssdev->driver->get_mirror) - return -ENOENT; - - r = strtobool(buf, &mirror); - if (r) - return r; - - r = dssdev->driver->set_mirror(dssdev, mirror); - if (r) - return r; - - return size; -} - -static ssize_t display_wss_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - struct omap_dss_device *dssdev = to_dss_device(dev); - unsigned int wss; - - if (!dssdev->driver->get_wss) - return -ENOENT; - - wss = dssdev->driver->get_wss(dssdev); - - return snprintf(buf, PAGE_SIZE, "0x%05x\n", wss); -} - -static ssize_t display_wss_store(struct device *dev, - struct device_attribute *attr, const char *buf, size_t size) -{ - struct omap_dss_device *dssdev = to_dss_device(dev); - u32 wss; - int r; - - if (!dssdev->driver->get_wss || !dssdev->driver->set_wss) - return -ENOENT; - - r = kstrtou32(buf, 0, &wss); - if (r) - return r; - - if (wss > 0xfffff) - return -EINVAL; - - r = dssdev->driver->set_wss(dssdev, wss); - if (r) - return r; - - return size; -} - -static DEVICE_ATTR(enabled, S_IRUGO|S_IWUSR, - display_enabled_show, display_enabled_store); -static DEVICE_ATTR(tear_elim, S_IRUGO|S_IWUSR, - display_tear_show, display_tear_store); -static DEVICE_ATTR(timings, S_IRUGO|S_IWUSR, - display_timings_show, display_timings_store); -static DEVICE_ATTR(rotate, S_IRUGO|S_IWUSR, - display_rotate_show, display_rotate_store); -static DEVICE_ATTR(mirror, S_IRUGO|S_IWUSR, - display_mirror_show, display_mirror_store); -static DEVICE_ATTR(wss, S_IRUGO|S_IWUSR, - display_wss_show, display_wss_store); - -static struct device_attribute *display_sysfs_attrs[] = { - &dev_attr_enabled, - &dev_attr_tear_elim, - &dev_attr_timings, - &dev_attr_rotate, - &dev_attr_mirror, - &dev_attr_wss, - NULL -}; - -void omapdss_default_get_resolution(struct omap_dss_device *dssdev, - u16 *xres, u16 *yres) -{ - *xres = dssdev->panel.timings.x_res; - *yres = dssdev->panel.timings.y_res; -} -EXPORT_SYMBOL(omapdss_default_get_resolution); - -void default_get_overlay_fifo_thresholds(enum omap_plane plane, - u32 fifo_size, u32 burst_size, - u32 *fifo_low, u32 *fifo_high) -{ - unsigned buf_unit = dss_feat_get_buffer_size_unit(); - - *fifo_high = fifo_size - buf_unit; - *fifo_low = fifo_size - burst_size; -} - -int omapdss_default_get_recommended_bpp(struct omap_dss_device *dssdev) -{ - switch (dssdev->type) { - case OMAP_DISPLAY_TYPE_DPI: - if (dssdev->phy.dpi.data_lines == 24) - return 24; - else - return 16; - - case OMAP_DISPLAY_TYPE_DBI: - if (dssdev->ctrl.pixel_size == 24) - return 24; - else - return 16; - case OMAP_DISPLAY_TYPE_DSI: - if (dsi_get_pixel_size(dssdev->panel.dsi_pix_fmt) > 16) - return 24; - else - return 16; - case OMAP_DISPLAY_TYPE_VENC: - case OMAP_DISPLAY_TYPE_SDI: - case OMAP_DISPLAY_TYPE_HDMI: - return 24; - default: - BUG(); - } -} -EXPORT_SYMBOL(omapdss_default_get_recommended_bpp); - -/* Checks if replication logic should be used. Only use for active matrix, - * when overlay is in RGB12U or RGB16 mode, and LCD interface is - * 18bpp or 24bpp */ -bool dss_use_replication(struct omap_dss_device *dssdev, - enum omap_color_mode mode) -{ - int bpp; - - if (mode != OMAP_DSS_COLOR_RGB12U && mode != OMAP_DSS_COLOR_RGB16) - return false; - - if (dssdev->type == OMAP_DISPLAY_TYPE_DPI && - (dssdev->panel.config & OMAP_DSS_LCD_TFT) == 0) - return false; - - switch (dssdev->type) { - case OMAP_DISPLAY_TYPE_DPI: - bpp = dssdev->phy.dpi.data_lines; - break; - case OMAP_DISPLAY_TYPE_HDMI: - case OMAP_DISPLAY_TYPE_VENC: - case OMAP_DISPLAY_TYPE_SDI: - bpp = 24; - break; - case OMAP_DISPLAY_TYPE_DBI: - bpp = dssdev->ctrl.pixel_size; - break; - case OMAP_DISPLAY_TYPE_DSI: - bpp = dsi_get_pixel_size(dssdev->panel.dsi_pix_fmt); - break; - default: - BUG(); - } - - return bpp > 16; -} - -void dss_init_device(struct platform_device *pdev, - struct omap_dss_device *dssdev) -{ - struct device_attribute *attr; - int i; - int r; - - switch (dssdev->type) { -#ifdef CONFIG_OMAP2_DSS_DPI - case OMAP_DISPLAY_TYPE_DPI: - r = dpi_init_display(dssdev); - break; -#endif -#ifdef CONFIG_OMAP2_DSS_RFBI - case OMAP_DISPLAY_TYPE_DBI: - r = rfbi_init_display(dssdev); - break; -#endif -#ifdef CONFIG_OMAP2_DSS_VENC - case OMAP_DISPLAY_TYPE_VENC: - r = venc_init_display(dssdev); - break; -#endif -#ifdef CONFIG_OMAP2_DSS_SDI - case OMAP_DISPLAY_TYPE_SDI: - r = sdi_init_display(dssdev); - break; -#endif -#ifdef CONFIG_OMAP2_DSS_DSI - case OMAP_DISPLAY_TYPE_DSI: - r = dsi_init_display(dssdev); - break; -#endif - case OMAP_DISPLAY_TYPE_HDMI: - r = hdmi_init_display(dssdev); - break; - default: - DSSERR("Support for display '%s' not compiled in.\n", - dssdev->name); - return; - } - - if (r) { - DSSERR("failed to init display %s\n", dssdev->name); - return; - } - - /* create device sysfs files */ - i = 0; - while ((attr = display_sysfs_attrs[i++]) != NULL) { - r = device_create_file(&dssdev->dev, attr); - if (r) - DSSERR("failed to create sysfs file\n"); - } - - /* create display? sysfs links */ - r = sysfs_create_link(&pdev->dev.kobj, &dssdev->dev.kobj, - dev_name(&dssdev->dev)); - if (r) - DSSERR("failed to create sysfs display link\n"); -} - -void dss_uninit_device(struct platform_device *pdev, - struct omap_dss_device *dssdev) -{ - struct device_attribute *attr; - int i = 0; - - sysfs_remove_link(&pdev->dev.kobj, dev_name(&dssdev->dev)); - - while ((attr = display_sysfs_attrs[i++]) != NULL) - device_remove_file(&dssdev->dev, attr); - - if (dssdev->manager) - dssdev->manager->unset_device(dssdev->manager); -} - -static int dss_suspend_device(struct device *dev, void *data) -{ - int r; - struct omap_dss_device *dssdev = to_dss_device(dev); - - if (dssdev->state != OMAP_DSS_DISPLAY_ACTIVE) { - dssdev->activate_after_resume = false; - return 0; - } - - if (!dssdev->driver->suspend) { - DSSERR("display '%s' doesn't implement suspend\n", - dssdev->name); - return -ENOSYS; - } - - r = dssdev->driver->suspend(dssdev); - if (r) - return r; - - dssdev->activate_after_resume = true; - - return 0; -} - -int dss_suspend_all_devices(void) -{ - int r; - struct bus_type *bus = dss_get_bus(); - - r = bus_for_each_dev(bus, NULL, NULL, dss_suspend_device); - if (r) { - /* resume all displays that were suspended */ - dss_resume_all_devices(); - return r; - } - - return 0; -} - -static int dss_resume_device(struct device *dev, void *data) -{ - int r; - struct omap_dss_device *dssdev = to_dss_device(dev); - - if (dssdev->activate_after_resume && dssdev->driver->resume) { - r = dssdev->driver->resume(dssdev); - if (r) - return r; - } - - dssdev->activate_after_resume = false; - - return 0; -} - -int dss_resume_all_devices(void) -{ - struct bus_type *bus = dss_get_bus(); - - return bus_for_each_dev(bus, NULL, NULL, dss_resume_device); -} - -static int dss_disable_device(struct device *dev, void *data) -{ - struct omap_dss_device *dssdev = to_dss_device(dev); - - if (dssdev->state != OMAP_DSS_DISPLAY_DISABLED) - dssdev->driver->disable(dssdev); - - return 0; -} - -void dss_disable_all_devices(void) -{ - struct bus_type *bus = dss_get_bus(); - bus_for_each_dev(bus, NULL, NULL, dss_disable_device); -} - - -void omap_dss_get_device(struct omap_dss_device *dssdev) -{ - get_device(&dssdev->dev); -} -EXPORT_SYMBOL(omap_dss_get_device); - -void omap_dss_put_device(struct omap_dss_device *dssdev) -{ - put_device(&dssdev->dev); -} -EXPORT_SYMBOL(omap_dss_put_device); - -/* ref count of the found device is incremented. ref count - * of from-device is decremented. */ -struct omap_dss_device *omap_dss_get_next_device(struct omap_dss_device *from) -{ - struct device *dev; - struct device *dev_start = NULL; - struct omap_dss_device *dssdev = NULL; - - int match(struct device *dev, void *data) - { - return 1; - } - - if (from) - dev_start = &from->dev; - dev = bus_find_device(dss_get_bus(), dev_start, NULL, match); - if (dev) - dssdev = to_dss_device(dev); - if (from) - put_device(&from->dev); - - return dssdev; -} -EXPORT_SYMBOL(omap_dss_get_next_device); - -struct omap_dss_device *omap_dss_find_device(void *data, - int (*match)(struct omap_dss_device *dssdev, void *data)) -{ - struct omap_dss_device *dssdev = NULL; - - while ((dssdev = omap_dss_get_next_device(dssdev)) != NULL) { - if (match(dssdev, data)) - return dssdev; - } - - return NULL; -} -EXPORT_SYMBOL(omap_dss_find_device); - -int omap_dss_start_device(struct omap_dss_device *dssdev) -{ - if (!dssdev->driver) { - DSSDBG("no driver\n"); - return -ENODEV; - } - - if (!try_module_get(dssdev->dev.driver->owner)) { - return -ENODEV; - } - - return 0; -} -EXPORT_SYMBOL(omap_dss_start_device); - -void omap_dss_stop_device(struct omap_dss_device *dssdev) -{ - module_put(dssdev->dev.driver->owner); -} -EXPORT_SYMBOL(omap_dss_stop_device); - diff --git a/drivers/video/omap2/dss/dpi.c b/drivers/video/omap2/dss/dpi.c deleted file mode 100644 index faaf305fda2..00000000000 --- a/drivers/video/omap2/dss/dpi.c +++ /dev/null @@ -1,389 +0,0 @@ -/* - * linux/drivers/video/omap2/dss/dpi.c - * - * Copyright (C) 2009 Nokia Corporation - * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com> - * - * Some code and ideas taken from drivers/video/omap/ driver - * by Imre Deak. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program. If not, see <http://www.gnu.org/licenses/>. - */ - -#define DSS_SUBSYS_NAME "DPI" - -#include <linux/kernel.h> -#include <linux/delay.h> -#include <linux/export.h> -#include <linux/err.h> -#include <linux/errno.h> -#include <linux/platform_device.h> -#include <linux/regulator/consumer.h> - -#include <video/omapdss.h> -#include <plat/cpu.h> - -#include "dss.h" - -static struct { - struct regulator *vdds_dsi_reg; - struct platform_device *dsidev; -} dpi; - -static struct platform_device *dpi_get_dsidev(enum omap_dss_clk_source clk) -{ - int dsi_module; - - dsi_module = clk == OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC ? 0 : 1; - - return dsi_get_dsidev_from_id(dsi_module); -} - -static bool dpi_use_dsi_pll(struct omap_dss_device *dssdev) -{ - if (dssdev->clocks.dispc.dispc_fclk_src == - OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC || - dssdev->clocks.dispc.dispc_fclk_src == - OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC || - dssdev->clocks.dispc.channel.lcd_clk_src == - OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC || - dssdev->clocks.dispc.channel.lcd_clk_src == - OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC) - return true; - else - return false; -} - -static int dpi_set_dsi_clk(struct omap_dss_device *dssdev, bool is_tft, - unsigned long pck_req, unsigned long *fck, int *lck_div, - int *pck_div) -{ - struct dsi_clock_info dsi_cinfo; - struct dispc_clock_info dispc_cinfo; - int r; - - r = dsi_pll_calc_clock_div_pck(dpi.dsidev, is_tft, pck_req, - &dsi_cinfo, &dispc_cinfo); - if (r) - return r; - - r = dsi_pll_set_clock_div(dpi.dsidev, &dsi_cinfo); - if (r) - return r; - - dss_select_dispc_clk_source(dssdev->clocks.dispc.dispc_fclk_src); - - r = dispc_mgr_set_clock_div(dssdev->manager->id, &dispc_cinfo); - if (r) { - dss_select_dispc_clk_source(OMAP_DSS_CLK_SRC_FCK); - return r; - } - - *fck = dsi_cinfo.dsi_pll_hsdiv_dispc_clk; - *lck_div = dispc_cinfo.lck_div; - *pck_div = dispc_cinfo.pck_div; - - return 0; -} - -static int dpi_set_dispc_clk(struct omap_dss_device *dssdev, bool is_tft, - unsigned long pck_req, unsigned long *fck, int *lck_div, - int *pck_div) -{ - struct dss_clock_info dss_cinfo; - struct dispc_clock_info dispc_cinfo; - int r; - - r = dss_calc_clock_div(is_tft, pck_req, &dss_cinfo, &dispc_cinfo); - if (r) - return r; - - r = dss_set_clock_div(&dss_cinfo); - if (r) - return r; - - r = dispc_mgr_set_clock_div(dssdev->manager->id, &dispc_cinfo); - if (r) - return r; - - *fck = dss_cinfo.fck; - *lck_div = dispc_cinfo.lck_div; - *pck_div = dispc_cinfo.pck_div; - - return 0; -} - -static int dpi_set_mode(struct omap_dss_device *dssdev) -{ - struct omap_video_timings *t = &dssdev->panel.timings; - int lck_div = 0, pck_div = 0; - unsigned long fck = 0; - unsigned long pck; - bool is_tft; - int r = 0; - - dispc_mgr_set_pol_freq(dssdev->manager->id, dssdev->panel.config, - dssdev->panel.acbi, dssdev->panel.acb); - - is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0; - - if (dpi_use_dsi_pll(dssdev)) - r = dpi_set_dsi_clk(dssdev, is_tft, t->pixel_clock * 1000, - &fck, &lck_div, &pck_div); - else - r = dpi_set_dispc_clk(dssdev, is_tft, t->pixel_clock * 1000, - &fck, &lck_div, &pck_div); - if (r) - return r; - - pck = fck / lck_div / pck_div / 1000; - - if (pck != t->pixel_clock) { - DSSWARN("Could not find exact pixel clock. " - "Requested %d kHz, got %lu kHz\n", - t->pixel_clock, pck); - - t->pixel_clock = pck; - } - - dispc_mgr_set_lcd_timings(dssdev->manager->id, t); - - return 0; -} - -static void dpi_basic_init(struct omap_dss_device *dssdev) -{ - bool is_tft; - - is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0; - - dispc_mgr_set_io_pad_mode(DSS_IO_PAD_MODE_BYPASS); - dispc_mgr_enable_stallmode(dssdev->manager->id, false); - - dispc_mgr_set_lcd_display_type(dssdev->manager->id, is_tft ? - OMAP_DSS_LCD_DISPLAY_TFT : OMAP_DSS_LCD_DISPLAY_STN); - dispc_mgr_set_tft_data_lines(dssdev->manager->id, - dssdev->phy.dpi.data_lines); -} - -int omapdss_dpi_display_enable(struct omap_dss_device *dssdev) -{ - int r; - - if (cpu_is_omap34xx() && !dpi.vdds_dsi_reg) { - DSSERR("no VDSS_DSI regulator\n"); - return -ENODEV; - } - - if (dssdev->manager == NULL) { - DSSERR("failed to enable display: no manager\n"); - return -ENODEV; - } - - r = omap_dss_start_device(dssdev); - if (r) { - DSSERR("failed to start device\n"); - goto err_start_dev; - } - - if (cpu_is_omap34xx()) { - r = regulator_enable(dpi.vdds_dsi_reg); - if (r) - goto err_reg_enable; - } - - r = dss_runtime_get(); - if (r) - goto err_get_dss; - - r = dispc_runtime_get(); - if (r) - goto err_get_dispc; - - dpi_basic_init(dssdev); - - if (dpi_use_dsi_pll(dssdev)) { - r = dsi_runtime_get(dpi.dsidev); - if (r) - goto err_get_dsi; - - r = dsi_pll_init(dpi.dsidev, 0, 1); - if (r) - goto err_dsi_pll_init; - } - - r = dpi_set_mode(dssdev); - if (r) - goto err_set_mode; - - mdelay(2); - - r = dss_mgr_enable(dssdev->manager); - if (r) - goto err_mgr_enable; - - return 0; - -err_mgr_enable: -err_set_mode: - if (dpi_use_dsi_pll(dssdev)) - dsi_pll_uninit(dpi.dsidev, true); -err_dsi_pll_init: - if (dpi_use_dsi_pll(dssdev)) - dsi_runtime_put(dpi.dsidev); -err_get_dsi: - dispc_runtime_put(); -err_get_dispc: - dss_runtime_put(); -err_get_dss: - if (cpu_is_omap34xx()) - regulator_disable(dpi.vdds_dsi_reg); -err_reg_enable: - omap_dss_stop_device(dssdev); -err_start_dev: - return r; -} -EXPORT_SYMBOL(omapdss_dpi_display_enable); - -void omapdss_dpi_display_disable(struct omap_dss_device *dssdev) -{ - dss_mgr_disable(dssdev->manager); - - if (dpi_use_dsi_pll(dssdev)) { - dss_select_dispc_clk_source(OMAP_DSS_CLK_SRC_FCK); - dsi_pll_uninit(dpi.dsidev, true); - dsi_runtime_put(dpi.dsidev); - } - - dispc_runtime_put(); - dss_runtime_put(); - - if (cpu_is_omap34xx()) - regulator_disable(dpi.vdds_dsi_reg); - - omap_dss_stop_device(dssdev); -} -EXPORT_SYMBOL(omapdss_dpi_display_disable); - -void dpi_set_timings(struct omap_dss_device *dssdev, - struct omap_video_timings *timings) -{ - int r; - - DSSDBG("dpi_set_timings\n"); - dssdev->panel.timings = *timings; - if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE) { - r = dss_runtime_get(); - if (r) - return; - - r = dispc_runtime_get(); - if (r) { - dss_runtime_put(); - return; - } - - dpi_set_mode(dssdev); - dispc_mgr_go(dssdev->manager->id); - - dispc_runtime_put(); - dss_runtime_put(); - } -} -EXPORT_SYMBOL(dpi_set_timings); - -int dpi_check_timings(struct omap_dss_device *dssdev, - struct omap_video_timings *timings) -{ - bool is_tft; - int r; - int lck_div, pck_div; - unsigned long fck; - unsigned long pck; - struct dispc_clock_info dispc_cinfo; - - if (!dispc_lcd_timings_ok(timings)) - return -EINVAL; - - if (timings->pixel_clock == 0) - return -EINVAL; - - is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0; - - if (dpi_use_dsi_pll(dssdev)) { - struct dsi_clock_info dsi_cinfo; - r = dsi_pll_calc_clock_div_pck(dpi.dsidev, is_tft, - timings->pixel_clock * 1000, - &dsi_cinfo, &dispc_cinfo); - - if (r) - return r; - - fck = dsi_cinfo.dsi_pll_hsdiv_dispc_clk; - } else { - struct dss_clock_info dss_cinfo; - r = dss_calc_clock_div(is_tft, timings->pixel_clock * 1000, - &dss_cinfo, &dispc_cinfo); - - if (r) - return r; - - fck = dss_cinfo.fck; - } - - lck_div = dispc_cinfo.lck_div; - pck_div = dispc_cinfo.pck_div; - - pck = fck / lck_div / pck_div / 1000; - - timings->pixel_clock = pck; - - return 0; -} -EXPORT_SYMBOL(dpi_check_timings); - -int dpi_init_display(struct omap_dss_device *dssdev) -{ - DSSDBG("init_display\n"); - - if (cpu_is_omap34xx() && dpi.vdds_dsi_reg == NULL) { - struct regulator *vdds_dsi; - - vdds_dsi = dss_get_vdds_dsi(); - - if (IS_ERR(vdds_dsi)) { - DSSERR("can't get VDDS_DSI regulator\n"); - return PTR_ERR(vdds_dsi); - } - - dpi.vdds_dsi_reg = vdds_dsi; - } - - if (dpi_use_dsi_pll(dssdev)) { - enum omap_dss_clk_source dispc_fclk_src = - dssdev->clocks.dispc.dispc_fclk_src; - dpi.dsidev = dpi_get_dsidev(dispc_fclk_src); - } - - return 0; -} - -int dpi_init(void) -{ - return 0; -} - -void dpi_exit(void) -{ -} - diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c deleted file mode 100644 index 52f36ec1c8b..00000000000 --- a/drivers/video/omap2/dss/dsi.c +++ /dev/null @@ -1,4885 +0,0 @@ -/* - * linux/drivers/video/omap2/dss/dsi.c - * - * Copyright (C) 2009 Nokia Corporation - * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program. If not, see <http://www.gnu.org/licenses/>. - */ - -#define DSS_SUBSYS_NAME "DSI" - -#include <linux/kernel.h> -#include <linux/io.h> -#include <linux/clk.h> -#include <linux/device.h> -#include <linux/err.h> -#include <linux/interrupt.h> -#include <linux/delay.h> -#include <linux/mutex.h> -#include <linux/module.h> -#include <linux/semaphore.h> -#include <linux/seq_file.h> -#include <linux/platform_device.h> -#include <linux/regulator/consumer.h> -#include <linux/wait.h> -#include <linux/workqueue.h> -#include <linux/sched.h> -#include <linux/slab.h> -#include <linux/debugfs.h> -#include <linux/pm_runtime.h> - -#include <video/omapdss.h> -#include <video/mipi_display.h> -#include <plat/clock.h> - -#include "dss.h" -#include "dss_features.h" - -/*#define VERBOSE_IRQ*/ -#define DSI_CATCH_MISSING_TE - -struct dsi_reg { u16 idx; }; - -#define DSI_REG(idx) ((const struct dsi_reg) { idx }) - -#define DSI_SZ_REGS SZ_1K -/* DSI Protocol Engine */ - -#define DSI_REVISION DSI_REG(0x0000) -#define DSI_SYSCONFIG DSI_REG(0x0010) -#define DSI_SYSSTATUS DSI_REG(0x0014) -#define DSI_IRQSTATUS DSI_REG(0x0018) -#define DSI_IRQENABLE DSI_REG(0x001C) -#define DSI_CTRL DSI_REG(0x0040) -#define DSI_GNQ DSI_REG(0x0044) -#define DSI_COMPLEXIO_CFG1 DSI_REG(0x0048) -#define DSI_COMPLEXIO_IRQ_STATUS DSI_REG(0x004C) -#define DSI_COMPLEXIO_IRQ_ENABLE DSI_REG(0x0050) -#define DSI_CLK_CTRL DSI_REG(0x0054) -#define DSI_TIMING1 DSI_REG(0x0058) -#define DSI_TIMING2 DSI_REG(0x005C) -#define DSI_VM_TIMING1 DSI_REG(0x0060) -#define DSI_VM_TIMING2 DSI_REG(0x0064) -#define DSI_VM_TIMING3 DSI_REG(0x0068) -#define DSI_CLK_TIMING DSI_REG(0x006C) -#define DSI_TX_FIFO_VC_SIZE DSI_REG(0x0070) -#define DSI_RX_FIFO_VC_SIZE DSI_REG(0x0074) -#define DSI_COMPLEXIO_CFG2 DSI_REG(0x0078) -#define DSI_RX_FIFO_VC_FULLNESS DSI_REG(0x007C) -#define DSI_VM_TIMING4 DSI_REG(0x0080) -#define DSI_TX_FIFO_VC_EMPTINESS DSI_REG(0x0084) -#define DSI_VM_TIMING5 DSI_REG(0x0088) -#define DSI_VM_TIMING6 DSI_REG(0x008C) -#define DSI_VM_TIMING7 DSI_REG(0x0090) -#define DSI_STOPCLK_TIMING DSI_REG(0x0094) -#define DSI_VC_CTRL(n) DSI_REG(0x0100 + (n * 0x20)) -#define DSI_VC_TE(n) DSI_REG(0x0104 + (n * 0x20)) -#define DSI_VC_LONG_PACKET_HEADER(n) DSI_REG(0x0108 + (n * 0x20)) -#define DSI_VC_LONG_PACKET_PAYLOAD(n) DSI_REG(0x010C + (n * 0x20)) -#define DSI_VC_SHORT_PACKET_HEADER(n) DSI_REG(0x0110 + (n * 0x20)) -#define DSI_VC_IRQSTATUS(n) DSI_REG(0x0118 + (n * 0x20)) -#define DSI_VC_IRQENABLE(n) DSI_REG(0x011C + (n * 0x20)) - -/* DSIPHY_SCP */ - -#define DSI_DSIPHY_CFG0 DSI_REG(0x200 + 0x0000) -#define DSI_DSIPHY_CFG1 DSI_REG(0x200 + 0x0004) -#define DSI_DSIPHY_CFG2 DSI_REG(0x200 + 0x0008) -#define DSI_DSIPHY_CFG5 DSI_REG(0x200 + 0x0014) -#define DSI_DSIPHY_CFG10 DSI_REG(0x200 + 0x0028) - -/* DSI_PLL_CTRL_SCP */ - -#define DSI_PLL_CONTROL DSI_REG(0x300 + 0x0000) -#define DSI_PLL_STATUS DSI_REG(0x300 + 0x0004) -#define DSI_PLL_GO DSI_REG(0x300 + 0x0008) -#define DSI_PLL_CONFIGURATION1 DSI_REG(0x300 + 0x000C) -#define DSI_PLL_CONFIGURATION2 DSI_REG(0x300 + 0x0010) - -#define REG_GET(dsidev, idx, start, end) \ - FLD_GET(dsi_read_reg(dsidev, idx), start, end) - -#define REG_FLD_MOD(dsidev, idx, val, start, end) \ - dsi_write_reg(dsidev, idx, FLD_MOD(dsi_read_reg(dsidev, idx), val, start, end)) - -/* Global interrupts */ -#define DSI_IRQ_VC0 (1 << 0) -#define DSI_IRQ_VC1 (1 << 1) -#define DSI_IRQ_VC2 (1 << 2) -#define DSI_IRQ_VC3 (1 << 3) -#define DSI_IRQ_WAKEUP (1 << 4) -#define DSI_IRQ_RESYNC (1 << 5) -#define DSI_IRQ_PLL_LOCK (1 << 7) -#define DSI_IRQ_PLL_UNLOCK (1 << 8) -#define DSI_IRQ_PLL_RECALL (1 << 9) -#define DSI_IRQ_COMPLEXIO_ERR (1 << 10) -#define DSI_IRQ_HS_TX_TIMEOUT (1 << 14) -#define DSI_IRQ_LP_RX_TIMEOUT (1 << 15) -#define DSI_IRQ_TE_TRIGGER (1 << 16) -#define DSI_IRQ_ACK_TRIGGER (1 << 17) -#define DSI_IRQ_SYNC_LOST (1 << 18) -#define DSI_IRQ_LDO_POWER_GOOD (1 << 19) -#define DSI_IRQ_TA_TIMEOUT (1 << 20) -#define DSI_IRQ_ERROR_MASK \ - (DSI_IRQ_HS_TX_TIMEOUT | DSI_IRQ_LP_RX_TIMEOUT | DSI_IRQ_SYNC_LOST | \ - DSI_IRQ_TA_TIMEOUT | DSI_IRQ_SYNC_LOST) -#define DSI_IRQ_CHANNEL_MASK 0xf - -/* Virtual channel interrupts */ -#define DSI_VC_IRQ_CS (1 << 0) -#define DSI_VC_IRQ_ECC_CORR (1 << 1) -#define DSI_VC_IRQ_PACKET_SENT (1 << 2) -#define DSI_VC_IRQ_FIFO_TX_OVF (1 << 3) -#define DSI_VC_IRQ_FIFO_RX_OVF (1 << 4) -#define DSI_VC_IRQ_BTA (1 << 5) -#define DSI_VC_IRQ_ECC_NO_CORR (1 << 6) -#define DSI_VC_IRQ_FIFO_TX_UDF (1 << 7) -#define DSI_VC_IRQ_PP_BUSY_CHANGE (1 << 8) -#define DSI_VC_IRQ_ERROR_MASK \ - (DSI_VC_IRQ_CS | DSI_VC_IRQ_ECC_CORR | DSI_VC_IRQ_FIFO_TX_OVF | \ - DSI_VC_IRQ_FIFO_RX_OVF | DSI_VC_IRQ_ECC_NO_CORR | \ - DSI_VC_IRQ_FIFO_TX_UDF) - -/* ComplexIO interrupts */ -#define DSI_CIO_IRQ_ERRSYNCESC1 (1 << 0) -#define DSI_CIO_IRQ_ERRSYNCESC2 (1 << 1) -#define DSI_CIO_IRQ_ERRSYNCESC3 (1 << 2) -#define DSI_CIO_IRQ_ERRSYNCESC4 (1 << 3) -#define DSI_CIO_IRQ_ERRSYNCESC5 (1 << 4) -#define DSI_CIO_IRQ_ERRESC1 (1 << 5) -#define DSI_CIO_IRQ_ERRESC2 (1 << 6) -#define DSI_CIO_IRQ_ERRESC3 (1 << 7) -#define DSI_CIO_IRQ_ERRESC4 (1 << 8) -#define DSI_CIO_IRQ_ERRESC5 (1 << 9) -#define DSI_CIO_IRQ_ERRCONTROL1 (1 << 10) -#define DSI_CIO_IRQ_ERRCONTROL2 (1 << 11) -#define DSI_CIO_IRQ_ERRCONTROL3 (1 << 12) -#define DSI_CIO_IRQ_ERRCONTROL4 (1 << 13) -#define DSI_CIO_IRQ_ERRCONTROL5 (1 << 14) -#define DSI_CIO_IRQ_STATEULPS1 (1 << 15) -#define DSI_CIO_IRQ_STATEULPS2 (1 << 16) -#define DSI_CIO_IRQ_STATEULPS3 (1 << 17) -#define DSI_CIO_IRQ_STATEULPS4 (1 << 18) -#define DSI_CIO_IRQ_STATEULPS5 (1 << 19) -#define DSI_CIO_IRQ_ERRCONTENTIONLP0_1 (1 << 20) -#define DSI_CIO_IRQ_ERRCONTENTIONLP1_1 (1 << 21) -#define DSI_CIO_IRQ_ERRCONTENTIONLP0_2 (1 << 22) -#define DSI_CIO_IRQ_ERRCONTENTIONLP1_2 (1 << 23) -#define DSI_CIO_IRQ_ERRCONTENTIONLP0_3 (1 << 24) -#define DSI_CIO_IRQ_ERRCONTENTIONLP1_3 (1 << 25) -#define DSI_CIO_IRQ_ERRCONTENTIONLP0_4 (1 << 26) -#define DSI_CIO_IRQ_ERRCONTENTIONLP1_4 (1 << 27) -#define DSI_CIO_IRQ_ERRCONTENTIONLP0_5 (1 << 28) -#define DSI_CIO_IRQ_ERRCONTENTIONLP1_5 (1 << 29) -#define DSI_CIO_IRQ_ULPSACTIVENOT_ALL0 (1 << 30) -#define DSI_CIO_IRQ_ULPSACTIVENOT_ALL1 (1 << 31) -#define DSI_CIO_IRQ_ERROR_MASK \ - (DSI_CIO_IRQ_ERRSYNCESC1 | DSI_CIO_IRQ_ERRSYNCESC2 | \ - DSI_CIO_IRQ_ERRSYNCESC3 | DSI_CIO_IRQ_ERRSYNCESC4 | \ - DSI_CIO_IRQ_ERRSYNCESC5 | \ - DSI_CIO_IRQ_ERRESC1 | DSI_CIO_IRQ_ERRESC2 | \ - DSI_CIO_IRQ_ERRESC3 | DSI_CIO_IRQ_ERRESC4 | \ - DSI_CIO_IRQ_ERRESC5 | \ - DSI_CIO_IRQ_ERRCONTROL1 | DSI_CIO_IRQ_ERRCONTROL2 | \ - DSI_CIO_IRQ_ERRCONTROL3 | DSI_CIO_IRQ_ERRCONTROL4 | \ - DSI_CIO_IRQ_ERRCONTROL5 | \ - DSI_CIO_IRQ_ERRCONTENTIONLP0_1 | DSI_CIO_IRQ_ERRCONTENTIONLP1_1 | \ - DSI_CIO_IRQ_ERRCONTENTIONLP0_2 | DSI_CIO_IRQ_ERRCONTENTIONLP1_2 | \ - DSI_CIO_IRQ_ERRCONTENTIONLP0_3 | DSI_CIO_IRQ_ERRCONTENTIONLP1_3 | \ - DSI_CIO_IRQ_ERRCONTENTIONLP0_4 | DSI_CIO_IRQ_ERRCONTENTIONLP1_4 | \ - DSI_CIO_IRQ_ERRCONTENTIONLP0_5 | DSI_CIO_IRQ_ERRCONTENTIONLP1_5) - -typedef void (*omap_dsi_isr_t) (void *arg, u32 mask); - -#define DSI_MAX_NR_ISRS 2 -#define DSI_MAX_NR_LANES 5 - -enum dsi_lane_function { - DSI_LANE_UNUSED = 0, - DSI_LANE_CLK, - DSI_LANE_DATA1, - DSI_LANE_DATA2, - DSI_LANE_DATA3, - DSI_LANE_DATA4, -}; - -struct dsi_lane_config { - enum dsi_lane_function function; - u8 polarity; -}; - -struct dsi_isr_data { - omap_dsi_isr_t isr; - void *arg; - u32 mask; -}; - -enum fifo_size { - DSI_FIFO_SIZE_0 = 0, - DSI_FIFO_SIZE_32 = 1, - DSI_FIFO_SIZE_64 = 2, - DSI_FIFO_SIZE_96 = 3, - DSI_FIFO_SIZE_128 = 4, -}; - -enum dsi_vc_source { - DSI_VC_SOURCE_L4 = 0, - DSI_VC_SOURCE_VP, -}; - -struct dsi_irq_stats { - unsigned long last_reset; - unsigned irq_count; - unsigned dsi_irqs[32]; - unsigned vc_irqs[4][32]; - unsigned cio_irqs[32]; -}; - -struct dsi_isr_tables { - struct dsi_isr_data isr_table[DSI_MAX_NR_ISRS]; - struct dsi_isr_data isr_table_vc[4][DSI_MAX_NR_ISRS]; - struct dsi_isr_data isr_table_cio[DSI_MAX_NR_ISRS]; -}; - -struct dsi_data { - struct platform_device *pdev; - void __iomem *base; - - int irq; - - struct clk *dss_clk; - struct clk *sys_clk; - - int (*enable_pads)(int dsi_id, unsigned lane_mask); - void (*disable_pads)(int dsi_id, unsigned lane_mask); - - struct dsi_clock_info current_cinfo; - - bool vdds_dsi_enabled; - struct regulator *vdds_dsi_reg; - - struct { - enum dsi_vc_source source; - struct omap_dss_device *dssdev; - enum fifo_size fifo_size; - int vc_id; - } vc[4]; - - struct mutex lock; - struct semaphore bus_lock; - - unsigned pll_locked; - - spinlock_t irq_lock; - struct dsi_isr_tables isr_tables; - /* space for a copy used by the interrupt handler */ - struct dsi_isr_tables isr_tables_copy; - - int update_channel; -#ifdef DEBUG - unsigned update_bytes; -#endif - - bool te_enabled; - bool ulps_enabled; - - void (*framedone_callback)(int, void *); - void *framedone_data; - - struct delayed_work framedone_timeout_work; - -#ifdef DSI_CATCH_MISSING_TE - struct timer_list te_timer; -#endif - - unsigned long cache_req_pck; - unsigned long cache_clk_freq; - struct dsi_clock_info cache_cinfo; - - u32 errors; - spinlock_t errors_lock; -#ifdef DEBUG - ktime_t perf_setup_time; - ktime_t perf_start_time; -#endif - int debug_read; - int debug_write; - -#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS - spinlock_t irq_stats_lock; - struct dsi_irq_stats irq_stats; -#endif - /* DSI PLL Parameter Ranges */ - unsigned long regm_max, regn_max; - unsigned long regm_dispc_max, regm_dsi_max; - unsigned long fint_min, fint_max; - unsigned long lpdiv_max; - - unsigned num_lanes_supported; - - struct dsi_lane_config lanes[DSI_MAX_NR_LANES]; - unsigned num_lanes_used; - - unsigned scp_clk_refcount; -}; - -struct dsi_packet_sent_handler_data { - struct platform_device *dsidev; - struct completion *completion; -}; - -static struct platform_device *dsi_pdev_map[MAX_NUM_DSI]; - -#ifdef DEBUG -static bool dsi_perf; -module_param(dsi_perf, bool, 0644); -#endif - -static inline struct dsi_data *dsi_get_dsidrv_data(struct platform_device *dsidev) -{ - return dev_get_drvdata(&dsidev->dev); -} - -static inline struct platform_device *dsi_get_dsidev_from_dssdev(struct omap_dss_device *dssdev) -{ - return dsi_pdev_map[dssdev->phy.dsi.module]; -} - -struct platform_device *dsi_get_dsidev_from_id(int module) -{ - return dsi_pdev_map[module]; -} - -static inline int dsi_get_dsidev_id(struct platform_device *dsidev) -{ - return dsidev->id; -} - -static inline void dsi_write_reg(struct platform_device *dsidev, - const struct dsi_reg idx, u32 val) -{ - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - - __raw_writel(val, dsi->base + idx.idx); -} - -static inline u32 dsi_read_reg(struct platform_device *dsidev, - const struct dsi_reg idx) -{ - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - - return __raw_readl(dsi->base + idx.idx); -} - -void dsi_bus_lock(struct omap_dss_device *dssdev) -{ - struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev); - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - - down(&dsi->bus_lock); -} -EXPORT_SYMBOL(dsi_bus_lock); - -void dsi_bus_unlock(struct omap_dss_device *dssdev) -{ - struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev); - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - - up(&dsi->bus_lock); -} -EXPORT_SYMBOL(dsi_bus_unlock); - -static bool dsi_bus_is_locked(struct platform_device *dsidev) -{ - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - - return dsi->bus_lock.count == 0; -} - -static void dsi_completion_handler(void *data, u32 mask) -{ - complete((struct completion *)data); -} - -static inline int wait_for_bit_change(struct platform_device *dsidev, - const struct dsi_reg idx, int bitnum, int value) -{ - unsigned long timeout; - ktime_t wait; - int t; - - /* first busyloop to see if the bit changes right away */ - t = 100; - while (t-- > 0) { - if (REG_GET(dsidev, idx, bitnum, bitnum) == value) - return value; - } - - /* then loop for 500ms, sleeping for 1ms in between */ - timeout = jiffies + msecs_to_jiffies(500); - while (time_before(jiffies, timeout)) { - if (REG_GET(dsidev, idx, bitnum, bitnum) == value) - return value; - - wait = ns_to_ktime(1000 * 1000); - set_current_state(TASK_UNINTERRUPTIBLE); - schedule_hrtimeout(&wait, HRTIMER_MODE_REL); - } - - return !value; -} - -u8 dsi_get_pixel_size(enum omap_dss_dsi_pixel_format fmt) -{ - switch (fmt) { - case OMAP_DSS_DSI_FMT_RGB888: - case OMAP_DSS_DSI_FMT_RGB666: - return 24; - case OMAP_DSS_DSI_FMT_RGB666_PACKED: - return 18; - case OMAP_DSS_DSI_FMT_RGB565: - return 16; - default: - BUG(); - } -} - -#ifdef DEBUG -static void dsi_perf_mark_setup(struct platform_device *dsidev) -{ - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - dsi->perf_setup_time = ktime_get(); -} - -static void dsi_perf_mark_start(struct platform_device *dsidev) -{ - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - dsi->perf_start_time = ktime_get(); -} - -static void dsi_perf_show(struct platform_device *dsidev, const char *name) -{ - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - ktime_t t, setup_time, trans_time; - u32 total_bytes; - u32 setup_us, trans_us, total_us; - - if (!dsi_perf) - return; - - t = ktime_get(); - - setup_time = ktime_sub(dsi->perf_start_time, dsi->perf_setup_time); - setup_us = (u32)ktime_to_us(setup_time); - if (setup_us == 0) - setup_us = 1; - - trans_time = ktime_sub(t, dsi->perf_start_time); - trans_us = (u32)ktime_to_us(trans_time); - if (trans_us == 0) - trans_us = 1; - - total_us = setup_us + trans_us; - - total_bytes = dsi->update_bytes; - - printk(KERN_INFO "DSI(%s): %u us + %u us = %u us (%uHz), " - "%u bytes, %u kbytes/sec\n", - name, - setup_us, - trans_us, - total_us, - 1000*1000 / total_us, - total_bytes, - total_bytes * 1000 / total_us); -} -#else -static inline void dsi_perf_mark_setup(struct platform_device *dsidev) -{ -} - -static inline void dsi_perf_mark_start(struct platform_device *dsidev) -{ -} - -static inline void dsi_perf_show(struct platform_device *dsidev, - const char *name) -{ -} -#endif - -static void print_irq_status(u32 status) -{ - if (status == 0) - return; - -#ifndef VERBOSE_IRQ - if ((status & ~DSI_IRQ_CHANNEL_MASK) == 0) - return; -#endif - printk(KERN_DEBUG "DSI IRQ: 0x%x: ", status); - -#define PIS(x) \ - if (status & DSI_IRQ_##x) \ - printk(#x " "); -#ifdef VERBOSE_IRQ - PIS(VC0); - PIS(VC1); - PIS(VC2); - PIS(VC3); -#endif - PIS(WAKEUP); - PIS(RESYNC); - PIS(PLL_LOCK); - PIS(PLL_UNLOCK); - PIS(PLL_RECALL); - PIS(COMPLEXIO_ERR); - PIS(HS_TX_TIMEOUT); - PIS(LP_RX_TIMEOUT); - PIS(TE_TRIGGER); - PIS(ACK_TRIGGER); - PIS(SYNC_LOST); - PIS(LDO_POWER_GOOD); - PIS(TA_TIMEOUT); -#undef PIS - - printk("\n"); -} - -static void print_irq_status_vc(int channel, u32 status) -{ - if (status == 0) - return; - -#ifndef VERBOSE_IRQ - if ((status & ~DSI_VC_IRQ_PACKET_SENT) == 0) - return; -#endif - printk(KERN_DEBUG "DSI VC(%d) IRQ 0x%x: ", channel, status); - -#define PIS(x) \ - if (status & DSI_VC_IRQ_##x) \ - printk(#x " "); - PIS(CS); - PIS(ECC_CORR); -#ifdef VERBOSE_IRQ - PIS(PACKET_SENT); -#endif - PIS(FIFO_TX_OVF); - PIS(FIFO_RX_OVF); - PIS(BTA); - PIS(ECC_NO_CORR); - PIS(FIFO_TX_UDF); - PIS(PP_BUSY_CHANGE); -#undef PIS - printk("\n"); -} - -static void print_irq_status_cio(u32 status) -{ - if (status == 0) - return; - - printk(KERN_DEBUG "DSI CIO IRQ 0x%x: ", status); - -#define PIS(x) \ - if (status & DSI_CIO_IRQ_##x) \ - printk(#x " "); - PIS(ERRSYNCESC1); - PIS(ERRSYNCESC2); - PIS(ERRSYNCESC3); - PIS(ERRESC1); - PIS(ERRESC2); - PIS(ERRESC3); - PIS(ERRCONTROL1); - PIS(ERRCONTROL2); - PIS(ERRCONTROL3); - PIS(STATEULPS1); - PIS(STATEULPS2); - PIS(STATEULPS3); - PIS(ERRCONTENTIONLP0_1); - PIS(ERRCONTENTIONLP1_1); - PIS(ERRCONTENTIONLP0_2); - PIS(ERRCONTENTIONLP1_2); - PIS(ERRCONTENTIONLP0_3); - PIS(ERRCONTENTIONLP1_3); - PIS(ULPSACTIVENOT_ALL0); - PIS(ULPSACTIVENOT_ALL1); -#undef PIS - - printk("\n"); -} - -#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS -static void dsi_collect_irq_stats(struct platform_device *dsidev, u32 irqstatus, - u32 *vcstatus, u32 ciostatus) -{ - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - int i; - - spin_lock(&dsi->irq_stats_lock); - - dsi->irq_stats.irq_count++; - dss_collect_irq_stats(irqstatus, dsi->irq_stats.dsi_irqs); - - for (i = 0; i < 4; ++i) - dss_collect_irq_stats(vcstatus[i], dsi->irq_stats.vc_irqs[i]); - - dss_collect_irq_stats(ciostatus, dsi->irq_stats.cio_irqs); - - spin_unlock(&dsi->irq_stats_lock); -} -#else -#define dsi_collect_irq_stats(dsidev, irqstatus, vcstatus, ciostatus) -#endif - -static int debug_irq; - -static void dsi_handle_irq_errors(struct platform_device *dsidev, u32 irqstatus, - u32 *vcstatus, u32 ciostatus) -{ - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - int i; - - if (irqstatus & DSI_IRQ_ERROR_MASK) { - DSSERR("DSI error, irqstatus %x\n", irqstatus); - print_irq_status(irqstatus); - spin_lock(&dsi->errors_lock); - dsi->errors |= irqstatus & DSI_IRQ_ERROR_MASK; - spin_unlock(&dsi->errors_lock); - } else if (debug_irq) { - print_irq_status(irqstatus); - } - - for (i = 0; i < 4; ++i) { - if (vcstatus[i] & DSI_VC_IRQ_ERROR_MASK) { - DSSERR("DSI VC(%d) error, vc irqstatus %x\n", - i, vcstatus[i]); - print_irq_status_vc(i, vcstatus[i]); - } else if (debug_irq) { - print_irq_status_vc(i, vcstatus[i]); - } - } - - if (ciostatus & DSI_CIO_IRQ_ERROR_MASK) { - DSSERR("DSI CIO error, cio irqstatus %x\n", ciostatus); - print_irq_status_cio(ciostatus); - } else if (debug_irq) { - print_irq_status_cio(ciostatus); - } -} - -static void dsi_call_isrs(struct dsi_isr_data *isr_array, - unsigned isr_array_size, u32 irqstatus) -{ - struct dsi_isr_data *isr_data; - int i; - - for (i = 0; i < isr_array_size; i++) { - isr_data = &isr_array[i]; - if (isr_data->isr && isr_data->mask & irqstatus) - isr_data->isr(isr_data->arg, irqstatus); - } -} - -static void dsi_handle_isrs(struct dsi_isr_tables *isr_tables, - u32 irqstatus, u32 *vcstatus, u32 ciostatus) -{ - int i; - - dsi_call_isrs(isr_tables->isr_table, - ARRAY_SIZE(isr_tables->isr_table), - irqstatus); - - for (i = 0; i < 4; ++i) { - if (vcstatus[i] == 0) - continue; - dsi_call_isrs(isr_tables->isr_table_vc[i], - ARRAY_SIZE(isr_tables->isr_table_vc[i]), - vcstatus[i]); - } - - if (ciostatus != 0) - dsi_call_isrs(isr_tables->isr_table_cio, - ARRAY_SIZE(isr_tables->isr_table_cio), - ciostatus); -} - -static irqreturn_t omap_dsi_irq_handler(int irq, void *arg) -{ - struct platform_device *dsidev; - struct dsi_data *dsi; - u32 irqstatus, vcstatus[4], ciostatus; - int i; - - dsidev = (struct platform_device *) arg; - dsi = dsi_get_dsidrv_data(dsidev); - - spin_lock(&dsi->irq_lock); - - irqstatus = dsi_read_reg(dsidev, DSI_IRQSTATUS); - - /* IRQ is not for us */ - if (!irqstatus) { - spin_unlock(&dsi->irq_lock); - return IRQ_NONE; - } - - dsi_write_reg(dsidev, DSI_IRQSTATUS, irqstatus & ~DSI_IRQ_CHANNEL_MASK); - /* flush posted write */ - dsi_read_reg(dsidev, DSI_IRQSTATUS); - - for (i = 0; i < 4; ++i) { - if ((irqstatus & (1 << i)) == 0) { - vcstatus[i] = 0; - continue; - } - - vcstatus[i] = dsi_read_reg(dsidev, DSI_VC_IRQSTATUS(i)); - - dsi_write_reg(dsidev, DSI_VC_IRQSTATUS(i), vcstatus[i]); - /* flush posted write */ - dsi_read_reg(dsidev, DSI_VC_IRQSTATUS(i)); - } - - if (irqstatus & DSI_IRQ_COMPLEXIO_ERR) { - ciostatus = dsi_read_reg(dsidev, DSI_COMPLEXIO_IRQ_STATUS); - - dsi_write_reg(dsidev, DSI_COMPLEXIO_IRQ_STATUS, ciostatus); - /* flush posted write */ - dsi_read_reg(dsidev, DSI_COMPLEXIO_IRQ_STATUS); - } else { - ciostatus = 0; - } - -#ifdef DSI_CATCH_MISSING_TE - if (irqstatus & DSI_IRQ_TE_TRIGGER) - del_timer(&dsi->te_timer); -#endif - - /* make a copy and unlock, so that isrs can unregister - * themselves */ - memcpy(&dsi->isr_tables_copy, &dsi->isr_tables, - sizeof(dsi->isr_tables)); - - spin_unlock(&dsi->irq_lock); - - dsi_handle_isrs(&dsi->isr_tables_copy, irqstatus, vcstatus, ciostatus); - - dsi_handle_irq_errors(dsidev, irqstatus, vcstatus, ciostatus); - - dsi_collect_irq_stats(dsidev, irqstatus, vcstatus, ciostatus); - - return IRQ_HANDLED; -} - -/* dsi->irq_lock has to be locked by the caller */ -static void _omap_dsi_configure_irqs(struct platform_device *dsidev, - struct dsi_isr_data *isr_array, - unsigned isr_array_size, u32 default_mask, - const struct dsi_reg enable_reg, - const struct dsi_reg status_reg) -{ - struct dsi_isr_data *isr_data; - u32 mask; - u32 old_mask; - int i; - - mask = default_mask; - - for (i = 0; i < isr_array_size; i++) { - isr_data = &isr_array[i]; - - if (isr_data->isr == NULL) - continue; - - mask |= isr_data->mask; - } - - old_mask = dsi_read_reg(dsidev, enable_reg); - /* clear the irqstatus for newly enabled irqs */ - dsi_write_reg(dsidev, status_reg, (mask ^ old_mask) & mask); - dsi_write_reg(dsidev, enable_reg, mask); - - /* flush posted writes */ - dsi_read_reg(dsidev, enable_reg); - dsi_read_reg(dsidev, status_reg); -} - -/* dsi->irq_lock has to be locked by the caller */ -static void _omap_dsi_set_irqs(struct platform_device *dsidev) -{ - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - u32 mask = DSI_IRQ_ERROR_MASK; -#ifdef DSI_CATCH_MISSING_TE - mask |= DSI_IRQ_TE_TRIGGER; -#endif - _omap_dsi_configure_irqs(dsidev, dsi->isr_tables.isr_table, - ARRAY_SIZE(dsi->isr_tables.isr_table), mask, - DSI_IRQENABLE, DSI_IRQSTATUS); -} - -/* dsi->irq_lock has to be locked by the caller */ -static void _omap_dsi_set_irqs_vc(struct platform_device *dsidev, int vc) -{ - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - - _omap_dsi_configure_irqs(dsidev, dsi->isr_tables.isr_table_vc[vc], - ARRAY_SIZE(dsi->isr_tables.isr_table_vc[vc]), - DSI_VC_IRQ_ERROR_MASK, - DSI_VC_IRQENABLE(vc), DSI_VC_IRQSTATUS(vc)); -} - -/* dsi->irq_lock has to be locked by the caller */ -static void _omap_dsi_set_irqs_cio(struct platform_device *dsidev) -{ - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - - _omap_dsi_configure_irqs(dsidev, dsi->isr_tables.isr_table_cio, - ARRAY_SIZE(dsi->isr_tables.isr_table_cio), - DSI_CIO_IRQ_ERROR_MASK, - DSI_COMPLEXIO_IRQ_ENABLE, DSI_COMPLEXIO_IRQ_STATUS); -} - -static void _dsi_initialize_irq(struct platform_device *dsidev) -{ - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - unsigned long flags; - int vc; - - spin_lock_irqsave(&dsi->irq_lock, flags); - - memset(&dsi->isr_tables, 0, sizeof(dsi->isr_tables)); - - _omap_dsi_set_irqs(dsidev); - for (vc = 0; vc < 4; ++vc) - _omap_dsi_set_irqs_vc(dsidev, vc); - _omap_dsi_set_irqs_cio(dsidev); - - spin_unlock_irqrestore(&dsi->irq_lock, flags); -} - -static int _dsi_register_isr(omap_dsi_isr_t isr, void *arg, u32 mask, - struct dsi_isr_data *isr_array, unsigned isr_array_size) -{ - struct dsi_isr_data *isr_data; - int free_idx; - int i; - - BUG_ON(isr == NULL); - - /* check for duplicate entry and find a free slot */ - free_idx = -1; - for (i = 0; i < isr_array_size; i++) { - isr_data = &isr_array[i]; - - if (isr_data->isr == isr && isr_data->arg == arg && - isr_data->mask == mask) { - return -EINVAL; - } - - if (isr_data->isr == NULL && free_idx == -1) - free_idx = i; - } - - if (free_idx == -1) - return -EBUSY; - - isr_data = &isr_array[free_idx]; - isr_data->isr = isr; - isr_data->arg = arg; - isr_data->mask = mask; - - return 0; -} - -static int _dsi_unregister_isr(omap_dsi_isr_t isr, void *arg, u32 mask, - struct dsi_isr_data *isr_array, unsigned isr_array_size) -{ - struct dsi_isr_data *isr_data; - int i; - - for (i = 0; i < isr_array_size; i++) { - isr_data = &isr_array[i]; - if (isr_data->isr != isr || isr_data->arg != arg || - isr_data->mask != mask) - continue; - - isr_data->isr = NULL; - isr_data->arg = NULL; - isr_data->mask = 0; - - return 0; - } - - return -EINVAL; -} - -static int dsi_register_isr(struct platform_device *dsidev, omap_dsi_isr_t isr, - void *arg, u32 mask) -{ - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - unsigned long flags; - int r; - - spin_lock_irqsave(&dsi->irq_lock, flags); - - r = _dsi_register_isr(isr, arg, mask, dsi->isr_tables.isr_table, - ARRAY_SIZE(dsi->isr_tables.isr_table)); - - if (r == 0) - _omap_dsi_set_irqs(dsidev); - - spin_unlock_irqrestore(&dsi->irq_lock, flags); - - return r; -} - -static int dsi_unregister_isr(struct platform_device *dsidev, - omap_dsi_isr_t isr, void *arg, u32 mask) -{ - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - unsigned long flags; - int r; - - spin_lock_irqsave(&dsi->irq_lock, flags); - - r = _dsi_unregister_isr(isr, arg, mask, dsi->isr_tables.isr_table, - ARRAY_SIZE(dsi->isr_tables.isr_table)); - - if (r == 0) - _omap_dsi_set_irqs(dsidev); - - spin_unlock_irqrestore(&dsi->irq_lock, flags); - - return r; -} - -static int dsi_register_isr_vc(struct platform_device *dsidev, int channel, - omap_dsi_isr_t isr, void *arg, u32 mask) -{ - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - unsigned long flags; - int r; - - spin_lock_irqsave(&dsi->irq_lock, flags); - - r = _dsi_register_isr(isr, arg, mask, - dsi->isr_tables.isr_table_vc[channel], - ARRAY_SIZE(dsi->isr_tables.isr_table_vc[channel])); - - if (r == 0) - _omap_dsi_set_irqs_vc(dsidev, channel); - - spin_unlock_irqrestore(&dsi->irq_lock, flags); - - return r; -} - -static int dsi_unregister_isr_vc(struct platform_device *dsidev, int channel, - omap_dsi_isr_t isr, void *arg, u32 mask) -{ - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - unsigned long flags; - int r; - - spin_lock_irqsave(&dsi->irq_lock, flags); - - r = _dsi_unregister_isr(isr, arg, mask, - dsi->isr_tables.isr_table_vc[channel], - ARRAY_SIZE(dsi->isr_tables.isr_table_vc[channel])); - - if (r == 0) - _omap_dsi_set_irqs_vc(dsidev, channel); - - spin_unlock_irqrestore(&dsi->irq_lock, flags); - - return r; -} - -static int dsi_register_isr_cio(struct platform_device *dsidev, - omap_dsi_isr_t isr, void *arg, u32 mask) -{ - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - unsigned long flags; - int r; - - spin_lock_irqsave(&dsi->irq_lock, flags); - - r = _dsi_register_isr(isr, arg, mask, dsi->isr_tables.isr_table_cio, - ARRAY_SIZE(dsi->isr_tables.isr_table_cio)); - - if (r == 0) - _omap_dsi_set_irqs_cio(dsidev); - - spin_unlock_irqrestore(&dsi->irq_lock, flags); - - return r; -} - -static int dsi_unregister_isr_cio(struct platform_device *dsidev, - omap_dsi_isr_t isr, void *arg, u32 mask) -{ - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - unsigned long flags; - int r; - - spin_lock_irqsave(&dsi->irq_lock, flags); - - r = _dsi_unregister_isr(isr, arg, mask, dsi->isr_tables.isr_table_cio, - ARRAY_SIZE(dsi->isr_tables.isr_table_cio)); - - if (r == 0) - _omap_dsi_set_irqs_cio(dsidev); - - spin_unlock_irqrestore(&dsi->irq_lock, flags); - - return r; -} - -static u32 dsi_get_errors(struct platform_device *dsidev) -{ - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - unsigned long flags; - u32 e; - spin_lock_irqsave(&dsi->errors_lock, flags); - e = dsi->errors; - dsi->errors = 0; - spin_unlock_irqrestore(&dsi->errors_lock, flags); - return e; -} - -int dsi_runtime_get(struct platform_device *dsidev) -{ - int r; - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - - DSSDBG("dsi_runtime_get\n"); - - r = pm_runtime_get_sync(&dsi->pdev->dev); - WARN_ON(r < 0); - return r < 0 ? r : 0; -} - -void dsi_runtime_put(struct platform_device *dsidev) -{ - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - int r; - - DSSDBG("dsi_runtime_put\n"); - - r = pm_runtime_put_sync(&dsi->pdev->dev); - WARN_ON(r < 0); -} - -/* source clock for DSI PLL. this could also be PCLKFREE */ -static inline void dsi_enable_pll_clock(struct platform_device *dsidev, - bool enable) -{ - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - - if (enable) - clk_enable(dsi->sys_clk); - else - clk_disable(dsi->sys_clk); - - if (enable && dsi->pll_locked) { - if (wait_for_bit_change(dsidev, DSI_PLL_STATUS, 1, 1) != 1) - DSSERR("cannot lock PLL when enabling clocks\n"); - } -} - -#ifdef DEBUG -static void _dsi_print_reset_status(struct platform_device *dsidev) -{ - u32 l; - int b0, b1, b2; - - if (!dss_debug) - return; - - /* A dummy read using the SCP interface to any DSIPHY register is - * required after DSIPHY reset to complete the reset of the DSI complex - * I/O. */ - l = dsi_read_reg(dsidev, DSI_DSIPHY_CFG5); - - printk(KERN_DEBUG "DSI resets: "); - - l = dsi_read_reg(dsidev, DSI_PLL_STATUS); - printk("PLL (%d) ", FLD_GET(l, 0, 0)); - - l = dsi_read_reg(dsidev, DSI_COMPLEXIO_CFG1); - printk("CIO (%d) ", FLD_GET(l, 29, 29)); - - if (dss_has_feature(FEAT_DSI_REVERSE_TXCLKESC)) { - b0 = 28; - b1 = 27; - b2 = 26; - } else { - b0 = 24; - b1 = 25; - b2 = 26; - } - - l = dsi_read_reg(dsidev, DSI_DSIPHY_CFG5); - printk("PHY (%x%x%x, %d, %d, %d)\n", - FLD_GET(l, b0, b0), - FLD_GET(l, b1, b1), - FLD_GET(l, b2, b2), - FLD_GET(l, 29, 29), - FLD_GET(l, 30, 30), - FLD_GET(l, 31, 31)); -} -#else -#define _dsi_print_reset_status(x) -#endif - -static inline int dsi_if_enable(struct platform_device *dsidev, bool enable) -{ - DSSDBG("dsi_if_enable(%d)\n", enable); - - enable = enable ? 1 : 0; - REG_FLD_MOD(dsidev, DSI_CTRL, enable, 0, 0); /* IF_EN */ - - if (wait_for_bit_change(dsidev, DSI_CTRL, 0, enable) != enable) { - DSSERR("Failed to set dsi_if_enable to %d\n", enable); - return -EIO; - } - - return 0; -} - -unsigned long dsi_get_pll_hsdiv_dispc_rate(struct platform_device *dsidev) -{ - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - - return dsi->current_cinfo.dsi_pll_hsdiv_dispc_clk; -} - -static unsigned long dsi_get_pll_hsdiv_dsi_rate(struct platform_device *dsidev) -{ - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - - return dsi->current_cinfo.dsi_pll_hsdiv_dsi_clk; -} - -static unsigned long dsi_get_txbyteclkhs(struct platform_device *dsidev) -{ - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - - return dsi->current_cinfo.clkin4ddr / 16; -} - -static unsigned long dsi_fclk_rate(struct platform_device *dsidev) -{ - unsigned long r; - int dsi_module = dsi_get_dsidev_id(dsidev); - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - - if (dss_get_dsi_clk_source(dsi_module) == OMAP_DSS_CLK_SRC_FCK) { - /* DSI FCLK source is DSS_CLK_FCK */ - r = clk_get_rate(dsi->dss_clk); - } else { - /* DSI FCLK source is dsi_pll_hsdiv_dsi_clk */ - r = dsi_get_pll_hsdiv_dsi_rate(dsidev); - } - - return r; -} - -static int dsi_set_lp_clk_divisor(struct omap_dss_device *dssdev) -{ - struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev); - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - unsigned long dsi_fclk; - unsigned lp_clk_div; - unsigned long lp_clk; - - lp_clk_div = dssdev->clocks.dsi.lp_clk_div; - - if (lp_clk_div == 0 || lp_clk_div > dsi->lpdiv_max) - return -EINVAL; - - dsi_fclk = dsi_fclk_rate(dsidev); - - lp_clk = dsi_fclk / 2 / lp_clk_div; - - DSSDBG("LP_CLK_DIV %u, LP_CLK %lu\n", lp_clk_div, lp_clk); - dsi->current_cinfo.lp_clk = lp_clk; - dsi->current_cinfo.lp_clk_div = lp_clk_div; - - /* LP_CLK_DIVISOR */ - REG_FLD_MOD(dsidev, DSI_CLK_CTRL, lp_clk_div, 12, 0); - - /* LP_RX_SYNCHRO_ENABLE */ - REG_FLD_MOD(dsidev, DSI_CLK_CTRL, dsi_fclk > 30000000 ? 1 : 0, 21, 21); - - return 0; -} - -static void dsi_enable_scp_clk(struct platform_device *dsidev) -{ - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - - if (dsi->scp_clk_refcount++ == 0) - REG_FLD_MOD(dsidev, DSI_CLK_CTRL, 1, 14, 14); /* CIO_CLK_ICG */ -} - -static void dsi_disable_scp_clk(struct platform_device *dsidev) -{ - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - - WARN_ON(dsi->scp_clk_refcount == 0); - if (--dsi->scp_clk_refcount == 0) - REG_FLD_MOD(dsidev, DSI_CLK_CTRL, 0, 14, 14); /* CIO_CLK_ICG */ -} - -enum dsi_pll_power_state { - DSI_PLL_POWER_OFF = 0x0, - DSI_PLL_POWER_ON_HSCLK = 0x1, - DSI_PLL_POWER_ON_ALL = 0x2, - DSI_PLL_POWER_ON_DIV = 0x3, -}; - -static int dsi_pll_power(struct platform_device *dsidev, - enum dsi_pll_power_state state) -{ - int t = 0; - - /* DSI-PLL power command 0x3 is not working */ - if (dss_has_feature(FEAT_DSI_PLL_PWR_BUG) && - state == DSI_PLL_POWER_ON_DIV) - state = DSI_PLL_POWER_ON_ALL; - - /* PLL_PWR_CMD */ - REG_FLD_MOD(dsidev, DSI_CLK_CTRL, state, 31, 30); - - /* PLL_PWR_STATUS */ - while (FLD_GET(dsi_read_reg(dsidev, DSI_CLK_CTRL), 29, 28) != state) { - if (++t > 1000) { - DSSERR("Failed to set DSI PLL power mode to %d\n", - state); - return -ENODEV; - } - udelay(1); - } - - return 0; -} - -/* calculate clock rates using dividers in cinfo */ -static int dsi_calc_clock_rates(struct omap_dss_device *dssdev, - struct dsi_clock_info *cinfo) -{ - struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev); - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - - if (cinfo->regn == 0 || cinfo->regn > dsi->regn_max) - return -EINVAL; - - if (cinfo->regm == 0 || cinfo->regm > dsi->regm_max) - return -EINVAL; - - if (cinfo->regm_dispc > dsi->regm_dispc_max) - return -EINVAL; - - if (cinfo->regm_dsi > dsi->regm_dsi_max) - return -EINVAL; - - if (cinfo->use_sys_clk) { - cinfo->clkin = clk_get_rate(dsi->sys_clk); - /* XXX it is unclear if highfreq should be used - * with DSS_SYS_CLK source also */ - cinfo->highfreq = 0; - } else { - cinfo->clkin = dispc_mgr_pclk_rate(dssdev->manager->id); - - if (cinfo->clkin < 32000000) - cinfo->highfreq = 0; - else - cinfo->highfreq = 1; - } - - cinfo->fint = cinfo->clkin / (cinfo->regn * (cinfo->highfreq ? 2 : 1)); - - if (cinfo->fint > dsi->fint_max || cinfo->fint < dsi->fint_min) - return -EINVAL; - - cinfo->clkin4ddr = 2 * cinfo->regm * cinfo->fint; - - if (cinfo->clkin4ddr > 1800 * 1000 * 1000) - return -EINVAL; - - if (cinfo->regm_dispc > 0) - cinfo->dsi_pll_hsdiv_dispc_clk = - cinfo->clkin4ddr / cinfo->regm_dispc; - else - cinfo->dsi_pll_hsdiv_dispc_clk = 0; - - if (cinfo->regm_dsi > 0) - cinfo->dsi_pll_hsdiv_dsi_clk = - cinfo->clkin4ddr / cinfo->regm_dsi; - else - cinfo->dsi_pll_hsdiv_dsi_clk = 0; - - return 0; -} - -int dsi_pll_calc_clock_div_pck(struct platform_device *dsidev, bool is_tft, - unsigned long req_pck, struct dsi_clock_info *dsi_cinfo, - struct dispc_clock_info *dispc_cinfo) -{ - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - struct dsi_clock_info cur, best; - struct dispc_clock_info best_dispc; - int min_fck_per_pck; - int match = 0; - unsigned long dss_sys_clk, max_dss_fck; - - dss_sys_clk = clk_get_rate(dsi->sys_clk); - - max_dss_fck = dss_feat_get_param_max(FEAT_PARAM_DSS_FCK); - - if (req_pck == dsi->cache_req_pck && - dsi->cache_cinfo.clkin == dss_sys_clk) { - DSSDBG("DSI clock info found from cache\n"); - *dsi_cinfo = dsi->cache_cinfo; - dispc_find_clk_divs(is_tft, req_pck, - dsi_cinfo->dsi_pll_hsdiv_dispc_clk, dispc_cinfo); - return 0; - } - - min_fck_per_pck = CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK; - - if (min_fck_per_pck && - req_pck * min_fck_per_pck > max_dss_fck) { - DSSERR("Requested pixel clock not possible with the current " - "OMAP2_DSS_MIN_FCK_PER_PCK setting. Turning " - "the constraint off.\n"); - min_fck_per_pck = 0; - } - - DSSDBG("dsi_pll_calc\n"); - -retry: - memset(&best, 0, sizeof(best)); - memset(&best_dispc, 0, sizeof(best_dispc)); - - memset(&cur, 0, sizeof(cur)); - cur.clkin = dss_sys_clk; - cur.use_sys_clk = 1; - cur.highfreq = 0; - - /* no highfreq: 0.75MHz < Fint = clkin / regn < 2.1MHz */ - /* highfreq: 0.75MHz < Fint = clkin / (2*regn) < 2.1MHz */ - /* To reduce PLL lock time, keep Fint high (around 2 MHz) */ - for (cur.regn = 1; cur.regn < dsi->regn_max; ++cur.regn) { - if (cur.highfreq == 0) - cur.fint = cur.clkin / cur.regn; - else - cur.fint = cur.clkin / (2 * cur.regn); - - if (cur.fint > dsi->fint_max || cur.fint < dsi->fint_min) - continue; - - /* DSIPHY(MHz) = (2 * regm / regn) * (clkin / (highfreq + 1)) */ - for (cur.regm = 1; cur.regm < dsi->regm_max; ++cur.regm) { - unsigned long a, b; - - a = 2 * cur.regm * (cur.clkin/1000); - b = cur.regn * (cur.highfreq + 1); - cur.clkin4ddr = a / b * 1000; - - if (cur.clkin4ddr > 1800 * 1000 * 1000) - break; - - /* dsi_pll_hsdiv_dispc_clk(MHz) = - * DSIPHY(MHz) / regm_dispc < 173MHz/186Mhz */ - for (cur.regm_dispc = 1; cur.regm_dispc < - dsi->regm_dispc_max; ++cur.regm_dispc) { - struct dispc_clock_info cur_dispc; - cur.dsi_pll_hsdiv_dispc_clk = - cur.clkin4ddr / cur.regm_dispc; - - /* this will narrow down the search a bit, - * but still give pixclocks below what was - * requested */ - if (cur.dsi_pll_hsdiv_dispc_clk < req_pck) - break; - - if (cur.dsi_pll_hsdiv_dispc_clk > max_dss_fck) - continue; - - if (min_fck_per_pck && - cur.dsi_pll_hsdiv_dispc_clk < - req_pck * min_fck_per_pck) - continue; - - match = 1; - - dispc_find_clk_divs(is_tft, req_pck, - cur.dsi_pll_hsdiv_dispc_clk, - &cur_dispc); - - if (abs(cur_dispc.pck - req_pck) < - abs(best_dispc.pck - req_pck)) { - best = cur; - best_dispc = cur_dispc; - - if (cur_dispc.pck == req_pck) - goto found; - } - } - } - } -found: - if (!match) { - if (min_fck_per_pck) { - DSSERR("Could not find suitable clock settings.\n" - "Turning FCK/PCK constraint off and" - "trying again.\n"); - min_fck_per_pck = 0; - goto retry; - } - - DSSERR("Could not find suitable clock settings.\n"); - - return -EINVAL; - } - - /* dsi_pll_hsdiv_dsi_clk (regm_dsi) is not used */ - best.regm_dsi = 0; - best.dsi_pll_hsdiv_dsi_clk = 0; - - if (dsi_cinfo) - *dsi_cinfo = best; - if (dispc_cinfo) - *dispc_cinfo = best_dispc; - - dsi->cache_req_pck = req_pck; - dsi->cache_clk_freq = 0; - dsi->cache_cinfo = best; - - return 0; -} - -int dsi_pll_set_clock_div(struct platform_device *dsidev, - struct dsi_clock_info *cinfo) -{ - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - int r = 0; - u32 l; - int f = 0; - u8 regn_start, regn_end, regm_start, regm_end; - u8 regm_dispc_start, regm_dispc_end, regm_dsi_start, regm_dsi_end; - - DSSDBGF(); - - dsi->current_cinfo.use_sys_clk = cinfo->use_sys_clk; - dsi->current_cinfo.highfreq = cinfo->highfreq; - - dsi->current_cinfo.fint = cinfo->fint; - dsi->current_cinfo.clkin4ddr = cinfo->clkin4ddr; - dsi->current_cinfo.dsi_pll_hsdiv_dispc_clk = - cinfo->dsi_pll_hsdiv_dispc_clk; - dsi->current_cinfo.dsi_pll_hsdiv_dsi_clk = - cinfo->dsi_pll_hsdiv_dsi_clk; - - dsi->current_cinfo.regn = cinfo->regn; - dsi->current_cinfo.regm = cinfo->regm; - dsi->current_cinfo.regm_dispc = cinfo->regm_dispc; - dsi->current_cinfo.regm_dsi = cinfo->regm_dsi; - - DSSDBG("DSI Fint %ld\n", cinfo->fint); - - DSSDBG("clkin (%s) rate %ld, highfreq %d\n", - cinfo->use_sys_clk ? "dss_sys_clk" : "pclkfree", - cinfo->clkin, - cinfo->highfreq); - - /* DSIPHY == CLKIN4DDR */ - DSSDBG("CLKIN4DDR = 2 * %d / %d * %lu / %d = %lu\n", - cinfo->regm, - cinfo->regn, - cinfo->clkin, - cinfo->highfreq + 1, - cinfo->clkin4ddr); - - DSSDBG("Data rate on 1 DSI lane %ld Mbps\n", - cinfo->clkin4ddr / 1000 / 1000 / 2); - - DSSDBG("Clock lane freq %ld Hz\n", cinfo->clkin4ddr / 4); - - DSSDBG("regm_dispc = %d, %s (%s) = %lu\n", cinfo->regm_dispc, - dss_get_generic_clk_source_name(OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC), - dss_feat_get_clk_source_name(OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC), - cinfo->dsi_pll_hsdiv_dispc_clk); - DSSDBG("regm_dsi = %d, %s (%s) = %lu\n", cinfo->regm_dsi, - dss_get_generic_clk_source_name(OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI), - dss_feat_get_clk_source_name(OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI), - cinfo->dsi_pll_hsdiv_dsi_clk); - - dss_feat_get_reg_field(FEAT_REG_DSIPLL_REGN, ®n_start, ®n_end); - dss_feat_get_reg_field(FEAT_REG_DSIPLL_REGM, ®m_start, ®m_end); - dss_feat_get_reg_field(FEAT_REG_DSIPLL_REGM_DISPC, ®m_dispc_start, - ®m_dispc_end); - dss_feat_get_reg_field(FEAT_REG_DSIPLL_REGM_DSI, ®m_dsi_start, - ®m_dsi_end); - - /* DSI_PLL_AUTOMODE = manual */ - REG_FLD_MOD(dsidev, DSI_PLL_CONTROL, 0, 0, 0); - - l = dsi_read_reg(dsidev, DSI_PLL_CONFIGURATION1); - l = FLD_MOD(l, 1, 0, 0); /* DSI_PLL_STOPMODE */ - /* DSI_PLL_REGN */ - l = FLD_MOD(l, cinfo->regn - 1, regn_start, regn_end); - /* DSI_PLL_REGM */ - l = FLD_MOD(l, cinfo->regm, regm_start, regm_end); - /* DSI_CLOCK_DIV */ - l = FLD_MOD(l, cinfo->regm_dispc > 0 ? cinfo->regm_dispc - 1 : 0, - regm_dispc_start, regm_dispc_end); - /* DSIPROTO_CLOCK_DIV */ - l = FLD_MOD(l, cinfo->regm_dsi > 0 ? cinfo->regm_dsi - 1 : 0, - regm_dsi_start, regm_dsi_end); - dsi_write_reg(dsidev, DSI_PLL_CONFIGURATION1, l); - - BUG_ON(cinfo->fint < dsi->fint_min || cinfo->fint > dsi->fint_max); - - if (dss_has_feature(FEAT_DSI_PLL_FREQSEL)) { - f = cinfo->fint < 1000000 ? 0x3 : - cinfo->fint < 1250000 ? 0x4 : - cinfo->fint < 1500000 ? 0x5 : - cinfo->fint < 1750000 ? 0x6 : - 0x7; - } - - l = dsi_read_reg(dsidev, DSI_PLL_CONFIGURATION2); - - if (dss_has_feature(FEAT_DSI_PLL_FREQSEL)) - l = FLD_MOD(l, f, 4, 1); /* DSI_PLL_FREQSEL */ - l = FLD_MOD(l, cinfo->use_sys_clk ? 0 : 1, - 11, 11); /* DSI_PLL_CLKSEL */ - l = FLD_MOD(l, cinfo->highfreq, - 12, 12); /* DSI_PLL_HIGHFREQ */ - l = FLD_MOD(l, 1, 13, 13); /* DSI_PLL_REFEN */ - l = FLD_MOD(l, 0, 14, 14); /* DSIPHY_CLKINEN */ - l = FLD_MOD(l, 1, 20, 20); /* DSI_HSDIVBYPASS */ - dsi_write_reg(dsidev, DSI_PLL_CONFIGURATION2, l); - - REG_FLD_MOD(dsidev, DSI_PLL_GO, 1, 0, 0); /* DSI_PLL_GO */ - - if (wait_for_bit_change(dsidev, DSI_PLL_GO, 0, 0) != 0) { - DSSERR("dsi pll go bit not going down.\n"); - r = -EIO; - goto err; - } - - if (wait_for_bit_change(dsidev, DSI_PLL_STATUS, 1, 1) != 1) { - DSSERR("cannot lock PLL\n"); - r = -EIO; - goto err; - } - - dsi->pll_locked = 1; - - l = dsi_read_reg(dsidev, DSI_PLL_CONFIGURATION2); - l = FLD_MOD(l, 0, 0, 0); /* DSI_PLL_IDLE */ - l = FLD_MOD(l, 0, 5, 5); /* DSI_PLL_PLLLPMODE */ - l = FLD_MOD(l, 0, 6, 6); /* DSI_PLL_LOWCURRSTBY */ - l = FLD_MOD(l, 0, 7, 7); /* DSI_PLL_TIGHTPHASELOCK */ - l = FLD_MOD(l, 0, 8, 8); /* DSI_PLL_DRIFTGUARDEN */ - l = FLD_MOD(l, 0, 10, 9); /* DSI_PLL_LOCKSEL */ - l = FLD_MOD(l, 1, 13, 13); /* DSI_PLL_REFEN */ - l = FLD_MOD(l, 1, 14, 14); /* DSIPHY_CLKINEN */ - l = FLD_MOD(l, 0, 15, 15); /* DSI_BYPASSEN */ - l = FLD_MOD(l, 1, 16, 16); /* DSS_CLOCK_EN */ - l = FLD_MOD(l, 0, 17, 17); /* DSS_CLOCK_PWDN */ - l = FLD_MOD(l, 1, 18, 18); /* DSI_PROTO_CLOCK_EN */ - l = FLD_MOD(l, 0, 19, 19); /* DSI_PROTO_CLOCK_PWDN */ - l = FLD_MOD(l, 0, 20, 20); /* DSI_HSDIVBYPASS */ - dsi_write_reg(dsidev, DSI_PLL_CONFIGURATION2, l); - - DSSDBG("PLL config done\n"); -err: - return r; -} - -int dsi_pll_init(struct platform_device *dsidev, bool enable_hsclk, - bool enable_hsdiv) -{ - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - int r = 0; - enum dsi_pll_power_state pwstate; - - DSSDBG("PLL init\n"); - - if (dsi->vdds_dsi_reg == NULL) { - struct regulator *vdds_dsi; - - vdds_dsi = regulator_get(&dsi->pdev->dev, "vdds_dsi"); - - if (IS_ERR(vdds_dsi)) { - DSSERR("can't get VDDS_DSI regulator\n"); - return PTR_ERR(vdds_dsi); - } - - dsi->vdds_dsi_reg = vdds_dsi; - } - - dsi_enable_pll_clock(dsidev, 1); - /* - * Note: SCP CLK is not required on OMAP3, but it is required on OMAP4. - */ - dsi_enable_scp_clk(dsidev); - - if (!dsi->vdds_dsi_enabled) { - r = regulator_enable(dsi->vdds_dsi_reg); - if (r) - goto err0; - dsi->vdds_dsi_enabled = true; - } - - /* XXX PLL does not come out of reset without this... */ - dispc_pck_free_enable(1); - - if (wait_for_bit_change(dsidev, DSI_PLL_STATUS, 0, 1) != 1) { - DSSERR("PLL not coming out of reset.\n"); - r = -ENODEV; - dispc_pck_free_enable(0); - goto err1; - } - - /* XXX ... but if left on, we get problems when planes do not - * fill the whole display. No idea about this */ - dispc_pck_free_enable(0); - - if (enable_hsclk && enable_hsdiv) - pwstate = DSI_PLL_POWER_ON_ALL; - else if (enable_hsclk) - pwstate = DSI_PLL_POWER_ON_HSCLK; - else if (enable_hsdiv) - pwstate = DSI_PLL_POWER_ON_DIV; - else - pwstate = DSI_PLL_POWER_OFF; - - r = dsi_pll_power(dsidev, pwstate); - - if (r) - goto err1; - - DSSDBG("PLL init done\n"); - - return 0; -err1: - if (dsi->vdds_dsi_enabled) { - regulator_disable(dsi->vdds_dsi_reg); - dsi->vdds_dsi_enabled = false; - } -err0: - dsi_disable_scp_clk(dsidev); - dsi_enable_pll_clock(dsidev, 0); - return r; -} - -void dsi_pll_uninit(struct platform_device *dsidev, bool disconnect_lanes) -{ - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - - dsi->pll_locked = 0; - dsi_pll_power(dsidev, DSI_PLL_POWER_OFF); - if (disconnect_lanes) { - WARN_ON(!dsi->vdds_dsi_enabled); - regulator_disable(dsi->vdds_dsi_reg); - dsi->vdds_dsi_enabled = false; - } - - dsi_disable_scp_clk(dsidev); - dsi_enable_pll_clock(dsidev, 0); - - DSSDBG("PLL uninit done\n"); -} - -static void dsi_dump_dsidev_clocks(struct platform_device *dsidev, - struct seq_file *s) -{ - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - struct dsi_clock_info *cinfo = &dsi->current_cinfo; - enum omap_dss_clk_source dispc_clk_src, dsi_clk_src; - int dsi_module = dsi_get_dsidev_id(dsidev); - - dispc_clk_src = dss_get_dispc_clk_source(); - dsi_clk_src = dss_get_dsi_clk_source(dsi_module); - - if (dsi_runtime_get(dsidev)) - return; - - seq_printf(s, "- DSI%d PLL -\n", dsi_module + 1); - - seq_printf(s, "dsi pll source = %s\n", - cinfo->use_sys_clk ? "dss_sys_clk" : "pclkfree"); - - seq_printf(s, "Fint\t\t%-16luregn %u\n", cinfo->fint, cinfo->regn); - - seq_printf(s, "CLKIN4DDR\t%-16luregm %u\n", - cinfo->clkin4ddr, cinfo->regm); - - seq_printf(s, "DSI_PLL_HSDIV_DISPC (%s)\t%-16luregm_dispc %u\t(%s)\n", - dss_feat_get_clk_source_name(dsi_module == 0 ? - OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC : - OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC), - cinfo->dsi_pll_hsdiv_dispc_clk, - cinfo->regm_dispc, - dispc_clk_src == OMAP_DSS_CLK_SRC_FCK ? - "off" : "on"); - - seq_printf(s, "DSI_PLL_HSDIV_DSI (%s)\t%-16luregm_dsi %u\t(%s)\n", - dss_feat_get_clk_source_name(dsi_module == 0 ? - OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI : - OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI), - cinfo->dsi_pll_hsdiv_dsi_clk, - cinfo->regm_dsi, - dsi_clk_src == OMAP_DSS_CLK_SRC_FCK ? - "off" : "on"); - - seq_printf(s, "- DSI%d -\n", dsi_module + 1); - - seq_printf(s, "dsi fclk source = %s (%s)\n", - dss_get_generic_clk_source_name(dsi_clk_src), - dss_feat_get_clk_source_name(dsi_clk_src)); - - seq_printf(s, "DSI_FCLK\t%lu\n", dsi_fclk_rate(dsidev)); - - seq_printf(s, "DDR_CLK\t\t%lu\n", - cinfo->clkin4ddr / 4); - - seq_printf(s, "TxByteClkHS\t%lu\n", dsi_get_txbyteclkhs(dsidev)); - - seq_printf(s, "LP_CLK\t\t%lu\n", cinfo->lp_clk); - - dsi_runtime_put(dsidev); -} - -void dsi_dump_clocks(struct seq_file *s) -{ - struct platform_device *dsidev; - int i; - - for (i = 0; i < MAX_NUM_DSI; i++) { - dsidev = dsi_get_dsidev_from_id(i); - if (dsidev) - dsi_dump_dsidev_clocks(dsidev, s); - } -} - -#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS -static void dsi_dump_dsidev_irqs(struct platform_device *dsidev, - struct seq_file *s) -{ - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - unsigned long flags; - struct dsi_irq_stats stats; - int dsi_module = dsi_get_dsidev_id(dsidev); - - spin_lock_irqsave(&dsi->irq_stats_lock, flags); - - stats = dsi->irq_stats; - memset(&dsi->irq_stats, 0, sizeof(dsi->irq_stats)); - dsi->irq_stats.last_reset = jiffies; - - spin_unlock_irqrestore(&dsi->irq_stats_lock, flags); - - seq_printf(s, "period %u ms\n", - jiffies_to_msecs(jiffies - stats.last_reset)); - - seq_printf(s, "irqs %d\n", stats.irq_count); -#define PIS(x) \ - seq_printf(s, "%-20s %10d\n", #x, stats.dsi_irqs[ffs(DSI_IRQ_##x)-1]); - - seq_printf(s, "-- DSI%d interrupts --\n", dsi_module + 1); - PIS(VC0); - PIS(VC1); - PIS(VC2); - PIS(VC3); - PIS(WAKEUP); - PIS(RESYNC); - PIS(PLL_LOCK); - PIS(PLL_UNLOCK); - PIS(PLL_RECALL); - PIS(COMPLEXIO_ERR); - PIS(HS_TX_TIMEOUT); - PIS(LP_RX_TIMEOUT); - PIS(TE_TRIGGER); - PIS(ACK_TRIGGER); - PIS(SYNC_LOST); - PIS(LDO_POWER_GOOD); - PIS(TA_TIMEOUT); -#undef PIS - -#define PIS(x) \ - seq_printf(s, "%-20s %10d %10d %10d %10d\n", #x, \ - stats.vc_irqs[0][ffs(DSI_VC_IRQ_##x)-1], \ - stats.vc_irqs[1][ffs(DSI_VC_IRQ_##x)-1], \ - stats.vc_irqs[2][ffs(DSI_VC_IRQ_##x)-1], \ - stats.vc_irqs[3][ffs(DSI_VC_IRQ_##x)-1]); - - seq_printf(s, "-- VC interrupts --\n"); - PIS(CS); - PIS(ECC_CORR); - PIS(PACKET_SENT); - PIS(FIFO_TX_OVF); - PIS(FIFO_RX_OVF); - PIS(BTA); - PIS(ECC_NO_CORR); - PIS(FIFO_TX_UDF); - PIS(PP_BUSY_CHANGE); -#undef PIS - -#define PIS(x) \ - seq_printf(s, "%-20s %10d\n", #x, \ - stats.cio_irqs[ffs(DSI_CIO_IRQ_##x)-1]); - - seq_printf(s, "-- CIO interrupts --\n"); - PIS(ERRSYNCESC1); - PIS(ERRSYNCESC2); - PIS(ERRSYNCESC3); - PIS(ERRESC1); - PIS(ERRESC2); - PIS(ERRESC3); - PIS(ERRCONTROL1); - PIS(ERRCONTROL2); - PIS(ERRCONTROL3); - PIS(STATEULPS1); - PIS(STATEULPS2); - PIS(STATEULPS3); - PIS(ERRCONTENTIONLP0_1); - PIS(ERRCONTENTIONLP1_1); - PIS(ERRCONTENTIONLP0_2); - PIS(ERRCONTENTIONLP1_2); - PIS(ERRCONTENTIONLP0_3); - PIS(ERRCONTENTIONLP1_3); - PIS(ULPSACTIVENOT_ALL0); - PIS(ULPSACTIVENOT_ALL1); -#undef PIS -} - -static void dsi1_dump_irqs(struct seq_file *s) -{ - struct platform_device *dsidev = dsi_get_dsidev_from_id(0); - - dsi_dump_dsidev_irqs(dsidev, s); -} - -static void dsi2_dump_irqs(struct seq_file *s) -{ - struct platform_device *dsidev = dsi_get_dsidev_from_id(1); - - dsi_dump_dsidev_irqs(dsidev, s); -} - -void dsi_create_debugfs_files_irq(struct dentry *debugfs_dir, - const struct file_operations *debug_fops) -{ - struct platform_device *dsidev; - - dsidev = dsi_get_dsidev_from_id(0); - if (dsidev) - debugfs_create_file("dsi1_irqs", S_IRUGO, debugfs_dir, - &dsi1_dump_irqs, debug_fops); - - dsidev = dsi_get_dsidev_from_id(1); - if (dsidev) - debugfs_create_file("dsi2_irqs", S_IRUGO, debugfs_dir, - &dsi2_dump_irqs, debug_fops); -} -#endif - -static void dsi_dump_dsidev_regs(struct platform_device *dsidev, - struct seq_file *s) -{ -#define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, dsi_read_reg(dsidev, r)) - - if (dsi_runtime_get(dsidev)) - return; - dsi_enable_scp_clk(dsidev); - - DUMPREG(DSI_REVISION); - DUMPREG(DSI_SYSCONFIG); - DUMPREG(DSI_SYSSTATUS); - DUMPREG(DSI_IRQSTATUS); - DUMPREG(DSI_IRQENABLE); - DUMPREG(DSI_CTRL); - DUMPREG(DSI_COMPLEXIO_CFG1); - DUMPREG(DSI_COMPLEXIO_IRQ_STATUS); - DUMPREG(DSI_COMPLEXIO_IRQ_ENABLE); - DUMPREG(DSI_CLK_CTRL); - DUMPREG(DSI_TIMING1); - DUMPREG(DSI_TIMING2); - DUMPREG(DSI_VM_TIMING1); - DUMPREG(DSI_VM_TIMING2); - DUMPREG(DSI_VM_TIMING3); - DUMPREG(DSI_CLK_TIMING); - DUMPREG(DSI_TX_FIFO_VC_SIZE); - DUMPREG(DSI_RX_FIFO_VC_SIZE); - DUMPREG(DSI_COMPLEXIO_CFG2); - DUMPREG(DSI_RX_FIFO_VC_FULLNESS); - DUMPREG(DSI_VM_TIMING4); - DUMPREG(DSI_TX_FIFO_VC_EMPTINESS); - DUMPREG(DSI_VM_TIMING5); - DUMPREG(DSI_VM_TIMING6); - DUMPREG(DSI_VM_TIMING7); - DUMPREG(DSI_STOPCLK_TIMING); - - DUMPREG(DSI_VC_CTRL(0)); - DUMPREG(DSI_VC_TE(0)); - DUMPREG(DSI_VC_LONG_PACKET_HEADER(0)); - DUMPREG(DSI_VC_LONG_PACKET_PAYLOAD(0)); - DUMPREG(DSI_VC_SHORT_PACKET_HEADER(0)); - DUMPREG(DSI_VC_IRQSTATUS(0)); - DUMPREG(DSI_VC_IRQENABLE(0)); - - DUMPREG(DSI_VC_CTRL(1)); - DUMPREG(DSI_VC_TE(1)); - DUMPREG(DSI_VC_LONG_PACKET_HEADER(1)); - DUMPREG(DSI_VC_LONG_PACKET_PAYLOAD(1)); - DUMPREG(DSI_VC_SHORT_PACKET_HEADER(1)); - DUMPREG(DSI_VC_IRQSTATUS(1)); - DUMPREG(DSI_VC_IRQENABLE(1)); - - DUMPREG(DSI_VC_CTRL(2)); - DUMPREG(DSI_VC_TE(2)); - DUMPREG(DSI_VC_LONG_PACKET_HEADER(2)); - DUMPREG(DSI_VC_LONG_PACKET_PAYLOAD(2)); - DUMPREG(DSI_VC_SHORT_PACKET_HEADER(2)); - DUMPREG(DSI_VC_IRQSTATUS(2)); - DUMPREG(DSI_VC_IRQENABLE(2)); - - DUMPREG(DSI_VC_CTRL(3)); - DUMPREG(DSI_VC_TE(3)); - DUMPREG(DSI_VC_LONG_PACKET_HEADER(3)); - DUMPREG(DSI_VC_LONG_PACKET_PAYLOAD(3)); - DUMPREG(DSI_VC_SHORT_PACKET_HEADER(3)); - DUMPREG(DSI_VC_IRQSTATUS(3)); - DUMPREG(DSI_VC_IRQENABLE(3)); - - DUMPREG(DSI_DSIPHY_CFG0); - DUMPREG(DSI_DSIPHY_CFG1); - DUMPREG(DSI_DSIPHY_CFG2); - DUMPREG(DSI_DSIPHY_CFG5); - - DUMPREG(DSI_PLL_CONTROL); - DUMPREG(DSI_PLL_STATUS); - DUMPREG(DSI_PLL_GO); - DUMPREG(DSI_PLL_CONFIGURATION1); - DUMPREG(DSI_PLL_CONFIGURATION2); - - dsi_disable_scp_clk(dsidev); - dsi_runtime_put(dsidev); -#undef DUMPREG -} - -static void dsi1_dump_regs(struct seq_file *s) -{ - struct platform_device *dsidev = dsi_get_dsidev_from_id(0); - - dsi_dump_dsidev_regs(dsidev, s); -} - -static void dsi2_dump_regs(struct seq_file *s) -{ - struct platform_device *dsidev = dsi_get_dsidev_from_id(1); - - dsi_dump_dsidev_regs(dsidev, s); -} - -void dsi_create_debugfs_files_reg(struct dentry *debugfs_dir, - const struct file_operations *debug_fops) -{ - struct platform_device *dsidev; - - dsidev = dsi_get_dsidev_from_id(0); - if (dsidev) - debugfs_create_file("dsi1_regs", S_IRUGO, debugfs_dir, - &dsi1_dump_regs, debug_fops); - - dsidev = dsi_get_dsidev_from_id(1); - if (dsidev) - debugfs_create_file("dsi2_regs", S_IRUGO, debugfs_dir, - &dsi2_dump_regs, debug_fops); -} -enum dsi_cio_power_state { - DSI_COMPLEXIO_POWER_OFF = 0x0, - DSI_COMPLEXIO_POWER_ON = 0x1, - DSI_COMPLEXIO_POWER_ULPS = 0x2, -}; - -static int dsi_cio_power(struct platform_device *dsidev, - enum dsi_cio_power_state state) -{ - int t = 0; - - /* PWR_CMD */ - REG_FLD_MOD(dsidev, DSI_COMPLEXIO_CFG1, state, 28, 27); - - /* PWR_STATUS */ - while (FLD_GET(dsi_read_reg(dsidev, DSI_COMPLEXIO_CFG1), - 26, 25) != state) { - if (++t > 1000) { - DSSERR("failed to set complexio power state to " - "%d\n", state); - return -ENODEV; - } - udelay(1); - } - - return 0; -} - -static unsigned dsi_get_line_buf_size(struct platform_device *dsidev) -{ - int val; - - /* line buffer on OMAP3 is 1024 x 24bits */ - /* XXX: for some reason using full buffer size causes - * considerable TX slowdown with update sizes that fill the - * whole buffer */ - if (!dss_has_feature(FEAT_DSI_GNQ)) - return 1023 * 3; - - val = REG_GET(dsidev, DSI_GNQ, 14, 12); /* VP1_LINE_BUFFER_SIZE */ - - switch (val) { - case 1: - return 512 * 3; /* 512x24 bits */ - case 2: - return 682 * 3; /* 682x24 bits */ - case 3: - return 853 * 3; /* 853x24 bits */ - case 4: - return 1024 * 3; /* 1024x24 bits */ - case 5: - return 1194 * 3; /* 1194x24 bits */ - case 6: - return 1365 * 3; /* 1365x24 bits */ - default: - BUG(); - } -} - -static int dsi_parse_lane_config(struct omap_dss_device *dssdev) -{ - struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev); - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - u8 lanes[DSI_MAX_NR_LANES]; - u8 polarities[DSI_MAX_NR_LANES]; - int num_lanes, i; - - static const enum dsi_lane_function functions[] = { - DSI_LANE_CLK, - DSI_LANE_DATA1, - DSI_LANE_DATA2, - DSI_LANE_DATA3, - DSI_LANE_DATA4, - }; - - lanes[0] = dssdev->phy.dsi.clk_lane; - lanes[1] = dssdev->phy.dsi.data1_lane; - lanes[2] = dssdev->phy.dsi.data2_lane; - lanes[3] = dssdev->phy.dsi.data3_lane; - lanes[4] = dssdev->phy.dsi.data4_lane; - polarities[0] = dssdev->phy.dsi.clk_pol; - polarities[1] = dssdev->phy.dsi.data1_pol; - polarities[2] = dssdev->phy.dsi.data2_pol; - polarities[3] = dssdev->phy.dsi.data3_pol; - polarities[4] = dssdev->phy.dsi.data4_pol; - - num_lanes = 0; - - for (i = 0; i < dsi->num_lanes_supported; ++i) - dsi->lanes[i].function = DSI_LANE_UNUSED; - - for (i = 0; i < dsi->num_lanes_supported; ++i) { - int num; - - if (lanes[i] == DSI_LANE_UNUSED) - break; - - num = lanes[i] - 1; - - if (num >= dsi->num_lanes_supported) - return -EINVAL; - - if (dsi->lanes[num].function != DSI_LANE_UNUSED) - return -EINVAL; - - dsi->lanes[num].function = functions[i]; - dsi->lanes[num].polarity = polarities[i]; - num_lanes++; - } - - if (num_lanes < 2 || num_lanes > dsi->num_lanes_supported) - return -EINVAL; - - dsi->num_lanes_used = num_lanes; - - return 0; -} - -static int dsi_set_lane_config(struct omap_dss_device *dssdev) -{ - struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev); - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - static const u8 offsets[] = { 0, 4, 8, 12, 16 }; - static const enum dsi_lane_function functions[] = { - DSI_LANE_CLK, - DSI_LANE_DATA1, - DSI_LANE_DATA2, - DSI_LANE_DATA3, - DSI_LANE_DATA4, - }; - u32 r; - int i; - - r = dsi_read_reg(dsidev, DSI_COMPLEXIO_CFG1); - - for (i = 0; i < dsi->num_lanes_used; ++i) { - unsigned offset = offsets[i]; - unsigned polarity, lane_number; - unsigned t; - - for (t = 0; t < dsi->num_lanes_supported; ++t) - if (dsi->lanes[t].function == functions[i]) - break; - - if (t == dsi->num_lanes_supported) - return -EINVAL; - - lane_number = t; - polarity = dsi->lanes[t].polarity; - - r = FLD_MOD(r, lane_number + 1, offset + 2, offset); - r = FLD_MOD(r, polarity, offset + 3, offset + 3); - } - - /* clear the unused lanes */ - for (; i < dsi->num_lanes_supported; ++i) { - unsigned offset = offsets[i]; - - r = FLD_MOD(r, 0, offset + 2, offset); - r = FLD_MOD(r, 0, offset + 3, offset + 3); - } - - dsi_write_reg(dsidev, DSI_COMPLEXIO_CFG1, r); - - return 0; -} - -static inline unsigned ns2ddr(struct platform_device *dsidev, unsigned ns) -{ - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - - /* convert time in ns to ddr ticks, rounding up */ - unsigned long ddr_clk = dsi->current_cinfo.clkin4ddr / 4; - return (ns * (ddr_clk / 1000 / 1000) + 999) / 1000; -} - -static inline unsigned ddr2ns(struct platform_device *dsidev, unsigned ddr) -{ - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - - unsigned long ddr_clk = dsi->current_cinfo.clkin4ddr / 4; - return ddr * 1000 * 1000 / (ddr_clk / 1000); -} - -static void dsi_cio_timings(struct platform_device *dsidev) -{ - u32 r; - u32 ths_prepare, ths_prepare_ths_zero, ths_trail, ths_exit; - u32 tlpx_half, tclk_trail, tclk_zero; - u32 tclk_prepare; - - /* calculate timings */ - - /* 1 * DDR_CLK = 2 * UI */ - - /* min 40ns + 4*UI max 85ns + 6*UI */ - ths_prepare = ns2ddr(dsidev, 70) + 2; - - /* min 145ns + 10*UI */ - ths_prepare_ths_zero = ns2ddr(dsidev, 175) + 2; - - /* min max(8*UI, 60ns+4*UI) */ - ths_trail = ns2ddr(dsidev, 60) + 5; - - /* min 100ns */ - ths_exit = ns2ddr(dsidev, 145); - - /* tlpx min 50n */ - tlpx_half = ns2ddr(dsidev, 25); - - /* min 60ns */ - tclk_trail = ns2ddr(dsidev, 60) + 2; - - /* min 38ns, max 95ns */ - tclk_prepare = ns2ddr(dsidev, 65); - - /* min tclk-prepare + tclk-zero = 300ns */ - tclk_zero = ns2ddr(dsidev, 260); - - DSSDBG("ths_prepare %u (%uns), ths_prepare_ths_zero %u (%uns)\n", - ths_prepare, ddr2ns(dsidev, ths_prepare), - ths_prepare_ths_zero, ddr2ns(dsidev, ths_prepare_ths_zero)); - DSSDBG("ths_trail %u (%uns), ths_exit %u (%uns)\n", - ths_trail, ddr2ns(dsidev, ths_trail), - ths_exit, ddr2ns(dsidev, ths_exit)); - - DSSDBG("tlpx_half %u (%uns), tclk_trail %u (%uns), " - "tclk_zero %u (%uns)\n", - tlpx_half, ddr2ns(dsidev, tlpx_half), - tclk_trail, ddr2ns(dsidev, tclk_trail), - tclk_zero, ddr2ns(dsidev, tclk_zero)); - DSSDBG("tclk_prepare %u (%uns)\n", - tclk_prepare, ddr2ns(dsidev, tclk_prepare)); - - /* program timings */ - - r = dsi_read_reg(dsidev, DSI_DSIPHY_CFG0); - r = FLD_MOD(r, ths_prepare, 31, 24); - r = FLD_MOD(r, ths_prepare_ths_zero, 23, 16); - r = FLD_MOD(r, ths_trail, 15, 8); - r = FLD_MOD(r, ths_exit, 7, 0); - dsi_write_reg(dsidev, DSI_DSIPHY_CFG0, r); - - r = dsi_read_reg(dsidev, DSI_DSIPHY_CFG1); - r = FLD_MOD(r, tlpx_half, 22, 16); - r = FLD_MOD(r, tclk_trail, 15, 8); - r = FLD_MOD(r, tclk_zero, 7, 0); - dsi_write_reg(dsidev, DSI_DSIPHY_CFG1, r); - - r = dsi_read_reg(dsidev, DSI_DSIPHY_CFG2); - r = FLD_MOD(r, tclk_prepare, 7, 0); - dsi_write_reg(dsidev, DSI_DSIPHY_CFG2, r); -} - -/* lane masks have lane 0 at lsb. mask_p for positive lines, n for negative */ -static void dsi_cio_enable_lane_override(struct omap_dss_device *dssdev, - unsigned mask_p, unsigned mask_n) -{ - struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev); - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - int i; - u32 l; - u8 lptxscp_start = dsi->num_lanes_supported == 3 ? 22 : 26; - - l = 0; - - for (i = 0; i < dsi->num_lanes_supported; ++i) { - unsigned p = dsi->lanes[i].polarity; - - if (mask_p & (1 << i)) - l |= 1 << (i * 2 + (p ? 0 : 1)); - - if (mask_n & (1 << i)) - l |= 1 << (i * 2 + (p ? 1 : 0)); - } - - /* - * Bits in REGLPTXSCPDAT4TO0DXDY: - * 17: DY0 18: DX0 - * 19: DY1 20: DX1 - * 21: DY2 22: DX2 - * 23: DY3 24: DX3 - * 25: DY4 26: DX4 - */ - - /* Set the lane override configuration */ - - /* REGLPTXSCPDAT4TO0DXDY */ - REG_FLD_MOD(dsidev, DSI_DSIPHY_CFG10, l, lptxscp_start, 17); - - /* Enable lane override */ - - /* ENLPTXSCPDAT */ - REG_FLD_MOD(dsidev, DSI_DSIPHY_CFG10, 1, 27, 27); -} - -static void dsi_cio_disable_lane_override(struct platform_device *dsidev) -{ - /* Disable lane override */ - REG_FLD_MOD(dsidev, DSI_DSIPHY_CFG10, 0, 27, 27); /* ENLPTXSCPDAT */ - /* Reset the lane override configuration */ - /* REGLPTXSCPDAT4TO0DXDY */ - REG_FLD_MOD(dsidev, DSI_DSIPHY_CFG10, 0, 22, 17); -} - -static int dsi_cio_wait_tx_clk_esc_reset(struct omap_dss_device *dssdev) -{ - struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev); - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - int t, i; - bool in_use[DSI_MAX_NR_LANES]; - static const u8 offsets_old[] = { 28, 27, 26 }; - static const u8 offsets_new[] = { 24, 25, 26, 27, 28 }; - const u8 *offsets; - - if (dss_has_feature(FEAT_DSI_REVERSE_TXCLKESC)) - offsets = offsets_old; - else - offsets = offsets_new; - - for (i = 0; i < dsi->num_lanes_supported; ++i) - in_use[i] = dsi->lanes[i].function != DSI_LANE_UNUSED; - - t = 100000; - while (true) { - u32 l; - int ok; - - l = dsi_read_reg(dsidev, DSI_DSIPHY_CFG5); - - ok = 0; - for (i = 0; i < dsi->num_lanes_supported; ++i) { - if (!in_use[i] || (l & (1 << offsets[i]))) - ok++; - } - - if (ok == dsi->num_lanes_supported) - break; - - if (--t == 0) { - for (i = 0; i < dsi->num_lanes_supported; ++i) { - if (!in_use[i] || (l & (1 << offsets[i]))) - continue; - - DSSERR("CIO TXCLKESC%d domain not coming " \ - "out of reset\n", i); - } - return -EIO; - } - } - - return 0; -} - -/* return bitmask of enabled lanes, lane0 being the lsb */ -static unsigned dsi_get_lane_mask(struct omap_dss_device *dssdev) -{ - struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev); - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - unsigned mask = 0; - int i; - - for (i = 0; i < dsi->num_lanes_supported; ++i) { - if (dsi->lanes[i].function != DSI_LANE_UNUSED) - mask |= 1 << i; - } - - return mask; -} - -static int dsi_cio_init(struct omap_dss_device *dssdev) -{ - struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev); - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - int r; - u32 l; - - DSSDBGF(); - - r = dsi->enable_pads(dsidev->id, dsi_get_lane_mask(dssdev)); - if (r) - return r; - - dsi_enable_scp_clk(dsidev); - - /* A dummy read using the SCP interface to any DSIPHY register is - * required after DSIPHY reset to complete the reset of the DSI complex - * I/O. */ - dsi_read_reg(dsidev, DSI_DSIPHY_CFG5); - - if (wait_for_bit_change(dsidev, DSI_DSIPHY_CFG5, 30, 1) != 1) { - DSSERR("CIO SCP Clock domain not coming out of reset.\n"); - r = -EIO; - goto err_scp_clk_dom; - } - - r = dsi_set_lane_config(dssdev); - if (r) - goto err_scp_clk_dom; - - /* set TX STOP MODE timer to maximum for this operation */ - l = dsi_read_reg(dsidev, DSI_TIMING1); - l = FLD_MOD(l, 1, 15, 15); /* FORCE_TX_STOP_MODE_IO */ - l = FLD_MOD(l, 1, 14, 14); /* STOP_STATE_X16_IO */ - l = FLD_MOD(l, 1, 13, 13); /* STOP_STATE_X4_IO */ - l = FLD_MOD(l, 0x1fff, 12, 0); /* STOP_STATE_COUNTER_IO */ - dsi_write_reg(dsidev, DSI_TIMING1, l); - - if (dsi->ulps_enabled) { - unsigned mask_p; - int i; - - DSSDBG("manual ulps exit\n"); - - /* ULPS is exited by Mark-1 state for 1ms, followed by - * stop state. DSS HW cannot do this via the normal - * ULPS exit sequence, as after reset the DSS HW thinks - * that we are not in ULPS mode, and refuses to send the - * sequence. So we need to send the ULPS exit sequence - * manually by setting positive lines high and negative lines - * low for 1ms. - */ - - mask_p = 0; - - for (i = 0; i < dsi->num_lanes_supported; ++i) { - if (dsi->lanes[i].function == DSI_LANE_UNUSED) - continue; - mask_p |= 1 << i; - } - - dsi_cio_enable_lane_override(dssdev, mask_p, 0); - } - - r = dsi_cio_power(dsidev, DSI_COMPLEXIO_POWER_ON); - if (r) - goto err_cio_pwr; - - if (wait_for_bit_change(dsidev, DSI_COMPLEXIO_CFG1, 29, 1) != 1) { - DSSERR("CIO PWR clock domain not coming out of reset.\n"); - r = -ENODEV; - goto err_cio_pwr_dom; - } - - dsi_if_enable(dsidev, true); - dsi_if_enable(dsidev, false); - REG_FLD_MOD(dsidev, DSI_CLK_CTRL, 1, 20, 20); /* LP_CLK_ENABLE */ - - r = dsi_cio_wait_tx_clk_esc_reset(dssdev); - if (r) - goto err_tx_clk_esc_rst; - - if (dsi->ulps_enabled) { - /* Keep Mark-1 state for 1ms (as per DSI spec) */ - ktime_t wait = ns_to_ktime(1000 * 1000); - set_current_state(TASK_UNINTERRUPTIBLE); - schedule_hrtimeout(&wait, HRTIMER_MODE_REL); - - /* Disable the override. The lanes should be set to Mark-11 - * state by the HW */ - dsi_cio_disable_lane_override(dsidev); - } - - /* FORCE_TX_STOP_MODE_IO */ - REG_FLD_MOD(dsidev, DSI_TIMING1, 0, 15, 15); - - dsi_cio_timings(dsidev); - - if (dssdev->panel.dsi_mode == OMAP_DSS_DSI_VIDEO_MODE) { - /* DDR_CLK_ALWAYS_ON */ - REG_FLD_MOD(dsidev, DSI_CLK_CTRL, - dssdev->panel.dsi_vm_data.ddr_clk_always_on, 13, 13); - } - - dsi->ulps_enabled = false; - - DSSDBG("CIO init done\n"); - - return 0; - -err_tx_clk_esc_rst: - REG_FLD_MOD(dsidev, DSI_CLK_CTRL, 0, 20, 20); /* LP_CLK_ENABLE */ -err_cio_pwr_dom: - dsi_cio_power(dsidev, DSI_COMPLEXIO_POWER_OFF); -err_cio_pwr: - if (dsi->ulps_enabled) - dsi_cio_disable_lane_override(dsidev); -err_scp_clk_dom: - dsi_disable_scp_clk(dsidev); - dsi->disable_pads(dsidev->id, dsi_get_lane_mask(dssdev)); - return r; -} - -static void dsi_cio_uninit(struct omap_dss_device *dssdev) -{ - struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev); - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - - /* DDR_CLK_ALWAYS_ON */ - REG_FLD_MOD(dsidev, DSI_CLK_CTRL, 0, 13, 13); - - dsi_cio_power(dsidev, DSI_COMPLEXIO_POWER_OFF); - dsi_disable_scp_clk(dsidev); - dsi->disable_pads(dsidev->id, dsi_get_lane_mask(dssdev)); -} - -static void dsi_config_tx_fifo(struct platform_device *dsidev, - enum fifo_size size1, enum fifo_size size2, - enum fifo_size size3, enum fifo_size size4) -{ - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - u32 r = 0; - int add = 0; - int i; - - dsi->vc[0].fifo_size = size1; - dsi->vc[1].fifo_size = size2; - dsi->vc[2].fifo_size = size3; - dsi->vc[3].fifo_size = size4; - - for (i = 0; i < 4; i++) { - u8 v; - int size = dsi->vc[i].fifo_size; - - if (add + size > 4) { - DSSERR("Illegal FIFO configuration\n"); - BUG(); - } - - v = FLD_VAL(add, 2, 0) | FLD_VAL(size, 7, 4); - r |= v << (8 * i); - /*DSSDBG("TX FIFO vc %d: size %d, add %d\n", i, size, add); */ - add += size; - } - - dsi_write_reg(dsidev, DSI_TX_FIFO_VC_SIZE, r); -} - -static void dsi_config_rx_fifo(struct platform_device *dsidev, - enum fifo_size size1, enum fifo_size size2, - enum fifo_size size3, enum fifo_size size4) -{ - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - u32 r = 0; - int add = 0; - int i; - - dsi->vc[0].fifo_size = size1; - dsi->vc[1].fifo_size = size2; - dsi->vc[2].fifo_size = size3; - dsi->vc[3].fifo_size = size4; - - for (i = 0; i < 4; i++) { - u8 v; - int size = dsi->vc[i].fifo_size; - - if (add + size > 4) { - DSSERR("Illegal FIFO configuration\n"); - BUG(); - } - - v = FLD_VAL(add, 2, 0) | FLD_VAL(size, 7, 4); - r |= v << (8 * i); - /*DSSDBG("RX FIFO vc %d: size %d, add %d\n", i, size, add); */ - add += size; - } - - dsi_write_reg(dsidev, DSI_RX_FIFO_VC_SIZE, r); -} - -static int dsi_force_tx_stop_mode_io(struct platform_device *dsidev) -{ - u32 r; - - r = dsi_read_reg(dsidev, DSI_TIMING1); - r = FLD_MOD(r, 1, 15, 15); /* FORCE_TX_STOP_MODE_IO */ - dsi_write_reg(dsidev, DSI_TIMING1, r); - - if (wait_for_bit_change(dsidev, DSI_TIMING1, 15, 0) != 0) { - DSSERR("TX_STOP bit not going down\n"); - return -EIO; - } - - return 0; -} - -static bool dsi_vc_is_enabled(struct platform_device *dsidev, int channel) -{ - return REG_GET(dsidev, DSI_VC_CTRL(channel), 0, 0); -} - -static void dsi_packet_sent_handler_vp(void *data, u32 mask) -{ - struct dsi_packet_sent_handler_data *vp_data = - (struct dsi_packet_sent_handler_data *) data; - struct dsi_data *dsi = dsi_get_dsidrv_data(vp_data->dsidev); - const int channel = dsi->update_channel; - u8 bit = dsi->te_enabled ? 30 : 31; - - if (REG_GET(vp_data->dsidev, DSI_VC_TE(channel), bit, bit) == 0) - complete(vp_data->completion); -} - -static int dsi_sync_vc_vp(struct platform_device *dsidev, int channel) -{ - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - DECLARE_COMPLETION_ONSTACK(completion); - struct dsi_packet_sent_handler_data vp_data = { dsidev, &completion }; - int r = 0; - u8 bit; - - bit = dsi->te_enabled ? 30 : 31; - - r = dsi_register_isr_vc(dsidev, channel, dsi_packet_sent_handler_vp, - &vp_data, DSI_VC_IRQ_PACKET_SENT); - if (r) - goto err0; - - /* Wait for completion only if TE_EN/TE_START is still set */ - if (REG_GET(dsidev, DSI_VC_TE(channel), bit, bit)) { - if (wait_for_completion_timeout(&completion, - msecs_to_jiffies(10)) == 0) { - DSSERR("Failed to complete previous frame transfer\n"); - r = -EIO; - goto err1; - } - } - - dsi_unregister_isr_vc(dsidev, channel, dsi_packet_sent_handler_vp, - &vp_data, DSI_VC_IRQ_PACKET_SENT); - - return 0; -err1: - dsi_unregister_isr_vc(dsidev, channel, dsi_packet_sent_handler_vp, - &vp_data, DSI_VC_IRQ_PACKET_SENT); -err0: - return r; -} - -static void dsi_packet_sent_handler_l4(void *data, u32 mask) -{ - struct dsi_packet_sent_handler_data *l4_data = - (struct dsi_packet_sent_handler_data *) data; - struct dsi_data *dsi = dsi_get_dsidrv_data(l4_data->dsidev); - const int channel = dsi->update_channel; - - if (REG_GET(l4_data->dsidev, DSI_VC_CTRL(channel), 5, 5) == 0) - complete(l4_data->completion); -} - -static int dsi_sync_vc_l4(struct platform_device *dsidev, int channel) -{ - DECLARE_COMPLETION_ONSTACK(completion); - struct dsi_packet_sent_handler_data l4_data = { dsidev, &completion }; - int r = 0; - - r = dsi_register_isr_vc(dsidev, channel, dsi_packet_sent_handler_l4, - &l4_data, DSI_VC_IRQ_PACKET_SENT); - if (r) - goto err0; - - /* Wait for completion only if TX_FIFO_NOT_EMPTY is still set */ - if (REG_GET(dsidev, DSI_VC_CTRL(channel), 5, 5)) { - if (wait_for_completion_timeout(&completion, - msecs_to_jiffies(10)) == 0) { - DSSERR("Failed to complete previous l4 transfer\n"); - r = -EIO; - goto err1; - } - } - - dsi_unregister_isr_vc(dsidev, channel, dsi_packet_sent_handler_l4, - &l4_data, DSI_VC_IRQ_PACKET_SENT); - - return 0; -err1: - dsi_unregister_isr_vc(dsidev, channel, dsi_packet_sent_handler_l4, - &l4_data, DSI_VC_IRQ_PACKET_SENT); -err0: - return r; -} - -static int dsi_sync_vc(struct platform_device *dsidev, int channel) -{ - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - - WARN_ON(!dsi_bus_is_locked(dsidev)); - - WARN_ON(in_interrupt()); - - if (!dsi_vc_is_enabled(dsidev, channel)) - return 0; - - switch (dsi->vc[channel].source) { - case DSI_VC_SOURCE_VP: - return dsi_sync_vc_vp(dsidev, channel); - case DSI_VC_SOURCE_L4: - return dsi_sync_vc_l4(dsidev, channel); - default: - BUG(); - } -} - -static int dsi_vc_enable(struct platform_device *dsidev, int channel, - bool enable) -{ - DSSDBG("dsi_vc_enable channel %d, enable %d\n", - channel, enable); - - enable = enable ? 1 : 0; - - REG_FLD_MOD(dsidev, DSI_VC_CTRL(channel), enable, 0, 0); - - if (wait_for_bit_change(dsidev, DSI_VC_CTRL(channel), - 0, enable) != enable) { - DSSERR("Failed to set dsi_vc_enable to %d\n", enable); - return -EIO; - } - - return 0; -} - -static void dsi_vc_initial_config(struct platform_device *dsidev, int channel) -{ - u32 r; - - DSSDBGF("%d", channel); - - r = dsi_read_reg(dsidev, DSI_VC_CTRL(channel)); - - if (FLD_GET(r, 15, 15)) /* VC_BUSY */ - DSSERR("VC(%d) busy when trying to configure it!\n", - channel); - - r = FLD_MOD(r, 0, 1, 1); /* SOURCE, 0 = L4 */ - r = FLD_MOD(r, 0, 2, 2); /* BTA_SHORT_EN */ - r = FLD_MOD(r, 0, 3, 3); /* BTA_LONG_EN */ - r = FLD_MOD(r, 0, 4, 4); /* MODE, 0 = command */ - r = FLD_MOD(r, 1, 7, 7); /* CS_TX_EN */ - r = FLD_MOD(r, 1, 8, 8); /* ECC_TX_EN */ - r = FLD_MOD(r, 0, 9, 9); /* MODE_SPEED, high speed on/off */ - if (dss_has_feature(FEAT_DSI_VC_OCP_WIDTH)) - r = FLD_MOD(r, 3, 11, 10); /* OCP_WIDTH = 32 bit */ - - r = FLD_MOD(r, 4, 29, 27); /* DMA_RX_REQ_NB = no dma */ - r = FLD_MOD(r, 4, 23, 21); /* DMA_TX_REQ_NB = no dma */ - - dsi_write_reg(dsidev, DSI_VC_CTRL(channel), r); -} - -static int dsi_vc_config_source(struct platform_device *dsidev, int channel, - enum dsi_vc_source source) -{ - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - - if (dsi->vc[channel].source == source) - return 0; - - DSSDBGF("%d", channel); - - dsi_sync_vc(dsidev, channel); - - dsi_vc_enable(dsidev, channel, 0); - - /* VC_BUSY */ - if (wait_for_bit_change(dsidev, DSI_VC_CTRL(channel), 15, 0) != 0) { - DSSERR("vc(%d) busy when trying to config for VP\n", channel); - return -EIO; - } - - /* SOURCE, 0 = L4, 1 = video port */ - REG_FLD_MOD(dsidev, DSI_VC_CTRL(channel), source, 1, 1); - - /* DCS_CMD_ENABLE */ - if (dss_has_feature(FEAT_DSI_DCS_CMD_CONFIG_VC)) { - bool enable = source == DSI_VC_SOURCE_VP; - REG_FLD_MOD(dsidev, DSI_VC_CTRL(channel), enable, 30, 30); - } - - dsi_vc_enable(dsidev, channel, 1); - - dsi->vc[channel].source = source; - - return 0; -} - -void omapdss_dsi_vc_enable_hs(struct omap_dss_device *dssdev, int channel, - bool enable) -{ - struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev); - - DSSDBG("dsi_vc_enable_hs(%d, %d)\n", channel, enable); - - WARN_ON(!dsi_bus_is_locked(dsidev)); - - dsi_vc_enable(dsidev, channel, 0); - dsi_if_enable(dsidev, 0); - - REG_FLD_MOD(dsidev, DSI_VC_CTRL(channel), enable, 9, 9); - - dsi_vc_enable(dsidev, channel, 1); - dsi_if_enable(dsidev, 1); - - dsi_force_tx_stop_mode_io(dsidev); - - /* start the DDR clock by sending a NULL packet */ - if (dssdev->panel.dsi_vm_data.ddr_clk_always_on && enable) - dsi_vc_send_null(dssdev, channel); -} -EXPORT_SYMBOL(omapdss_dsi_vc_enable_hs); - -static void dsi_vc_flush_long_data(struct platform_device *dsidev, int channel) -{ - while (REG_GET(dsidev, DSI_VC_CTRL(channel), 20, 20)) { - u32 val; - val = dsi_read_reg(dsidev, DSI_VC_SHORT_PACKET_HEADER(channel)); - DSSDBG("\t\tb1 %#02x b2 %#02x b3 %#02x b4 %#02x\n", - (val >> 0) & 0xff, - (val >> 8) & 0xff, - (val >> 16) & 0xff, - (val >> 24) & 0xff); - } -} - -static void dsi_show_rx_ack_with_err(u16 err) -{ - DSSERR("\tACK with ERROR (%#x):\n", err); - if (err & (1 << 0)) - DSSERR("\t\tSoT Error\n"); - if (err & (1 << 1)) - DSSERR("\t\tSoT Sync Error\n"); - if (err & (1 << 2)) - DSSERR("\t\tEoT Sync Error\n"); - if (err & (1 << 3)) - DSSERR("\t\tEscape Mode Entry Command Error\n"); - if (err & (1 << 4)) - DSSERR("\t\tLP Transmit Sync Error\n"); - if (err & (1 << 5)) - DSSERR("\t\tHS Receive Timeout Error\n"); - if (err & (1 << 6)) - DSSERR("\t\tFalse Control Error\n"); - if (err & (1 << 7)) - DSSERR("\t\t(reserved7)\n"); - if (err & (1 << 8)) - DSSERR("\t\tECC Error, single-bit (corrected)\n"); - if (err & (1 << 9)) - DSSERR("\t\tECC Error, multi-bit (not corrected)\n"); - if (err & (1 << 10)) - DSSERR("\t\tChecksum Error\n"); - if (err & (1 << 11)) - DSSERR("\t\tData type not recognized\n"); - if (err & (1 << 12)) - DSSERR("\t\tInvalid VC ID\n"); - if (err & (1 << 13)) - DSSERR("\t\tInvalid Transmission Length\n"); - if (err & (1 << 14)) - DSSERR("\t\t(reserved14)\n"); - if (err & (1 << 15)) - DSSERR("\t\tDSI Protocol Violation\n"); -} - -static u16 dsi_vc_flush_receive_data(struct platform_device *dsidev, - int channel) -{ - /* RX_FIFO_NOT_EMPTY */ - while (REG_GET(dsidev, DSI_VC_CTRL(channel), 20, 20)) { - u32 val; - u8 dt; - val = dsi_read_reg(dsidev, DSI_VC_SHORT_PACKET_HEADER(channel)); - DSSERR("\trawval %#08x\n", val); - dt = FLD_GET(val, 5, 0); - if (dt == MIPI_DSI_RX_ACKNOWLEDGE_AND_ERROR_REPORT) { - u16 err = FLD_GET(val, 23, 8); - dsi_show_rx_ack_with_err(err); - } else if (dt == MIPI_DSI_RX_DCS_SHORT_READ_RESPONSE_1BYTE) { - DSSERR("\tDCS short response, 1 byte: %#x\n", - FLD_GET(val, 23, 8)); - } else if (dt == MIPI_DSI_RX_DCS_SHORT_READ_RESPONSE_2BYTE) { - DSSERR("\tDCS short response, 2 byte: %#x\n", - FLD_GET(val, 23, 8)); - } else if (dt == MIPI_DSI_RX_DCS_LONG_READ_RESPONSE) { - DSSERR("\tDCS long response, len %d\n", - FLD_GET(val, 23, 8)); - dsi_vc_flush_long_data(dsidev, channel); - } else { - DSSERR("\tunknown datatype 0x%02x\n", dt); - } - } - return 0; -} - -static int dsi_vc_send_bta(struct platform_device *dsidev, int channel) -{ - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - - if (dsi->debug_write || dsi->debug_read) - DSSDBG("dsi_vc_send_bta %d\n", channel); - - WARN_ON(!dsi_bus_is_locked(dsidev)); - - /* RX_FIFO_NOT_EMPTY */ - if (REG_GET(dsidev, DSI_VC_CTRL(channel), 20, 20)) { - DSSERR("rx fifo not empty when sending BTA, dumping data:\n"); - dsi_vc_flush_receive_data(dsidev, channel); - } - - REG_FLD_MOD(dsidev, DSI_VC_CTRL(channel), 1, 6, 6); /* BTA_EN */ - - /* flush posted write */ - dsi_read_reg(dsidev, DSI_VC_CTRL(channel)); - - return 0; -} - -int dsi_vc_send_bta_sync(struct omap_dss_device *dssdev, int channel) -{ - struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev); - DECLARE_COMPLETION_ONSTACK(completion); - int r = 0; - u32 err; - - r = dsi_register_isr_vc(dsidev, channel, dsi_completion_handler, - &completion, DSI_VC_IRQ_BTA); - if (r) - goto err0; - - r = dsi_register_isr(dsidev, dsi_completion_handler, &completion, - DSI_IRQ_ERROR_MASK); - if (r) - goto err1; - - r = dsi_vc_send_bta(dsidev, channel); - if (r) - goto err2; - - if (wait_for_completion_timeout(&completion, - msecs_to_jiffies(500)) == 0) { - DSSERR("Failed to receive BTA\n"); - r = -EIO; - goto err2; - } - - err = dsi_get_errors(dsidev); - if (err) { - DSSERR("Error while sending BTA: %x\n", err); - r = -EIO; - goto err2; - } -err2: - dsi_unregister_isr(dsidev, dsi_completion_handler, &completion, - DSI_IRQ_ERROR_MASK); -err1: - dsi_unregister_isr_vc(dsidev, channel, dsi_completion_handler, - &completion, DSI_VC_IRQ_BTA); -err0: - return r; -} -EXPORT_SYMBOL(dsi_vc_send_bta_sync); - -static inline void dsi_vc_write_long_header(struct platform_device *dsidev, - int channel, u8 data_type, u16 len, u8 ecc) -{ - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - u32 val; - u8 data_id; - - WARN_ON(!dsi_bus_is_locked(dsidev)); - - data_id = data_type | dsi->vc[channel].vc_id << 6; - - val = FLD_VAL(data_id, 7, 0) | FLD_VAL(len, 23, 8) | - FLD_VAL(ecc, 31, 24); - - dsi_write_reg(dsidev, DSI_VC_LONG_PACKET_HEADER(channel), val); -} - -static inline void dsi_vc_write_long_payload(struct platform_device *dsidev, - int channel, u8 b1, u8 b2, u8 b3, u8 b4) -{ - u32 val; - - val = b4 << 24 | b3 << 16 | b2 << 8 | b1 << 0; - -/* DSSDBG("\twriting %02x, %02x, %02x, %02x (%#010x)\n", - b1, b2, b3, b4, val); */ - - dsi_write_reg(dsidev, DSI_VC_LONG_PACKET_PAYLOAD(channel), val); -} - -static int dsi_vc_send_long(struct platform_device *dsidev, int channel, - u8 data_type, u8 *data, u16 len, u8 ecc) -{ - /*u32 val; */ - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - int i; - u8 *p; - int r = 0; - u8 b1, b2, b3, b4; - - if (dsi->debug_write) - DSSDBG("dsi_vc_send_long, %d bytes\n", len); - - /* len + header */ - if (dsi->vc[channel].fifo_size * 32 * 4 < len + 4) { - DSSERR("unable to send long packet: packet too long.\n"); - return -EINVAL; - } - - dsi_vc_config_source(dsidev, channel, DSI_VC_SOURCE_L4); - - dsi_vc_write_long_header(dsidev, channel, data_type, len, ecc); - - p = data; - for (i = 0; i < len >> 2; i++) { - if (dsi->debug_write) - DSSDBG("\tsending full packet %d\n", i); - - b1 = *p++; - b2 = *p++; - b3 = *p++; - b4 = *p++; - - dsi_vc_write_long_payload(dsidev, channel, b1, b2, b3, b4); - } - - i = len % 4; - if (i) { - b1 = 0; b2 = 0; b3 = 0; - - if (dsi->debug_write) - DSSDBG("\tsending remainder bytes %d\n", i); - - switch (i) { - case 3: - b1 = *p++; - b2 = *p++; - b3 = *p++; - break; - case 2: - b1 = *p++; - b2 = *p++; - break; - case 1: - b1 = *p++; - break; - } - - dsi_vc_write_long_payload(dsidev, channel, b1, b2, b3, 0); - } - - return r; -} - -static int dsi_vc_send_short(struct platform_device *dsidev, int channel, - u8 data_type, u16 data, u8 ecc) -{ - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - u32 r; - u8 data_id; - - WARN_ON(!dsi_bus_is_locked(dsidev)); - - if (dsi->debug_write) - DSSDBG("dsi_vc_send_short(ch%d, dt %#x, b1 %#x, b2 %#x)\n", - channel, - data_type, data & 0xff, (data >> 8) & 0xff); - - dsi_vc_config_source(dsidev, channel, DSI_VC_SOURCE_L4); - - if (FLD_GET(dsi_read_reg(dsidev, DSI_VC_CTRL(channel)), 16, 16)) { - DSSERR("ERROR FIFO FULL, aborting transfer\n"); - return -EINVAL; - } - - data_id = data_type | dsi->vc[channel].vc_id << 6; - - r = (data_id << 0) | (data << 8) | (ecc << 24); - - dsi_write_reg(dsidev, DSI_VC_SHORT_PACKET_HEADER(channel), r); - - return 0; -} - -int dsi_vc_send_null(struct omap_dss_device *dssdev, int channel) -{ - struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev); - - return dsi_vc_send_long(dsidev, channel, MIPI_DSI_NULL_PACKET, NULL, - 0, 0); -} -EXPORT_SYMBOL(dsi_vc_send_null); - -static int dsi_vc_write_nosync_common(struct omap_dss_device *dssdev, - int channel, u8 *data, int len, enum dss_dsi_content_type type) -{ - struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev); - int r; - - if (len == 0) { - BUG_ON(type == DSS_DSI_CONTENT_DCS); - r = dsi_vc_send_short(dsidev, channel, - MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM, 0, 0); - } else if (len == 1) { - r = dsi_vc_send_short(dsidev, channel, - type == DSS_DSI_CONTENT_GENERIC ? - MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM : - MIPI_DSI_DCS_SHORT_WRITE, data[0], 0); - } else if (len == 2) { - r = dsi_vc_send_short(dsidev, channel, - type == DSS_DSI_CONTENT_GENERIC ? - MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM : - MIPI_DSI_DCS_SHORT_WRITE_PARAM, - data[0] | (data[1] << 8), 0); - } else { - r = dsi_vc_send_long(dsidev, channel, - type == DSS_DSI_CONTENT_GENERIC ? - MIPI_DSI_GENERIC_LONG_WRITE : - MIPI_DSI_DCS_LONG_WRITE, data, len, 0); - } - - return r; -} - -int dsi_vc_dcs_write_nosync(struct omap_dss_device *dssdev, int channel, - u8 *data, int len) -{ - return dsi_vc_write_nosync_common(dssdev, channel, data, len, - DSS_DSI_CONTENT_DCS); -} -EXPORT_SYMBOL(dsi_vc_dcs_write_nosync); - -int dsi_vc_generic_write_nosync(struct omap_dss_device *dssdev, int channel, - u8 *data, int len) -{ - return dsi_vc_write_nosync_common(dssdev, channel, data, len, - DSS_DSI_CONTENT_GENERIC); -} -EXPORT_SYMBOL(dsi_vc_generic_write_nosync); - -static int dsi_vc_write_common(struct omap_dss_device *dssdev, int channel, - u8 *data, int len, enum dss_dsi_content_type type) -{ - struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev); - int r; - - r = dsi_vc_write_nosync_common(dssdev, channel, data, len, type); - if (r) - goto err; - - r = dsi_vc_send_bta_sync(dssdev, channel); - if (r) - goto err; - - /* RX_FIFO_NOT_EMPTY */ - if (REG_GET(dsidev, DSI_VC_CTRL(channel), 20, 20)) { - DSSERR("rx fifo not empty after write, dumping data:\n"); - dsi_vc_flush_receive_data(dsidev, channel); - r = -EIO; - goto err; - } - - return 0; -err: - DSSERR("dsi_vc_write_common(ch %d, cmd 0x%02x, len %d) failed\n", - channel, data[0], len); - return r; -} - -int dsi_vc_dcs_write(struct omap_dss_device *dssdev, int channel, u8 *data, - int len) -{ - return dsi_vc_write_common(dssdev, channel, data, len, - DSS_DSI_CONTENT_DCS); -} -EXPORT_SYMBOL(dsi_vc_dcs_write); - -int dsi_vc_generic_write(struct omap_dss_device *dssdev, int channel, u8 *data, - int len) -{ - return dsi_vc_write_common(dssdev, channel, data, len, - DSS_DSI_CONTENT_GENERIC); -} -EXPORT_SYMBOL(dsi_vc_generic_write); - -int dsi_vc_dcs_write_0(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd) -{ - return dsi_vc_dcs_write(dssdev, channel, &dcs_cmd, 1); -} -EXPORT_SYMBOL(dsi_vc_dcs_write_0); - -int dsi_vc_generic_write_0(struct omap_dss_device *dssdev, int channel) -{ - return dsi_vc_generic_write(dssdev, channel, NULL, 0); -} -EXPORT_SYMBOL(dsi_vc_generic_write_0); - -int dsi_vc_dcs_write_1(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd, - u8 param) -{ - u8 buf[2]; - buf[0] = dcs_cmd; - buf[1] = param; - return dsi_vc_dcs_write(dssdev, channel, buf, 2); -} -EXPORT_SYMBOL(dsi_vc_dcs_write_1); - -int dsi_vc_generic_write_1(struct omap_dss_device *dssdev, int channel, - u8 param) -{ - return dsi_vc_generic_write(dssdev, channel, ¶m, 1); -} -EXPORT_SYMBOL(dsi_vc_generic_write_1); - -int dsi_vc_generic_write_2(struct omap_dss_device *dssdev, int channel, - u8 param1, u8 param2) -{ - u8 buf[2]; - buf[0] = param1; - buf[1] = param2; - return dsi_vc_generic_write(dssdev, channel, buf, 2); -} -EXPORT_SYMBOL(dsi_vc_generic_write_2); - -static int dsi_vc_dcs_send_read_request(struct omap_dss_device *dssdev, - int channel, u8 dcs_cmd) -{ - struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev); - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - int r; - - if (dsi->debug_read) - DSSDBG("dsi_vc_dcs_send_read_request(ch%d, dcs_cmd %x)\n", - channel, dcs_cmd); - - r = dsi_vc_send_short(dsidev, channel, MIPI_DSI_DCS_READ, dcs_cmd, 0); - if (r) { - DSSERR("dsi_vc_dcs_send_read_request(ch %d, cmd 0x%02x)" - " failed\n", channel, dcs_cmd); - return r; - } - - return 0; -} - -static int dsi_vc_generic_send_read_request(struct omap_dss_device *dssdev, - int channel, u8 *reqdata, int reqlen) -{ - struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev); - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - u16 data; - u8 data_type; - int r; - - if (dsi->debug_read) - DSSDBG("dsi_vc_generic_send_read_request(ch %d, reqlen %d)\n", - channel, reqlen); - - if (reqlen == 0) { - data_type = MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM; - data = 0; - } else if (reqlen == 1) { - data_type = MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM; - data = reqdata[0]; - } else if (reqlen == 2) { - data_type = MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM; - data = reqdata[0] | (reqdata[1] << 8); - } else { - BUG(); - } - - r = dsi_vc_send_short(dsidev, channel, data_type, data, 0); - if (r) { - DSSERR("dsi_vc_generic_send_read_request(ch %d, reqlen %d)" - " failed\n", channel, reqlen); - return r; - } - - return 0; -} - -static int dsi_vc_read_rx_fifo(struct platform_device *dsidev, int channel, - u8 *buf, int buflen, enum dss_dsi_content_type type) -{ - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - u32 val; - u8 dt; - int r; - - /* RX_FIFO_NOT_EMPTY */ - if (REG_GET(dsidev, DSI_VC_CTRL(channel), 20, 20) == 0) { - DSSERR("RX fifo empty when trying to read.\n"); - r = -EIO; - goto err; - } - - val = dsi_read_reg(dsidev, DSI_VC_SHORT_PACKET_HEADER(channel)); - if (dsi->debug_read) - DSSDBG("\theader: %08x\n", val); - dt = FLD_GET(val, 5, 0); - if (dt == MIPI_DSI_RX_ACKNOWLEDGE_AND_ERROR_REPORT) { - u16 err = FLD_GET(val, 23, 8); - dsi_show_rx_ack_with_err(err); - r = -EIO; - goto err; - - } else if (dt == (type == DSS_DSI_CONTENT_GENERIC ? - MIPI_DSI_RX_GENERIC_SHORT_READ_RESPONSE_1BYTE : - MIPI_DSI_RX_DCS_SHORT_READ_RESPONSE_1BYTE)) { - u8 data = FLD_GET(val, 15, 8); - if (dsi->debug_read) - DSSDBG("\t%s short response, 1 byte: %02x\n", - type == DSS_DSI_CONTENT_GENERIC ? "GENERIC" : - "DCS", data); - - if (buflen < 1) { - r = -EIO; - goto err; - } - - buf[0] = data; - - return 1; - } else if (dt == (type == DSS_DSI_CONTENT_GENERIC ? - MIPI_DSI_RX_GENERIC_SHORT_READ_RESPONSE_2BYTE : - MIPI_DSI_RX_DCS_SHORT_READ_RESPONSE_2BYTE)) { - u16 data = FLD_GET(val, 23, 8); - if (dsi->debug_read) - DSSDBG("\t%s short response, 2 byte: %04x\n", - type == DSS_DSI_CONTENT_GENERIC ? "GENERIC" : - "DCS", data); - - if (buflen < 2) { - r = -EIO; - goto err; - } - - buf[0] = data & 0xff; - buf[1] = (data >> 8) & 0xff; - - return 2; - } else if (dt == (type == DSS_DSI_CONTENT_GENERIC ? - MIPI_DSI_RX_GENERIC_LONG_READ_RESPONSE : - MIPI_DSI_RX_DCS_LONG_READ_RESPONSE)) { - int w; - int len = FLD_GET(val, 23, 8); - if (dsi->debug_read) - DSSDBG("\t%s long response, len %d\n", - type == DSS_DSI_CONTENT_GENERIC ? "GENERIC" : - "DCS", len); - - if (len > buflen) { - r = -EIO; - goto err; - } - - /* two byte checksum ends the packet, not included in len */ - for (w = 0; w < len + 2;) { - int b; - val = dsi_read_reg(dsidev, - DSI_VC_SHORT_PACKET_HEADER(channel)); - if (dsi->debug_read) - DSSDBG("\t\t%02x %02x %02x %02x\n", - (val >> 0) & 0xff, - (val >> 8) & 0xff, - (val >> 16) & 0xff, - (val >> 24) & 0xff); - - for (b = 0; b < 4; ++b) { - if (w < len) - buf[w] = (val >> (b * 8)) & 0xff; - /* we discard the 2 byte checksum */ - ++w; - } - } - - return len; - } else { - DSSERR("\tunknown datatype 0x%02x\n", dt); - r = -EIO; - goto err; - } - - BUG(); -err: - DSSERR("dsi_vc_read_rx_fifo(ch %d type %s) failed\n", channel, - type == DSS_DSI_CONTENT_GENERIC ? "GENERIC" : "DCS"); - - return r; -} - -int dsi_vc_dcs_read(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd, - u8 *buf, int buflen) -{ - struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev); - int r; - - r = dsi_vc_dcs_send_read_request(dssdev, channel, dcs_cmd); - if (r) - goto err; - - r = dsi_vc_send_bta_sync(dssdev, channel); - if (r) - goto err; - - r = dsi_vc_read_rx_fifo(dsidev, channel, buf, buflen, - DSS_DSI_CONTENT_DCS); - if (r < 0) - goto err; - - if (r != buflen) { - r = -EIO; - goto err; - } - - return 0; -err: - DSSERR("dsi_vc_dcs_read(ch %d, cmd 0x%02x) failed\n", channel, dcs_cmd); - return r; -} -EXPORT_SYMBOL(dsi_vc_dcs_read); - -static int dsi_vc_generic_read(struct omap_dss_device *dssdev, int channel, - u8 *reqdata, int reqlen, u8 *buf, int buflen) -{ - struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev); - int r; - - r = dsi_vc_generic_send_read_request(dssdev, channel, reqdata, reqlen); - if (r) - return r; - - r = dsi_vc_send_bta_sync(dssdev, channel); - if (r) - return r; - - r = dsi_vc_read_rx_fifo(dsidev, channel, buf, buflen, - DSS_DSI_CONTENT_GENERIC); - if (r < 0) - return r; - - if (r != buflen) { - r = -EIO; - return r; - } - - return 0; -} - -int dsi_vc_generic_read_0(struct omap_dss_device *dssdev, int channel, u8 *buf, - int buflen) -{ - int r; - - r = dsi_vc_generic_read(dssdev, channel, NULL, 0, buf, buflen); - if (r) { - DSSERR("dsi_vc_generic_read_0(ch %d) failed\n", channel); - return r; - } - - return 0; -} -EXPORT_SYMBOL(dsi_vc_generic_read_0); - -int dsi_vc_generic_read_1(struct omap_dss_device *dssdev, int channel, u8 param, - u8 *buf, int buflen) -{ - int r; - - r = dsi_vc_generic_read(dssdev, channel, ¶m, 1, buf, buflen); - if (r) { - DSSERR("dsi_vc_generic_read_1(ch %d) failed\n", channel); - return r; - } - - return 0; -} -EXPORT_SYMBOL(dsi_vc_generic_read_1); - -int dsi_vc_generic_read_2(struct omap_dss_device *dssdev, int channel, - u8 param1, u8 param2, u8 *buf, int buflen) -{ - int r; - u8 reqdata[2]; - - reqdata[0] = param1; - reqdata[1] = param2; - - r = dsi_vc_generic_read(dssdev, channel, reqdata, 2, buf, buflen); - if (r) { - DSSERR("dsi_vc_generic_read_2(ch %d) failed\n", channel); - return r; - } - - return 0; -} -EXPORT_SYMBOL(dsi_vc_generic_read_2); - -int dsi_vc_set_max_rx_packet_size(struct omap_dss_device *dssdev, int channel, - u16 len) -{ - struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev); - - return dsi_vc_send_short(dsidev, channel, - MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE, len, 0); -} -EXPORT_SYMBOL(dsi_vc_set_max_rx_packet_size); - -static int dsi_enter_ulps(struct platform_device *dsidev) -{ - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - DECLARE_COMPLETION_ONSTACK(completion); - int r, i; - unsigned mask; - - DSSDBGF(); - - WARN_ON(!dsi_bus_is_locked(dsidev)); - - WARN_ON(dsi->ulps_enabled); - - if (dsi->ulps_enabled) - return 0; - - /* DDR_CLK_ALWAYS_ON */ - if (REG_GET(dsidev, DSI_CLK_CTRL, 13, 13)) { - dsi_if_enable(dsidev, 0); - REG_FLD_MOD(dsidev, DSI_CLK_CTRL, 0, 13, 13); - dsi_if_enable(dsidev, 1); - } - - dsi_sync_vc(dsidev, 0); - dsi_sync_vc(dsidev, 1); - dsi_sync_vc(dsidev, 2); - dsi_sync_vc(dsidev, 3); - - dsi_force_tx_stop_mode_io(dsidev); - - dsi_vc_enable(dsidev, 0, false); - dsi_vc_enable(dsidev, 1, false); - dsi_vc_enable(dsidev, 2, false); - dsi_vc_enable(dsidev, 3, false); - - if (REG_GET(dsidev, DSI_COMPLEXIO_CFG2, 16, 16)) { /* HS_BUSY */ - DSSERR("HS busy when enabling ULPS\n"); - return -EIO; - } - - if (REG_GET(dsidev, DSI_COMPLEXIO_CFG2, 17, 17)) { /* LP_BUSY */ - DSSERR("LP busy when enabling ULPS\n"); - return -EIO; - } - - r = dsi_register_isr_cio(dsidev, dsi_completion_handler, &completion, - DSI_CIO_IRQ_ULPSACTIVENOT_ALL0); - if (r) - return r; - - mask = 0; - - for (i = 0; i < dsi->num_lanes_supported; ++i) { - if (dsi->lanes[i].function == DSI_LANE_UNUSED) - continue; - mask |= 1 << i; - } - /* Assert TxRequestEsc for data lanes and TxUlpsClk for clk lane */ - /* LANEx_ULPS_SIG2 */ - REG_FLD_MOD(dsidev, DSI_COMPLEXIO_CFG2, mask, 9, 5); - - /* flush posted write and wait for SCP interface to finish the write */ - dsi_read_reg(dsidev, DSI_COMPLEXIO_CFG2); - - if (wait_for_completion_timeout(&completion, - msecs_to_jiffies(1000)) == 0) { - DSSERR("ULPS enable timeout\n"); - r = -EIO; - goto err; - } - - dsi_unregister_isr_cio(dsidev, dsi_completion_handler, &completion, - DSI_CIO_IRQ_ULPSACTIVENOT_ALL0); - - /* Reset LANEx_ULPS_SIG2 */ - REG_FLD_MOD(dsidev, DSI_COMPLEXIO_CFG2, 0, 9, 5); - - /* flush posted write and wait for SCP interface to finish the write */ - dsi_read_reg(dsidev, DSI_COMPLEXIO_CFG2); - - dsi_cio_power(dsidev, DSI_COMPLEXIO_POWER_ULPS); - - dsi_if_enable(dsidev, false); - - dsi->ulps_enabled = true; - - return 0; - -err: - dsi_unregister_isr_cio(dsidev, dsi_completion_handler, &completion, - DSI_CIO_IRQ_ULPSACTIVENOT_ALL0); - return r; -} - -static void dsi_set_lp_rx_timeout(struct platform_device *dsidev, - unsigned ticks, bool x4, bool x16) -{ - unsigned long fck; - unsigned long total_ticks; - u32 r; - - BUG_ON(ticks > 0x1fff); - - /* ticks in DSI_FCK */ - fck = dsi_fclk_rate(dsidev); - - r = dsi_read_reg(dsidev, DSI_TIMING2); - r = FLD_MOD(r, 1, 15, 15); /* LP_RX_TO */ - r = FLD_MOD(r, x16 ? 1 : 0, 14, 14); /* LP_RX_TO_X16 */ - r = FLD_MOD(r, x4 ? 1 : 0, 13, 13); /* LP_RX_TO_X4 */ - r = FLD_MOD(r, ticks, 12, 0); /* LP_RX_COUNTER */ - dsi_write_reg(dsidev, DSI_TIMING2, r); - - total_ticks = ticks * (x16 ? 16 : 1) * (x4 ? 4 : 1); - - DSSDBG("LP_RX_TO %lu ticks (%#x%s%s) = %lu ns\n", - total_ticks, - ticks, x4 ? " x4" : "", x16 ? " x16" : "", - (total_ticks * 1000) / (fck / 1000 / 1000)); -} - -static void dsi_set_ta_timeout(struct platform_device *dsidev, unsigned ticks, - bool x8, bool x16) -{ - unsigned long fck; - unsigned long total_ticks; - u32 r; - - BUG_ON(ticks > 0x1fff); - - /* ticks in DSI_FCK */ - fck = dsi_fclk_rate(dsidev); - - r = dsi_read_reg(dsidev, DSI_TIMING1); - r = FLD_MOD(r, 1, 31, 31); /* TA_TO */ - r = FLD_MOD(r, x16 ? 1 : 0, 30, 30); /* TA_TO_X16 */ - r = FLD_MOD(r, x8 ? 1 : 0, 29, 29); /* TA_TO_X8 */ - r = FLD_MOD(r, ticks, 28, 16); /* TA_TO_COUNTER */ - dsi_write_reg(dsidev, DSI_TIMING1, r); - - total_ticks = ticks * (x16 ? 16 : 1) * (x8 ? 8 : 1); - - DSSDBG("TA_TO %lu ticks (%#x%s%s) = %lu ns\n", - total_ticks, - ticks, x8 ? " x8" : "", x16 ? " x16" : "", - (total_ticks * 1000) / (fck / 1000 / 1000)); -} - -static void dsi_set_stop_state_counter(struct platform_device *dsidev, - unsigned ticks, bool x4, bool x16) -{ - unsigned long fck; - unsigned long total_ticks; - u32 r; - - BUG_ON(ticks > 0x1fff); - - /* ticks in DSI_FCK */ - fck = dsi_fclk_rate(dsidev); - - r = dsi_read_reg(dsidev, DSI_TIMING1); - r = FLD_MOD(r, 1, 15, 15); /* FORCE_TX_STOP_MODE_IO */ - r = FLD_MOD(r, x16 ? 1 : 0, 14, 14); /* STOP_STATE_X16_IO */ - r = FLD_MOD(r, x4 ? 1 : 0, 13, 13); /* STOP_STATE_X4_IO */ - r = FLD_MOD(r, ticks, 12, 0); /* STOP_STATE_COUNTER_IO */ - dsi_write_reg(dsidev, DSI_TIMING1, r); - - total_ticks = ticks * (x16 ? 16 : 1) * (x4 ? 4 : 1); - - DSSDBG("STOP_STATE_COUNTER %lu ticks (%#x%s%s) = %lu ns\n", - total_ticks, - ticks, x4 ? " x4" : "", x16 ? " x16" : "", - (total_ticks * 1000) / (fck / 1000 / 1000)); -} - -static void dsi_set_hs_tx_timeout(struct platform_device *dsidev, - unsigned ticks, bool x4, bool x16) -{ - unsigned long fck; - unsigned long total_ticks; - u32 r; - - BUG_ON(ticks > 0x1fff); - - /* ticks in TxByteClkHS */ - fck = dsi_get_txbyteclkhs(dsidev); - - r = dsi_read_reg(dsidev, DSI_TIMING2); - r = FLD_MOD(r, 1, 31, 31); /* HS_TX_TO */ - r = FLD_MOD(r, x16 ? 1 : 0, 30, 30); /* HS_TX_TO_X16 */ - r = FLD_MOD(r, x4 ? 1 : 0, 29, 29); /* HS_TX_TO_X8 (4 really) */ - r = FLD_MOD(r, ticks, 28, 16); /* HS_TX_TO_COUNTER */ - dsi_write_reg(dsidev, DSI_TIMING2, r); - - total_ticks = ticks * (x16 ? 16 : 1) * (x4 ? 4 : 1); - - DSSDBG("HS_TX_TO %lu ticks (%#x%s%s) = %lu ns\n", - total_ticks, - ticks, x4 ? " x4" : "", x16 ? " x16" : "", - (total_ticks * 1000) / (fck / 1000 / 1000)); -} - -static void dsi_config_vp_num_line_buffers(struct omap_dss_device *dssdev) -{ - struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev); - int num_line_buffers; - - if (dssdev->panel.dsi_mode == OMAP_DSS_DSI_VIDEO_MODE) { - int bpp = dsi_get_pixel_size(dssdev->panel.dsi_pix_fmt); - unsigned line_buf_size = dsi_get_line_buf_size(dsidev); - struct omap_video_timings *timings = &dssdev->panel.timings; - /* - * Don't use line buffers if width is greater than the video - * port's line buffer size - */ - if (line_buf_size <= timings->x_res * bpp / 8) - num_line_buffers = 0; - else - num_line_buffers = 2; - } else { - /* Use maximum number of line buffers in command mode */ - num_line_buffers = 2; - } - - /* LINE_BUFFER */ - REG_FLD_MOD(dsidev, DSI_CTRL, num_line_buffers, 13, 12); -} - -static void dsi_config_vp_sync_events(struct omap_dss_device *dssdev) -{ - struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev); - int de_pol = dssdev->panel.dsi_vm_data.vp_de_pol; - int hsync_pol = dssdev->panel.dsi_vm_data.vp_hsync_pol; - int vsync_pol = dssdev->panel.dsi_vm_data.vp_vsync_pol; - bool vsync_end = dssdev->panel.dsi_vm_data.vp_vsync_end; - bool hsync_end = dssdev->panel.dsi_vm_data.vp_hsync_end; - u32 r; - - r = dsi_read_reg(dsidev, DSI_CTRL); - r = FLD_MOD(r, de_pol, 9, 9); /* VP_DE_POL */ - r = FLD_MOD(r, hsync_pol, 10, 10); /* VP_HSYNC_POL */ - r = FLD_MOD(r, vsync_pol, 11, 11); /* VP_VSYNC_POL */ - r = FLD_MOD(r, 1, 15, 15); /* VP_VSYNC_START */ - r = FLD_MOD(r, vsync_end, 16, 16); /* VP_VSYNC_END */ - r = FLD_MOD(r, 1, 17, 17); /* VP_HSYNC_START */ - r = FLD_MOD(r, hsync_end, 18, 18); /* VP_HSYNC_END */ - dsi_write_reg(dsidev, DSI_CTRL, r); -} - -static void dsi_config_blanking_modes(struct omap_dss_device *dssdev) -{ - struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev); - int blanking_mode = dssdev->panel.dsi_vm_data.blanking_mode; - int hfp_blanking_mode = dssdev->panel.dsi_vm_data.hfp_blanking_mode; - int hbp_blanking_mode = dssdev->panel.dsi_vm_data.hbp_blanking_mode; - int hsa_blanking_mode = dssdev->panel.dsi_vm_data.hsa_blanking_mode; - u32 r; - - /* - * 0 = TX FIFO packets sent or LPS in corresponding blanking periods - * 1 = Long blanking packets are sent in corresponding blanking periods - */ - r = dsi_read_reg(dsidev, DSI_CTRL); - r = FLD_MOD(r, blanking_mode, 20, 20); /* BLANKING_MODE */ - r = FLD_MOD(r, hfp_blanking_mode, 21, 21); /* HFP_BLANKING */ - r = FLD_MOD(r, hbp_blanking_mode, 22, 22); /* HBP_BLANKING */ - r = FLD_MOD(r, hsa_blanking_mode, 23, 23); /* HSA_BLANKING */ - dsi_write_reg(dsidev, DSI_CTRL, r); -} - -static int dsi_proto_config(struct omap_dss_device *dssdev) -{ - struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev); - u32 r; - int buswidth = 0; - - dsi_config_tx_fifo(dsidev, DSI_FIFO_SIZE_32, - DSI_FIFO_SIZE_32, - DSI_FIFO_SIZE_32, - DSI_FIFO_SIZE_32); - - dsi_config_rx_fifo(dsidev, DSI_FIFO_SIZE_32, - DSI_FIFO_SIZE_32, - DSI_FIFO_SIZE_32, - DSI_FIFO_SIZE_32); - - /* XXX what values for the timeouts? */ - dsi_set_stop_state_counter(dsidev, 0x1000, false, false); - dsi_set_ta_timeout(dsidev, 0x1fff, true, true); - dsi_set_lp_rx_timeout(dsidev, 0x1fff, true, true); - dsi_set_hs_tx_timeout(dsidev, 0x1fff, true, true); - - switch (dsi_get_pixel_size(dssdev->panel.dsi_pix_fmt)) { - case 16: - buswidth = 0; - break; - case 18: - buswidth = 1; - break; - case 24: - buswidth = 2; - break; - default: - BUG(); - } - - r = dsi_read_reg(dsidev, DSI_CTRL); - r = FLD_MOD(r, 1, 1, 1); /* CS_RX_EN */ - r = FLD_MOD(r, 1, 2, 2); /* ECC_RX_EN */ - r = FLD_MOD(r, 1, 3, 3); /* TX_FIFO_ARBITRATION */ - r = FLD_MOD(r, 1, 4, 4); /* VP_CLK_RATIO, always 1, see errata*/ - r = FLD_MOD(r, buswidth, 7, 6); /* VP_DATA_BUS_WIDTH */ - r = FLD_MOD(r, 0, 8, 8); /* VP_CLK_POL */ - r = FLD_MOD(r, 1, 14, 14); /* TRIGGER_RESET_MODE */ - r = FLD_MOD(r, 1, 19, 19); /* EOT_ENABLE */ - if (!dss_has_feature(FEAT_DSI_DCS_CMD_CONFIG_VC)) { - r = FLD_MOD(r, 1, 24, 24); /* DCS_CMD_ENABLE */ - /* DCS_CMD_CODE, 1=start, 0=continue */ - r = FLD_MOD(r, 0, 25, 25); - } - - dsi_write_reg(dsidev, DSI_CTRL, r); - - dsi_config_vp_num_line_buffers(dssdev); - - if (dssdev->panel.dsi_mode == OMAP_DSS_DSI_VIDEO_MODE) { - dsi_config_vp_sync_events(dssdev); - dsi_config_blanking_modes(dssdev); - } - - dsi_vc_initial_config(dsidev, 0); - dsi_vc_initial_config(dsidev, 1); - dsi_vc_initial_config(dsidev, 2); - dsi_vc_initial_config(dsidev, 3); - - return 0; -} - -static void dsi_proto_timings(struct omap_dss_device *dssdev) -{ - struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev); - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - unsigned tlpx, tclk_zero, tclk_prepare, tclk_trail; - unsigned tclk_pre, tclk_post; - unsigned ths_prepare, ths_prepare_ths_zero, ths_zero; - unsigned ths_trail, ths_exit; - unsigned ddr_clk_pre, ddr_clk_post; - unsigned enter_hs_mode_lat, exit_hs_mode_lat; - unsigned ths_eot; - int ndl = dsi->num_lanes_used - 1; - u32 r; - - r = dsi_read_reg(dsidev, DSI_DSIPHY_CFG0); - ths_prepare = FLD_GET(r, 31, 24); - ths_prepare_ths_zero = FLD_GET(r, 23, 16); - ths_zero = ths_prepare_ths_zero - ths_prepare; - ths_trail = FLD_GET(r, 15, 8); - ths_exit = FLD_GET(r, 7, 0); - - r = dsi_read_reg(dsidev, DSI_DSIPHY_CFG1); - tlpx = FLD_GET(r, 22, 16) * 2; - tclk_trail = FLD_GET(r, 15, 8); - tclk_zero = FLD_GET(r, 7, 0); - - r = dsi_read_reg(dsidev, DSI_DSIPHY_CFG2); - tclk_prepare = FLD_GET(r, 7, 0); - - /* min 8*UI */ - tclk_pre = 20; - /* min 60ns + 52*UI */ - tclk_post = ns2ddr(dsidev, 60) + 26; - - ths_eot = DIV_ROUND_UP(4, ndl); - - ddr_clk_pre = DIV_ROUND_UP(tclk_pre + tlpx + tclk_zero + tclk_prepare, - 4); - ddr_clk_post = DIV_ROUND_UP(tclk_post + ths_trail, 4) + ths_eot; - - BUG_ON(ddr_clk_pre == 0 || ddr_clk_pre > 255); - BUG_ON(ddr_clk_post == 0 || ddr_clk_post > 255); - - r = dsi_read_reg(dsidev, DSI_CLK_TIMING); - r = FLD_MOD(r, ddr_clk_pre, 15, 8); - r = FLD_MOD(r, ddr_clk_post, 7, 0); - dsi_write_reg(dsidev, DSI_CLK_TIMING, r); - - DSSDBG("ddr_clk_pre %u, ddr_clk_post %u\n", - ddr_clk_pre, - ddr_clk_post); - - enter_hs_mode_lat = 1 + DIV_ROUND_UP(tlpx, 4) + - DIV_ROUND_UP(ths_prepare, 4) + - DIV_ROUND_UP(ths_zero + 3, 4); - - exit_hs_mode_lat = DIV_ROUND_UP(ths_trail + ths_exit, 4) + 1 + ths_eot; - - r = FLD_VAL(enter_hs_mode_lat, 31, 16) | - FLD_VAL(exit_hs_mode_lat, 15, 0); - dsi_write_reg(dsidev, DSI_VM_TIMING7, r); - - DSSDBG("enter_hs_mode_lat %u, exit_hs_mode_lat %u\n", - enter_hs_mode_lat, exit_hs_mode_lat); - - if (dssdev->panel.dsi_mode == OMAP_DSS_DSI_VIDEO_MODE) { - /* TODO: Implement a video mode check_timings function */ - int hsa = dssdev->panel.dsi_vm_data.hsa; - int hfp = dssdev->panel.dsi_vm_data.hfp; - int hbp = dssdev->panel.dsi_vm_data.hbp; - int vsa = dssdev->panel.dsi_vm_data.vsa; - int vfp = dssdev->panel.dsi_vm_data.vfp; - int vbp = dssdev->panel.dsi_vm_data.vbp; - int window_sync = dssdev->panel.dsi_vm_data.window_sync; - bool hsync_end = dssdev->panel.dsi_vm_data.vp_hsync_end; - struct omap_video_timings *timings = &dssdev->panel.timings; - int bpp = dsi_get_pixel_size(dssdev->panel.dsi_pix_fmt); - int tl, t_he, width_bytes; - - t_he = hsync_end ? - ((hsa == 0 && ndl == 3) ? 1 : DIV_ROUND_UP(4, ndl)) : 0; - - width_bytes = DIV_ROUND_UP(timings->x_res * bpp, 8); - - /* TL = t_HS + HSA + t_HE + HFP + ceil((WC + 6) / NDL) + HBP */ - tl = DIV_ROUND_UP(4, ndl) + (hsync_end ? hsa : 0) + t_he + hfp + - DIV_ROUND_UP(width_bytes + 6, ndl) + hbp; - - DSSDBG("HBP: %d, HFP: %d, HSA: %d, TL: %d TXBYTECLKHS\n", hbp, - hfp, hsync_end ? hsa : 0, tl); - DSSDBG("VBP: %d, VFP: %d, VSA: %d, VACT: %d lines\n", vbp, vfp, - vsa, timings->y_res); - - r = dsi_read_reg(dsidev, DSI_VM_TIMING1); - r = FLD_MOD(r, hbp, 11, 0); /* HBP */ - r = FLD_MOD(r, hfp, 23, 12); /* HFP */ - r = FLD_MOD(r, hsync_end ? hsa : 0, 31, 24); /* HSA */ - dsi_write_reg(dsidev, DSI_VM_TIMING1, r); - - r = dsi_read_reg(dsidev, DSI_VM_TIMING2); - r = FLD_MOD(r, vbp, 7, 0); /* VBP */ - r = FLD_MOD(r, vfp, 15, 8); /* VFP */ - r = FLD_MOD(r, vsa, 23, 16); /* VSA */ - r = FLD_MOD(r, window_sync, 27, 24); /* WINDOW_SYNC */ - dsi_write_reg(dsidev, DSI_VM_TIMING2, r); - - r = dsi_read_reg(dsidev, DSI_VM_TIMING3); - r = FLD_MOD(r, timings->y_res, 14, 0); /* VACT */ - r = FLD_MOD(r, tl, 31, 16); /* TL */ - dsi_write_reg(dsidev, DSI_VM_TIMING3, r); - } -} - -int dsi_enable_video_output(struct omap_dss_device *dssdev, int channel) -{ - struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev); - int bpp = dsi_get_pixel_size(dssdev->panel.dsi_pix_fmt); - u8 data_type; - u16 word_count; - int r; - - if (dssdev->panel.dsi_mode == OMAP_DSS_DSI_VIDEO_MODE) { - switch (dssdev->panel.dsi_pix_fmt) { - case OMAP_DSS_DSI_FMT_RGB888: - data_type = MIPI_DSI_PACKED_PIXEL_STREAM_24; - break; - case OMAP_DSS_DSI_FMT_RGB666: - data_type = MIPI_DSI_PIXEL_STREAM_3BYTE_18; - break; - case OMAP_DSS_DSI_FMT_RGB666_PACKED: - data_type = MIPI_DSI_PACKED_PIXEL_STREAM_18; - break; - case OMAP_DSS_DSI_FMT_RGB565: - data_type = MIPI_DSI_PACKED_PIXEL_STREAM_16; - break; - default: - BUG(); - }; - - dsi_if_enable(dsidev, false); - dsi_vc_enable(dsidev, channel, false); - - /* MODE, 1 = video mode */ - REG_FLD_MOD(dsidev, DSI_VC_CTRL(channel), 1, 4, 4); - - word_count = DIV_ROUND_UP(dssdev->panel.timings.x_res * bpp, 8); - - dsi_vc_write_long_header(dsidev, channel, data_type, - word_count, 0); - - dsi_vc_enable(dsidev, channel, true); - dsi_if_enable(dsidev, true); - } - - r = dss_mgr_enable(dssdev->manager); - if (r) { - if (dssdev->panel.dsi_mode == OMAP_DSS_DSI_VIDEO_MODE) { - dsi_if_enable(dsidev, false); - dsi_vc_enable(dsidev, channel, false); - } - - return r; - } - - return 0; -} -EXPORT_SYMBOL(dsi_enable_video_output); - -void dsi_disable_video_output(struct omap_dss_device *dssdev, int channel) -{ - struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev); - - if (dssdev->panel.dsi_mode == OMAP_DSS_DSI_VIDEO_MODE) { - dsi_if_enable(dsidev, false); - dsi_vc_enable(dsidev, channel, false); - - /* MODE, 0 = command mode */ - REG_FLD_MOD(dsidev, DSI_VC_CTRL(channel), 0, 4, 4); - - dsi_vc_enable(dsidev, channel, true); - dsi_if_enable(dsidev, true); - } - - dss_mgr_disable(dssdev->manager); -} -EXPORT_SYMBOL(dsi_disable_video_output); - -static void dsi_update_screen_dispc(struct omap_dss_device *dssdev, - u16 w, u16 h) -{ - struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev); - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - unsigned bytespp; - unsigned bytespl; - unsigned bytespf; - unsigned total_len; - unsigned packet_payload; - unsigned packet_len; - u32 l; - int r; - const unsigned channel = dsi->update_channel; - const unsigned line_buf_size = dsi_get_line_buf_size(dsidev); - - DSSDBG("dsi_update_screen_dispc(%dx%d)\n", w, h); - - dsi_vc_config_source(dsidev, channel, DSI_VC_SOURCE_VP); - - bytespp = dsi_get_pixel_size(dssdev->panel.dsi_pix_fmt) / 8; - bytespl = w * bytespp; - bytespf = bytespl * h; - - /* NOTE: packet_payload has to be equal to N * bytespl, where N is - * number of lines in a packet. See errata about VP_CLK_RATIO */ - - if (bytespf < line_buf_size) - packet_payload = bytespf; - else - packet_payload = (line_buf_size) / bytespl * bytespl; - - packet_len = packet_payload + 1; /* 1 byte for DCS cmd */ - total_len = (bytespf / packet_payload) * packet_len; - - if (bytespf % packet_payload) - total_len += (bytespf % packet_payload) + 1; - - l = FLD_VAL(total_len, 23, 0); /* TE_SIZE */ - dsi_write_reg(dsidev, DSI_VC_TE(channel), l); - - dsi_vc_write_long_header(dsidev, channel, MIPI_DSI_DCS_LONG_WRITE, - packet_len, 0); - - if (dsi->te_enabled) - l = FLD_MOD(l, 1, 30, 30); /* TE_EN */ - else - l = FLD_MOD(l, 1, 31, 31); /* TE_START */ - dsi_write_reg(dsidev, DSI_VC_TE(channel), l); - - /* We put SIDLEMODE to no-idle for the duration of the transfer, - * because DSS interrupts are not capable of waking up the CPU and the - * framedone interrupt could be delayed for quite a long time. I think - * the same goes for any DSS interrupts, but for some reason I have not - * seen the problem anywhere else than here. - */ - dispc_disable_sidle(); - - dsi_perf_mark_start(dsidev); - - r = schedule_delayed_work(&dsi->framedone_timeout_work, - msecs_to_jiffies(250)); - BUG_ON(r == 0); - - dss_mgr_start_update(dssdev->manager); - - if (dsi->te_enabled) { - /* disable LP_RX_TO, so that we can receive TE. Time to wait - * for TE is longer than the timer allows */ - REG_FLD_MOD(dsidev, DSI_TIMING2, 0, 15, 15); /* LP_RX_TO */ - - dsi_vc_send_bta(dsidev, channel); - -#ifdef DSI_CATCH_MISSING_TE - mod_timer(&dsi->te_timer, jiffies + msecs_to_jiffies(250)); -#endif - } -} - -#ifdef DSI_CATCH_MISSING_TE -static void dsi_te_timeout(unsigned long arg) -{ - DSSERR("TE not received for 250ms!\n"); -} -#endif - -static void dsi_handle_framedone(struct platform_device *dsidev, int error) -{ - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - - /* SIDLEMODE back to smart-idle */ - dispc_enable_sidle(); - - if (dsi->te_enabled) { - /* enable LP_RX_TO again after the TE */ - REG_FLD_MOD(dsidev, DSI_TIMING2, 1, 15, 15); /* LP_RX_TO */ - } - - dsi->framedone_callback(error, dsi->framedone_data); - - if (!error) - dsi_perf_show(dsidev, "DISPC"); -} - -static void dsi_framedone_timeout_work_callback(struct work_struct *work) -{ - struct dsi_data *dsi = container_of(work, struct dsi_data, - framedone_timeout_work.work); - /* XXX While extremely unlikely, we could get FRAMEDONE interrupt after - * 250ms which would conflict with this timeout work. What should be - * done is first cancel the transfer on the HW, and then cancel the - * possibly scheduled framedone work. However, cancelling the transfer - * on the HW is buggy, and would probably require resetting the whole - * DSI */ - - DSSERR("Framedone not received for 250ms!\n"); - - dsi_handle_framedone(dsi->pdev, -ETIMEDOUT); -} - -static void dsi_framedone_irq_callback(void *data, u32 mask) -{ - struct omap_dss_device *dssdev = (struct omap_dss_device *) data; - struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev); - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - - /* Note: We get FRAMEDONE when DISPC has finished sending pixels and - * turns itself off. However, DSI still has the pixels in its buffers, - * and is sending the data. - */ - - __cancel_delayed_work(&dsi->framedone_timeout_work); - - dsi_handle_framedone(dsidev, 0); - -#ifdef CONFIG_OMAP2_DSS_FAKE_VSYNC - dispc_fake_vsync_irq(); -#endif -} - -int omap_dsi_update(struct omap_dss_device *dssdev, int channel, - void (*callback)(int, void *), void *data) -{ - struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev); - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - u16 dw, dh; - - dsi_perf_mark_setup(dsidev); - - dsi->update_channel = channel; - - dsi->framedone_callback = callback; - dsi->framedone_data = data; - - dssdev->driver->get_resolution(dssdev, &dw, &dh); - -#ifdef DEBUG - dsi->update_bytes = dw * dh * - dsi_get_pixel_size(dssdev->panel.dsi_pix_fmt) / 8; -#endif - dsi_update_screen_dispc(dssdev, dw, dh); - - return 0; -} -EXPORT_SYMBOL(omap_dsi_update); - -/* Display funcs */ - -static int dsi_display_init_dispc(struct omap_dss_device *dssdev) -{ - int r; - - if (dssdev->panel.dsi_mode == OMAP_DSS_DSI_CMD_MODE) { - u16 dw, dh; - u32 irq; - struct omap_video_timings timings = { - .hsw = 1, - .hfp = 1, - .hbp = 1, - .vsw = 1, - .vfp = 0, - .vbp = 0, - }; - - dssdev->driver->get_resolution(dssdev, &dw, &dh); - timings.x_res = dw; - timings.y_res = dh; - - irq = dssdev->manager->id == OMAP_DSS_CHANNEL_LCD ? - DISPC_IRQ_FRAMEDONE : DISPC_IRQ_FRAMEDONE2; - - r = omap_dispc_register_isr(dsi_framedone_irq_callback, - (void *) dssdev, irq); - if (r) { - DSSERR("can't get FRAMEDONE irq\n"); - return r; - } - - dispc_mgr_enable_stallmode(dssdev->manager->id, true); - dispc_mgr_enable_fifohandcheck(dssdev->manager->id, 1); - - dispc_mgr_set_lcd_timings(dssdev->manager->id, &timings); - } else { - dispc_mgr_enable_stallmode(dssdev->manager->id, false); - dispc_mgr_enable_fifohandcheck(dssdev->manager->id, 0); - - dispc_mgr_set_lcd_timings(dssdev->manager->id, - &dssdev->panel.timings); - } - - dispc_mgr_set_lcd_display_type(dssdev->manager->id, - OMAP_DSS_LCD_DISPLAY_TFT); - dispc_mgr_set_tft_data_lines(dssdev->manager->id, - dsi_get_pixel_size(dssdev->panel.dsi_pix_fmt)); - return 0; -} - -static void dsi_display_uninit_dispc(struct omap_dss_device *dssdev) -{ - if (dssdev->panel.dsi_mode == OMAP_DSS_DSI_CMD_MODE) { - u32 irq; - - irq = dssdev->manager->id == OMAP_DSS_CHANNEL_LCD ? - DISPC_IRQ_FRAMEDONE : DISPC_IRQ_FRAMEDONE2; - - omap_dispc_unregister_isr(dsi_framedone_irq_callback, - (void *) dssdev, irq); - } -} - -static int dsi_configure_dsi_clocks(struct omap_dss_device *dssdev) -{ - struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev); - struct dsi_clock_info cinfo; - int r; - - /* we always use DSS_CLK_SYSCK as input clock */ - cinfo.use_sys_clk = true; - cinfo.regn = dssdev->clocks.dsi.regn; - cinfo.regm = dssdev->clocks.dsi.regm; - cinfo.regm_dispc = dssdev->clocks.dsi.regm_dispc; - cinfo.regm_dsi = dssdev->clocks.dsi.regm_dsi; - r = dsi_calc_clock_rates(dssdev, &cinfo); - if (r) { - DSSERR("Failed to calc dsi clocks\n"); - return r; - } - - r = dsi_pll_set_clock_div(dsidev, &cinfo); - if (r) { - DSSERR("Failed to set dsi clocks\n"); - return r; - } - - return 0; -} - -static int dsi_configure_dispc_clocks(struct omap_dss_device *dssdev) -{ - struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev); - struct dispc_clock_info dispc_cinfo; - int r; - unsigned long long fck; - - fck = dsi_get_pll_hsdiv_dispc_rate(dsidev); - - dispc_cinfo.lck_div = dssdev->clocks.dispc.channel.lck_div; - dispc_cinfo.pck_div = dssdev->clocks.dispc.channel.pck_div; - - r = dispc_calc_clock_rates(fck, &dispc_cinfo); - if (r) { - DSSERR("Failed to calc dispc clocks\n"); - return r; - } - - r = dispc_mgr_set_clock_div(dssdev->manager->id, &dispc_cinfo); - if (r) { - DSSERR("Failed to set dispc clocks\n"); - return r; - } - - return 0; -} - -static int dsi_display_init_dsi(struct omap_dss_device *dssdev) -{ - struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev); - int dsi_module = dsi_get_dsidev_id(dsidev); - int r; - - r = dsi_parse_lane_config(dssdev); - if (r) { - DSSERR("illegal lane config"); - goto err0; - } - - r = dsi_pll_init(dsidev, true, true); - if (r) - goto err0; - - r = dsi_configure_dsi_clocks(dssdev); - if (r) - goto err1; - - dss_select_dispc_clk_source(dssdev->clocks.dispc.dispc_fclk_src); - dss_select_dsi_clk_source(dsi_module, dssdev->clocks.dsi.dsi_fclk_src); - dss_select_lcd_clk_source(dssdev->manager->id, - dssdev->clocks.dispc.channel.lcd_clk_src); - - DSSDBG("PLL OK\n"); - - r = dsi_configure_dispc_clocks(dssdev); - if (r) - goto err2; - - r = dsi_cio_init(dssdev); - if (r) - goto err2; - - _dsi_print_reset_status(dsidev); - - dsi_proto_timings(dssdev); - dsi_set_lp_clk_divisor(dssdev); - - if (1) - _dsi_print_reset_status(dsidev); - - r = dsi_proto_config(dssdev); - if (r) - goto err3; - - /* enable interface */ - dsi_vc_enable(dsidev, 0, 1); - dsi_vc_enable(dsidev, 1, 1); - dsi_vc_enable(dsidev, 2, 1); - dsi_vc_enable(dsidev, 3, 1); - dsi_if_enable(dsidev, 1); - dsi_force_tx_stop_mode_io(dsidev); - - return 0; -err3: - dsi_cio_uninit(dssdev); -err2: - dss_select_dispc_clk_source(OMAP_DSS_CLK_SRC_FCK); - dss_select_dsi_clk_source(dsi_module, OMAP_DSS_CLK_SRC_FCK); - dss_select_lcd_clk_source(dssdev->manager->id, OMAP_DSS_CLK_SRC_FCK); - -err1: - dsi_pll_uninit(dsidev, true); -err0: - return r; -} - -static void dsi_display_uninit_dsi(struct omap_dss_device *dssdev, - bool disconnect_lanes, bool enter_ulps) -{ - struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev); - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - int dsi_module = dsi_get_dsidev_id(dsidev); - - if (enter_ulps && !dsi->ulps_enabled) - dsi_enter_ulps(dsidev); - - /* disable interface */ - dsi_if_enable(dsidev, 0); - dsi_vc_enable(dsidev, 0, 0); - dsi_vc_enable(dsidev, 1, 0); - dsi_vc_enable(dsidev, 2, 0); - dsi_vc_enable(dsidev, 3, 0); - - dss_select_dispc_clk_source(OMAP_DSS_CLK_SRC_FCK); - dss_select_dsi_clk_source(dsi_module, OMAP_DSS_CLK_SRC_FCK); - dss_select_lcd_clk_source(dssdev->manager->id, OMAP_DSS_CLK_SRC_FCK); - dsi_cio_uninit(dssdev); - dsi_pll_uninit(dsidev, disconnect_lanes); -} - -int omapdss_dsi_display_enable(struct omap_dss_device *dssdev) -{ - struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev); - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - int r = 0; - - DSSDBG("dsi_display_enable\n"); - - WARN_ON(!dsi_bus_is_locked(dsidev)); - - mutex_lock(&dsi->lock); - - if (dssdev->manager == NULL) { - DSSERR("failed to enable display: no manager\n"); - r = -ENODEV; - goto err_start_dev; - } - - r = omap_dss_start_device(dssdev); - if (r) { - DSSERR("failed to start device\n"); - goto err_start_dev; - } - - r = dsi_runtime_get(dsidev); - if (r) - goto err_get_dsi; - - dsi_enable_pll_clock(dsidev, 1); - - _dsi_initialize_irq(dsidev); - - r = dsi_display_init_dispc(dssdev); - if (r) - goto err_init_dispc; - - r = dsi_display_init_dsi(dssdev); - if (r) - goto err_init_dsi; - - mutex_unlock(&dsi->lock); - - return 0; - -err_init_dsi: - dsi_display_uninit_dispc(dssdev); -err_init_dispc: - dsi_enable_pll_clock(dsidev, 0); - dsi_runtime_put(dsidev); -err_get_dsi: - omap_dss_stop_device(dssdev); -err_start_dev: - mutex_unlock(&dsi->lock); - DSSDBG("dsi_display_enable FAILED\n"); - return r; -} -EXPORT_SYMBOL(omapdss_dsi_display_enable); - -void omapdss_dsi_display_disable(struct omap_dss_device *dssdev, - bool disconnect_lanes, bool enter_ulps) -{ - struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev); - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - - DSSDBG("dsi_display_disable\n"); - - WARN_ON(!dsi_bus_is_locked(dsidev)); - - mutex_lock(&dsi->lock); - - dsi_sync_vc(dsidev, 0); - dsi_sync_vc(dsidev, 1); - dsi_sync_vc(dsidev, 2); - dsi_sync_vc(dsidev, 3); - - dsi_display_uninit_dispc(dssdev); - - dsi_display_uninit_dsi(dssdev, disconnect_lanes, enter_ulps); - - dsi_runtime_put(dsidev); - dsi_enable_pll_clock(dsidev, 0); - - omap_dss_stop_device(dssdev); - - mutex_unlock(&dsi->lock); -} -EXPORT_SYMBOL(omapdss_dsi_display_disable); - -int omapdss_dsi_enable_te(struct omap_dss_device *dssdev, bool enable) -{ - struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev); - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - - dsi->te_enabled = enable; - return 0; -} -EXPORT_SYMBOL(omapdss_dsi_enable_te); - -void dsi_get_overlay_fifo_thresholds(enum omap_plane plane, - u32 fifo_size, u32 burst_size, - u32 *fifo_low, u32 *fifo_high) -{ - *fifo_high = fifo_size - burst_size; - *fifo_low = fifo_size - burst_size * 2; -} - -int dsi_init_display(struct omap_dss_device *dssdev) -{ - struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev); - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - - DSSDBG("DSI init\n"); - - if (dssdev->panel.dsi_mode == OMAP_DSS_DSI_CMD_MODE) { - dssdev->caps = OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE | - OMAP_DSS_DISPLAY_CAP_TEAR_ELIM; - } - - if (dsi->vdds_dsi_reg == NULL) { - struct regulator *vdds_dsi; - - vdds_dsi = regulator_get(&dsi->pdev->dev, "vdds_dsi"); - - if (IS_ERR(vdds_dsi)) { - DSSERR("can't get VDDS_DSI regulator\n"); - return PTR_ERR(vdds_dsi); - } - - dsi->vdds_dsi_reg = vdds_dsi; - } - - return 0; -} - -int omap_dsi_request_vc(struct omap_dss_device *dssdev, int *channel) -{ - struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev); - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - int i; - - for (i = 0; i < ARRAY_SIZE(dsi->vc); i++) { - if (!dsi->vc[i].dssdev) { - dsi->vc[i].dssdev = dssdev; - *channel = i; - return 0; - } - } - - DSSERR("cannot get VC for display %s", dssdev->name); - return -ENOSPC; -} -EXPORT_SYMBOL(omap_dsi_request_vc); - -int omap_dsi_set_vc_id(struct omap_dss_device *dssdev, int channel, int vc_id) -{ - struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev); - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - - if (vc_id < 0 || vc_id > 3) { - DSSERR("VC ID out of range\n"); - return -EINVAL; - } - - if (channel < 0 || channel > 3) { - DSSERR("Virtual Channel out of range\n"); - return -EINVAL; - } - - if (dsi->vc[channel].dssdev != dssdev) { - DSSERR("Virtual Channel not allocated to display %s\n", - dssdev->name); - return -EINVAL; - } - - dsi->vc[channel].vc_id = vc_id; - - return 0; -} -EXPORT_SYMBOL(omap_dsi_set_vc_id); - -void omap_dsi_release_vc(struct omap_dss_device *dssdev, int channel) -{ - struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev); - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - - if ((channel >= 0 && channel <= 3) && - dsi->vc[channel].dssdev == dssdev) { - dsi->vc[channel].dssdev = NULL; - dsi->vc[channel].vc_id = 0; - } -} -EXPORT_SYMBOL(omap_dsi_release_vc); - -void dsi_wait_pll_hsdiv_dispc_active(struct platform_device *dsidev) -{ - if (wait_for_bit_change(dsidev, DSI_PLL_STATUS, 7, 1) != 1) - DSSERR("%s (%s) not active\n", - dss_get_generic_clk_source_name(OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC), - dss_feat_get_clk_source_name(OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC)); -} - -void dsi_wait_pll_hsdiv_dsi_active(struct platform_device *dsidev) -{ - if (wait_for_bit_change(dsidev, DSI_PLL_STATUS, 8, 1) != 1) - DSSERR("%s (%s) not active\n", - dss_get_generic_clk_source_name(OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI), - dss_feat_get_clk_source_name(OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI)); -} - -static void dsi_calc_clock_param_ranges(struct platform_device *dsidev) -{ - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - - dsi->regn_max = dss_feat_get_param_max(FEAT_PARAM_DSIPLL_REGN); - dsi->regm_max = dss_feat_get_param_max(FEAT_PARAM_DSIPLL_REGM); - dsi->regm_dispc_max = - dss_feat_get_param_max(FEAT_PARAM_DSIPLL_REGM_DISPC); - dsi->regm_dsi_max = dss_feat_get_param_max(FEAT_PARAM_DSIPLL_REGM_DSI); - dsi->fint_min = dss_feat_get_param_min(FEAT_PARAM_DSIPLL_FINT); - dsi->fint_max = dss_feat_get_param_max(FEAT_PARAM_DSIPLL_FINT); - dsi->lpdiv_max = dss_feat_get_param_max(FEAT_PARAM_DSIPLL_LPDIV); -} - -static int dsi_get_clocks(struct platform_device *dsidev) -{ - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - struct clk *clk; - - clk = clk_get(&dsidev->dev, "fck"); - if (IS_ERR(clk)) { - DSSERR("can't get fck\n"); - return PTR_ERR(clk); - } - - dsi->dss_clk = clk; - - clk = clk_get(&dsidev->dev, "sys_clk"); - if (IS_ERR(clk)) { - DSSERR("can't get sys_clk\n"); - clk_put(dsi->dss_clk); - dsi->dss_clk = NULL; - return PTR_ERR(clk); - } - - dsi->sys_clk = clk; - - return 0; -} - -static void dsi_put_clocks(struct platform_device *dsidev) -{ - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - - if (dsi->dss_clk) - clk_put(dsi->dss_clk); - if (dsi->sys_clk) - clk_put(dsi->sys_clk); -} - -/* DSI1 HW IP initialisation */ -static int omap_dsihw_probe(struct platform_device *dsidev) -{ - struct omap_display_platform_data *dss_plat_data; - struct omap_dss_board_info *board_info; - u32 rev; - int r, i, dsi_module = dsi_get_dsidev_id(dsidev); - struct resource *dsi_mem; - struct dsi_data *dsi; - - dsi = kzalloc(sizeof(*dsi), GFP_KERNEL); - if (!dsi) { - r = -ENOMEM; - goto err_alloc; - } - - dsi->pdev = dsidev; - dsi_pdev_map[dsi_module] = dsidev; - dev_set_drvdata(&dsidev->dev, dsi); - - dss_plat_data = dsidev->dev.platform_data; - board_info = dss_plat_data->board_data; - dsi->enable_pads = board_info->dsi_enable_pads; - dsi->disable_pads = board_info->dsi_disable_pads; - - spin_lock_init(&dsi->irq_lock); - spin_lock_init(&dsi->errors_lock); - dsi->errors = 0; - -#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS - spin_lock_init(&dsi->irq_stats_lock); - dsi->irq_stats.last_reset = jiffies; -#endif - - mutex_init(&dsi->lock); - sema_init(&dsi->bus_lock, 1); - - r = dsi_get_clocks(dsidev); - if (r) - goto err_get_clk; - - pm_runtime_enable(&dsidev->dev); - - INIT_DELAYED_WORK_DEFERRABLE(&dsi->framedone_timeout_work, - dsi_framedone_timeout_work_callback); - -#ifdef DSI_CATCH_MISSING_TE - init_timer(&dsi->te_timer); - dsi->te_timer.function = dsi_te_timeout; - dsi->te_timer.data = 0; -#endif - dsi_mem = platform_get_resource(dsi->pdev, IORESOURCE_MEM, 0); - if (!dsi_mem) { - DSSERR("can't get IORESOURCE_MEM DSI\n"); - r = -EINVAL; - goto err_ioremap; - } - dsi->base = ioremap(dsi_mem->start, resource_size(dsi_mem)); - if (!dsi->base) { - DSSERR("can't ioremap DSI\n"); - r = -ENOMEM; - goto err_ioremap; - } - dsi->irq = platform_get_irq(dsi->pdev, 0); - if (dsi->irq < 0) { - DSSERR("platform_get_irq failed\n"); - r = -ENODEV; - goto err_get_irq; - } - - r = request_irq(dsi->irq, omap_dsi_irq_handler, IRQF_SHARED, - dev_name(&dsidev->dev), dsi->pdev); - if (r < 0) { - DSSERR("request_irq failed\n"); - goto err_get_irq; - } - - /* DSI VCs initialization */ - for (i = 0; i < ARRAY_SIZE(dsi->vc); i++) { - dsi->vc[i].source = DSI_VC_SOURCE_L4; - dsi->vc[i].dssdev = NULL; - dsi->vc[i].vc_id = 0; - } - - dsi_calc_clock_param_ranges(dsidev); - - r = dsi_runtime_get(dsidev); - if (r) - goto err_get_dsi; - - rev = dsi_read_reg(dsidev, DSI_REVISION); - dev_dbg(&dsidev->dev, "OMAP DSI rev %d.%d\n", - FLD_GET(rev, 7, 4), FLD_GET(rev, 3, 0)); - - /* DSI on OMAP3 doesn't have register DSI_GNQ, set number - * of data to 3 by default */ - if (dss_has_feature(FEAT_DSI_GNQ)) - /* NB_DATA_LANES */ - dsi->num_lanes_supported = 1 + REG_GET(dsidev, DSI_GNQ, 11, 9); - else - dsi->num_lanes_supported = 3; - - dsi_runtime_put(dsidev); - - return 0; - -err_get_dsi: - free_irq(dsi->irq, dsi->pdev); -err_get_irq: - iounmap(dsi->base); -err_ioremap: - pm_runtime_disable(&dsidev->dev); -err_get_clk: - kfree(dsi); -err_alloc: - return r; -} - -static int omap_dsihw_remove(struct platform_device *dsidev) -{ - struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); - - WARN_ON(dsi->scp_clk_refcount > 0); - - pm_runtime_disable(&dsidev->dev); - - dsi_put_clocks(dsidev); - - if (dsi->vdds_dsi_reg != NULL) { - if (dsi->vdds_dsi_enabled) { - regulator_disable(dsi->vdds_dsi_reg); - dsi->vdds_dsi_enabled = false; - } - - regulator_put(dsi->vdds_dsi_reg); - dsi->vdds_dsi_reg = NULL; - } - - free_irq(dsi->irq, dsi->pdev); - iounmap(dsi->base); - - kfree(dsi); - - return 0; -} - -static int dsi_runtime_suspend(struct device *dev) -{ - dispc_runtime_put(); - dss_runtime_put(); - - return 0; -} - -static int dsi_runtime_resume(struct device *dev) -{ - int r; - - r = dss_runtime_get(); - if (r) - goto err_get_dss; - - r = dispc_runtime_get(); - if (r) - goto err_get_dispc; - - return 0; - -err_get_dispc: - dss_runtime_put(); -err_get_dss: - return r; -} - -static const struct dev_pm_ops dsi_pm_ops = { - .runtime_suspend = dsi_runtime_suspend, - .runtime_resume = dsi_runtime_resume, -}; - -static struct platform_driver omap_dsihw_driver = { - .probe = omap_dsihw_probe, - .remove = omap_dsihw_remove, - .driver = { - .name = "omapdss_dsi", - .owner = THIS_MODULE, - .pm = &dsi_pm_ops, - }, -}; - -int dsi_init_platform_driver(void) -{ - return platform_driver_register(&omap_dsihw_driver); -} - -void dsi_uninit_platform_driver(void) -{ - return platform_driver_unregister(&omap_dsihw_driver); -} diff --git a/drivers/video/omap2/dss/dss.c b/drivers/video/omap2/dss/dss.c deleted file mode 100644 index 77c2b5a32b5..00000000000 --- a/drivers/video/omap2/dss/dss.c +++ /dev/null @@ -1,866 +0,0 @@ -/* - * linux/drivers/video/omap2/dss/dss.c - * - * Copyright (C) 2009 Nokia Corporation - * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com> - * - * Some code and ideas taken from drivers/video/omap/ driver - * by Imre Deak. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program. If not, see <http://www.gnu.org/licenses/>. - */ - -#define DSS_SUBSYS_NAME "DSS" - -#include <linux/kernel.h> -#include <linux/io.h> -#include <linux/export.h> -#include <linux/err.h> -#include <linux/delay.h> -#include <linux/seq_file.h> -#include <linux/clk.h> -#include <linux/platform_device.h> -#include <linux/pm_runtime.h> - -#include <video/omapdss.h> -#include <plat/clock.h> -#include "dss.h" -#include "dss_features.h" - -#define DSS_SZ_REGS SZ_512 - -struct dss_reg { - u16 idx; -}; - -#define DSS_REG(idx) ((const struct dss_reg) { idx }) - -#define DSS_REVISION DSS_REG(0x0000) -#define DSS_SYSCONFIG DSS_REG(0x0010) -#define DSS_SYSSTATUS DSS_REG(0x0014) -#define DSS_CONTROL DSS_REG(0x0040) -#define DSS_SDI_CONTROL DSS_REG(0x0044) -#define DSS_PLL_CONTROL DSS_REG(0x0048) -#define DSS_SDI_STATUS DSS_REG(0x005C) - -#define REG_GET(idx, start, end) \ - FLD_GET(dss_read_reg(idx), start, end) - -#define REG_FLD_MOD(idx, val, start, end) \ - dss_write_reg(idx, FLD_MOD(dss_read_reg(idx), val, start, end)) - -static struct { - struct platform_device *pdev; - void __iomem *base; - - struct clk *dpll4_m4_ck; - struct clk *dss_clk; - - unsigned long cache_req_pck; - unsigned long cache_prate; - struct dss_clock_info cache_dss_cinfo; - struct dispc_clock_info cache_dispc_cinfo; - - enum omap_dss_clk_source dsi_clk_source[MAX_NUM_DSI]; - enum omap_dss_clk_source dispc_clk_source; - enum omap_dss_clk_source lcd_clk_source[MAX_DSS_LCD_MANAGERS]; - - bool ctx_valid; - u32 ctx[DSS_SZ_REGS / sizeof(u32)]; -} dss; - -static const char * const dss_generic_clk_source_names[] = { - [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC] = "DSI_PLL_HSDIV_DISPC", - [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI] = "DSI_PLL_HSDIV_DSI", - [OMAP_DSS_CLK_SRC_FCK] = "DSS_FCK", -}; - -static inline void dss_write_reg(const struct dss_reg idx, u32 val) -{ - __raw_writel(val, dss.base + idx.idx); -} - -static inline u32 dss_read_reg(const struct dss_reg idx) -{ - return __raw_readl(dss.base + idx.idx); -} - -#define SR(reg) \ - dss.ctx[(DSS_##reg).idx / sizeof(u32)] = dss_read_reg(DSS_##reg) -#define RR(reg) \ - dss_write_reg(DSS_##reg, dss.ctx[(DSS_##reg).idx / sizeof(u32)]) - -static void dss_save_context(void) -{ - DSSDBG("dss_save_context\n"); - - SR(CONTROL); - - if (dss_feat_get_supported_displays(OMAP_DSS_CHANNEL_LCD) & - OMAP_DISPLAY_TYPE_SDI) { - SR(SDI_CONTROL); - SR(PLL_CONTROL); - } - - dss.ctx_valid = true; - - DSSDBG("context saved\n"); -} - -static void dss_restore_context(void) -{ - DSSDBG("dss_restore_context\n"); - - if (!dss.ctx_valid) - return; - - RR(CONTROL); - - if (dss_feat_get_supported_displays(OMAP_DSS_CHANNEL_LCD) & - OMAP_DISPLAY_TYPE_SDI) { - RR(SDI_CONTROL); - RR(PLL_CONTROL); - } - - DSSDBG("context restored\n"); -} - -#undef SR -#undef RR - -void dss_sdi_init(u8 datapairs) -{ - u32 l; - - BUG_ON(datapairs > 3 || datapairs < 1); - - l = dss_read_reg(DSS_SDI_CONTROL); - l = FLD_MOD(l, 0xf, 19, 15); /* SDI_PDIV */ - l = FLD_MOD(l, datapairs-1, 3, 2); /* SDI_PRSEL */ - l = FLD_MOD(l, 2, 1, 0); /* SDI_BWSEL */ - dss_write_reg(DSS_SDI_CONTROL, l); - - l = dss_read_reg(DSS_PLL_CONTROL); - l = FLD_MOD(l, 0x7, 25, 22); /* SDI_PLL_FREQSEL */ - l = FLD_MOD(l, 0xb, 16, 11); /* SDI_PLL_REGN */ - l = FLD_MOD(l, 0xb4, 10, 1); /* SDI_PLL_REGM */ - dss_write_reg(DSS_PLL_CONTROL, l); -} - -int dss_sdi_enable(void) -{ - unsigned long timeout; - - dispc_pck_free_enable(1); - - /* Reset SDI PLL */ - REG_FLD_MOD(DSS_PLL_CONTROL, 1, 18, 18); /* SDI_PLL_SYSRESET */ - udelay(1); /* wait 2x PCLK */ - - /* Lock SDI PLL */ - REG_FLD_MOD(DSS_PLL_CONTROL, 1, 28, 28); /* SDI_PLL_GOBIT */ - - /* Waiting for PLL lock request to complete */ - timeout = jiffies + msecs_to_jiffies(500); - while (dss_read_reg(DSS_SDI_STATUS) & (1 << 6)) { - if (time_after_eq(jiffies, timeout)) { - DSSERR("PLL lock request timed out\n"); - goto err1; - } - } - - /* Clearing PLL_GO bit */ - REG_FLD_MOD(DSS_PLL_CONTROL, 0, 28, 28); - - /* Waiting for PLL to lock */ - timeout = jiffies + msecs_to_jiffies(500); - while (!(dss_read_reg(DSS_SDI_STATUS) & (1 << 5))) { - if (time_after_eq(jiffies, timeout)) { - DSSERR("PLL lock timed out\n"); - goto err1; - } - } - - dispc_lcd_enable_signal(1); - - /* Waiting for SDI reset to complete */ - timeout = jiffies + msecs_to_jiffies(500); - while (!(dss_read_reg(DSS_SDI_STATUS) & (1 << 2))) { - if (time_after_eq(jiffies, timeout)) { - DSSERR("SDI reset timed out\n"); - goto err2; - } - } - - return 0; - - err2: - dispc_lcd_enable_signal(0); - err1: - /* Reset SDI PLL */ - REG_FLD_MOD(DSS_PLL_CONTROL, 0, 18, 18); /* SDI_PLL_SYSRESET */ - - dispc_pck_free_enable(0); - - return -ETIMEDOUT; -} - -void dss_sdi_disable(void) -{ - dispc_lcd_enable_signal(0); - - dispc_pck_free_enable(0); - - /* Reset SDI PLL */ - REG_FLD_MOD(DSS_PLL_CONTROL, 0, 18, 18); /* SDI_PLL_SYSRESET */ -} - -const char *dss_get_generic_clk_source_name(enum omap_dss_clk_source clk_src) -{ - return dss_generic_clk_source_names[clk_src]; -} - - -void dss_dump_clocks(struct seq_file *s) -{ - unsigned long dpll4_ck_rate; - unsigned long dpll4_m4_ck_rate; - const char *fclk_name, *fclk_real_name; - unsigned long fclk_rate; - - if (dss_runtime_get()) - return; - - seq_printf(s, "- DSS -\n"); - - fclk_name = dss_get_generic_clk_source_name(OMAP_DSS_CLK_SRC_FCK); - fclk_real_name = dss_feat_get_clk_source_name(OMAP_DSS_CLK_SRC_FCK); - fclk_rate = clk_get_rate(dss.dss_clk); - - if (dss.dpll4_m4_ck) { - dpll4_ck_rate = clk_get_rate(clk_get_parent(dss.dpll4_m4_ck)); - dpll4_m4_ck_rate = clk_get_rate(dss.dpll4_m4_ck); - - seq_printf(s, "dpll4_ck %lu\n", dpll4_ck_rate); - - if (cpu_is_omap3630() || cpu_is_omap44xx()) - seq_printf(s, "%s (%s) = %lu / %lu = %lu\n", - fclk_name, fclk_real_name, - dpll4_ck_rate, - dpll4_ck_rate / dpll4_m4_ck_rate, - fclk_rate); - else - seq_printf(s, "%s (%s) = %lu / %lu * 2 = %lu\n", - fclk_name, fclk_real_name, - dpll4_ck_rate, - dpll4_ck_rate / dpll4_m4_ck_rate, - fclk_rate); - } else { - seq_printf(s, "%s (%s) = %lu\n", - fclk_name, fclk_real_name, - fclk_rate); - } - - dss_runtime_put(); -} - -void dss_dump_regs(struct seq_file *s) -{ -#define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, dss_read_reg(r)) - - if (dss_runtime_get()) - return; - - DUMPREG(DSS_REVISION); - DUMPREG(DSS_SYSCONFIG); - DUMPREG(DSS_SYSSTATUS); - DUMPREG(DSS_CONTROL); - - if (dss_feat_get_supported_displays(OMAP_DSS_CHANNEL_LCD) & - OMAP_DISPLAY_TYPE_SDI) { - DUMPREG(DSS_SDI_CONTROL); - DUMPREG(DSS_PLL_CONTROL); - DUMPREG(DSS_SDI_STATUS); - } - - dss_runtime_put(); -#undef DUMPREG -} - -void dss_select_dispc_clk_source(enum omap_dss_clk_source clk_src) -{ - struct platform_device *dsidev; - int b; - u8 start, end; - - switch (clk_src) { - case OMAP_DSS_CLK_SRC_FCK: - b = 0; - break; - case OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC: - b = 1; - dsidev = dsi_get_dsidev_from_id(0); - dsi_wait_pll_hsdiv_dispc_active(dsidev); - break; - case OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC: - b = 2; - dsidev = dsi_get_dsidev_from_id(1); - dsi_wait_pll_hsdiv_dispc_active(dsidev); - break; - default: - BUG(); - } - - dss_feat_get_reg_field(FEAT_REG_DISPC_CLK_SWITCH, &start, &end); - - REG_FLD_MOD(DSS_CONTROL, b, start, end); /* DISPC_CLK_SWITCH */ - - dss.dispc_clk_source = clk_src; -} - -void dss_select_dsi_clk_source(int dsi_module, - enum omap_dss_clk_source clk_src) -{ - struct platform_device *dsidev; - int b; - - switch (clk_src) { - case OMAP_DSS_CLK_SRC_FCK: - b = 0; - break; - case OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI: - BUG_ON(dsi_module != 0); - b = 1; - dsidev = dsi_get_dsidev_from_id(0); - dsi_wait_pll_hsdiv_dsi_active(dsidev); - break; - case OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI: - BUG_ON(dsi_module != 1); - b = 1; - dsidev = dsi_get_dsidev_from_id(1); - dsi_wait_pll_hsdiv_dsi_active(dsidev); - break; - default: - BUG(); - } - - REG_FLD_MOD(DSS_CONTROL, b, 1, 1); /* DSI_CLK_SWITCH */ - - dss.dsi_clk_source[dsi_module] = clk_src; -} - -void dss_select_lcd_clk_source(enum omap_channel channel, - enum omap_dss_clk_source clk_src) -{ - struct platform_device *dsidev; - int b, ix, pos; - - if (!dss_has_feature(FEAT_LCD_CLK_SRC)) - return; - - switch (clk_src) { - case OMAP_DSS_CLK_SRC_FCK: - b = 0; - break; - case OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC: - BUG_ON(channel != OMAP_DSS_CHANNEL_LCD); - b = 1; - dsidev = dsi_get_dsidev_from_id(0); - dsi_wait_pll_hsdiv_dispc_active(dsidev); - break; - case OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC: - BUG_ON(channel != OMAP_DSS_CHANNEL_LCD2); - b = 1; - dsidev = dsi_get_dsidev_from_id(1); - dsi_wait_pll_hsdiv_dispc_active(dsidev); - break; - default: - BUG(); - } - - pos = channel == OMAP_DSS_CHANNEL_LCD ? 0 : 12; - REG_FLD_MOD(DSS_CONTROL, b, pos, pos); /* LCDx_CLK_SWITCH */ - - ix = channel == OMAP_DSS_CHANNEL_LCD ? 0 : 1; - dss.lcd_clk_source[ix] = clk_src; -} - -enum omap_dss_clk_source dss_get_dispc_clk_source(void) -{ - return dss.dispc_clk_source; -} - -enum omap_dss_clk_source dss_get_dsi_clk_source(int dsi_module) -{ - return dss.dsi_clk_source[dsi_module]; -} - -enum omap_dss_clk_source dss_get_lcd_clk_source(enum omap_channel channel) -{ - if (dss_has_feature(FEAT_LCD_CLK_SRC)) { - int ix = channel == OMAP_DSS_CHANNEL_LCD ? 0 : 1; - return dss.lcd_clk_source[ix]; - } else { - /* LCD_CLK source is the same as DISPC_FCLK source for - * OMAP2 and OMAP3 */ - return dss.dispc_clk_source; - } -} - -/* calculate clock rates using dividers in cinfo */ -int dss_calc_clock_rates(struct dss_clock_info *cinfo) -{ - if (dss.dpll4_m4_ck) { - unsigned long prate; - u16 fck_div_max = 16; - - if (cpu_is_omap3630() || cpu_is_omap44xx()) - fck_div_max = 32; - - if (cinfo->fck_div > fck_div_max || cinfo->fck_div == 0) - return -EINVAL; - - prate = clk_get_rate(clk_get_parent(dss.dpll4_m4_ck)); - - cinfo->fck = prate / cinfo->fck_div; - } else { - if (cinfo->fck_div != 0) - return -EINVAL; - cinfo->fck = clk_get_rate(dss.dss_clk); - } - - return 0; -} - -int dss_set_clock_div(struct dss_clock_info *cinfo) -{ - if (dss.dpll4_m4_ck) { - unsigned long prate; - int r; - - prate = clk_get_rate(clk_get_parent(dss.dpll4_m4_ck)); - DSSDBG("dpll4_m4 = %ld\n", prate); - - r = clk_set_rate(dss.dpll4_m4_ck, prate / cinfo->fck_div); - if (r) - return r; - } else { - if (cinfo->fck_div != 0) - return -EINVAL; - } - - DSSDBG("fck = %ld (%d)\n", cinfo->fck, cinfo->fck_div); - - return 0; -} - -int dss_get_clock_div(struct dss_clock_info *cinfo) -{ - cinfo->fck = clk_get_rate(dss.dss_clk); - - if (dss.dpll4_m4_ck) { - unsigned long prate; - - prate = clk_get_rate(clk_get_parent(dss.dpll4_m4_ck)); - - if (cpu_is_omap3630() || cpu_is_omap44xx()) - cinfo->fck_div = prate / (cinfo->fck); - else - cinfo->fck_div = prate / (cinfo->fck / 2); - } else { - cinfo->fck_div = 0; - } - - return 0; -} - -unsigned long dss_get_dpll4_rate(void) -{ - if (dss.dpll4_m4_ck) - return clk_get_rate(clk_get_parent(dss.dpll4_m4_ck)); - else - return 0; -} - -int dss_calc_clock_div(bool is_tft, unsigned long req_pck, - struct dss_clock_info *dss_cinfo, - struct dispc_clock_info *dispc_cinfo) -{ - unsigned long prate; - struct dss_clock_info best_dss; - struct dispc_clock_info best_dispc; - - unsigned long fck, max_dss_fck; - - u16 fck_div, fck_div_max = 16; - - int match = 0; - int min_fck_per_pck; - - prate = dss_get_dpll4_rate(); - - max_dss_fck = dss_feat_get_param_max(FEAT_PARAM_DSS_FCK); - - fck = clk_get_rate(dss.dss_clk); - if (req_pck == dss.cache_req_pck && - ((cpu_is_omap34xx() && prate == dss.cache_prate) || - dss.cache_dss_cinfo.fck == fck)) { - DSSDBG("dispc clock info found from cache.\n"); - *dss_cinfo = dss.cache_dss_cinfo; - *dispc_cinfo = dss.cache_dispc_cinfo; - return 0; - } - - min_fck_per_pck = CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK; - - if (min_fck_per_pck && - req_pck * min_fck_per_pck > max_dss_fck) { - DSSERR("Requested pixel clock not possible with the current " - "OMAP2_DSS_MIN_FCK_PER_PCK setting. Turning " - "the constraint off.\n"); - min_fck_per_pck = 0; - } - -retry: - memset(&best_dss, 0, sizeof(best_dss)); - memset(&best_dispc, 0, sizeof(best_dispc)); - - if (dss.dpll4_m4_ck == NULL) { - struct dispc_clock_info cur_dispc; - /* XXX can we change the clock on omap2? */ - fck = clk_get_rate(dss.dss_clk); - fck_div = 1; - - dispc_find_clk_divs(is_tft, req_pck, fck, &cur_dispc); - match = 1; - - best_dss.fck = fck; - best_dss.fck_div = fck_div; - - best_dispc = cur_dispc; - - goto found; - } else { - if (cpu_is_omap3630() || cpu_is_omap44xx()) - fck_div_max = 32; - - for (fck_div = fck_div_max; fck_div > 0; --fck_div) { - struct dispc_clock_info cur_dispc; - - if (fck_div_max == 32) - fck = prate / fck_div; - else - fck = prate / fck_div * 2; - - if (fck > max_dss_fck) - continue; - - if (min_fck_per_pck && - fck < req_pck * min_fck_per_pck) - continue; - - match = 1; - - dispc_find_clk_divs(is_tft, req_pck, fck, &cur_dispc); - - if (abs(cur_dispc.pck - req_pck) < - abs(best_dispc.pck - req_pck)) { - - best_dss.fck = fck; - best_dss.fck_div = fck_div; - - best_dispc = cur_dispc; - - if (cur_dispc.pck == req_pck) - goto found; - } - } - } - -found: - if (!match) { - if (min_fck_per_pck) { - DSSERR("Could not find suitable clock settings.\n" - "Turning FCK/PCK constraint off and" - "trying again.\n"); - min_fck_per_pck = 0; - goto retry; - } - - DSSERR("Could not find suitable clock settings.\n"); - - return -EINVAL; - } - - if (dss_cinfo) - *dss_cinfo = best_dss; - if (dispc_cinfo) - *dispc_cinfo = best_dispc; - - dss.cache_req_pck = req_pck; - dss.cache_prate = prate; - dss.cache_dss_cinfo = best_dss; - dss.cache_dispc_cinfo = best_dispc; - - return 0; -} - -void dss_set_venc_output(enum omap_dss_venc_type type) -{ - int l = 0; - - if (type == OMAP_DSS_VENC_TYPE_COMPOSITE) - l = 0; - else if (type == OMAP_DSS_VENC_TYPE_SVIDEO) - l = 1; - else - BUG(); - - /* venc out selection. 0 = comp, 1 = svideo */ - REG_FLD_MOD(DSS_CONTROL, l, 6, 6); -} - -void dss_set_dac_pwrdn_bgz(bool enable) -{ - REG_FLD_MOD(DSS_CONTROL, enable, 5, 5); /* DAC Power-Down Control */ -} - -void dss_select_hdmi_venc_clk_source(enum dss_hdmi_venc_clk_source_select hdmi) -{ - REG_FLD_MOD(DSS_CONTROL, hdmi, 15, 15); /* VENC_HDMI_SWITCH */ -} - -enum dss_hdmi_venc_clk_source_select dss_get_hdmi_venc_clk_source(void) -{ - enum omap_display_type displays; - - displays = dss_feat_get_supported_displays(OMAP_DSS_CHANNEL_DIGIT); - if ((displays & OMAP_DISPLAY_TYPE_HDMI) == 0) - return DSS_VENC_TV_CLK; - - return REG_GET(DSS_CONTROL, 15, 15); -} - -static int dss_get_clocks(void) -{ - struct clk *clk; - int r; - - clk = clk_get(&dss.pdev->dev, "fck"); - if (IS_ERR(clk)) { - DSSERR("can't get clock fck\n"); - r = PTR_ERR(clk); - goto err; - } - - dss.dss_clk = clk; - - if (cpu_is_omap34xx()) { - clk = clk_get(NULL, "dpll4_m4_ck"); - if (IS_ERR(clk)) { - DSSERR("Failed to get dpll4_m4_ck\n"); - r = PTR_ERR(clk); - goto err; - } - } else if (cpu_is_omap44xx()) { - clk = clk_get(NULL, "dpll_per_m5x2_ck"); - if (IS_ERR(clk)) { - DSSERR("Failed to get dpll_per_m5x2_ck\n"); - r = PTR_ERR(clk); - goto err; - } - } else { /* omap24xx */ - clk = NULL; - } - - dss.dpll4_m4_ck = clk; - - return 0; - -err: - if (dss.dss_clk) - clk_put(dss.dss_clk); - if (dss.dpll4_m4_ck) - clk_put(dss.dpll4_m4_ck); - - return r; -} - -static void dss_put_clocks(void) -{ - if (dss.dpll4_m4_ck) - clk_put(dss.dpll4_m4_ck); - clk_put(dss.dss_clk); -} - -int dss_runtime_get(void) -{ - int r; - - DSSDBG("dss_runtime_get\n"); - - r = pm_runtime_get_sync(&dss.pdev->dev); - WARN_ON(r < 0); - return r < 0 ? r : 0; -} - -void dss_runtime_put(void) -{ - int r; - - DSSDBG("dss_runtime_put\n"); - - r = pm_runtime_put_sync(&dss.pdev->dev); - WARN_ON(r < 0); -} - -/* DEBUGFS */ -#if defined(CONFIG_DEBUG_FS) && defined(CONFIG_OMAP2_DSS_DEBUG_SUPPORT) -void dss_debug_dump_clocks(struct seq_file *s) -{ - dss_dump_clocks(s); - dispc_dump_clocks(s); -#ifdef CONFIG_OMAP2_DSS_DSI - dsi_dump_clocks(s); -#endif -} -#endif - -/* DSS HW IP initialisation */ -static int omap_dsshw_probe(struct platform_device *pdev) -{ - struct resource *dss_mem; - u32 rev; - int r; - - dss.pdev = pdev; - - dss_mem = platform_get_resource(dss.pdev, IORESOURCE_MEM, 0); - if (!dss_mem) { - DSSERR("can't get IORESOURCE_MEM DSS\n"); - r = -EINVAL; - goto err_ioremap; - } - dss.base = ioremap(dss_mem->start, resource_size(dss_mem)); - if (!dss.base) { - DSSERR("can't ioremap DSS\n"); - r = -ENOMEM; - goto err_ioremap; - } - - r = dss_get_clocks(); - if (r) - goto err_clocks; - - pm_runtime_enable(&pdev->dev); - - r = dss_runtime_get(); - if (r) - goto err_runtime_get; - - /* Select DPLL */ - REG_FLD_MOD(DSS_CONTROL, 0, 0, 0); - -#ifdef CONFIG_OMAP2_DSS_VENC - REG_FLD_MOD(DSS_CONTROL, 1, 4, 4); /* venc dac demen */ - REG_FLD_MOD(DSS_CONTROL, 1, 3, 3); /* venc clock 4x enable */ - REG_FLD_MOD(DSS_CONTROL, 0, 2, 2); /* venc clock mode = normal */ -#endif - dss.dsi_clk_source[0] = OMAP_DSS_CLK_SRC_FCK; - dss.dsi_clk_source[1] = OMAP_DSS_CLK_SRC_FCK; - dss.dispc_clk_source = OMAP_DSS_CLK_SRC_FCK; - dss.lcd_clk_source[0] = OMAP_DSS_CLK_SRC_FCK; - dss.lcd_clk_source[1] = OMAP_DSS_CLK_SRC_FCK; - - r = dpi_init(); - if (r) { - DSSERR("Failed to initialize DPI\n"); - goto err_dpi; - } - - r = sdi_init(); - if (r) { - DSSERR("Failed to initialize SDI\n"); - goto err_sdi; - } - - rev = dss_read_reg(DSS_REVISION); - printk(KERN_INFO "OMAP DSS rev %d.%d\n", - FLD_GET(rev, 7, 4), FLD_GET(rev, 3, 0)); - - dss_runtime_put(); - - return 0; -err_sdi: - dpi_exit(); -err_dpi: - dss_runtime_put(); -err_runtime_get: - pm_runtime_disable(&pdev->dev); - dss_put_clocks(); -err_clocks: - iounmap(dss.base); -err_ioremap: - return r; -} - -static int omap_dsshw_remove(struct platform_device *pdev) -{ - dpi_exit(); - sdi_exit(); - - iounmap(dss.base); - - pm_runtime_disable(&pdev->dev); - - dss_put_clocks(); - - return 0; -} - -static int dss_runtime_suspend(struct device *dev) -{ - dss_save_context(); - return 0; -} - -static int dss_runtime_resume(struct device *dev) -{ - dss_restore_context(); - return 0; -} - -static const struct dev_pm_ops dss_pm_ops = { - .runtime_suspend = dss_runtime_suspend, - .runtime_resume = dss_runtime_resume, -}; - -static struct platform_driver omap_dsshw_driver = { - .probe = omap_dsshw_probe, - .remove = omap_dsshw_remove, - .driver = { - .name = "omapdss_dss", - .owner = THIS_MODULE, - .pm = &dss_pm_ops, - }, -}; - -int dss_init_platform_driver(void) -{ - return platform_driver_register(&omap_dsshw_driver); -} - -void dss_uninit_platform_driver(void) -{ - return platform_driver_unregister(&omap_dsshw_driver); -} diff --git a/drivers/video/omap2/dss/dss.h b/drivers/video/omap2/dss/dss.h deleted file mode 100644 index 32ff69fb333..00000000000 --- a/drivers/video/omap2/dss/dss.h +++ /dev/null @@ -1,552 +0,0 @@ -/* - * linux/drivers/video/omap2/dss/dss.h - * - * Copyright (C) 2009 Nokia Corporation - * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com> - * - * Some code and ideas taken from drivers/video/omap/ driver - * by Imre Deak. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program. If not, see <http://www.gnu.org/licenses/>. - */ - -#ifndef __OMAP2_DSS_H -#define __OMAP2_DSS_H - -#ifdef CONFIG_OMAP2_DSS_DEBUG_SUPPORT -#define DEBUG -#endif - -#ifdef DEBUG -extern bool dss_debug; -#ifdef DSS_SUBSYS_NAME -#define DSSDBG(format, ...) \ - if (dss_debug) \ - printk(KERN_DEBUG "omapdss " DSS_SUBSYS_NAME ": " format, \ - ## __VA_ARGS__) -#else -#define DSSDBG(format, ...) \ - if (dss_debug) \ - printk(KERN_DEBUG "omapdss: " format, ## __VA_ARGS__) -#endif - -#ifdef DSS_SUBSYS_NAME -#define DSSDBGF(format, ...) \ - if (dss_debug) \ - printk(KERN_DEBUG "omapdss " DSS_SUBSYS_NAME \ - ": %s(" format ")\n", \ - __func__, \ - ## __VA_ARGS__) -#else -#define DSSDBGF(format, ...) \ - if (dss_debug) \ - printk(KERN_DEBUG "omapdss: " \ - ": %s(" format ")\n", \ - __func__, \ - ## __VA_ARGS__) -#endif - -#else /* DEBUG */ -#define DSSDBG(format, ...) -#define DSSDBGF(format, ...) -#endif - - -#ifdef DSS_SUBSYS_NAME -#define DSSERR(format, ...) \ - printk(KERN_ERR "omapdss " DSS_SUBSYS_NAME " error: " format, \ - ## __VA_ARGS__) -#else -#define DSSERR(format, ...) \ - printk(KERN_ERR "omapdss error: " format, ## __VA_ARGS__) -#endif - -#ifdef DSS_SUBSYS_NAME -#define DSSINFO(format, ...) \ - printk(KERN_INFO "omapdss " DSS_SUBSYS_NAME ": " format, \ - ## __VA_ARGS__) -#else -#define DSSINFO(format, ...) \ - printk(KERN_INFO "omapdss: " format, ## __VA_ARGS__) -#endif - -#ifdef DSS_SUBSYS_NAME -#define DSSWARN(format, ...) \ - printk(KERN_WARNING "omapdss " DSS_SUBSYS_NAME ": " format, \ - ## __VA_ARGS__) -#else -#define DSSWARN(format, ...) \ - printk(KERN_WARNING "omapdss: " format, ## __VA_ARGS__) -#endif - -/* OMAP TRM gives bitfields as start:end, where start is the higher bit - number. For example 7:0 */ -#define FLD_MASK(start, end) (((1 << ((start) - (end) + 1)) - 1) << (end)) -#define FLD_VAL(val, start, end) (((val) << (end)) & FLD_MASK(start, end)) -#define FLD_GET(val, start, end) (((val) & FLD_MASK(start, end)) >> (end)) -#define FLD_MOD(orig, val, start, end) \ - (((orig) & ~FLD_MASK(start, end)) | FLD_VAL(val, start, end)) - -enum dss_io_pad_mode { - DSS_IO_PAD_MODE_RESET, - DSS_IO_PAD_MODE_RFBI, - DSS_IO_PAD_MODE_BYPASS, -}; - -enum dss_hdmi_venc_clk_source_select { - DSS_VENC_TV_CLK = 0, - DSS_HDMI_M_PCLK = 1, -}; - -enum dss_dsi_content_type { - DSS_DSI_CONTENT_DCS, - DSS_DSI_CONTENT_GENERIC, -}; - -struct dss_clock_info { - /* rates that we get with dividers below */ - unsigned long fck; - - /* dividers */ - u16 fck_div; -}; - -struct dispc_clock_info { - /* rates that we get with dividers below */ - unsigned long lck; - unsigned long pck; - - /* dividers */ - u16 lck_div; - u16 pck_div; -}; - -struct dsi_clock_info { - /* rates that we get with dividers below */ - unsigned long fint; - unsigned long clkin4ddr; - unsigned long clkin; - unsigned long dsi_pll_hsdiv_dispc_clk; /* OMAP3: DSI1_PLL_CLK - * OMAP4: PLLx_CLK1 */ - unsigned long dsi_pll_hsdiv_dsi_clk; /* OMAP3: DSI2_PLL_CLK - * OMAP4: PLLx_CLK2 */ - unsigned long lp_clk; - - /* dividers */ - u16 regn; - u16 regm; - u16 regm_dispc; /* OMAP3: REGM3 - * OMAP4: REGM4 */ - u16 regm_dsi; /* OMAP3: REGM4 - * OMAP4: REGM5 */ - u16 lp_clk_div; - - u8 highfreq; - bool use_sys_clk; -}; - -struct seq_file; -struct platform_device; - -/* core */ -struct bus_type *dss_get_bus(void); -struct regulator *dss_get_vdds_dsi(void); -struct regulator *dss_get_vdds_sdi(void); - -/* apply */ -void dss_apply_init(void); -int dss_mgr_wait_for_go(struct omap_overlay_manager *mgr); -int dss_mgr_wait_for_go_ovl(struct omap_overlay *ovl); -void dss_mgr_start_update(struct omap_overlay_manager *mgr); -int omap_dss_mgr_apply(struct omap_overlay_manager *mgr); - -int dss_mgr_enable(struct omap_overlay_manager *mgr); -void dss_mgr_disable(struct omap_overlay_manager *mgr); -int dss_mgr_set_info(struct omap_overlay_manager *mgr, - struct omap_overlay_manager_info *info); -void dss_mgr_get_info(struct omap_overlay_manager *mgr, - struct omap_overlay_manager_info *info); -int dss_mgr_set_device(struct omap_overlay_manager *mgr, - struct omap_dss_device *dssdev); -int dss_mgr_unset_device(struct omap_overlay_manager *mgr); - -bool dss_ovl_is_enabled(struct omap_overlay *ovl); -int dss_ovl_enable(struct omap_overlay *ovl); -int dss_ovl_disable(struct omap_overlay *ovl); -int dss_ovl_set_info(struct omap_overlay *ovl, - struct omap_overlay_info *info); -void dss_ovl_get_info(struct omap_overlay *ovl, - struct omap_overlay_info *info); -int dss_ovl_set_manager(struct omap_overlay *ovl, - struct omap_overlay_manager *mgr); -int dss_ovl_unset_manager(struct omap_overlay *ovl); - -/* display */ -int dss_suspend_all_devices(void); -int dss_resume_all_devices(void); -void dss_disable_all_devices(void); - -void dss_init_device(struct platform_device *pdev, - struct omap_dss_device *dssdev); -void dss_uninit_device(struct platform_device *pdev, - struct omap_dss_device *dssdev); -bool dss_use_replication(struct omap_dss_device *dssdev, - enum omap_color_mode mode); -void default_get_overlay_fifo_thresholds(enum omap_plane plane, - u32 fifo_size, u32 burst_size, - u32 *fifo_low, u32 *fifo_high); - -/* manager */ -int dss_init_overlay_managers(struct platform_device *pdev); -void dss_uninit_overlay_managers(struct platform_device *pdev); -int dss_mgr_simple_check(struct omap_overlay_manager *mgr, - const struct omap_overlay_manager_info *info); -int dss_mgr_check(struct omap_overlay_manager *mgr, - struct omap_dss_device *dssdev, - struct omap_overlay_manager_info *info, - struct omap_overlay_info **overlay_infos); - -/* overlay */ -void dss_init_overlays(struct platform_device *pdev); -void dss_uninit_overlays(struct platform_device *pdev); -void dss_overlay_setup_dispc_manager(struct omap_overlay_manager *mgr); -void dss_recheck_connections(struct omap_dss_device *dssdev, bool force); -int dss_ovl_simple_check(struct omap_overlay *ovl, - const struct omap_overlay_info *info); -int dss_ovl_check(struct omap_overlay *ovl, - struct omap_overlay_info *info, struct omap_dss_device *dssdev); - -/* DSS */ -int dss_init_platform_driver(void); -void dss_uninit_platform_driver(void); - -int dss_runtime_get(void); -void dss_runtime_put(void); - -void dss_select_hdmi_venc_clk_source(enum dss_hdmi_venc_clk_source_select); -enum dss_hdmi_venc_clk_source_select dss_get_hdmi_venc_clk_source(void); -const char *dss_get_generic_clk_source_name(enum omap_dss_clk_source clk_src); -void dss_dump_clocks(struct seq_file *s); - -void dss_dump_regs(struct seq_file *s); -#if defined(CONFIG_DEBUG_FS) && defined(CONFIG_OMAP2_DSS_DEBUG_SUPPORT) -void dss_debug_dump_clocks(struct seq_file *s); -#endif - -void dss_sdi_init(u8 datapairs); -int dss_sdi_enable(void); -void dss_sdi_disable(void); - -void dss_select_dispc_clk_source(enum omap_dss_clk_source clk_src); -void dss_select_dsi_clk_source(int dsi_module, - enum omap_dss_clk_source clk_src); -void dss_select_lcd_clk_source(enum omap_channel channel, - enum omap_dss_clk_source clk_src); -enum omap_dss_clk_source dss_get_dispc_clk_source(void); -enum omap_dss_clk_source dss_get_dsi_clk_source(int dsi_module); -enum omap_dss_clk_source dss_get_lcd_clk_source(enum omap_channel channel); - -void dss_set_venc_output(enum omap_dss_venc_type type); -void dss_set_dac_pwrdn_bgz(bool enable); - -unsigned long dss_get_dpll4_rate(void); -int dss_calc_clock_rates(struct dss_clock_info *cinfo); -int dss_set_clock_div(struct dss_clock_info *cinfo); -int dss_get_clock_div(struct dss_clock_info *cinfo); -int dss_calc_clock_div(bool is_tft, unsigned long req_pck, - struct dss_clock_info *dss_cinfo, - struct dispc_clock_info *dispc_cinfo); - -/* SDI */ -#ifdef CONFIG_OMAP2_DSS_SDI -int sdi_init(void); -void sdi_exit(void); -int sdi_init_display(struct omap_dss_device *display); -#else -static inline int sdi_init(void) -{ - return 0; -} -static inline void sdi_exit(void) -{ -} -#endif - -/* DSI */ -#ifdef CONFIG_OMAP2_DSS_DSI - -struct dentry; -struct file_operations; - -int dsi_init_platform_driver(void); -void dsi_uninit_platform_driver(void); - -int dsi_runtime_get(struct platform_device *dsidev); -void dsi_runtime_put(struct platform_device *dsidev); - -void dsi_dump_clocks(struct seq_file *s); -void dsi_create_debugfs_files_irq(struct dentry *debugfs_dir, - const struct file_operations *debug_fops); -void dsi_create_debugfs_files_reg(struct dentry *debugfs_dir, - const struct file_operations *debug_fops); - -int dsi_init_display(struct omap_dss_device *display); -void dsi_irq_handler(void); -u8 dsi_get_pixel_size(enum omap_dss_dsi_pixel_format fmt); - -unsigned long dsi_get_pll_hsdiv_dispc_rate(struct platform_device *dsidev); -int dsi_pll_set_clock_div(struct platform_device *dsidev, - struct dsi_clock_info *cinfo); -int dsi_pll_calc_clock_div_pck(struct platform_device *dsidev, bool is_tft, - unsigned long req_pck, struct dsi_clock_info *cinfo, - struct dispc_clock_info *dispc_cinfo); -int dsi_pll_init(struct platform_device *dsidev, bool enable_hsclk, - bool enable_hsdiv); -void dsi_pll_uninit(struct platform_device *dsidev, bool disconnect_lanes); -void dsi_get_overlay_fifo_thresholds(enum omap_plane plane, - u32 fifo_size, u32 burst_size, - u32 *fifo_low, u32 *fifo_high); -void dsi_wait_pll_hsdiv_dispc_active(struct platform_device *dsidev); -void dsi_wait_pll_hsdiv_dsi_active(struct platform_device *dsidev); -struct platform_device *dsi_get_dsidev_from_id(int module); -#else -static inline int dsi_init_platform_driver(void) -{ - return 0; -} -static inline void dsi_uninit_platform_driver(void) -{ -} -static inline int dsi_runtime_get(struct platform_device *dsidev) -{ - return 0; -} -static inline void dsi_runtime_put(struct platform_device *dsidev) -{ -} -static inline u8 dsi_get_pixel_size(enum omap_dss_dsi_pixel_format fmt) -{ - WARN("%s: DSI not compiled in, returning pixel_size as 0\n", __func__); - return 0; -} -static inline unsigned long dsi_get_pll_hsdiv_dispc_rate(struct platform_device *dsidev) -{ - WARN("%s: DSI not compiled in, returning rate as 0\n", __func__); - return 0; -} -static inline int dsi_pll_set_clock_div(struct platform_device *dsidev, - struct dsi_clock_info *cinfo) -{ - WARN("%s: DSI not compiled in\n", __func__); - return -ENODEV; -} -static inline int dsi_pll_calc_clock_div_pck(struct platform_device *dsidev, - bool is_tft, unsigned long req_pck, - struct dsi_clock_info *dsi_cinfo, - struct dispc_clock_info *dispc_cinfo) -{ - WARN("%s: DSI not compiled in\n", __func__); - return -ENODEV; -} -static inline int dsi_pll_init(struct platform_device *dsidev, - bool enable_hsclk, bool enable_hsdiv) -{ - WARN("%s: DSI not compiled in\n", __func__); - return -ENODEV; -} -static inline void dsi_pll_uninit(struct platform_device *dsidev, - bool disconnect_lanes) -{ -} -static inline void dsi_wait_pll_hsdiv_dispc_active(struct platform_device *dsidev) -{ -} -static inline void dsi_wait_pll_hsdiv_dsi_active(struct platform_device *dsidev) -{ -} -static inline struct platform_device *dsi_get_dsidev_from_id(int module) -{ - WARN("%s: DSI not compiled in, returning platform device as NULL\n", - __func__); - return NULL; -} -#endif - -/* DPI */ -#ifdef CONFIG_OMAP2_DSS_DPI -int dpi_init(void); -void dpi_exit(void); -int dpi_init_display(struct omap_dss_device *dssdev); -#else -static inline int dpi_init(void) -{ - return 0; -} -static inline void dpi_exit(void) -{ -} -#endif - -/* DISPC */ -int dispc_init_platform_driver(void); -void dispc_uninit_platform_driver(void); -void dispc_dump_clocks(struct seq_file *s); -void dispc_dump_irqs(struct seq_file *s); -void dispc_dump_regs(struct seq_file *s); -void dispc_irq_handler(void); -void dispc_fake_vsync_irq(void); - -int dispc_runtime_get(void); -void dispc_runtime_put(void); - -void dispc_enable_sidle(void); -void dispc_disable_sidle(void); - -void dispc_lcd_enable_signal_polarity(bool act_high); -void dispc_lcd_enable_signal(bool enable); -void dispc_pck_free_enable(bool enable); -void dispc_set_digit_size(u16 width, u16 height); -void dispc_enable_fifomerge(bool enable); -void dispc_enable_gamma_table(bool enable); -void dispc_set_loadmode(enum omap_dss_load_mode mode); - -bool dispc_lcd_timings_ok(struct omap_video_timings *timings); -unsigned long dispc_fclk_rate(void); -void dispc_find_clk_divs(bool is_tft, unsigned long req_pck, unsigned long fck, - struct dispc_clock_info *cinfo); -int dispc_calc_clock_rates(unsigned long dispc_fclk_rate, - struct dispc_clock_info *cinfo); - - -void dispc_ovl_set_fifo_threshold(enum omap_plane plane, u32 low, u32 high); -u32 dispc_ovl_get_fifo_size(enum omap_plane plane); -u32 dispc_ovl_get_burst_size(enum omap_plane plane); -int dispc_ovl_setup(enum omap_plane plane, struct omap_overlay_info *oi, - bool ilace, bool replication); -int dispc_ovl_enable(enum omap_plane plane, bool enable); -void dispc_ovl_set_channel_out(enum omap_plane plane, - enum omap_channel channel); - -void dispc_mgr_enable_fifohandcheck(enum omap_channel channel, bool enable); -void dispc_mgr_set_lcd_size(enum omap_channel channel, u16 width, u16 height); -u32 dispc_mgr_get_vsync_irq(enum omap_channel channel); -u32 dispc_mgr_get_framedone_irq(enum omap_channel channel); -bool dispc_mgr_go_busy(enum omap_channel channel); -void dispc_mgr_go(enum omap_channel channel); -bool dispc_mgr_is_enabled(enum omap_channel channel); -void dispc_mgr_enable(enum omap_channel channel, bool enable); -bool dispc_mgr_is_channel_enabled(enum omap_channel channel); -void dispc_mgr_set_io_pad_mode(enum dss_io_pad_mode mode); -void dispc_mgr_enable_stallmode(enum omap_channel channel, bool enable); -void dispc_mgr_set_tft_data_lines(enum omap_channel channel, u8 data_lines); -void dispc_mgr_set_lcd_display_type(enum omap_channel channel, - enum omap_lcd_display_type type); -void dispc_mgr_set_lcd_timings(enum omap_channel channel, - struct omap_video_timings *timings); -void dispc_mgr_set_pol_freq(enum omap_channel channel, - enum omap_panel_config config, u8 acbi, u8 acb); -unsigned long dispc_mgr_lclk_rate(enum omap_channel channel); -unsigned long dispc_mgr_pclk_rate(enum omap_channel channel); -int dispc_mgr_set_clock_div(enum omap_channel channel, - struct dispc_clock_info *cinfo); -int dispc_mgr_get_clock_div(enum omap_channel channel, - struct dispc_clock_info *cinfo); -void dispc_mgr_setup(enum omap_channel channel, - struct omap_overlay_manager_info *info); - -/* VENC */ -#ifdef CONFIG_OMAP2_DSS_VENC -int venc_init_platform_driver(void); -void venc_uninit_platform_driver(void); -void venc_dump_regs(struct seq_file *s); -int venc_init_display(struct omap_dss_device *display); -unsigned long venc_get_pixel_clock(void); -#else -static inline int venc_init_platform_driver(void) -{ - return 0; -} -static inline void venc_uninit_platform_driver(void) -{ -} -static inline unsigned long venc_get_pixel_clock(void) -{ - WARN("%s: VENC not compiled in, returning pclk as 0\n", __func__); - return 0; -} -#endif - -/* HDMI */ -#ifdef CONFIG_OMAP4_DSS_HDMI -int hdmi_init_platform_driver(void); -void hdmi_uninit_platform_driver(void); -int hdmi_init_display(struct omap_dss_device *dssdev); -unsigned long hdmi_get_pixel_clock(void); -void hdmi_dump_regs(struct seq_file *s); -#else -static inline int hdmi_init_display(struct omap_dss_device *dssdev) -{ - return 0; -} -static inline int hdmi_init_platform_driver(void) -{ - return 0; -} -static inline void hdmi_uninit_platform_driver(void) -{ -} -static inline unsigned long hdmi_get_pixel_clock(void) -{ - WARN("%s: HDMI not compiled in, returning pclk as 0\n", __func__); - return 0; -} -#endif -int omapdss_hdmi_display_enable(struct omap_dss_device *dssdev); -void omapdss_hdmi_display_disable(struct omap_dss_device *dssdev); -void omapdss_hdmi_display_set_timing(struct omap_dss_device *dssdev); -int omapdss_hdmi_display_check_timing(struct omap_dss_device *dssdev, - struct omap_video_timings *timings); -int omapdss_hdmi_read_edid(u8 *buf, int len); -bool omapdss_hdmi_detect(void); -int hdmi_panel_init(void); -void hdmi_panel_exit(void); - -/* RFBI */ -#ifdef CONFIG_OMAP2_DSS_RFBI -int rfbi_init_platform_driver(void); -void rfbi_uninit_platform_driver(void); -void rfbi_dump_regs(struct seq_file *s); -int rfbi_init_display(struct omap_dss_device *display); -#else -static inline int rfbi_init_platform_driver(void) -{ - return 0; -} -static inline void rfbi_uninit_platform_driver(void) -{ -} -#endif - - -#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS -static inline void dss_collect_irq_stats(u32 irqstatus, unsigned *irq_arr) -{ - int b; - for (b = 0; b < 32; ++b) { - if (irqstatus & (1 << b)) - irq_arr[b]++; - } -} -#endif - -#endif diff --git a/drivers/video/omap2/dss/dss_features.c b/drivers/video/omap2/dss/dss_features.c deleted file mode 100644 index afcb59301c3..00000000000 --- a/drivers/video/omap2/dss/dss_features.c +++ /dev/null @@ -1,576 +0,0 @@ -/* - * linux/drivers/video/omap2/dss/dss_features.c - * - * Copyright (C) 2010 Texas Instruments - * Author: Archit Taneja <archit@ti.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program. If not, see <http://www.gnu.org/licenses/>. - */ - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/err.h> -#include <linux/slab.h> - -#include <video/omapdss.h> -#include <plat/cpu.h> - -#include "dss.h" -#include "dss_features.h" - -/* Defines a generic omap register field */ -struct dss_reg_field { - u8 start, end; -}; - -struct dss_param_range { - int min, max; -}; - -struct omap_dss_features { - const struct dss_reg_field *reg_fields; - const int num_reg_fields; - - const u32 has_feature; - - const int num_mgrs; - const int num_ovls; - const enum omap_display_type *supported_displays; - const enum omap_color_mode *supported_color_modes; - const enum omap_overlay_caps *overlay_caps; - const char * const *clksrc_names; - const struct dss_param_range *dss_params; - - const u32 buffer_size_unit; - const u32 burst_size_unit; -}; - -/* This struct is assigned to one of the below during initialization */ -static const struct omap_dss_features *omap_current_dss_features; - -static const struct dss_reg_field omap2_dss_reg_fields[] = { - [FEAT_REG_FIRHINC] = { 11, 0 }, - [FEAT_REG_FIRVINC] = { 27, 16 }, - [FEAT_REG_FIFOLOWTHRESHOLD] = { 8, 0 }, - [FEAT_REG_FIFOHIGHTHRESHOLD] = { 24, 16 }, - [FEAT_REG_FIFOSIZE] = { 8, 0 }, - [FEAT_REG_HORIZONTALACCU] = { 9, 0 }, - [FEAT_REG_VERTICALACCU] = { 25, 16 }, - [FEAT_REG_DISPC_CLK_SWITCH] = { 0, 0 }, - [FEAT_REG_DSIPLL_REGN] = { 0, 0 }, - [FEAT_REG_DSIPLL_REGM] = { 0, 0 }, - [FEAT_REG_DSIPLL_REGM_DISPC] = { 0, 0 }, - [FEAT_REG_DSIPLL_REGM_DSI] = { 0, 0 }, -}; - -static const struct dss_reg_field omap3_dss_reg_fields[] = { - [FEAT_REG_FIRHINC] = { 12, 0 }, - [FEAT_REG_FIRVINC] = { 28, 16 }, - [FEAT_REG_FIFOLOWTHRESHOLD] = { 11, 0 }, - [FEAT_REG_FIFOHIGHTHRESHOLD] = { 27, 16 }, - [FEAT_REG_FIFOSIZE] = { 10, 0 }, - [FEAT_REG_HORIZONTALACCU] = { 9, 0 }, - [FEAT_REG_VERTICALACCU] = { 25, 16 }, - [FEAT_REG_DISPC_CLK_SWITCH] = { 0, 0 }, - [FEAT_REG_DSIPLL_REGN] = { 7, 1 }, - [FEAT_REG_DSIPLL_REGM] = { 18, 8 }, - [FEAT_REG_DSIPLL_REGM_DISPC] = { 22, 19 }, - [FEAT_REG_DSIPLL_REGM_DSI] = { 26, 23 }, -}; - -static const struct dss_reg_field omap4_dss_reg_fields[] = { - [FEAT_REG_FIRHINC] = { 12, 0 }, - [FEAT_REG_FIRVINC] = { 28, 16 }, - [FEAT_REG_FIFOLOWTHRESHOLD] = { 15, 0 }, - [FEAT_REG_FIFOHIGHTHRESHOLD] = { 31, 16 }, - [FEAT_REG_FIFOSIZE] = { 15, 0 }, - [FEAT_REG_HORIZONTALACCU] = { 10, 0 }, - [FEAT_REG_VERTICALACCU] = { 26, 16 }, - [FEAT_REG_DISPC_CLK_SWITCH] = { 9, 8 }, - [FEAT_REG_DSIPLL_REGN] = { 8, 1 }, - [FEAT_REG_DSIPLL_REGM] = { 20, 9 }, - [FEAT_REG_DSIPLL_REGM_DISPC] = { 25, 21 }, - [FEAT_REG_DSIPLL_REGM_DSI] = { 30, 26 }, -}; - -static const enum omap_display_type omap2_dss_supported_displays[] = { - /* OMAP_DSS_CHANNEL_LCD */ - OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI, - - /* OMAP_DSS_CHANNEL_DIGIT */ - OMAP_DISPLAY_TYPE_VENC, -}; - -static const enum omap_display_type omap3430_dss_supported_displays[] = { - /* OMAP_DSS_CHANNEL_LCD */ - OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI | - OMAP_DISPLAY_TYPE_SDI | OMAP_DISPLAY_TYPE_DSI, - - /* OMAP_DSS_CHANNEL_DIGIT */ - OMAP_DISPLAY_TYPE_VENC, -}; - -static const enum omap_display_type omap3630_dss_supported_displays[] = { - /* OMAP_DSS_CHANNEL_LCD */ - OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI | - OMAP_DISPLAY_TYPE_DSI, - - /* OMAP_DSS_CHANNEL_DIGIT */ - OMAP_DISPLAY_TYPE_VENC, -}; - -static const enum omap_display_type omap4_dss_supported_displays[] = { - /* OMAP_DSS_CHANNEL_LCD */ - OMAP_DISPLAY_TYPE_DBI | OMAP_DISPLAY_TYPE_DSI, - - /* OMAP_DSS_CHANNEL_DIGIT */ - OMAP_DISPLAY_TYPE_VENC | OMAP_DISPLAY_TYPE_HDMI, - - /* OMAP_DSS_CHANNEL_LCD2 */ - OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI | - OMAP_DISPLAY_TYPE_DSI, -}; - -static const enum omap_color_mode omap2_dss_supported_color_modes[] = { - /* OMAP_DSS_GFX */ - OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 | - OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 | - OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_RGB16 | - OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P, - - /* OMAP_DSS_VIDEO1 */ - OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U | - OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 | - OMAP_DSS_COLOR_UYVY, - - /* OMAP_DSS_VIDEO2 */ - OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U | - OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 | - OMAP_DSS_COLOR_UYVY, -}; - -static const enum omap_color_mode omap3_dss_supported_color_modes[] = { - /* OMAP_DSS_GFX */ - OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 | - OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 | - OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 | - OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U | - OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_ARGB32 | - OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32, - - /* OMAP_DSS_VIDEO1 */ - OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P | - OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_RGB16 | - OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_UYVY, - - /* OMAP_DSS_VIDEO2 */ - OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 | - OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U | - OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 | - OMAP_DSS_COLOR_UYVY | OMAP_DSS_COLOR_ARGB32 | - OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32, -}; - -static const enum omap_color_mode omap4_dss_supported_color_modes[] = { - /* OMAP_DSS_GFX */ - OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 | - OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 | - OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 | - OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U | - OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_ARGB32 | - OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32 | - OMAP_DSS_COLOR_ARGB16_1555, - - /* OMAP_DSS_VIDEO1 */ - OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U | - OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 | - OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 | - OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U | - OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY | - OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 | - OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 | - OMAP_DSS_COLOR_RGBX32, - - /* OMAP_DSS_VIDEO2 */ - OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U | - OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 | - OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 | - OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U | - OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY | - OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 | - OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 | - OMAP_DSS_COLOR_RGBX32, - - /* OMAP_DSS_VIDEO3 */ - OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U | - OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 | - OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 | - OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U | - OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY | - OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 | - OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 | - OMAP_DSS_COLOR_RGBX32, -}; - -static const enum omap_overlay_caps omap2_dss_overlay_caps[] = { - /* OMAP_DSS_GFX */ - 0, - - /* OMAP_DSS_VIDEO1 */ - OMAP_DSS_OVL_CAP_SCALE, - - /* OMAP_DSS_VIDEO2 */ - OMAP_DSS_OVL_CAP_SCALE, -}; - -static const enum omap_overlay_caps omap3430_dss_overlay_caps[] = { - /* OMAP_DSS_GFX */ - OMAP_DSS_OVL_CAP_GLOBAL_ALPHA, - - /* OMAP_DSS_VIDEO1 */ - OMAP_DSS_OVL_CAP_SCALE, - - /* OMAP_DSS_VIDEO2 */ - OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA, -}; - -static const enum omap_overlay_caps omap3630_dss_overlay_caps[] = { - /* OMAP_DSS_GFX */ - OMAP_DSS_OVL_CAP_GLOBAL_ALPHA | OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA, - - /* OMAP_DSS_VIDEO1 */ - OMAP_DSS_OVL_CAP_SCALE, - - /* OMAP_DSS_VIDEO2 */ - OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA | - OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA, -}; - -static const enum omap_overlay_caps omap4_dss_overlay_caps[] = { - /* OMAP_DSS_GFX */ - OMAP_DSS_OVL_CAP_GLOBAL_ALPHA | OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA | - OMAP_DSS_OVL_CAP_ZORDER, - - /* OMAP_DSS_VIDEO1 */ - OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA | - OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA | OMAP_DSS_OVL_CAP_ZORDER, - - /* OMAP_DSS_VIDEO2 */ - OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA | - OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA | OMAP_DSS_OVL_CAP_ZORDER, - - /* OMAP_DSS_VIDEO3 */ - OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA | - OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA | OMAP_DSS_OVL_CAP_ZORDER, -}; - -static const char * const omap2_dss_clk_source_names[] = { - [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC] = "N/A", - [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI] = "N/A", - [OMAP_DSS_CLK_SRC_FCK] = "DSS_FCLK1", -}; - -static const char * const omap3_dss_clk_source_names[] = { - [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC] = "DSI1_PLL_FCLK", - [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI] = "DSI2_PLL_FCLK", - [OMAP_DSS_CLK_SRC_FCK] = "DSS1_ALWON_FCLK", -}; - -static const char * const omap4_dss_clk_source_names[] = { - [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC] = "PLL1_CLK1", - [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI] = "PLL1_CLK2", - [OMAP_DSS_CLK_SRC_FCK] = "DSS_FCLK", - [OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC] = "PLL2_CLK1", - [OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI] = "PLL2_CLK2", -}; - -static const struct dss_param_range omap2_dss_param_range[] = { - [FEAT_PARAM_DSS_FCK] = { 0, 173000000 }, - [FEAT_PARAM_DSS_PCD] = { 2, 255 }, - [FEAT_PARAM_DSIPLL_REGN] = { 0, 0 }, - [FEAT_PARAM_DSIPLL_REGM] = { 0, 0 }, - [FEAT_PARAM_DSIPLL_REGM_DISPC] = { 0, 0 }, - [FEAT_PARAM_DSIPLL_REGM_DSI] = { 0, 0 }, - [FEAT_PARAM_DSIPLL_FINT] = { 0, 0 }, - [FEAT_PARAM_DSIPLL_LPDIV] = { 0, 0 }, - [FEAT_PARAM_DOWNSCALE] = { 1, 2 }, - /* - * Assuming the line width buffer to be 768 pixels as OMAP2 DISPC - * scaler cannot scale a image with width more than 768. - */ - [FEAT_PARAM_LINEWIDTH] = { 1, 768 }, -}; - -static const struct dss_param_range omap3_dss_param_range[] = { - [FEAT_PARAM_DSS_FCK] = { 0, 173000000 }, - [FEAT_PARAM_DSS_PCD] = { 1, 255 }, - [FEAT_PARAM_DSIPLL_REGN] = { 0, (1 << 7) - 1 }, - [FEAT_PARAM_DSIPLL_REGM] = { 0, (1 << 11) - 1 }, - [FEAT_PARAM_DSIPLL_REGM_DISPC] = { 0, (1 << 4) - 1 }, - [FEAT_PARAM_DSIPLL_REGM_DSI] = { 0, (1 << 4) - 1 }, - [FEAT_PARAM_DSIPLL_FINT] = { 750000, 2100000 }, - [FEAT_PARAM_DSIPLL_LPDIV] = { 1, (1 << 13) - 1}, - [FEAT_PARAM_DOWNSCALE] = { 1, 4 }, - [FEAT_PARAM_LINEWIDTH] = { 1, 1024 }, -}; - -static const struct dss_param_range omap4_dss_param_range[] = { - [FEAT_PARAM_DSS_FCK] = { 0, 186000000 }, - [FEAT_PARAM_DSS_PCD] = { 1, 255 }, - [FEAT_PARAM_DSIPLL_REGN] = { 0, (1 << 8) - 1 }, - [FEAT_PARAM_DSIPLL_REGM] = { 0, (1 << 12) - 1 }, - [FEAT_PARAM_DSIPLL_REGM_DISPC] = { 0, (1 << 5) - 1 }, - [FEAT_PARAM_DSIPLL_REGM_DSI] = { 0, (1 << 5) - 1 }, - [FEAT_PARAM_DSIPLL_FINT] = { 500000, 2500000 }, - [FEAT_PARAM_DSIPLL_LPDIV] = { 0, (1 << 13) - 1 }, - [FEAT_PARAM_DOWNSCALE] = { 1, 4 }, - [FEAT_PARAM_LINEWIDTH] = { 1, 2048 }, -}; - -/* OMAP2 DSS Features */ -static const struct omap_dss_features omap2_dss_features = { - .reg_fields = omap2_dss_reg_fields, - .num_reg_fields = ARRAY_SIZE(omap2_dss_reg_fields), - - .has_feature = - FEAT_LCDENABLEPOL | FEAT_LCDENABLESIGNAL | - FEAT_PCKFREEENABLE | FEAT_FUNCGATED | - FEAT_ROWREPEATENABLE | FEAT_RESIZECONF, - - .num_mgrs = 2, - .num_ovls = 3, - .supported_displays = omap2_dss_supported_displays, - .supported_color_modes = omap2_dss_supported_color_modes, - .overlay_caps = omap2_dss_overlay_caps, - .clksrc_names = omap2_dss_clk_source_names, - .dss_params = omap2_dss_param_range, - .buffer_size_unit = 1, - .burst_size_unit = 8, -}; - -/* OMAP3 DSS Features */ -static const struct omap_dss_features omap3430_dss_features = { - .reg_fields = omap3_dss_reg_fields, - .num_reg_fields = ARRAY_SIZE(omap3_dss_reg_fields), - - .has_feature = - FEAT_LCDENABLEPOL | - FEAT_LCDENABLESIGNAL | FEAT_PCKFREEENABLE | - FEAT_FUNCGATED | FEAT_ROWREPEATENABLE | - FEAT_LINEBUFFERSPLIT | FEAT_RESIZECONF | - FEAT_DSI_PLL_FREQSEL | FEAT_DSI_REVERSE_TXCLKESC | - FEAT_VENC_REQUIRES_TV_DAC_CLK | FEAT_CPR | FEAT_PRELOAD | - FEAT_FIR_COEF_V | FEAT_ALPHA_FIXED_ZORDER, - - .num_mgrs = 2, - .num_ovls = 3, - .supported_displays = omap3430_dss_supported_displays, - .supported_color_modes = omap3_dss_supported_color_modes, - .overlay_caps = omap3430_dss_overlay_caps, - .clksrc_names = omap3_dss_clk_source_names, - .dss_params = omap3_dss_param_range, - .buffer_size_unit = 1, - .burst_size_unit = 8, -}; - -static const struct omap_dss_features omap3630_dss_features = { - .reg_fields = omap3_dss_reg_fields, - .num_reg_fields = ARRAY_SIZE(omap3_dss_reg_fields), - - .has_feature = - FEAT_LCDENABLEPOL | - FEAT_LCDENABLESIGNAL | FEAT_PCKFREEENABLE | - FEAT_FUNCGATED | - FEAT_ROWREPEATENABLE | FEAT_LINEBUFFERSPLIT | - FEAT_RESIZECONF | FEAT_DSI_PLL_PWR_BUG | - FEAT_DSI_PLL_FREQSEL | FEAT_CPR | FEAT_PRELOAD | - FEAT_FIR_COEF_V | FEAT_ALPHA_FIXED_ZORDER, - - .num_mgrs = 2, - .num_ovls = 3, - .supported_displays = omap3630_dss_supported_displays, - .supported_color_modes = omap3_dss_supported_color_modes, - .overlay_caps = omap3630_dss_overlay_caps, - .clksrc_names = omap3_dss_clk_source_names, - .dss_params = omap3_dss_param_range, - .buffer_size_unit = 1, - .burst_size_unit = 8, -}; - -/* OMAP4 DSS Features */ -/* For OMAP4430 ES 1.0 revision */ -static const struct omap_dss_features omap4430_es1_0_dss_features = { - .reg_fields = omap4_dss_reg_fields, - .num_reg_fields = ARRAY_SIZE(omap4_dss_reg_fields), - - .has_feature = - FEAT_MGR_LCD2 | - FEAT_CORE_CLK_DIV | FEAT_LCD_CLK_SRC | - FEAT_DSI_DCS_CMD_CONFIG_VC | FEAT_DSI_VC_OCP_WIDTH | - FEAT_DSI_GNQ | FEAT_HANDLE_UV_SEPARATE | FEAT_ATTR2 | - FEAT_CPR | FEAT_PRELOAD | FEAT_FIR_COEF_V | - FEAT_ALPHA_FREE_ZORDER, - - .num_mgrs = 3, - .num_ovls = 4, - .supported_displays = omap4_dss_supported_displays, - .supported_color_modes = omap4_dss_supported_color_modes, - .overlay_caps = omap4_dss_overlay_caps, - .clksrc_names = omap4_dss_clk_source_names, - .dss_params = omap4_dss_param_range, - .buffer_size_unit = 16, - .burst_size_unit = 16, -}; - -/* For all the other OMAP4 versions */ -static const struct omap_dss_features omap4_dss_features = { - .reg_fields = omap4_dss_reg_fields, - .num_reg_fields = ARRAY_SIZE(omap4_dss_reg_fields), - - .has_feature = - FEAT_MGR_LCD2 | - FEAT_CORE_CLK_DIV | FEAT_LCD_CLK_SRC | - FEAT_DSI_DCS_CMD_CONFIG_VC | FEAT_DSI_VC_OCP_WIDTH | - FEAT_DSI_GNQ | FEAT_HDMI_CTS_SWMODE | - FEAT_HANDLE_UV_SEPARATE | FEAT_ATTR2 | FEAT_CPR | - FEAT_PRELOAD | FEAT_FIR_COEF_V | FEAT_ALPHA_FREE_ZORDER, - - .num_mgrs = 3, - .num_ovls = 4, - .supported_displays = omap4_dss_supported_displays, - .supported_color_modes = omap4_dss_supported_color_modes, - .overlay_caps = omap4_dss_overlay_caps, - .clksrc_names = omap4_dss_clk_source_names, - .dss_params = omap4_dss_param_range, - .buffer_size_unit = 16, - .burst_size_unit = 16, -}; - -#if defined(CONFIG_OMAP4_DSS_HDMI) -/* HDMI OMAP4 Functions*/ -static const struct ti_hdmi_ip_ops omap4_hdmi_functions = { - - .video_configure = ti_hdmi_4xxx_basic_configure, - .phy_enable = ti_hdmi_4xxx_phy_enable, - .phy_disable = ti_hdmi_4xxx_phy_disable, - .read_edid = ti_hdmi_4xxx_read_edid, - .detect = ti_hdmi_4xxx_detect, - .pll_enable = ti_hdmi_4xxx_pll_enable, - .pll_disable = ti_hdmi_4xxx_pll_disable, - .video_enable = ti_hdmi_4xxx_wp_video_start, - .dump_wrapper = ti_hdmi_4xxx_wp_dump, - .dump_core = ti_hdmi_4xxx_core_dump, - .dump_pll = ti_hdmi_4xxx_pll_dump, - .dump_phy = ti_hdmi_4xxx_phy_dump, -#if defined(CONFIG_SND_OMAP_SOC_OMAP4_HDMI) || \ - defined(CONFIG_SND_OMAP_SOC_OMAP4_HDMI_MODULE) - .audio_enable = ti_hdmi_4xxx_wp_audio_enable, -#endif - -}; - -void dss_init_hdmi_ip_ops(struct hdmi_ip_data *ip_data) -{ - if (cpu_is_omap44xx()) - ip_data->ops = &omap4_hdmi_functions; -} -#endif - -/* Functions returning values related to a DSS feature */ -int dss_feat_get_num_mgrs(void) -{ - return omap_current_dss_features->num_mgrs; -} - -int dss_feat_get_num_ovls(void) -{ - return omap_current_dss_features->num_ovls; -} - -unsigned long dss_feat_get_param_min(enum dss_range_param param) -{ - return omap_current_dss_features->dss_params[param].min; -} - -unsigned long dss_feat_get_param_max(enum dss_range_param param) -{ - return omap_current_dss_features->dss_params[param].max; -} - -enum omap_display_type dss_feat_get_supported_displays(enum omap_channel channel) -{ - return omap_current_dss_features->supported_displays[channel]; -} - -enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane) -{ - return omap_current_dss_features->supported_color_modes[plane]; -} - -enum omap_overlay_caps dss_feat_get_overlay_caps(enum omap_plane plane) -{ - return omap_current_dss_features->overlay_caps[plane]; -} - -bool dss_feat_color_mode_supported(enum omap_plane plane, - enum omap_color_mode color_mode) -{ - return omap_current_dss_features->supported_color_modes[plane] & - color_mode; -} - -const char *dss_feat_get_clk_source_name(enum omap_dss_clk_source id) -{ - return omap_current_dss_features->clksrc_names[id]; -} - -u32 dss_feat_get_buffer_size_unit(void) -{ - return omap_current_dss_features->buffer_size_unit; -} - -u32 dss_feat_get_burst_size_unit(void) -{ - return omap_current_dss_features->burst_size_unit; -} - -/* DSS has_feature check */ -bool dss_has_feature(enum dss_feat_id id) -{ - return omap_current_dss_features->has_feature & id; -} - -void dss_feat_get_reg_field(enum dss_feat_reg_field id, u8 *start, u8 *end) -{ - if (id >= omap_current_dss_features->num_reg_fields) - BUG(); - - *start = omap_current_dss_features->reg_fields[id].start; - *end = omap_current_dss_features->reg_fields[id].end; -} - -void dss_features_init(void) -{ - if (cpu_is_omap24xx()) - omap_current_dss_features = &omap2_dss_features; - else if (cpu_is_omap3630()) - omap_current_dss_features = &omap3630_dss_features; - else if (cpu_is_omap34xx()) - omap_current_dss_features = &omap3430_dss_features; - else if (omap_rev() == OMAP4430_REV_ES1_0) - omap_current_dss_features = &omap4430_es1_0_dss_features; - else if (cpu_is_omap44xx()) - omap_current_dss_features = &omap4_dss_features; - else - DSSWARN("Unsupported OMAP version"); -} diff --git a/drivers/video/omap2/dss/dss_features.h b/drivers/video/omap2/dss/dss_features.h deleted file mode 100644 index cd833bbaac3..00000000000 --- a/drivers/video/omap2/dss/dss_features.h +++ /dev/null @@ -1,113 +0,0 @@ -/* - * linux/drivers/video/omap2/dss/dss_features.h - * - * Copyright (C) 2010 Texas Instruments - * Author: Archit Taneja <archit@ti.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program. If not, see <http://www.gnu.org/licenses/>. - */ - -#ifndef __OMAP2_DSS_FEATURES_H -#define __OMAP2_DSS_FEATURES_H - -#if defined(CONFIG_OMAP4_DSS_HDMI) -#include "ti_hdmi.h" -#endif - -#define MAX_DSS_MANAGERS 3 -#define MAX_DSS_OVERLAYS 4 -#define MAX_DSS_LCD_MANAGERS 2 -#define MAX_NUM_DSI 2 - -/* DSS has feature id */ -enum dss_feat_id { - FEAT_LCDENABLEPOL = 1 << 3, - FEAT_LCDENABLESIGNAL = 1 << 4, - FEAT_PCKFREEENABLE = 1 << 5, - FEAT_FUNCGATED = 1 << 6, - FEAT_MGR_LCD2 = 1 << 7, - FEAT_LINEBUFFERSPLIT = 1 << 8, - FEAT_ROWREPEATENABLE = 1 << 9, - FEAT_RESIZECONF = 1 << 10, - /* Independent core clk divider */ - FEAT_CORE_CLK_DIV = 1 << 11, - FEAT_LCD_CLK_SRC = 1 << 12, - /* DSI-PLL power command 0x3 is not working */ - FEAT_DSI_PLL_PWR_BUG = 1 << 13, - FEAT_DSI_PLL_FREQSEL = 1 << 14, - FEAT_DSI_DCS_CMD_CONFIG_VC = 1 << 15, - FEAT_DSI_VC_OCP_WIDTH = 1 << 16, - FEAT_DSI_REVERSE_TXCLKESC = 1 << 17, - FEAT_DSI_GNQ = 1 << 18, - FEAT_HDMI_CTS_SWMODE = 1 << 19, - FEAT_HANDLE_UV_SEPARATE = 1 << 20, - FEAT_ATTR2 = 1 << 21, - FEAT_VENC_REQUIRES_TV_DAC_CLK = 1 << 22, - FEAT_CPR = 1 << 23, - FEAT_PRELOAD = 1 << 24, - FEAT_FIR_COEF_V = 1 << 25, - FEAT_ALPHA_FIXED_ZORDER = 1 << 26, - FEAT_ALPHA_FREE_ZORDER = 1 << 27, -}; - -/* DSS register field id */ -enum dss_feat_reg_field { - FEAT_REG_FIRHINC, - FEAT_REG_FIRVINC, - FEAT_REG_FIFOHIGHTHRESHOLD, - FEAT_REG_FIFOLOWTHRESHOLD, - FEAT_REG_FIFOSIZE, - FEAT_REG_HORIZONTALACCU, - FEAT_REG_VERTICALACCU, - FEAT_REG_DISPC_CLK_SWITCH, - FEAT_REG_DSIPLL_REGN, - FEAT_REG_DSIPLL_REGM, - FEAT_REG_DSIPLL_REGM_DISPC, - FEAT_REG_DSIPLL_REGM_DSI, -}; - -enum dss_range_param { - FEAT_PARAM_DSS_FCK, - FEAT_PARAM_DSS_PCD, - FEAT_PARAM_DSIPLL_REGN, - FEAT_PARAM_DSIPLL_REGM, - FEAT_PARAM_DSIPLL_REGM_DISPC, - FEAT_PARAM_DSIPLL_REGM_DSI, - FEAT_PARAM_DSIPLL_FINT, - FEAT_PARAM_DSIPLL_LPDIV, - FEAT_PARAM_DOWNSCALE, - FEAT_PARAM_LINEWIDTH, -}; - -/* DSS Feature Functions */ -int dss_feat_get_num_mgrs(void); -int dss_feat_get_num_ovls(void); -unsigned long dss_feat_get_param_min(enum dss_range_param param); -unsigned long dss_feat_get_param_max(enum dss_range_param param); -enum omap_display_type dss_feat_get_supported_displays(enum omap_channel channel); -enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane); -enum omap_overlay_caps dss_feat_get_overlay_caps(enum omap_plane plane); -bool dss_feat_color_mode_supported(enum omap_plane plane, - enum omap_color_mode color_mode); -const char *dss_feat_get_clk_source_name(enum omap_dss_clk_source id); - -u32 dss_feat_get_buffer_size_unit(void); /* in bytes */ -u32 dss_feat_get_burst_size_unit(void); /* in bytes */ - -bool dss_has_feature(enum dss_feat_id id); -void dss_feat_get_reg_field(enum dss_feat_reg_field id, u8 *start, u8 *end); -void dss_features_init(void); -#if defined(CONFIG_OMAP4_DSS_HDMI) -void dss_init_hdmi_ip_ops(struct hdmi_ip_data *ip_data); -#endif -#endif diff --git a/drivers/video/omap2/dss/hdmi.c b/drivers/video/omap2/dss/hdmi.c deleted file mode 100644 index d7aa3b05652..00000000000 --- a/drivers/video/omap2/dss/hdmi.c +++ /dev/null @@ -1,925 +0,0 @@ -/* - * hdmi.c - * - * HDMI interface DSS driver setting for TI's OMAP4 family of processor. - * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com/ - * Authors: Yong Zhi - * Mythri pk <mythripk@ti.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program. If not, see <http://www.gnu.org/licenses/>. - */ - -#define DSS_SUBSYS_NAME "HDMI" - -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/err.h> -#include <linux/io.h> -#include <linux/interrupt.h> -#include <linux/mutex.h> -#include <linux/delay.h> -#include <linux/string.h> -#include <linux/platform_device.h> -#include <linux/pm_runtime.h> -#include <linux/clk.h> -#include <video/omapdss.h> -#if defined(CONFIG_SND_OMAP_SOC_OMAP4_HDMI) || \ - defined(CONFIG_SND_OMAP_SOC_OMAP4_HDMI_MODULE) -#include <sound/soc.h> -#include <sound/pcm_params.h> -#include "ti_hdmi_4xxx_ip.h" -#endif - -#include "ti_hdmi.h" -#include "dss.h" -#include "dss_features.h" - -#define HDMI_WP 0x0 -#define HDMI_CORE_SYS 0x400 -#define HDMI_CORE_AV 0x900 -#define HDMI_PLLCTRL 0x200 -#define HDMI_PHY 0x300 - -/* HDMI EDID Length move this */ -#define HDMI_EDID_MAX_LENGTH 256 -#define EDID_TIMING_DESCRIPTOR_SIZE 0x12 -#define EDID_DESCRIPTOR_BLOCK0_ADDRESS 0x36 -#define EDID_DESCRIPTOR_BLOCK1_ADDRESS 0x80 -#define EDID_SIZE_BLOCK0_TIMING_DESCRIPTOR 4 -#define EDID_SIZE_BLOCK1_TIMING_DESCRIPTOR 4 - -#define OMAP_HDMI_TIMINGS_NB 34 - -#define HDMI_DEFAULT_REGN 16 -#define HDMI_DEFAULT_REGM2 1 - -static struct { - struct mutex lock; - struct omap_display_platform_data *pdata; - struct platform_device *pdev; - struct hdmi_ip_data ip_data; - int code; - int mode; - - struct clk *sys_clk; -} hdmi; - -/* - * Logic for the below structure : - * user enters the CEA or VESA timings by specifying the HDMI/DVI code. - * There is a correspondence between CEA/VESA timing and code, please - * refer to section 6.3 in HDMI 1.3 specification for timing code. - * - * In the below structure, cea_vesa_timings corresponds to all OMAP4 - * supported CEA and VESA timing values.code_cea corresponds to the CEA - * code, It is used to get the timing from cea_vesa_timing array.Similarly - * with code_vesa. Code_index is used for back mapping, that is once EDID - * is read from the TV, EDID is parsed to find the timing values and then - * map it to corresponding CEA or VESA index. - */ - -static const struct hdmi_timings cea_vesa_timings[OMAP_HDMI_TIMINGS_NB] = { - { {640, 480, 25200, 96, 16, 48, 2, 10, 33} , 0 , 0}, - { {1280, 720, 74250, 40, 440, 220, 5, 5, 20}, 1, 1}, - { {1280, 720, 74250, 40, 110, 220, 5, 5, 20}, 1, 1}, - { {720, 480, 27027, 62, 16, 60, 6, 9, 30}, 0, 0}, - { {2880, 576, 108000, 256, 48, 272, 5, 5, 39}, 0, 0}, - { {1440, 240, 27027, 124, 38, 114, 3, 4, 15}, 0, 0}, - { {1440, 288, 27000, 126, 24, 138, 3, 2, 19}, 0, 0}, - { {1920, 540, 74250, 44, 528, 148, 5, 2, 15}, 1, 1}, - { {1920, 540, 74250, 44, 88, 148, 5, 2, 15}, 1, 1}, - { {1920, 1080, 148500, 44, 88, 148, 5, 4, 36}, 1, 1}, - { {720, 576, 27000, 64, 12, 68, 5, 5, 39}, 0, 0}, - { {1440, 576, 54000, 128, 24, 136, 5, 5, 39}, 0, 0}, - { {1920, 1080, 148500, 44, 528, 148, 5, 4, 36}, 1, 1}, - { {2880, 480, 108108, 248, 64, 240, 6, 9, 30}, 0, 0}, - { {1920, 1080, 74250, 44, 638, 148, 5, 4, 36}, 1, 1}, - /* VESA From Here */ - { {640, 480, 25175, 96, 16, 48, 2 , 11, 31}, 0, 0}, - { {800, 600, 40000, 128, 40, 88, 4 , 1, 23}, 1, 1}, - { {848, 480, 33750, 112, 16, 112, 8 , 6, 23}, 1, 1}, - { {1280, 768, 79500, 128, 64, 192, 7 , 3, 20}, 1, 0}, - { {1280, 800, 83500, 128, 72, 200, 6 , 3, 22}, 1, 0}, - { {1360, 768, 85500, 112, 64, 256, 6 , 3, 18}, 1, 1}, - { {1280, 960, 108000, 112, 96, 312, 3 , 1, 36}, 1, 1}, - { {1280, 1024, 108000, 112, 48, 248, 3 , 1, 38}, 1, 1}, - { {1024, 768, 65000, 136, 24, 160, 6, 3, 29}, 0, 0}, - { {1400, 1050, 121750, 144, 88, 232, 4, 3, 32}, 1, 0}, - { {1440, 900, 106500, 152, 80, 232, 6, 3, 25}, 1, 0}, - { {1680, 1050, 146250, 176 , 104, 280, 6, 3, 30}, 1, 0}, - { {1366, 768, 85500, 143, 70, 213, 3, 3, 24}, 1, 1}, - { {1920, 1080, 148500, 44, 148, 80, 5, 4, 36}, 1, 1}, - { {1280, 768, 68250, 32, 48, 80, 7, 3, 12}, 0, 1}, - { {1400, 1050, 101000, 32, 48, 80, 4, 3, 23}, 0, 1}, - { {1680, 1050, 119000, 32, 48, 80, 6, 3, 21}, 0, 1}, - { {1280, 800, 79500, 32, 48, 80, 6, 3, 14}, 0, 1}, - { {1280, 720, 74250, 40, 110, 220, 5, 5, 20}, 1, 1} -}; - -/* - * This is a static mapping array which maps the timing values - * with corresponding CEA / VESA code - */ -static const int code_index[OMAP_HDMI_TIMINGS_NB] = { - 1, 19, 4, 2, 37, 6, 21, 20, 5, 16, 17, 29, 31, 35, 32, - /* <--15 CEA 17--> vesa*/ - 4, 9, 0xE, 0x17, 0x1C, 0x27, 0x20, 0x23, 0x10, 0x2A, - 0X2F, 0x3A, 0X51, 0X52, 0x16, 0x29, 0x39, 0x1B -}; - -/* - * This is reverse static mapping which maps the CEA / VESA code - * to the corresponding timing values - */ -static const int code_cea[39] = { - -1, 0, 3, 3, 2, 8, 5, 5, -1, -1, - -1, -1, -1, -1, -1, -1, 9, 10, 10, 1, - 7, 6, 6, -1, -1, -1, -1, -1, -1, 11, - 11, 12, 14, -1, -1, 13, 13, 4, 4 -}; - -static const int code_vesa[85] = { - -1, -1, -1, -1, 15, -1, -1, -1, -1, 16, - -1, -1, -1, -1, 17, -1, 23, -1, -1, -1, - -1, -1, 29, 18, -1, -1, -1, 32, 19, -1, - -1, -1, 21, -1, -1, 22, -1, -1, -1, 20, - -1, 30, 24, -1, -1, -1, -1, 25, -1, -1, - -1, -1, -1, -1, -1, -1, -1, 31, 26, -1, - -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, 27, 28, -1, 33}; - -static int hdmi_runtime_get(void) -{ - int r; - - DSSDBG("hdmi_runtime_get\n"); - - r = pm_runtime_get_sync(&hdmi.pdev->dev); - WARN_ON(r < 0); - return r < 0 ? r : 0; -} - -static void hdmi_runtime_put(void) -{ - int r; - - DSSDBG("hdmi_runtime_put\n"); - - r = pm_runtime_put_sync(&hdmi.pdev->dev); - WARN_ON(r < 0); -} - -int hdmi_init_display(struct omap_dss_device *dssdev) -{ - DSSDBG("init_display\n"); - - dss_init_hdmi_ip_ops(&hdmi.ip_data); - return 0; -} - -static int get_timings_index(void) -{ - int code; - - if (hdmi.mode == 0) - code = code_vesa[hdmi.code]; - else - code = code_cea[hdmi.code]; - - if (code == -1) { - /* HDMI code 4 corresponds to 640 * 480 VGA */ - hdmi.code = 4; - /* DVI mode 1 corresponds to HDMI 0 to DVI */ - hdmi.mode = HDMI_DVI; - - code = code_vesa[hdmi.code]; - } - return code; -} - -static struct hdmi_cm hdmi_get_code(struct omap_video_timings *timing) -{ - int i = 0, code = -1, temp_vsync = 0, temp_hsync = 0; - int timing_vsync = 0, timing_hsync = 0; - struct hdmi_video_timings temp; - struct hdmi_cm cm = {-1}; - DSSDBG("hdmi_get_code\n"); - - for (i = 0; i < OMAP_HDMI_TIMINGS_NB; i++) { - temp = cea_vesa_timings[i].timings; - if ((temp.pixel_clock == timing->pixel_clock) && - (temp.x_res == timing->x_res) && - (temp.y_res == timing->y_res)) { - - temp_hsync = temp.hfp + temp.hsw + temp.hbp; - timing_hsync = timing->hfp + timing->hsw + timing->hbp; - temp_vsync = temp.vfp + temp.vsw + temp.vbp; - timing_vsync = timing->vfp + timing->vsw + timing->vbp; - - DSSDBG("temp_hsync = %d , temp_vsync = %d" - "timing_hsync = %d, timing_vsync = %d\n", - temp_hsync, temp_hsync, - timing_hsync, timing_vsync); - - if ((temp_hsync == timing_hsync) && - (temp_vsync == timing_vsync)) { - code = i; - cm.code = code_index[i]; - if (code < 14) - cm.mode = HDMI_HDMI; - else - cm.mode = HDMI_DVI; - DSSDBG("Hdmi_code = %d mode = %d\n", - cm.code, cm.mode); - break; - } - } - } - - return cm; -} - -static void update_hdmi_timings(struct hdmi_config *cfg, - struct omap_video_timings *timings, int code) -{ - cfg->timings.timings.x_res = timings->x_res; - cfg->timings.timings.y_res = timings->y_res; - cfg->timings.timings.hbp = timings->hbp; - cfg->timings.timings.hfp = timings->hfp; - cfg->timings.timings.hsw = timings->hsw; - cfg->timings.timings.vbp = timings->vbp; - cfg->timings.timings.vfp = timings->vfp; - cfg->timings.timings.vsw = timings->vsw; - cfg->timings.timings.pixel_clock = timings->pixel_clock; - cfg->timings.vsync_pol = cea_vesa_timings[code].vsync_pol; - cfg->timings.hsync_pol = cea_vesa_timings[code].hsync_pol; -} - -unsigned long hdmi_get_pixel_clock(void) -{ - /* HDMI Pixel Clock in Mhz */ - return hdmi.ip_data.cfg.timings.timings.pixel_clock * 1000; -} - -static void hdmi_compute_pll(struct omap_dss_device *dssdev, int phy, - struct hdmi_pll_info *pi) -{ - unsigned long clkin, refclk; - u32 mf; - - clkin = clk_get_rate(hdmi.sys_clk) / 10000; - /* - * Input clock is predivided by N + 1 - * out put of which is reference clk - */ - if (dssdev->clocks.hdmi.regn == 0) - pi->regn = HDMI_DEFAULT_REGN; - else - pi->regn = dssdev->clocks.hdmi.regn; - - refclk = clkin / pi->regn; - - /* - * multiplier is pixel_clk/ref_clk - * Multiplying by 100 to avoid fractional part removal - */ - pi->regm = (phy * 100 / (refclk)) / 100; - - if (dssdev->clocks.hdmi.regm2 == 0) - pi->regm2 = HDMI_DEFAULT_REGM2; - else - pi->regm2 = dssdev->clocks.hdmi.regm2; - - /* - * fractional multiplier is remainder of the difference between - * multiplier and actual phy(required pixel clock thus should be - * multiplied by 2^18(262144) divided by the reference clock - */ - mf = (phy - pi->regm * refclk) * 262144; - pi->regmf = mf / (refclk); - - /* - * Dcofreq should be set to 1 if required pixel clock - * is greater than 1000MHz - */ - pi->dcofreq = phy > 1000 * 100; - pi->regsd = ((pi->regm * clkin / 10) / (pi->regn * 250) + 5) / 10; - - /* Set the reference clock to sysclk reference */ - pi->refsel = HDMI_REFSEL_SYSCLK; - - DSSDBG("M = %d Mf = %d\n", pi->regm, pi->regmf); - DSSDBG("range = %d sd = %d\n", pi->dcofreq, pi->regsd); -} - -static int hdmi_power_on(struct omap_dss_device *dssdev) -{ - int r, code = 0; - struct omap_video_timings *p; - unsigned long phy; - - r = hdmi_runtime_get(); - if (r) - return r; - - dss_mgr_disable(dssdev->manager); - - p = &dssdev->panel.timings; - - DSSDBG("hdmi_power_on x_res= %d y_res = %d\n", - dssdev->panel.timings.x_res, - dssdev->panel.timings.y_res); - - code = get_timings_index(); - update_hdmi_timings(&hdmi.ip_data.cfg, p, code); - - phy = p->pixel_clock; - - hdmi_compute_pll(dssdev, phy, &hdmi.ip_data.pll_data); - - hdmi.ip_data.ops->video_enable(&hdmi.ip_data, 0); - - /* config the PLL and PHY hdmi_set_pll_pwrfirst */ - r = hdmi.ip_data.ops->pll_enable(&hdmi.ip_data); - if (r) { - DSSDBG("Failed to lock PLL\n"); - goto err; - } - - r = hdmi.ip_data.ops->phy_enable(&hdmi.ip_data); - if (r) { - DSSDBG("Failed to start PHY\n"); - goto err; - } - - hdmi.ip_data.cfg.cm.mode = hdmi.mode; - hdmi.ip_data.cfg.cm.code = hdmi.code; - hdmi.ip_data.ops->video_configure(&hdmi.ip_data); - - /* Make selection of HDMI in DSS */ - dss_select_hdmi_venc_clk_source(DSS_HDMI_M_PCLK); - - /* Select the dispc clock source as PRCM clock, to ensure that it is not - * DSI PLL source as the clock selected by DSI PLL might not be - * sufficient for the resolution selected / that can be changed - * dynamically by user. This can be moved to single location , say - * Boardfile. - */ - dss_select_dispc_clk_source(dssdev->clocks.dispc.dispc_fclk_src); - - /* bypass TV gamma table */ - dispc_enable_gamma_table(0); - - /* tv size */ - dispc_set_digit_size(dssdev->panel.timings.x_res, - dssdev->panel.timings.y_res); - - hdmi.ip_data.ops->video_enable(&hdmi.ip_data, 1); - - r = dss_mgr_enable(dssdev->manager); - if (r) - goto err_mgr_enable; - - return 0; - -err_mgr_enable: - hdmi.ip_data.ops->video_enable(&hdmi.ip_data, 0); - hdmi.ip_data.ops->phy_disable(&hdmi.ip_data); - hdmi.ip_data.ops->pll_disable(&hdmi.ip_data); -err: - hdmi_runtime_put(); - return -EIO; -} - -static void hdmi_power_off(struct omap_dss_device *dssdev) -{ - dss_mgr_disable(dssdev->manager); - - hdmi.ip_data.ops->video_enable(&hdmi.ip_data, 0); - hdmi.ip_data.ops->phy_disable(&hdmi.ip_data); - hdmi.ip_data.ops->pll_disable(&hdmi.ip_data); - hdmi_runtime_put(); -} - -int omapdss_hdmi_display_check_timing(struct omap_dss_device *dssdev, - struct omap_video_timings *timings) -{ - struct hdmi_cm cm; - - cm = hdmi_get_code(timings); - if (cm.code == -1) { - return -EINVAL; - } - - return 0; - -} - -void omapdss_hdmi_display_set_timing(struct omap_dss_device *dssdev) -{ - struct hdmi_cm cm; - - cm = hdmi_get_code(&dssdev->panel.timings); - hdmi.code = cm.code; - hdmi.mode = cm.mode; - - if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE) { - int r; - - hdmi_power_off(dssdev); - - r = hdmi_power_on(dssdev); - if (r) - DSSERR("failed to power on device\n"); - } -} - -void hdmi_dump_regs(struct seq_file *s) -{ - mutex_lock(&hdmi.lock); - - if (hdmi_runtime_get()) - return; - - hdmi.ip_data.ops->dump_wrapper(&hdmi.ip_data, s); - hdmi.ip_data.ops->dump_pll(&hdmi.ip_data, s); - hdmi.ip_data.ops->dump_phy(&hdmi.ip_data, s); - hdmi.ip_data.ops->dump_core(&hdmi.ip_data, s); - - hdmi_runtime_put(); - mutex_unlock(&hdmi.lock); -} - -int omapdss_hdmi_read_edid(u8 *buf, int len) -{ - int r; - - mutex_lock(&hdmi.lock); - - r = hdmi_runtime_get(); - BUG_ON(r); - - r = hdmi.ip_data.ops->read_edid(&hdmi.ip_data, buf, len); - - hdmi_runtime_put(); - mutex_unlock(&hdmi.lock); - - return r; -} - -bool omapdss_hdmi_detect(void) -{ - int r; - - mutex_lock(&hdmi.lock); - - r = hdmi_runtime_get(); - BUG_ON(r); - - r = hdmi.ip_data.ops->detect(&hdmi.ip_data); - - hdmi_runtime_put(); - mutex_unlock(&hdmi.lock); - - return r == 1; -} - -int omapdss_hdmi_display_enable(struct omap_dss_device *dssdev) -{ - struct omap_dss_hdmi_data *priv = dssdev->data; - int r = 0; - - DSSDBG("ENTER hdmi_display_enable\n"); - - mutex_lock(&hdmi.lock); - - if (dssdev->manager == NULL) { - DSSERR("failed to enable display: no manager\n"); - r = -ENODEV; - goto err0; - } - - hdmi.ip_data.hpd_gpio = priv->hpd_gpio; - - r = omap_dss_start_device(dssdev); - if (r) { - DSSERR("failed to start device\n"); - goto err0; - } - - if (dssdev->platform_enable) { - r = dssdev->platform_enable(dssdev); - if (r) { - DSSERR("failed to enable GPIO's\n"); - goto err1; - } - } - - r = hdmi_power_on(dssdev); - if (r) { - DSSERR("failed to power on device\n"); - goto err2; - } - - mutex_unlock(&hdmi.lock); - return 0; - -err2: - if (dssdev->platform_disable) - dssdev->platform_disable(dssdev); -err1: - omap_dss_stop_device(dssdev); -err0: - mutex_unlock(&hdmi.lock); - return r; -} - -void omapdss_hdmi_display_disable(struct omap_dss_device *dssdev) -{ - DSSDBG("Enter hdmi_display_disable\n"); - - mutex_lock(&hdmi.lock); - - hdmi_power_off(dssdev); - - if (dssdev->platform_disable) - dssdev->platform_disable(dssdev); - - omap_dss_stop_device(dssdev); - - mutex_unlock(&hdmi.lock); -} - -#if defined(CONFIG_SND_OMAP_SOC_OMAP4_HDMI) || \ - defined(CONFIG_SND_OMAP_SOC_OMAP4_HDMI_MODULE) - -static int hdmi_audio_trigger(struct snd_pcm_substream *substream, int cmd, - struct snd_soc_dai *dai) -{ - struct snd_soc_pcm_runtime *rtd = substream->private_data; - struct snd_soc_codec *codec = rtd->codec; - struct platform_device *pdev = to_platform_device(codec->dev); - struct hdmi_ip_data *ip_data = snd_soc_codec_get_drvdata(codec); - int err = 0; - - if (!(ip_data->ops) && !(ip_data->ops->audio_enable)) { - dev_err(&pdev->dev, "Cannot enable/disable audio\n"); - return -ENODEV; - } - - switch (cmd) { - case SNDRV_PCM_TRIGGER_START: - case SNDRV_PCM_TRIGGER_RESUME: - case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: - ip_data->ops->audio_enable(ip_data, true); - break; - case SNDRV_PCM_TRIGGER_STOP: - case SNDRV_PCM_TRIGGER_SUSPEND: - case SNDRV_PCM_TRIGGER_PAUSE_PUSH: - ip_data->ops->audio_enable(ip_data, false); - break; - default: - err = -EINVAL; - } - return err; -} - -static int hdmi_audio_hw_params(struct snd_pcm_substream *substream, - struct snd_pcm_hw_params *params, - struct snd_soc_dai *dai) -{ - struct snd_soc_pcm_runtime *rtd = substream->private_data; - struct snd_soc_codec *codec = rtd->codec; - struct hdmi_ip_data *ip_data = snd_soc_codec_get_drvdata(codec); - struct hdmi_audio_format audio_format; - struct hdmi_audio_dma audio_dma; - struct hdmi_core_audio_config core_cfg; - struct hdmi_core_infoframe_audio aud_if_cfg; - int err, n, cts; - enum hdmi_core_audio_sample_freq sample_freq; - - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: - core_cfg.i2s_cfg.word_max_length = - HDMI_AUDIO_I2S_MAX_WORD_20BITS; - core_cfg.i2s_cfg.word_length = HDMI_AUDIO_I2S_CHST_WORD_16_BITS; - core_cfg.i2s_cfg.in_length_bits = - HDMI_AUDIO_I2S_INPUT_LENGTH_16; - core_cfg.i2s_cfg.justification = HDMI_AUDIO_JUSTIFY_LEFT; - audio_format.samples_per_word = HDMI_AUDIO_ONEWORD_TWOSAMPLES; - audio_format.sample_size = HDMI_AUDIO_SAMPLE_16BITS; - audio_format.justification = HDMI_AUDIO_JUSTIFY_LEFT; - audio_dma.transfer_size = 0x10; - break; - case SNDRV_PCM_FORMAT_S24_LE: - core_cfg.i2s_cfg.word_max_length = - HDMI_AUDIO_I2S_MAX_WORD_24BITS; - core_cfg.i2s_cfg.word_length = HDMI_AUDIO_I2S_CHST_WORD_24_BITS; - core_cfg.i2s_cfg.in_length_bits = - HDMI_AUDIO_I2S_INPUT_LENGTH_24; - audio_format.samples_per_word = HDMI_AUDIO_ONEWORD_ONESAMPLE; - audio_format.sample_size = HDMI_AUDIO_SAMPLE_24BITS; - audio_format.justification = HDMI_AUDIO_JUSTIFY_RIGHT; - core_cfg.i2s_cfg.justification = HDMI_AUDIO_JUSTIFY_RIGHT; - audio_dma.transfer_size = 0x20; - break; - default: - return -EINVAL; - } - - switch (params_rate(params)) { - case 32000: - sample_freq = HDMI_AUDIO_FS_32000; - break; - case 44100: - sample_freq = HDMI_AUDIO_FS_44100; - break; - case 48000: - sample_freq = HDMI_AUDIO_FS_48000; - break; - default: - return -EINVAL; - } - - err = hdmi_config_audio_acr(ip_data, params_rate(params), &n, &cts); - if (err < 0) - return err; - - /* Audio wrapper config */ - audio_format.stereo_channels = HDMI_AUDIO_STEREO_ONECHANNEL; - audio_format.active_chnnls_msk = 0x03; - audio_format.type = HDMI_AUDIO_TYPE_LPCM; - audio_format.sample_order = HDMI_AUDIO_SAMPLE_LEFT_FIRST; - /* Disable start/stop signals of IEC 60958 blocks */ - audio_format.en_sig_blk_strt_end = HDMI_AUDIO_BLOCK_SIG_STARTEND_OFF; - - audio_dma.block_size = 0xC0; - audio_dma.mode = HDMI_AUDIO_TRANSF_DMA; - audio_dma.fifo_threshold = 0x20; /* in number of samples */ - - hdmi_wp_audio_config_dma(ip_data, &audio_dma); - hdmi_wp_audio_config_format(ip_data, &audio_format); - - /* - * I2S config - */ - core_cfg.i2s_cfg.en_high_bitrate_aud = false; - /* Only used with high bitrate audio */ - core_cfg.i2s_cfg.cbit_order = false; - /* Serial data and word select should change on sck rising edge */ - core_cfg.i2s_cfg.sck_edge_mode = HDMI_AUDIO_I2S_SCK_EDGE_RISING; - core_cfg.i2s_cfg.vbit = HDMI_AUDIO_I2S_VBIT_FOR_PCM; - /* Set I2S word select polarity */ - core_cfg.i2s_cfg.ws_polarity = HDMI_AUDIO_I2S_WS_POLARITY_LOW_IS_LEFT; - core_cfg.i2s_cfg.direction = HDMI_AUDIO_I2S_MSB_SHIFTED_FIRST; - /* Set serial data to word select shift. See Phillips spec. */ - core_cfg.i2s_cfg.shift = HDMI_AUDIO_I2S_FIRST_BIT_SHIFT; - /* Enable one of the four available serial data channels */ - core_cfg.i2s_cfg.active_sds = HDMI_AUDIO_I2S_SD0_EN; - - /* Core audio config */ - core_cfg.freq_sample = sample_freq; - core_cfg.n = n; - core_cfg.cts = cts; - if (dss_has_feature(FEAT_HDMI_CTS_SWMODE)) { - core_cfg.aud_par_busclk = 0; - core_cfg.cts_mode = HDMI_AUDIO_CTS_MODE_SW; - core_cfg.use_mclk = false; - } else { - core_cfg.aud_par_busclk = (((128 * 31) - 1) << 8); - core_cfg.cts_mode = HDMI_AUDIO_CTS_MODE_HW; - core_cfg.use_mclk = true; - core_cfg.mclk_mode = HDMI_AUDIO_MCLK_128FS; - } - core_cfg.layout = HDMI_AUDIO_LAYOUT_2CH; - core_cfg.en_spdif = false; - /* Use sample frequency from channel status word */ - core_cfg.fs_override = true; - /* Enable ACR packets */ - core_cfg.en_acr_pkt = true; - /* Disable direct streaming digital audio */ - core_cfg.en_dsd_audio = false; - /* Use parallel audio interface */ - core_cfg.en_parallel_aud_input = true; - - hdmi_core_audio_config(ip_data, &core_cfg); - - /* - * Configure packet - * info frame audio see doc CEA861-D page 74 - */ - aud_if_cfg.db1_coding_type = HDMI_INFOFRAME_AUDIO_DB1CT_FROM_STREAM; - aud_if_cfg.db1_channel_count = 2; - aud_if_cfg.db2_sample_freq = HDMI_INFOFRAME_AUDIO_DB2SF_FROM_STREAM; - aud_if_cfg.db2_sample_size = HDMI_INFOFRAME_AUDIO_DB2SS_FROM_STREAM; - aud_if_cfg.db4_channel_alloc = 0x00; - aud_if_cfg.db5_downmix_inh = false; - aud_if_cfg.db5_lsv = 0; - - hdmi_core_audio_infoframe_config(ip_data, &aud_if_cfg); - return 0; -} - -static int hdmi_audio_startup(struct snd_pcm_substream *substream, - struct snd_soc_dai *dai) -{ - if (!hdmi.mode) { - pr_err("Current video settings do not support audio.\n"); - return -EIO; - } - return 0; -} - -static int hdmi_audio_codec_probe(struct snd_soc_codec *codec) -{ - struct hdmi_ip_data *priv = &hdmi.ip_data; - - snd_soc_codec_set_drvdata(codec, priv); - return 0; -} - -static struct snd_soc_codec_driver hdmi_audio_codec_drv = { - .probe = hdmi_audio_codec_probe, -}; - -static struct snd_soc_dai_ops hdmi_audio_codec_ops = { - .hw_params = hdmi_audio_hw_params, - .trigger = hdmi_audio_trigger, - .startup = hdmi_audio_startup, -}; - -static struct snd_soc_dai_driver hdmi_codec_dai_drv = { - .name = "hdmi-audio-codec", - .playback = { - .channels_min = 2, - .channels_max = 2, - .rates = SNDRV_PCM_RATE_32000 | - SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000, - .formats = SNDRV_PCM_FMTBIT_S16_LE | - SNDRV_PCM_FMTBIT_S24_LE, - }, - .ops = &hdmi_audio_codec_ops, -}; -#endif - -static int hdmi_get_clocks(struct platform_device *pdev) -{ - struct clk *clk; - - clk = clk_get(&pdev->dev, "sys_clk"); - if (IS_ERR(clk)) { - DSSERR("can't get sys_clk\n"); - return PTR_ERR(clk); - } - - hdmi.sys_clk = clk; - - return 0; -} - -static void hdmi_put_clocks(void) -{ - if (hdmi.sys_clk) - clk_put(hdmi.sys_clk); -} - -/* HDMI HW IP initialisation */ -static int omapdss_hdmihw_probe(struct platform_device *pdev) -{ - struct resource *hdmi_mem; - int r; - - hdmi.pdata = pdev->dev.platform_data; - hdmi.pdev = pdev; - - mutex_init(&hdmi.lock); - - hdmi_mem = platform_get_resource(hdmi.pdev, IORESOURCE_MEM, 0); - if (!hdmi_mem) { - DSSERR("can't get IORESOURCE_MEM HDMI\n"); - return -EINVAL; - } - - /* Base address taken from platform */ - hdmi.ip_data.base_wp = ioremap(hdmi_mem->start, - resource_size(hdmi_mem)); - if (!hdmi.ip_data.base_wp) { - DSSERR("can't ioremap WP\n"); - return -ENOMEM; - } - - r = hdmi_get_clocks(pdev); - if (r) { - iounmap(hdmi.ip_data.base_wp); - return r; - } - - pm_runtime_enable(&pdev->dev); - - hdmi.ip_data.core_sys_offset = HDMI_CORE_SYS; - hdmi.ip_data.core_av_offset = HDMI_CORE_AV; - hdmi.ip_data.pll_offset = HDMI_PLLCTRL; - hdmi.ip_data.phy_offset = HDMI_PHY; - - hdmi_panel_init(); - -#if defined(CONFIG_SND_OMAP_SOC_OMAP4_HDMI) || \ - defined(CONFIG_SND_OMAP_SOC_OMAP4_HDMI_MODULE) - - /* Register ASoC codec DAI */ - r = snd_soc_register_codec(&pdev->dev, &hdmi_audio_codec_drv, - &hdmi_codec_dai_drv, 1); - if (r) { - DSSERR("can't register ASoC HDMI audio codec\n"); - return r; - } -#endif - return 0; -} - -static int omapdss_hdmihw_remove(struct platform_device *pdev) -{ - hdmi_panel_exit(); - -#if defined(CONFIG_SND_OMAP_SOC_OMAP4_HDMI) || \ - defined(CONFIG_SND_OMAP_SOC_OMAP4_HDMI_MODULE) - snd_soc_unregister_codec(&pdev->dev); -#endif - - pm_runtime_disable(&pdev->dev); - - hdmi_put_clocks(); - - iounmap(hdmi.ip_data.base_wp); - - return 0; -} - -static int hdmi_runtime_suspend(struct device *dev) -{ - clk_disable(hdmi.sys_clk); - - dispc_runtime_put(); - dss_runtime_put(); - - return 0; -} - -static int hdmi_runtime_resume(struct device *dev) -{ - int r; - - r = dss_runtime_get(); - if (r < 0) - goto err_get_dss; - - r = dispc_runtime_get(); - if (r < 0) - goto err_get_dispc; - - - clk_enable(hdmi.sys_clk); - - return 0; - -err_get_dispc: - dss_runtime_put(); -err_get_dss: - return r; -} - -static const struct dev_pm_ops hdmi_pm_ops = { - .runtime_suspend = hdmi_runtime_suspend, - .runtime_resume = hdmi_runtime_resume, -}; - -static struct platform_driver omapdss_hdmihw_driver = { - .probe = omapdss_hdmihw_probe, - .remove = omapdss_hdmihw_remove, - .driver = { - .name = "omapdss_hdmi", - .owner = THIS_MODULE, - .pm = &hdmi_pm_ops, - }, -}; - -int hdmi_init_platform_driver(void) -{ - return platform_driver_register(&omapdss_hdmihw_driver); -} - -void hdmi_uninit_platform_driver(void) -{ - return platform_driver_unregister(&omapdss_hdmihw_driver); -} diff --git a/drivers/video/omap2/dss/hdmi_panel.c b/drivers/video/omap2/dss/hdmi_panel.c deleted file mode 100644 index 533d5dc634d..00000000000 --- a/drivers/video/omap2/dss/hdmi_panel.c +++ /dev/null @@ -1,256 +0,0 @@ -/* - * hdmi_panel.c - * - * HDMI library support functions for TI OMAP4 processors. - * - * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com/ - * Authors: Mythri P k <mythripk@ti.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program. If not, see <http://www.gnu.org/licenses/>. - */ - -#include <linux/kernel.h> -#include <linux/err.h> -#include <linux/io.h> -#include <linux/mutex.h> -#include <linux/module.h> -#include <video/omapdss.h> -#include <linux/slab.h> - -#include "dss.h" - -static struct { - struct mutex hdmi_lock; -} hdmi; - - -static int hdmi_panel_probe(struct omap_dss_device *dssdev) -{ - DSSDBG("ENTER hdmi_panel_probe\n"); - - dssdev->panel.config = OMAP_DSS_LCD_TFT | - OMAP_DSS_LCD_IVS | OMAP_DSS_LCD_IHS; - - dssdev->panel.timings = (struct omap_video_timings){640, 480, 25175, 96, 16, 48, 2 , 11, 31}; - - DSSDBG("hdmi_panel_probe x_res= %d y_res = %d\n", - dssdev->panel.timings.x_res, - dssdev->panel.timings.y_res); - return 0; -} - -static void hdmi_panel_remove(struct omap_dss_device *dssdev) -{ - -} - -static int hdmi_panel_enable(struct omap_dss_device *dssdev) -{ - int r = 0; - DSSDBG("ENTER hdmi_panel_enable\n"); - - mutex_lock(&hdmi.hdmi_lock); - - if (dssdev->state != OMAP_DSS_DISPLAY_DISABLED) { - r = -EINVAL; - goto err; - } - - r = omapdss_hdmi_display_enable(dssdev); - if (r) { - DSSERR("failed to power on\n"); - goto err; - } - - dssdev->state = OMAP_DSS_DISPLAY_ACTIVE; - -err: - mutex_unlock(&hdmi.hdmi_lock); - - return r; -} - -static void hdmi_panel_disable(struct omap_dss_device *dssdev) -{ - mutex_lock(&hdmi.hdmi_lock); - - if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE) - omapdss_hdmi_display_disable(dssdev); - - dssdev->state = OMAP_DSS_DISPLAY_DISABLED; - - mutex_unlock(&hdmi.hdmi_lock); -} - -static int hdmi_panel_suspend(struct omap_dss_device *dssdev) -{ - int r = 0; - - mutex_lock(&hdmi.hdmi_lock); - - if (dssdev->state != OMAP_DSS_DISPLAY_ACTIVE) { - r = -EINVAL; - goto err; - } - - dssdev->state = OMAP_DSS_DISPLAY_SUSPENDED; - - omapdss_hdmi_display_disable(dssdev); - -err: - mutex_unlock(&hdmi.hdmi_lock); - - return r; -} - -static int hdmi_panel_resume(struct omap_dss_device *dssdev) -{ - int r = 0; - - mutex_lock(&hdmi.hdmi_lock); - - if (dssdev->state != OMAP_DSS_DISPLAY_SUSPENDED) { - r = -EINVAL; - goto err; - } - - r = omapdss_hdmi_display_enable(dssdev); - if (r) { - DSSERR("failed to power on\n"); - goto err; - } - - dssdev->state = OMAP_DSS_DISPLAY_ACTIVE; - -err: - mutex_unlock(&hdmi.hdmi_lock); - - return r; -} - -static void hdmi_get_timings(struct omap_dss_device *dssdev, - struct omap_video_timings *timings) -{ - mutex_lock(&hdmi.hdmi_lock); - - *timings = dssdev->panel.timings; - - mutex_unlock(&hdmi.hdmi_lock); -} - -static void hdmi_set_timings(struct omap_dss_device *dssdev, - struct omap_video_timings *timings) -{ - DSSDBG("hdmi_set_timings\n"); - - mutex_lock(&hdmi.hdmi_lock); - - dssdev->panel.timings = *timings; - omapdss_hdmi_display_set_timing(dssdev); - - mutex_unlock(&hdmi.hdmi_lock); -} - -static int hdmi_check_timings(struct omap_dss_device *dssdev, - struct omap_video_timings *timings) -{ - int r = 0; - - DSSDBG("hdmi_check_timings\n"); - - mutex_lock(&hdmi.hdmi_lock); - - r = omapdss_hdmi_display_check_timing(dssdev, timings); - - mutex_unlock(&hdmi.hdmi_lock); - return r; -} - -static int hdmi_read_edid(struct omap_dss_device *dssdev, u8 *buf, int len) -{ - int r; - - mutex_lock(&hdmi.hdmi_lock); - - if (dssdev->state != OMAP_DSS_DISPLAY_ACTIVE) { - r = omapdss_hdmi_display_enable(dssdev); - if (r) - goto err; - } - - r = omapdss_hdmi_read_edid(buf, len); - - if (dssdev->state == OMAP_DSS_DISPLAY_DISABLED || - dssdev->state == OMAP_DSS_DISPLAY_SUSPENDED) - omapdss_hdmi_display_disable(dssdev); -err: - mutex_unlock(&hdmi.hdmi_lock); - - return r; -} - -static bool hdmi_detect(struct omap_dss_device *dssdev) -{ - int r; - - mutex_lock(&hdmi.hdmi_lock); - - if (dssdev->state != OMAP_DSS_DISPLAY_ACTIVE) { - r = omapdss_hdmi_display_enable(dssdev); - if (r) - goto err; - } - - r = omapdss_hdmi_detect(); - - if (dssdev->state == OMAP_DSS_DISPLAY_DISABLED || - dssdev->state == OMAP_DSS_DISPLAY_SUSPENDED) - omapdss_hdmi_display_disable(dssdev); -err: - mutex_unlock(&hdmi.hdmi_lock); - - return r; -} - -static struct omap_dss_driver hdmi_driver = { - .probe = hdmi_panel_probe, - .remove = hdmi_panel_remove, - .enable = hdmi_panel_enable, - .disable = hdmi_panel_disable, - .suspend = hdmi_panel_suspend, - .resume = hdmi_panel_resume, - .get_timings = hdmi_get_timings, - .set_timings = hdmi_set_timings, - .check_timings = hdmi_check_timings, - .read_edid = hdmi_read_edid, - .detect = hdmi_detect, - .driver = { - .name = "hdmi_panel", - .owner = THIS_MODULE, - }, -}; - -int hdmi_panel_init(void) -{ - mutex_init(&hdmi.hdmi_lock); - - omap_dss_register_driver(&hdmi_driver); - - return 0; -} - -void hdmi_panel_exit(void) -{ - omap_dss_unregister_driver(&hdmi_driver); - -} diff --git a/drivers/video/omap2/dss/manager.c b/drivers/video/omap2/dss/manager.c deleted file mode 100644 index d1858e71c64..00000000000 --- a/drivers/video/omap2/dss/manager.c +++ /dev/null @@ -1,676 +0,0 @@ -/* - * linux/drivers/video/omap2/dss/manager.c - * - * Copyright (C) 2009 Nokia Corporation - * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com> - * - * Some code and ideas taken from drivers/video/omap/ driver - * by Imre Deak. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program. If not, see <http://www.gnu.org/licenses/>. - */ - -#define DSS_SUBSYS_NAME "MANAGER" - -#include <linux/kernel.h> -#include <linux/slab.h> -#include <linux/module.h> -#include <linux/platform_device.h> -#include <linux/jiffies.h> - -#include <video/omapdss.h> - -#include "dss.h" -#include "dss_features.h" - -static int num_managers; -static struct omap_overlay_manager *managers; - -static ssize_t manager_name_show(struct omap_overlay_manager *mgr, char *buf) -{ - return snprintf(buf, PAGE_SIZE, "%s\n", mgr->name); -} - -static ssize_t manager_display_show(struct omap_overlay_manager *mgr, char *buf) -{ - return snprintf(buf, PAGE_SIZE, "%s\n", - mgr->device ? mgr->device->name : "<none>"); -} - -static ssize_t manager_display_store(struct omap_overlay_manager *mgr, - const char *buf, size_t size) -{ - int r = 0; - size_t len = size; - struct omap_dss_device *dssdev = NULL; - - int match(struct omap_dss_device *dssdev, void *data) - { - const char *str = data; - return sysfs_streq(dssdev->name, str); - } - - if (buf[size-1] == '\n') - --len; - - if (len > 0) - dssdev = omap_dss_find_device((void *)buf, match); - - if (len > 0 && dssdev == NULL) - return -EINVAL; - - if (dssdev) - DSSDBG("display %s found\n", dssdev->name); - - if (mgr->device) { - r = mgr->unset_device(mgr); - if (r) { - DSSERR("failed to unset display\n"); - goto put_device; - } - } - - if (dssdev) { - r = mgr->set_device(mgr, dssdev); - if (r) { - DSSERR("failed to set manager\n"); - goto put_device; - } - - r = mgr->apply(mgr); - if (r) { - DSSERR("failed to apply dispc config\n"); - goto put_device; - } - } - -put_device: - if (dssdev) - omap_dss_put_device(dssdev); - - return r ? r : size; -} - -static ssize_t manager_default_color_show(struct omap_overlay_manager *mgr, - char *buf) -{ - struct omap_overlay_manager_info info; - - mgr->get_manager_info(mgr, &info); - - return snprintf(buf, PAGE_SIZE, "%#x\n", info.default_color); -} - -static ssize_t manager_default_color_store(struct omap_overlay_manager *mgr, - const char *buf, size_t size) -{ - struct omap_overlay_manager_info info; - u32 color; - int r; - - r = kstrtouint(buf, 0, &color); - if (r) - return r; - - mgr->get_manager_info(mgr, &info); - - info.default_color = color; - - r = mgr->set_manager_info(mgr, &info); - if (r) - return r; - - r = mgr->apply(mgr); - if (r) - return r; - - return size; -} - -static const char *trans_key_type_str[] = { - "gfx-destination", - "video-source", -}; - -static ssize_t manager_trans_key_type_show(struct omap_overlay_manager *mgr, - char *buf) -{ - enum omap_dss_trans_key_type key_type; - struct omap_overlay_manager_info info; - - mgr->get_manager_info(mgr, &info); - - key_type = info.trans_key_type; - BUG_ON(key_type >= ARRAY_SIZE(trans_key_type_str)); - - return snprintf(buf, PAGE_SIZE, "%s\n", trans_key_type_str[key_type]); -} - -static ssize_t manager_trans_key_type_store(struct omap_overlay_manager *mgr, - const char *buf, size_t size) -{ - enum omap_dss_trans_key_type key_type; - struct omap_overlay_manager_info info; - int r; - - for (key_type = OMAP_DSS_COLOR_KEY_GFX_DST; - key_type < ARRAY_SIZE(trans_key_type_str); key_type++) { - if (sysfs_streq(buf, trans_key_type_str[key_type])) - break; - } - - if (key_type == ARRAY_SIZE(trans_key_type_str)) - return -EINVAL; - - mgr->get_manager_info(mgr, &info); - - info.trans_key_type = key_type; - - r = mgr->set_manager_info(mgr, &info); - if (r) - return r; - - r = mgr->apply(mgr); - if (r) - return r; - - return size; -} - -static ssize_t manager_trans_key_value_show(struct omap_overlay_manager *mgr, - char *buf) -{ - struct omap_overlay_manager_info info; - - mgr->get_manager_info(mgr, &info); - - return snprintf(buf, PAGE_SIZE, "%#x\n", info.trans_key); -} - -static ssize_t manager_trans_key_value_store(struct omap_overlay_manager *mgr, - const char *buf, size_t size) -{ - struct omap_overlay_manager_info info; - u32 key_value; - int r; - - r = kstrtouint(buf, 0, &key_value); - if (r) - return r; - - mgr->get_manager_info(mgr, &info); - - info.trans_key = key_value; - - r = mgr->set_manager_info(mgr, &info); - if (r) - return r; - - r = mgr->apply(mgr); - if (r) - return r; - - return size; -} - -static ssize_t manager_trans_key_enabled_show(struct omap_overlay_manager *mgr, - char *buf) -{ - struct omap_overlay_manager_info info; - - mgr->get_manager_info(mgr, &info); - - return snprintf(buf, PAGE_SIZE, "%d\n", info.trans_enabled); -} - -static ssize_t manager_trans_key_enabled_store(struct omap_overlay_manager *mgr, - const char *buf, size_t size) -{ - struct omap_overlay_manager_info info; - bool enable; - int r; - - r = strtobool(buf, &enable); - if (r) - return r; - - mgr->get_manager_info(mgr, &info); - - info.trans_enabled = enable; - - r = mgr->set_manager_info(mgr, &info); - if (r) - return r; - - r = mgr->apply(mgr); - if (r) - return r; - - return size; -} - -static ssize_t manager_alpha_blending_enabled_show( - struct omap_overlay_manager *mgr, char *buf) -{ - struct omap_overlay_manager_info info; - - mgr->get_manager_info(mgr, &info); - - WARN_ON(!dss_has_feature(FEAT_ALPHA_FIXED_ZORDER)); - - return snprintf(buf, PAGE_SIZE, "%d\n", - info.partial_alpha_enabled); -} - -static ssize_t manager_alpha_blending_enabled_store( - struct omap_overlay_manager *mgr, - const char *buf, size_t size) -{ - struct omap_overlay_manager_info info; - bool enable; - int r; - - WARN_ON(!dss_has_feature(FEAT_ALPHA_FIXED_ZORDER)); - - r = strtobool(buf, &enable); - if (r) - return r; - - mgr->get_manager_info(mgr, &info); - - info.partial_alpha_enabled = enable; - - r = mgr->set_manager_info(mgr, &info); - if (r) - return r; - - r = mgr->apply(mgr); - if (r) - return r; - - return size; -} - -static ssize_t manager_cpr_enable_show(struct omap_overlay_manager *mgr, - char *buf) -{ - struct omap_overlay_manager_info info; - - mgr->get_manager_info(mgr, &info); - - return snprintf(buf, PAGE_SIZE, "%d\n", info.cpr_enable); -} - -static ssize_t manager_cpr_enable_store(struct omap_overlay_manager *mgr, - const char *buf, size_t size) -{ - struct omap_overlay_manager_info info; - int r; - bool enable; - - if (!dss_has_feature(FEAT_CPR)) - return -ENODEV; - - r = strtobool(buf, &enable); - if (r) - return r; - - mgr->get_manager_info(mgr, &info); - - if (info.cpr_enable == enable) - return size; - - info.cpr_enable = enable; - - r = mgr->set_manager_info(mgr, &info); - if (r) - return r; - - r = mgr->apply(mgr); - if (r) - return r; - - return size; -} - -static ssize_t manager_cpr_coef_show(struct omap_overlay_manager *mgr, - char *buf) -{ - struct omap_overlay_manager_info info; - - mgr->get_manager_info(mgr, &info); - - return snprintf(buf, PAGE_SIZE, - "%d %d %d %d %d %d %d %d %d\n", - info.cpr_coefs.rr, - info.cpr_coefs.rg, - info.cpr_coefs.rb, - info.cpr_coefs.gr, - info.cpr_coefs.gg, - info.cpr_coefs.gb, - info.cpr_coefs.br, - info.cpr_coefs.bg, - info.cpr_coefs.bb); -} - -static ssize_t manager_cpr_coef_store(struct omap_overlay_manager *mgr, - const char *buf, size_t size) -{ - struct omap_overlay_manager_info info; - struct omap_dss_cpr_coefs coefs; - int r, i; - s16 *arr; - - if (!dss_has_feature(FEAT_CPR)) - return -ENODEV; - - if (sscanf(buf, "%hd %hd %hd %hd %hd %hd %hd %hd %hd", - &coefs.rr, &coefs.rg, &coefs.rb, - &coefs.gr, &coefs.gg, &coefs.gb, - &coefs.br, &coefs.bg, &coefs.bb) != 9) - return -EINVAL; - - arr = (s16[]){ coefs.rr, coefs.rg, coefs.rb, - coefs.gr, coefs.gg, coefs.gb, - coefs.br, coefs.bg, coefs.bb }; - - for (i = 0; i < 9; ++i) { - if (arr[i] < -512 || arr[i] > 511) - return -EINVAL; - } - - mgr->get_manager_info(mgr, &info); - - info.cpr_coefs = coefs; - - r = mgr->set_manager_info(mgr, &info); - if (r) - return r; - - r = mgr->apply(mgr); - if (r) - return r; - - return size; -} - -struct manager_attribute { - struct attribute attr; - ssize_t (*show)(struct omap_overlay_manager *, char *); - ssize_t (*store)(struct omap_overlay_manager *, const char *, size_t); -}; - -#define MANAGER_ATTR(_name, _mode, _show, _store) \ - struct manager_attribute manager_attr_##_name = \ - __ATTR(_name, _mode, _show, _store) - -static MANAGER_ATTR(name, S_IRUGO, manager_name_show, NULL); -static MANAGER_ATTR(display, S_IRUGO|S_IWUSR, - manager_display_show, manager_display_store); -static MANAGER_ATTR(default_color, S_IRUGO|S_IWUSR, - manager_default_color_show, manager_default_color_store); -static MANAGER_ATTR(trans_key_type, S_IRUGO|S_IWUSR, - manager_trans_key_type_show, manager_trans_key_type_store); -static MANAGER_ATTR(trans_key_value, S_IRUGO|S_IWUSR, - manager_trans_key_value_show, manager_trans_key_value_store); -static MANAGER_ATTR(trans_key_enabled, S_IRUGO|S_IWUSR, - manager_trans_key_enabled_show, - manager_trans_key_enabled_store); -static MANAGER_ATTR(alpha_blending_enabled, S_IRUGO|S_IWUSR, - manager_alpha_blending_enabled_show, - manager_alpha_blending_enabled_store); -static MANAGER_ATTR(cpr_enable, S_IRUGO|S_IWUSR, - manager_cpr_enable_show, - manager_cpr_enable_store); -static MANAGER_ATTR(cpr_coef, S_IRUGO|S_IWUSR, - manager_cpr_coef_show, - manager_cpr_coef_store); - - -static struct attribute *manager_sysfs_attrs[] = { - &manager_attr_name.attr, - &manager_attr_display.attr, - &manager_attr_default_color.attr, - &manager_attr_trans_key_type.attr, - &manager_attr_trans_key_value.attr, - &manager_attr_trans_key_enabled.attr, - &manager_attr_alpha_blending_enabled.attr, - &manager_attr_cpr_enable.attr, - &manager_attr_cpr_coef.attr, - NULL -}; - -static ssize_t manager_attr_show(struct kobject *kobj, struct attribute *attr, - char *buf) -{ - struct omap_overlay_manager *manager; - struct manager_attribute *manager_attr; - - manager = container_of(kobj, struct omap_overlay_manager, kobj); - manager_attr = container_of(attr, struct manager_attribute, attr); - - if (!manager_attr->show) - return -ENOENT; - - return manager_attr->show(manager, buf); -} - -static ssize_t manager_attr_store(struct kobject *kobj, struct attribute *attr, - const char *buf, size_t size) -{ - struct omap_overlay_manager *manager; - struct manager_attribute *manager_attr; - - manager = container_of(kobj, struct omap_overlay_manager, kobj); - manager_attr = container_of(attr, struct manager_attribute, attr); - - if (!manager_attr->store) - return -ENOENT; - - return manager_attr->store(manager, buf, size); -} - -static const struct sysfs_ops manager_sysfs_ops = { - .show = manager_attr_show, - .store = manager_attr_store, -}; - -static struct kobj_type manager_ktype = { - .sysfs_ops = &manager_sysfs_ops, - .default_attrs = manager_sysfs_attrs, -}; - -static int dss_mgr_wait_for_vsync(struct omap_overlay_manager *mgr) -{ - unsigned long timeout = msecs_to_jiffies(500); - u32 irq; - - if (mgr->device->type == OMAP_DISPLAY_TYPE_VENC) { - irq = DISPC_IRQ_EVSYNC_ODD; - } else if (mgr->device->type == OMAP_DISPLAY_TYPE_HDMI) { - irq = DISPC_IRQ_EVSYNC_EVEN; - } else { - if (mgr->id == OMAP_DSS_CHANNEL_LCD) - irq = DISPC_IRQ_VSYNC; - else - irq = DISPC_IRQ_VSYNC2; - } - return omap_dispc_wait_for_irq_interruptible_timeout(irq, timeout); -} - -int dss_init_overlay_managers(struct platform_device *pdev) -{ - int i, r; - - num_managers = dss_feat_get_num_mgrs(); - - managers = kzalloc(sizeof(struct omap_overlay_manager) * num_managers, - GFP_KERNEL); - - BUG_ON(managers == NULL); - - for (i = 0; i < num_managers; ++i) { - struct omap_overlay_manager *mgr = &managers[i]; - - switch (i) { - case 0: - mgr->name = "lcd"; - mgr->id = OMAP_DSS_CHANNEL_LCD; - break; - case 1: - mgr->name = "tv"; - mgr->id = OMAP_DSS_CHANNEL_DIGIT; - break; - case 2: - mgr->name = "lcd2"; - mgr->id = OMAP_DSS_CHANNEL_LCD2; - break; - } - - mgr->set_device = &dss_mgr_set_device; - mgr->unset_device = &dss_mgr_unset_device; - mgr->apply = &omap_dss_mgr_apply; - mgr->set_manager_info = &dss_mgr_set_info; - mgr->get_manager_info = &dss_mgr_get_info; - mgr->wait_for_go = &dss_mgr_wait_for_go; - mgr->wait_for_vsync = &dss_mgr_wait_for_vsync; - - mgr->caps = 0; - mgr->supported_displays = - dss_feat_get_supported_displays(mgr->id); - - INIT_LIST_HEAD(&mgr->overlays); - - r = kobject_init_and_add(&mgr->kobj, &manager_ktype, - &pdev->dev.kobj, "manager%d", i); - - if (r) - DSSERR("failed to create sysfs file\n"); - } - - return 0; -} - -void dss_uninit_overlay_managers(struct platform_device *pdev) -{ - int i; - - for (i = 0; i < num_managers; ++i) { - struct omap_overlay_manager *mgr = &managers[i]; - - kobject_del(&mgr->kobj); - kobject_put(&mgr->kobj); - } - - kfree(managers); - managers = NULL; - num_managers = 0; -} - -int omap_dss_get_num_overlay_managers(void) -{ - return num_managers; -} -EXPORT_SYMBOL(omap_dss_get_num_overlay_managers); - -struct omap_overlay_manager *omap_dss_get_overlay_manager(int num) -{ - if (num >= num_managers) - return NULL; - - return &managers[num]; -} -EXPORT_SYMBOL(omap_dss_get_overlay_manager); - -int dss_mgr_simple_check(struct omap_overlay_manager *mgr, - const struct omap_overlay_manager_info *info) -{ - if (dss_has_feature(FEAT_ALPHA_FIXED_ZORDER)) { - /* - * OMAP3 supports only graphics source transparency color key - * and alpha blending simultaneously. See TRM 15.4.2.4.2.2 - * Alpha Mode. - */ - if (info->partial_alpha_enabled && info->trans_enabled - && info->trans_key_type != OMAP_DSS_COLOR_KEY_GFX_DST) { - DSSERR("check_manager: illegal transparency key\n"); - return -EINVAL; - } - } - - return 0; -} - -static int dss_mgr_check_zorder(struct omap_overlay_manager *mgr, - struct omap_overlay_info **overlay_infos) -{ - struct omap_overlay *ovl1, *ovl2; - struct omap_overlay_info *info1, *info2; - - list_for_each_entry(ovl1, &mgr->overlays, list) { - info1 = overlay_infos[ovl1->id]; - - if (info1 == NULL) - continue; - - list_for_each_entry(ovl2, &mgr->overlays, list) { - if (ovl1 == ovl2) - continue; - - info2 = overlay_infos[ovl2->id]; - - if (info2 == NULL) - continue; - - if (info1->zorder == info2->zorder) { - DSSERR("overlays %d and %d have the same " - "zorder %d\n", - ovl1->id, ovl2->id, info1->zorder); - return -EINVAL; - } - } - } - - return 0; -} - -int dss_mgr_check(struct omap_overlay_manager *mgr, - struct omap_dss_device *dssdev, - struct omap_overlay_manager_info *info, - struct omap_overlay_info **overlay_infos) -{ - struct omap_overlay *ovl; - int r; - - if (dss_has_feature(FEAT_ALPHA_FREE_ZORDER)) { - r = dss_mgr_check_zorder(mgr, overlay_infos); - if (r) - return r; - } - - list_for_each_entry(ovl, &mgr->overlays, list) { - struct omap_overlay_info *oi; - int r; - - oi = overlay_infos[ovl->id]; - - if (oi == NULL) - continue; - - r = dss_ovl_check(ovl, oi, dssdev); - if (r) - return r; - } - - return 0; -} diff --git a/drivers/video/omap2/dss/overlay.c b/drivers/video/omap2/dss/overlay.c deleted file mode 100644 index 6e821810dee..00000000000 --- a/drivers/video/omap2/dss/overlay.c +++ /dev/null @@ -1,675 +0,0 @@ -/* - * linux/drivers/video/omap2/dss/overlay.c - * - * Copyright (C) 2009 Nokia Corporation - * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com> - * - * Some code and ideas taken from drivers/video/omap/ driver - * by Imre Deak. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program. If not, see <http://www.gnu.org/licenses/>. - */ - -#define DSS_SUBSYS_NAME "OVERLAY" - -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/err.h> -#include <linux/sysfs.h> -#include <linux/kobject.h> -#include <linux/platform_device.h> -#include <linux/delay.h> -#include <linux/slab.h> - -#include <video/omapdss.h> -#include <plat/cpu.h> - -#include "dss.h" -#include "dss_features.h" - -static int num_overlays; -static struct omap_overlay *overlays; - -static ssize_t overlay_name_show(struct omap_overlay *ovl, char *buf) -{ - return snprintf(buf, PAGE_SIZE, "%s\n", ovl->name); -} - -static ssize_t overlay_manager_show(struct omap_overlay *ovl, char *buf) -{ - return snprintf(buf, PAGE_SIZE, "%s\n", - ovl->manager ? ovl->manager->name : "<none>"); -} - -static ssize_t overlay_manager_store(struct omap_overlay *ovl, const char *buf, - size_t size) -{ - int i, r; - struct omap_overlay_manager *mgr = NULL; - struct omap_overlay_manager *old_mgr; - int len = size; - - if (buf[size-1] == '\n') - --len; - - if (len > 0) { - for (i = 0; i < omap_dss_get_num_overlay_managers(); ++i) { - mgr = omap_dss_get_overlay_manager(i); - - if (sysfs_streq(buf, mgr->name)) - break; - - mgr = NULL; - } - } - - if (len > 0 && mgr == NULL) - return -EINVAL; - - if (mgr) - DSSDBG("manager %s found\n", mgr->name); - - if (mgr == ovl->manager) - return size; - - old_mgr = ovl->manager; - - r = dispc_runtime_get(); - if (r) - return r; - - /* detach old manager */ - if (old_mgr) { - r = ovl->unset_manager(ovl); - if (r) { - DSSERR("detach failed\n"); - goto err; - } - - r = old_mgr->apply(old_mgr); - if (r) - goto err; - } - - if (mgr) { - r = ovl->set_manager(ovl, mgr); - if (r) { - DSSERR("Failed to attach overlay\n"); - goto err; - } - - r = mgr->apply(mgr); - if (r) - goto err; - } - - dispc_runtime_put(); - - return size; - -err: - dispc_runtime_put(); - return r; -} - -static ssize_t overlay_input_size_show(struct omap_overlay *ovl, char *buf) -{ - struct omap_overlay_info info; - - ovl->get_overlay_info(ovl, &info); - - return snprintf(buf, PAGE_SIZE, "%d,%d\n", - info.width, info.height); -} - -static ssize_t overlay_screen_width_show(struct omap_overlay *ovl, char *buf) -{ - struct omap_overlay_info info; - - ovl->get_overlay_info(ovl, &info); - - return snprintf(buf, PAGE_SIZE, "%d\n", info.screen_width); -} - -static ssize_t overlay_position_show(struct omap_overlay *ovl, char *buf) -{ - struct omap_overlay_info info; - - ovl->get_overlay_info(ovl, &info); - - return snprintf(buf, PAGE_SIZE, "%d,%d\n", - info.pos_x, info.pos_y); -} - -static ssize_t overlay_position_store(struct omap_overlay *ovl, - const char *buf, size_t size) -{ - int r; - char *last; - struct omap_overlay_info info; - - ovl->get_overlay_info(ovl, &info); - - info.pos_x = simple_strtoul(buf, &last, 10); - ++last; - if (last - buf >= size) - return -EINVAL; - - info.pos_y = simple_strtoul(last, &last, 10); - - r = ovl->set_overlay_info(ovl, &info); - if (r) - return r; - - if (ovl->manager) { - r = ovl->manager->apply(ovl->manager); - if (r) - return r; - } - - return size; -} - -static ssize_t overlay_output_size_show(struct omap_overlay *ovl, char *buf) -{ - struct omap_overlay_info info; - - ovl->get_overlay_info(ovl, &info); - - return snprintf(buf, PAGE_SIZE, "%d,%d\n", - info.out_width, info.out_height); -} - -static ssize_t overlay_output_size_store(struct omap_overlay *ovl, - const char *buf, size_t size) -{ - int r; - char *last; - struct omap_overlay_info info; - - ovl->get_overlay_info(ovl, &info); - - info.out_width = simple_strtoul(buf, &last, 10); - ++last; - if (last - buf >= size) - return -EINVAL; - - info.out_height = simple_strtoul(last, &last, 10); - - r = ovl->set_overlay_info(ovl, &info); - if (r) - return r; - - if (ovl->manager) { - r = ovl->manager->apply(ovl->manager); - if (r) - return r; - } - - return size; -} - -static ssize_t overlay_enabled_show(struct omap_overlay *ovl, char *buf) -{ - return snprintf(buf, PAGE_SIZE, "%d\n", ovl->is_enabled(ovl)); -} - -static ssize_t overlay_enabled_store(struct omap_overlay *ovl, const char *buf, - size_t size) -{ - int r; - bool enable; - - r = strtobool(buf, &enable); - if (r) - return r; - - if (enable) - r = ovl->enable(ovl); - else - r = ovl->disable(ovl); - - if (r) - return r; - - return size; -} - -static ssize_t overlay_global_alpha_show(struct omap_overlay *ovl, char *buf) -{ - struct omap_overlay_info info; - - ovl->get_overlay_info(ovl, &info); - - return snprintf(buf, PAGE_SIZE, "%d\n", - info.global_alpha); -} - -static ssize_t overlay_global_alpha_store(struct omap_overlay *ovl, - const char *buf, size_t size) -{ - int r; - u8 alpha; - struct omap_overlay_info info; - - if ((ovl->caps & OMAP_DSS_OVL_CAP_GLOBAL_ALPHA) == 0) - return -ENODEV; - - r = kstrtou8(buf, 0, &alpha); - if (r) - return r; - - ovl->get_overlay_info(ovl, &info); - - info.global_alpha = alpha; - - r = ovl->set_overlay_info(ovl, &info); - if (r) - return r; - - if (ovl->manager) { - r = ovl->manager->apply(ovl->manager); - if (r) - return r; - } - - return size; -} - -static ssize_t overlay_pre_mult_alpha_show(struct omap_overlay *ovl, - char *buf) -{ - struct omap_overlay_info info; - - ovl->get_overlay_info(ovl, &info); - - return snprintf(buf, PAGE_SIZE, "%d\n", - info.pre_mult_alpha); -} - -static ssize_t overlay_pre_mult_alpha_store(struct omap_overlay *ovl, - const char *buf, size_t size) -{ - int r; - u8 alpha; - struct omap_overlay_info info; - - if ((ovl->caps & OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA) == 0) - return -ENODEV; - - r = kstrtou8(buf, 0, &alpha); - if (r) - return r; - - ovl->get_overlay_info(ovl, &info); - - info.pre_mult_alpha = alpha; - - r = ovl->set_overlay_info(ovl, &info); - if (r) - return r; - - if (ovl->manager) { - r = ovl->manager->apply(ovl->manager); - if (r) - return r; - } - - return size; -} - -static ssize_t overlay_zorder_show(struct omap_overlay *ovl, char *buf) -{ - struct omap_overlay_info info; - - ovl->get_overlay_info(ovl, &info); - - return snprintf(buf, PAGE_SIZE, "%d\n", info.zorder); -} - -static ssize_t overlay_zorder_store(struct omap_overlay *ovl, - const char *buf, size_t size) -{ - int r; - u8 zorder; - struct omap_overlay_info info; - - if ((ovl->caps & OMAP_DSS_OVL_CAP_ZORDER) == 0) - return -ENODEV; - - r = kstrtou8(buf, 0, &zorder); - if (r) - return r; - - ovl->get_overlay_info(ovl, &info); - - info.zorder = zorder; - - r = ovl->set_overlay_info(ovl, &info); - if (r) - return r; - - if (ovl->manager) { - r = ovl->manager->apply(ovl->manager); - if (r) - return r; - } - - return size; -} - -struct overlay_attribute { - struct attribute attr; - ssize_t (*show)(struct omap_overlay *, char *); - ssize_t (*store)(struct omap_overlay *, const char *, size_t); -}; - -#define OVERLAY_ATTR(_name, _mode, _show, _store) \ - struct overlay_attribute overlay_attr_##_name = \ - __ATTR(_name, _mode, _show, _store) - -static OVERLAY_ATTR(name, S_IRUGO, overlay_name_show, NULL); -static OVERLAY_ATTR(manager, S_IRUGO|S_IWUSR, - overlay_manager_show, overlay_manager_store); -static OVERLAY_ATTR(input_size, S_IRUGO, overlay_input_size_show, NULL); -static OVERLAY_ATTR(screen_width, S_IRUGO, overlay_screen_width_show, NULL); -static OVERLAY_ATTR(position, S_IRUGO|S_IWUSR, - overlay_position_show, overlay_position_store); -static OVERLAY_ATTR(output_size, S_IRUGO|S_IWUSR, - overlay_output_size_show, overlay_output_size_store); -static OVERLAY_ATTR(enabled, S_IRUGO|S_IWUSR, - overlay_enabled_show, overlay_enabled_store); -static OVERLAY_ATTR(global_alpha, S_IRUGO|S_IWUSR, - overlay_global_alpha_show, overlay_global_alpha_store); -static OVERLAY_ATTR(pre_mult_alpha, S_IRUGO|S_IWUSR, - overlay_pre_mult_alpha_show, - overlay_pre_mult_alpha_store); -static OVERLAY_ATTR(zorder, S_IRUGO|S_IWUSR, - overlay_zorder_show, overlay_zorder_store); - -static struct attribute *overlay_sysfs_attrs[] = { - &overlay_attr_name.attr, - &overlay_attr_manager.attr, - &overlay_attr_input_size.attr, - &overlay_attr_screen_width.attr, - &overlay_attr_position.attr, - &overlay_attr_output_size.attr, - &overlay_attr_enabled.attr, - &overlay_attr_global_alpha.attr, - &overlay_attr_pre_mult_alpha.attr, - &overlay_attr_zorder.attr, - NULL -}; - -static ssize_t overlay_attr_show(struct kobject *kobj, struct attribute *attr, - char *buf) -{ - struct omap_overlay *overlay; - struct overlay_attribute *overlay_attr; - - overlay = container_of(kobj, struct omap_overlay, kobj); - overlay_attr = container_of(attr, struct overlay_attribute, attr); - - if (!overlay_attr->show) - return -ENOENT; - - return overlay_attr->show(overlay, buf); -} - -static ssize_t overlay_attr_store(struct kobject *kobj, struct attribute *attr, - const char *buf, size_t size) -{ - struct omap_overlay *overlay; - struct overlay_attribute *overlay_attr; - - overlay = container_of(kobj, struct omap_overlay, kobj); - overlay_attr = container_of(attr, struct overlay_attribute, attr); - - if (!overlay_attr->store) - return -ENOENT; - - return overlay_attr->store(overlay, buf, size); -} - -static const struct sysfs_ops overlay_sysfs_ops = { - .show = overlay_attr_show, - .store = overlay_attr_store, -}; - -static struct kobj_type overlay_ktype = { - .sysfs_ops = &overlay_sysfs_ops, - .default_attrs = overlay_sysfs_attrs, -}; - -int omap_dss_get_num_overlays(void) -{ - return num_overlays; -} -EXPORT_SYMBOL(omap_dss_get_num_overlays); - -struct omap_overlay *omap_dss_get_overlay(int num) -{ - if (num >= num_overlays) - return NULL; - - return &overlays[num]; -} -EXPORT_SYMBOL(omap_dss_get_overlay); - -void dss_init_overlays(struct platform_device *pdev) -{ - int i, r; - - num_overlays = dss_feat_get_num_ovls(); - - overlays = kzalloc(sizeof(struct omap_overlay) * num_overlays, - GFP_KERNEL); - - BUG_ON(overlays == NULL); - - for (i = 0; i < num_overlays; ++i) { - struct omap_overlay *ovl = &overlays[i]; - - switch (i) { - case 0: - ovl->name = "gfx"; - ovl->id = OMAP_DSS_GFX; - break; - case 1: - ovl->name = "vid1"; - ovl->id = OMAP_DSS_VIDEO1; - break; - case 2: - ovl->name = "vid2"; - ovl->id = OMAP_DSS_VIDEO2; - break; - case 3: - ovl->name = "vid3"; - ovl->id = OMAP_DSS_VIDEO3; - break; - } - - ovl->is_enabled = &dss_ovl_is_enabled; - ovl->enable = &dss_ovl_enable; - ovl->disable = &dss_ovl_disable; - ovl->set_manager = &dss_ovl_set_manager; - ovl->unset_manager = &dss_ovl_unset_manager; - ovl->set_overlay_info = &dss_ovl_set_info; - ovl->get_overlay_info = &dss_ovl_get_info; - ovl->wait_for_go = &dss_mgr_wait_for_go_ovl; - - ovl->caps = dss_feat_get_overlay_caps(ovl->id); - ovl->supported_modes = - dss_feat_get_supported_color_modes(ovl->id); - - r = kobject_init_and_add(&ovl->kobj, &overlay_ktype, - &pdev->dev.kobj, "overlay%d", i); - - if (r) - DSSERR("failed to create sysfs file\n"); - } -} - -/* connect overlays to the new device, if not already connected. if force - * selected, connect always. */ -void dss_recheck_connections(struct omap_dss_device *dssdev, bool force) -{ - int i; - struct omap_overlay_manager *lcd_mgr; - struct omap_overlay_manager *tv_mgr; - struct omap_overlay_manager *lcd2_mgr = NULL; - struct omap_overlay_manager *mgr = NULL; - - lcd_mgr = omap_dss_get_overlay_manager(OMAP_DSS_OVL_MGR_LCD); - tv_mgr = omap_dss_get_overlay_manager(OMAP_DSS_OVL_MGR_TV); - if (dss_has_feature(FEAT_MGR_LCD2)) - lcd2_mgr = omap_dss_get_overlay_manager(OMAP_DSS_OVL_MGR_LCD2); - - if (dssdev->channel == OMAP_DSS_CHANNEL_LCD2) { - if (!lcd2_mgr->device || force) { - if (lcd2_mgr->device) - lcd2_mgr->unset_device(lcd2_mgr); - lcd2_mgr->set_device(lcd2_mgr, dssdev); - mgr = lcd2_mgr; - } - } else if (dssdev->type != OMAP_DISPLAY_TYPE_VENC - && dssdev->type != OMAP_DISPLAY_TYPE_HDMI) { - if (!lcd_mgr->device || force) { - if (lcd_mgr->device) - lcd_mgr->unset_device(lcd_mgr); - lcd_mgr->set_device(lcd_mgr, dssdev); - mgr = lcd_mgr; - } - } - - if (dssdev->type == OMAP_DISPLAY_TYPE_VENC - || dssdev->type == OMAP_DISPLAY_TYPE_HDMI) { - if (!tv_mgr->device || force) { - if (tv_mgr->device) - tv_mgr->unset_device(tv_mgr); - tv_mgr->set_device(tv_mgr, dssdev); - mgr = tv_mgr; - } - } - - if (mgr) { - dispc_runtime_get(); - - for (i = 0; i < dss_feat_get_num_ovls(); i++) { - struct omap_overlay *ovl; - ovl = omap_dss_get_overlay(i); - if (!ovl->manager || force) { - if (ovl->manager) - ovl->unset_manager(ovl); - ovl->set_manager(ovl, mgr); - } - } - - dispc_runtime_put(); - } -} - -void dss_uninit_overlays(struct platform_device *pdev) -{ - int i; - - for (i = 0; i < num_overlays; ++i) { - struct omap_overlay *ovl = &overlays[i]; - - kobject_del(&ovl->kobj); - kobject_put(&ovl->kobj); - } - - kfree(overlays); - overlays = NULL; - num_overlays = 0; -} - -int dss_ovl_simple_check(struct omap_overlay *ovl, - const struct omap_overlay_info *info) -{ - if (info->paddr == 0) { - DSSERR("check_overlay: paddr cannot be 0\n"); - return -EINVAL; - } - - if ((ovl->caps & OMAP_DSS_OVL_CAP_SCALE) == 0) { - if (info->out_width != 0 && info->width != info->out_width) { - DSSERR("check_overlay: overlay %d doesn't support " - "scaling\n", ovl->id); - return -EINVAL; - } - - if (info->out_height != 0 && info->height != info->out_height) { - DSSERR("check_overlay: overlay %d doesn't support " - "scaling\n", ovl->id); - return -EINVAL; - } - } - - if ((ovl->supported_modes & info->color_mode) == 0) { - DSSERR("check_overlay: overlay %d doesn't support mode %d\n", - ovl->id, info->color_mode); - return -EINVAL; - } - - if (info->zorder >= omap_dss_get_num_overlays()) { - DSSERR("check_overlay: zorder %d too high\n", info->zorder); - return -EINVAL; - } - - return 0; -} - -int dss_ovl_check(struct omap_overlay *ovl, - struct omap_overlay_info *info, struct omap_dss_device *dssdev) -{ - u16 outw, outh; - u16 dw, dh; - - if (dssdev == NULL) - return 0; - - dssdev->driver->get_resolution(dssdev, &dw, &dh); - - if ((ovl->caps & OMAP_DSS_OVL_CAP_SCALE) == 0) { - outw = info->width; - outh = info->height; - } else { - if (info->out_width == 0) - outw = info->width; - else - outw = info->out_width; - - if (info->out_height == 0) - outh = info->height; - else - outh = info->out_height; - } - - if (dw < info->pos_x + outw) { - DSSERR("overlay %d horizontally not inside the display area " - "(%d + %d >= %d)\n", - ovl->id, info->pos_x, outw, dw); - return -EINVAL; - } - - if (dh < info->pos_y + outh) { - DSSERR("overlay %d vertically not inside the display area " - "(%d + %d >= %d)\n", - ovl->id, info->pos_y, outh, dh); - return -EINVAL; - } - - return 0; -} diff --git a/drivers/video/omap2/dss/rfbi.c b/drivers/video/omap2/dss/rfbi.c deleted file mode 100644 index 55f398014f3..00000000000 --- a/drivers/video/omap2/dss/rfbi.c +++ /dev/null @@ -1,1029 +0,0 @@ -/* - * linux/drivers/video/omap2/dss/rfbi.c - * - * Copyright (C) 2009 Nokia Corporation - * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com> - * - * Some code and ideas taken from drivers/video/omap/ driver - * by Imre Deak. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program. If not, see <http://www.gnu.org/licenses/>. - */ - -#define DSS_SUBSYS_NAME "RFBI" - -#include <linux/kernel.h> -#include <linux/dma-mapping.h> -#include <linux/export.h> -#include <linux/vmalloc.h> -#include <linux/clk.h> -#include <linux/io.h> -#include <linux/delay.h> -#include <linux/kfifo.h> -#include <linux/ktime.h> -#include <linux/hrtimer.h> -#include <linux/seq_file.h> -#include <linux/semaphore.h> -#include <linux/platform_device.h> -#include <linux/pm_runtime.h> - -#include <video/omapdss.h> -#include "dss.h" - -struct rfbi_reg { u16 idx; }; - -#define RFBI_REG(idx) ((const struct rfbi_reg) { idx }) - -#define RFBI_REVISION RFBI_REG(0x0000) -#define RFBI_SYSCONFIG RFBI_REG(0x0010) -#define RFBI_SYSSTATUS RFBI_REG(0x0014) -#define RFBI_CONTROL RFBI_REG(0x0040) -#define RFBI_PIXEL_CNT RFBI_REG(0x0044) -#define RFBI_LINE_NUMBER RFBI_REG(0x0048) -#define RFBI_CMD RFBI_REG(0x004c) -#define RFBI_PARAM RFBI_REG(0x0050) -#define RFBI_DATA RFBI_REG(0x0054) -#define RFBI_READ RFBI_REG(0x0058) -#define RFBI_STATUS RFBI_REG(0x005c) - -#define RFBI_CONFIG(n) RFBI_REG(0x0060 + (n)*0x18) -#define RFBI_ONOFF_TIME(n) RFBI_REG(0x0064 + (n)*0x18) -#define RFBI_CYCLE_TIME(n) RFBI_REG(0x0068 + (n)*0x18) -#define RFBI_DATA_CYCLE1(n) RFBI_REG(0x006c + (n)*0x18) -#define RFBI_DATA_CYCLE2(n) RFBI_REG(0x0070 + (n)*0x18) -#define RFBI_DATA_CYCLE3(n) RFBI_REG(0x0074 + (n)*0x18) - -#define RFBI_VSYNC_WIDTH RFBI_REG(0x0090) -#define RFBI_HSYNC_WIDTH RFBI_REG(0x0094) - -#define REG_FLD_MOD(idx, val, start, end) \ - rfbi_write_reg(idx, FLD_MOD(rfbi_read_reg(idx), val, start, end)) - -enum omap_rfbi_cycleformat { - OMAP_DSS_RFBI_CYCLEFORMAT_1_1 = 0, - OMAP_DSS_RFBI_CYCLEFORMAT_2_1 = 1, - OMAP_DSS_RFBI_CYCLEFORMAT_3_1 = 2, - OMAP_DSS_RFBI_CYCLEFORMAT_3_2 = 3, -}; - -enum omap_rfbi_datatype { - OMAP_DSS_RFBI_DATATYPE_12 = 0, - OMAP_DSS_RFBI_DATATYPE_16 = 1, - OMAP_DSS_RFBI_DATATYPE_18 = 2, - OMAP_DSS_RFBI_DATATYPE_24 = 3, -}; - -enum omap_rfbi_parallelmode { - OMAP_DSS_RFBI_PARALLELMODE_8 = 0, - OMAP_DSS_RFBI_PARALLELMODE_9 = 1, - OMAP_DSS_RFBI_PARALLELMODE_12 = 2, - OMAP_DSS_RFBI_PARALLELMODE_16 = 3, -}; - -static int rfbi_convert_timings(struct rfbi_timings *t); -static void rfbi_get_clk_info(u32 *clk_period, u32 *max_clk_div); - -static struct { - struct platform_device *pdev; - void __iomem *base; - - unsigned long l4_khz; - - enum omap_rfbi_datatype datatype; - enum omap_rfbi_parallelmode parallelmode; - - enum omap_rfbi_te_mode te_mode; - int te_enabled; - - void (*framedone_callback)(void *data); - void *framedone_callback_data; - - struct omap_dss_device *dssdev[2]; - - struct semaphore bus_lock; -} rfbi; - -static inline void rfbi_write_reg(const struct rfbi_reg idx, u32 val) -{ - __raw_writel(val, rfbi.base + idx.idx); -} - -static inline u32 rfbi_read_reg(const struct rfbi_reg idx) -{ - return __raw_readl(rfbi.base + idx.idx); -} - -static int rfbi_runtime_get(void) -{ - int r; - - DSSDBG("rfbi_runtime_get\n"); - - r = pm_runtime_get_sync(&rfbi.pdev->dev); - WARN_ON(r < 0); - return r < 0 ? r : 0; -} - -static void rfbi_runtime_put(void) -{ - int r; - - DSSDBG("rfbi_runtime_put\n"); - - r = pm_runtime_put_sync(&rfbi.pdev->dev); - WARN_ON(r < 0); -} - -void rfbi_bus_lock(void) -{ - down(&rfbi.bus_lock); -} -EXPORT_SYMBOL(rfbi_bus_lock); - -void rfbi_bus_unlock(void) -{ - up(&rfbi.bus_lock); -} -EXPORT_SYMBOL(rfbi_bus_unlock); - -void omap_rfbi_write_command(const void *buf, u32 len) -{ - switch (rfbi.parallelmode) { - case OMAP_DSS_RFBI_PARALLELMODE_8: - { - const u8 *b = buf; - for (; len; len--) - rfbi_write_reg(RFBI_CMD, *b++); - break; - } - - case OMAP_DSS_RFBI_PARALLELMODE_16: - { - const u16 *w = buf; - BUG_ON(len & 1); - for (; len; len -= 2) - rfbi_write_reg(RFBI_CMD, *w++); - break; - } - - case OMAP_DSS_RFBI_PARALLELMODE_9: - case OMAP_DSS_RFBI_PARALLELMODE_12: - default: - BUG(); - } -} -EXPORT_SYMBOL(omap_rfbi_write_command); - -void omap_rfbi_read_data(void *buf, u32 len) -{ - switch (rfbi.parallelmode) { - case OMAP_DSS_RFBI_PARALLELMODE_8: - { - u8 *b = buf; - for (; len; len--) { - rfbi_write_reg(RFBI_READ, 0); - *b++ = rfbi_read_reg(RFBI_READ); - } - break; - } - - case OMAP_DSS_RFBI_PARALLELMODE_16: - { - u16 *w = buf; - BUG_ON(len & ~1); - for (; len; len -= 2) { - rfbi_write_reg(RFBI_READ, 0); - *w++ = rfbi_read_reg(RFBI_READ); - } - break; - } - - case OMAP_DSS_RFBI_PARALLELMODE_9: - case OMAP_DSS_RFBI_PARALLELMODE_12: - default: - BUG(); - } -} -EXPORT_SYMBOL(omap_rfbi_read_data); - -void omap_rfbi_write_data(const void *buf, u32 len) -{ - switch (rfbi.parallelmode) { - case OMAP_DSS_RFBI_PARALLELMODE_8: - { - const u8 *b = buf; - for (; len; len--) - rfbi_write_reg(RFBI_PARAM, *b++); - break; - } - - case OMAP_DSS_RFBI_PARALLELMODE_16: - { - const u16 *w = buf; - BUG_ON(len & 1); - for (; len; len -= 2) - rfbi_write_reg(RFBI_PARAM, *w++); - break; - } - - case OMAP_DSS_RFBI_PARALLELMODE_9: - case OMAP_DSS_RFBI_PARALLELMODE_12: - default: - BUG(); - - } -} -EXPORT_SYMBOL(omap_rfbi_write_data); - -void omap_rfbi_write_pixels(const void __iomem *buf, int scr_width, - u16 x, u16 y, - u16 w, u16 h) -{ - int start_offset = scr_width * y + x; - int horiz_offset = scr_width - w; - int i; - - if (rfbi.datatype == OMAP_DSS_RFBI_DATATYPE_16 && - rfbi.parallelmode == OMAP_DSS_RFBI_PARALLELMODE_8) { - const u16 __iomem *pd = buf; - pd += start_offset; - - for (; h; --h) { - for (i = 0; i < w; ++i) { - const u8 __iomem *b = (const u8 __iomem *)pd; - rfbi_write_reg(RFBI_PARAM, __raw_readb(b+1)); - rfbi_write_reg(RFBI_PARAM, __raw_readb(b+0)); - ++pd; - } - pd += horiz_offset; - } - } else if (rfbi.datatype == OMAP_DSS_RFBI_DATATYPE_24 && - rfbi.parallelmode == OMAP_DSS_RFBI_PARALLELMODE_8) { - const u32 __iomem *pd = buf; - pd += start_offset; - - for (; h; --h) { - for (i = 0; i < w; ++i) { - const u8 __iomem *b = (const u8 __iomem *)pd; - rfbi_write_reg(RFBI_PARAM, __raw_readb(b+2)); - rfbi_write_reg(RFBI_PARAM, __raw_readb(b+1)); - rfbi_write_reg(RFBI_PARAM, __raw_readb(b+0)); - ++pd; - } - pd += horiz_offset; - } - } else if (rfbi.datatype == OMAP_DSS_RFBI_DATATYPE_16 && - rfbi.parallelmode == OMAP_DSS_RFBI_PARALLELMODE_16) { - const u16 __iomem *pd = buf; - pd += start_offset; - - for (; h; --h) { - for (i = 0; i < w; ++i) { - rfbi_write_reg(RFBI_PARAM, __raw_readw(pd)); - ++pd; - } - pd += horiz_offset; - } - } else { - BUG(); - } -} -EXPORT_SYMBOL(omap_rfbi_write_pixels); - -static void rfbi_transfer_area(struct omap_dss_device *dssdev, u16 width, - u16 height, void (*callback)(void *data), void *data) -{ - u32 l; - - /*BUG_ON(callback == 0);*/ - BUG_ON(rfbi.framedone_callback != NULL); - - DSSDBG("rfbi_transfer_area %dx%d\n", width, height); - - dispc_mgr_set_lcd_size(dssdev->manager->id, width, height); - - dispc_mgr_enable(dssdev->manager->id, true); - - rfbi.framedone_callback = callback; - rfbi.framedone_callback_data = data; - - rfbi_write_reg(RFBI_PIXEL_CNT, width * height); - - l = rfbi_read_reg(RFBI_CONTROL); - l = FLD_MOD(l, 1, 0, 0); /* enable */ - if (!rfbi.te_enabled) - l = FLD_MOD(l, 1, 4, 4); /* ITE */ - - rfbi_write_reg(RFBI_CONTROL, l); -} - -static void framedone_callback(void *data, u32 mask) -{ - void (*callback)(void *data); - - DSSDBG("FRAMEDONE\n"); - - REG_FLD_MOD(RFBI_CONTROL, 0, 0, 0); - - callback = rfbi.framedone_callback; - rfbi.framedone_callback = NULL; - - if (callback != NULL) - callback(rfbi.framedone_callback_data); -} - -#if 1 /* VERBOSE */ -static void rfbi_print_timings(void) -{ - u32 l; - u32 time; - - l = rfbi_read_reg(RFBI_CONFIG(0)); - time = 1000000000 / rfbi.l4_khz; - if (l & (1 << 4)) - time *= 2; - - DSSDBG("Tick time %u ps\n", time); - l = rfbi_read_reg(RFBI_ONOFF_TIME(0)); - DSSDBG("CSONTIME %d, CSOFFTIME %d, WEONTIME %d, WEOFFTIME %d, " - "REONTIME %d, REOFFTIME %d\n", - l & 0x0f, (l >> 4) & 0x3f, (l >> 10) & 0x0f, (l >> 14) & 0x3f, - (l >> 20) & 0x0f, (l >> 24) & 0x3f); - - l = rfbi_read_reg(RFBI_CYCLE_TIME(0)); - DSSDBG("WECYCLETIME %d, RECYCLETIME %d, CSPULSEWIDTH %d, " - "ACCESSTIME %d\n", - (l & 0x3f), (l >> 6) & 0x3f, (l >> 12) & 0x3f, - (l >> 22) & 0x3f); -} -#else -static void rfbi_print_timings(void) {} -#endif - - - - -static u32 extif_clk_period; - -static inline unsigned long round_to_extif_ticks(unsigned long ps, int div) -{ - int bus_tick = extif_clk_period * div; - return (ps + bus_tick - 1) / bus_tick * bus_tick; -} - -static int calc_reg_timing(struct rfbi_timings *t, int div) -{ - t->clk_div = div; - - t->cs_on_time = round_to_extif_ticks(t->cs_on_time, div); - - t->we_on_time = round_to_extif_ticks(t->we_on_time, div); - t->we_off_time = round_to_extif_ticks(t->we_off_time, div); - t->we_cycle_time = round_to_extif_ticks(t->we_cycle_time, div); - - t->re_on_time = round_to_extif_ticks(t->re_on_time, div); - t->re_off_time = round_to_extif_ticks(t->re_off_time, div); - t->re_cycle_time = round_to_extif_ticks(t->re_cycle_time, div); - - t->access_time = round_to_extif_ticks(t->access_time, div); - t->cs_off_time = round_to_extif_ticks(t->cs_off_time, div); - t->cs_pulse_width = round_to_extif_ticks(t->cs_pulse_width, div); - - DSSDBG("[reg]cson %d csoff %d reon %d reoff %d\n", - t->cs_on_time, t->cs_off_time, t->re_on_time, t->re_off_time); - DSSDBG("[reg]weon %d weoff %d recyc %d wecyc %d\n", - t->we_on_time, t->we_off_time, t->re_cycle_time, - t->we_cycle_time); - DSSDBG("[reg]rdaccess %d cspulse %d\n", - t->access_time, t->cs_pulse_width); - - return rfbi_convert_timings(t); -} - -static int calc_extif_timings(struct rfbi_timings *t) -{ - u32 max_clk_div; - int div; - - rfbi_get_clk_info(&extif_clk_period, &max_clk_div); - for (div = 1; div <= max_clk_div; div++) { - if (calc_reg_timing(t, div) == 0) - break; - } - - if (div <= max_clk_div) - return 0; - - DSSERR("can't setup timings\n"); - return -1; -} - - -static void rfbi_set_timings(int rfbi_module, struct rfbi_timings *t) -{ - int r; - - if (!t->converted) { - r = calc_extif_timings(t); - if (r < 0) - DSSERR("Failed to calc timings\n"); - } - - BUG_ON(!t->converted); - - rfbi_write_reg(RFBI_ONOFF_TIME(rfbi_module), t->tim[0]); - rfbi_write_reg(RFBI_CYCLE_TIME(rfbi_module), t->tim[1]); - - /* TIMEGRANULARITY */ - REG_FLD_MOD(RFBI_CONFIG(rfbi_module), - (t->tim[2] ? 1 : 0), 4, 4); - - rfbi_print_timings(); -} - -static int ps_to_rfbi_ticks(int time, int div) -{ - unsigned long tick_ps; - int ret; - - /* Calculate in picosecs to yield more exact results */ - tick_ps = 1000000000 / (rfbi.l4_khz) * div; - - ret = (time + tick_ps - 1) / tick_ps; - - return ret; -} - -static void rfbi_get_clk_info(u32 *clk_period, u32 *max_clk_div) -{ - *clk_period = 1000000000 / rfbi.l4_khz; - *max_clk_div = 2; -} - -static int rfbi_convert_timings(struct rfbi_timings *t) -{ - u32 l; - int reon, reoff, weon, weoff, cson, csoff, cs_pulse; - int actim, recyc, wecyc; - int div = t->clk_div; - - if (div <= 0 || div > 2) - return -1; - - /* Make sure that after conversion it still holds that: - * weoff > weon, reoff > reon, recyc >= reoff, wecyc >= weoff, - * csoff > cson, csoff >= max(weoff, reoff), actim > reon - */ - weon = ps_to_rfbi_ticks(t->we_on_time, div); - weoff = ps_to_rfbi_ticks(t->we_off_time, div); - if (weoff <= weon) - weoff = weon + 1; - if (weon > 0x0f) - return -1; - if (weoff > 0x3f) - return -1; - - reon = ps_to_rfbi_ticks(t->re_on_time, div); - reoff = ps_to_rfbi_ticks(t->re_off_time, div); - if (reoff <= reon) - reoff = reon + 1; - if (reon > 0x0f) - return -1; - if (reoff > 0x3f) - return -1; - - cson = ps_to_rfbi_ticks(t->cs_on_time, div); - csoff = ps_to_rfbi_ticks(t->cs_off_time, div); - if (csoff <= cson) - csoff = cson + 1; - if (csoff < max(weoff, reoff)) - csoff = max(weoff, reoff); - if (cson > 0x0f) - return -1; - if (csoff > 0x3f) - return -1; - - l = cson; - l |= csoff << 4; - l |= weon << 10; - l |= weoff << 14; - l |= reon << 20; - l |= reoff << 24; - - t->tim[0] = l; - - actim = ps_to_rfbi_ticks(t->access_time, div); - if (actim <= reon) - actim = reon + 1; - if (actim > 0x3f) - return -1; - - wecyc = ps_to_rfbi_ticks(t->we_cycle_time, div); - if (wecyc < weoff) - wecyc = weoff; - if (wecyc > 0x3f) - return -1; - - recyc = ps_to_rfbi_ticks(t->re_cycle_time, div); - if (recyc < reoff) - recyc = reoff; - if (recyc > 0x3f) - return -1; - - cs_pulse = ps_to_rfbi_ticks(t->cs_pulse_width, div); - if (cs_pulse > 0x3f) - return -1; - - l = wecyc; - l |= recyc << 6; - l |= cs_pulse << 12; - l |= actim << 22; - - t->tim[1] = l; - - t->tim[2] = div - 1; - - t->converted = 1; - - return 0; -} - -/* xxx FIX module selection missing */ -int omap_rfbi_setup_te(enum omap_rfbi_te_mode mode, - unsigned hs_pulse_time, unsigned vs_pulse_time, - int hs_pol_inv, int vs_pol_inv, int extif_div) -{ - int hs, vs; - int min; - u32 l; - - hs = ps_to_rfbi_ticks(hs_pulse_time, 1); - vs = ps_to_rfbi_ticks(vs_pulse_time, 1); - if (hs < 2) - return -EDOM; - if (mode == OMAP_DSS_RFBI_TE_MODE_2) - min = 2; - else /* OMAP_DSS_RFBI_TE_MODE_1 */ - min = 4; - if (vs < min) - return -EDOM; - if (vs == hs) - return -EINVAL; - rfbi.te_mode = mode; - DSSDBG("setup_te: mode %d hs %d vs %d hs_inv %d vs_inv %d\n", - mode, hs, vs, hs_pol_inv, vs_pol_inv); - - rfbi_write_reg(RFBI_HSYNC_WIDTH, hs); - rfbi_write_reg(RFBI_VSYNC_WIDTH, vs); - - l = rfbi_read_reg(RFBI_CONFIG(0)); - if (hs_pol_inv) - l &= ~(1 << 21); - else - l |= 1 << 21; - if (vs_pol_inv) - l &= ~(1 << 20); - else - l |= 1 << 20; - - return 0; -} -EXPORT_SYMBOL(omap_rfbi_setup_te); - -/* xxx FIX module selection missing */ -int omap_rfbi_enable_te(bool enable, unsigned line) -{ - u32 l; - - DSSDBG("te %d line %d mode %d\n", enable, line, rfbi.te_mode); - if (line > (1 << 11) - 1) - return -EINVAL; - - l = rfbi_read_reg(RFBI_CONFIG(0)); - l &= ~(0x3 << 2); - if (enable) { - rfbi.te_enabled = 1; - l |= rfbi.te_mode << 2; - } else - rfbi.te_enabled = 0; - rfbi_write_reg(RFBI_CONFIG(0), l); - rfbi_write_reg(RFBI_LINE_NUMBER, line); - - return 0; -} -EXPORT_SYMBOL(omap_rfbi_enable_te); - -static int rfbi_configure(int rfbi_module, int bpp, int lines) -{ - u32 l; - int cycle1 = 0, cycle2 = 0, cycle3 = 0; - enum omap_rfbi_cycleformat cycleformat; - enum omap_rfbi_datatype datatype; - enum omap_rfbi_parallelmode parallelmode; - - switch (bpp) { - case 12: - datatype = OMAP_DSS_RFBI_DATATYPE_12; - break; - case 16: - datatype = OMAP_DSS_RFBI_DATATYPE_16; - break; - case 18: - datatype = OMAP_DSS_RFBI_DATATYPE_18; - break; - case 24: - datatype = OMAP_DSS_RFBI_DATATYPE_24; - break; - default: - BUG(); - return 1; - } - rfbi.datatype = datatype; - - switch (lines) { - case 8: - parallelmode = OMAP_DSS_RFBI_PARALLELMODE_8; - break; - case 9: - parallelmode = OMAP_DSS_RFBI_PARALLELMODE_9; - break; - case 12: - parallelmode = OMAP_DSS_RFBI_PARALLELMODE_12; - break; - case 16: - parallelmode = OMAP_DSS_RFBI_PARALLELMODE_16; - break; - default: - BUG(); - return 1; - } - rfbi.parallelmode = parallelmode; - - if ((bpp % lines) == 0) { - switch (bpp / lines) { - case 1: - cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_1_1; - break; - case 2: - cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_2_1; - break; - case 3: - cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_3_1; - break; - default: - BUG(); - return 1; - } - } else if ((2 * bpp % lines) == 0) { - if ((2 * bpp / lines) == 3) - cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_3_2; - else { - BUG(); - return 1; - } - } else { - BUG(); - return 1; - } - - switch (cycleformat) { - case OMAP_DSS_RFBI_CYCLEFORMAT_1_1: - cycle1 = lines; - break; - - case OMAP_DSS_RFBI_CYCLEFORMAT_2_1: - cycle1 = lines; - cycle2 = lines; - break; - - case OMAP_DSS_RFBI_CYCLEFORMAT_3_1: - cycle1 = lines; - cycle2 = lines; - cycle3 = lines; - break; - - case OMAP_DSS_RFBI_CYCLEFORMAT_3_2: - cycle1 = lines; - cycle2 = (lines / 2) | ((lines / 2) << 16); - cycle3 = (lines << 16); - break; - } - - REG_FLD_MOD(RFBI_CONTROL, 0, 3, 2); /* clear CS */ - - l = 0; - l |= FLD_VAL(parallelmode, 1, 0); - l |= FLD_VAL(0, 3, 2); /* TRIGGERMODE: ITE */ - l |= FLD_VAL(0, 4, 4); /* TIMEGRANULARITY */ - l |= FLD_VAL(datatype, 6, 5); - /* l |= FLD_VAL(2, 8, 7); */ /* L4FORMAT, 2pix/L4 */ - l |= FLD_VAL(0, 8, 7); /* L4FORMAT, 1pix/L4 */ - l |= FLD_VAL(cycleformat, 10, 9); - l |= FLD_VAL(0, 12, 11); /* UNUSEDBITS */ - l |= FLD_VAL(0, 16, 16); /* A0POLARITY */ - l |= FLD_VAL(0, 17, 17); /* REPOLARITY */ - l |= FLD_VAL(0, 18, 18); /* WEPOLARITY */ - l |= FLD_VAL(0, 19, 19); /* CSPOLARITY */ - l |= FLD_VAL(1, 20, 20); /* TE_VSYNC_POLARITY */ - l |= FLD_VAL(1, 21, 21); /* HSYNCPOLARITY */ - rfbi_write_reg(RFBI_CONFIG(rfbi_module), l); - - rfbi_write_reg(RFBI_DATA_CYCLE1(rfbi_module), cycle1); - rfbi_write_reg(RFBI_DATA_CYCLE2(rfbi_module), cycle2); - rfbi_write_reg(RFBI_DATA_CYCLE3(rfbi_module), cycle3); - - - l = rfbi_read_reg(RFBI_CONTROL); - l = FLD_MOD(l, rfbi_module+1, 3, 2); /* Select CSx */ - l = FLD_MOD(l, 0, 1, 1); /* clear bypass */ - rfbi_write_reg(RFBI_CONTROL, l); - - - DSSDBG("RFBI config: bpp %d, lines %d, cycles: 0x%x 0x%x 0x%x\n", - bpp, lines, cycle1, cycle2, cycle3); - - return 0; -} - -int omap_rfbi_configure(struct omap_dss_device *dssdev, int pixel_size, - int data_lines) -{ - return rfbi_configure(dssdev->phy.rfbi.channel, pixel_size, data_lines); -} -EXPORT_SYMBOL(omap_rfbi_configure); - -int omap_rfbi_prepare_update(struct omap_dss_device *dssdev, - u16 *x, u16 *y, u16 *w, u16 *h) -{ - u16 dw, dh; - - dssdev->driver->get_resolution(dssdev, &dw, &dh); - - if (*x > dw || *y > dh) - return -EINVAL; - - if (*x + *w > dw) - return -EINVAL; - - if (*y + *h > dh) - return -EINVAL; - - if (*w == 1) - return -EINVAL; - - if (*w == 0 || *h == 0) - return -EINVAL; - - dispc_mgr_set_lcd_size(dssdev->manager->id, *w, *h); - - return 0; -} -EXPORT_SYMBOL(omap_rfbi_prepare_update); - -int omap_rfbi_update(struct omap_dss_device *dssdev, - u16 x, u16 y, u16 w, u16 h, - void (*callback)(void *), void *data) -{ - rfbi_transfer_area(dssdev, w, h, callback, data); - return 0; -} -EXPORT_SYMBOL(omap_rfbi_update); - -void rfbi_dump_regs(struct seq_file *s) -{ -#define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, rfbi_read_reg(r)) - - if (rfbi_runtime_get()) - return; - - DUMPREG(RFBI_REVISION); - DUMPREG(RFBI_SYSCONFIG); - DUMPREG(RFBI_SYSSTATUS); - DUMPREG(RFBI_CONTROL); - DUMPREG(RFBI_PIXEL_CNT); - DUMPREG(RFBI_LINE_NUMBER); - DUMPREG(RFBI_CMD); - DUMPREG(RFBI_PARAM); - DUMPREG(RFBI_DATA); - DUMPREG(RFBI_READ); - DUMPREG(RFBI_STATUS); - - DUMPREG(RFBI_CONFIG(0)); - DUMPREG(RFBI_ONOFF_TIME(0)); - DUMPREG(RFBI_CYCLE_TIME(0)); - DUMPREG(RFBI_DATA_CYCLE1(0)); - DUMPREG(RFBI_DATA_CYCLE2(0)); - DUMPREG(RFBI_DATA_CYCLE3(0)); - - DUMPREG(RFBI_CONFIG(1)); - DUMPREG(RFBI_ONOFF_TIME(1)); - DUMPREG(RFBI_CYCLE_TIME(1)); - DUMPREG(RFBI_DATA_CYCLE1(1)); - DUMPREG(RFBI_DATA_CYCLE2(1)); - DUMPREG(RFBI_DATA_CYCLE3(1)); - - DUMPREG(RFBI_VSYNC_WIDTH); - DUMPREG(RFBI_HSYNC_WIDTH); - - rfbi_runtime_put(); -#undef DUMPREG -} - -int omapdss_rfbi_display_enable(struct omap_dss_device *dssdev) -{ - int r; - - if (dssdev->manager == NULL) { - DSSERR("failed to enable display: no manager\n"); - return -ENODEV; - } - - r = rfbi_runtime_get(); - if (r) - return r; - - r = omap_dss_start_device(dssdev); - if (r) { - DSSERR("failed to start device\n"); - goto err0; - } - - r = omap_dispc_register_isr(framedone_callback, NULL, - DISPC_IRQ_FRAMEDONE); - if (r) { - DSSERR("can't get FRAMEDONE irq\n"); - goto err1; - } - - dispc_mgr_set_lcd_display_type(dssdev->manager->id, - OMAP_DSS_LCD_DISPLAY_TFT); - - dispc_mgr_set_io_pad_mode(DSS_IO_PAD_MODE_RFBI); - dispc_mgr_enable_stallmode(dssdev->manager->id, true); - - dispc_mgr_set_tft_data_lines(dssdev->manager->id, dssdev->ctrl.pixel_size); - - rfbi_configure(dssdev->phy.rfbi.channel, - dssdev->ctrl.pixel_size, - dssdev->phy.rfbi.data_lines); - - rfbi_set_timings(dssdev->phy.rfbi.channel, - &dssdev->ctrl.rfbi_timings); - - - return 0; -err1: - omap_dss_stop_device(dssdev); -err0: - rfbi_runtime_put(); - return r; -} -EXPORT_SYMBOL(omapdss_rfbi_display_enable); - -void omapdss_rfbi_display_disable(struct omap_dss_device *dssdev) -{ - omap_dispc_unregister_isr(framedone_callback, NULL, - DISPC_IRQ_FRAMEDONE); - omap_dss_stop_device(dssdev); - - rfbi_runtime_put(); -} -EXPORT_SYMBOL(omapdss_rfbi_display_disable); - -int rfbi_init_display(struct omap_dss_device *dssdev) -{ - rfbi.dssdev[dssdev->phy.rfbi.channel] = dssdev; - dssdev->caps = OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE; - return 0; -} - -/* RFBI HW IP initialisation */ -static int omap_rfbihw_probe(struct platform_device *pdev) -{ - u32 rev; - struct resource *rfbi_mem; - struct clk *clk; - int r; - - rfbi.pdev = pdev; - - sema_init(&rfbi.bus_lock, 1); - - rfbi_mem = platform_get_resource(rfbi.pdev, IORESOURCE_MEM, 0); - if (!rfbi_mem) { - DSSERR("can't get IORESOURCE_MEM RFBI\n"); - r = -EINVAL; - goto err_ioremap; - } - rfbi.base = ioremap(rfbi_mem->start, resource_size(rfbi_mem)); - if (!rfbi.base) { - DSSERR("can't ioremap RFBI\n"); - r = -ENOMEM; - goto err_ioremap; - } - - pm_runtime_enable(&pdev->dev); - - r = rfbi_runtime_get(); - if (r) - goto err_get_rfbi; - - msleep(10); - - clk = clk_get(&pdev->dev, "ick"); - if (IS_ERR(clk)) { - DSSERR("can't get ick\n"); - r = PTR_ERR(clk); - goto err_get_ick; - } - - rfbi.l4_khz = clk_get_rate(clk) / 1000; - - clk_put(clk); - - rev = rfbi_read_reg(RFBI_REVISION); - dev_dbg(&pdev->dev, "OMAP RFBI rev %d.%d\n", - FLD_GET(rev, 7, 4), FLD_GET(rev, 3, 0)); - - rfbi_runtime_put(); - - return 0; - -err_get_ick: - rfbi_runtime_put(); -err_get_rfbi: - pm_runtime_disable(&pdev->dev); - iounmap(rfbi.base); -err_ioremap: - return r; -} - -static int omap_rfbihw_remove(struct platform_device *pdev) -{ - pm_runtime_disable(&pdev->dev); - iounmap(rfbi.base); - return 0; -} - -static int rfbi_runtime_suspend(struct device *dev) -{ - dispc_runtime_put(); - dss_runtime_put(); - - return 0; -} - -static int rfbi_runtime_resume(struct device *dev) -{ - int r; - - r = dss_runtime_get(); - if (r < 0) - goto err_get_dss; - - r = dispc_runtime_get(); - if (r < 0) - goto err_get_dispc; - - return 0; - -err_get_dispc: - dss_runtime_put(); -err_get_dss: - return r; -} - -static const struct dev_pm_ops rfbi_pm_ops = { - .runtime_suspend = rfbi_runtime_suspend, - .runtime_resume = rfbi_runtime_resume, -}; - -static struct platform_driver omap_rfbihw_driver = { - .probe = omap_rfbihw_probe, - .remove = omap_rfbihw_remove, - .driver = { - .name = "omapdss_rfbi", - .owner = THIS_MODULE, - .pm = &rfbi_pm_ops, - }, -}; - -int rfbi_init_platform_driver(void) -{ - return platform_driver_register(&omap_rfbihw_driver); -} - -void rfbi_uninit_platform_driver(void) -{ - return platform_driver_unregister(&omap_rfbihw_driver); -} diff --git a/drivers/video/omap2/dss/sdi.c b/drivers/video/omap2/dss/sdi.c deleted file mode 100644 index 8266ca0d666..00000000000 --- a/drivers/video/omap2/dss/sdi.c +++ /dev/null @@ -1,192 +0,0 @@ -/* - * linux/drivers/video/omap2/dss/sdi.c - * - * Copyright (C) 2009 Nokia Corporation - * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program. If not, see <http://www.gnu.org/licenses/>. - */ - -#define DSS_SUBSYS_NAME "SDI" - -#include <linux/kernel.h> -#include <linux/delay.h> -#include <linux/err.h> -#include <linux/regulator/consumer.h> -#include <linux/export.h> - -#include <video/omapdss.h> -#include "dss.h" - -static struct { - bool update_enabled; - struct regulator *vdds_sdi_reg; -} sdi; - -static void sdi_basic_init(struct omap_dss_device *dssdev) - -{ - dispc_mgr_set_io_pad_mode(DSS_IO_PAD_MODE_BYPASS); - dispc_mgr_enable_stallmode(dssdev->manager->id, false); - - dispc_mgr_set_lcd_display_type(dssdev->manager->id, - OMAP_DSS_LCD_DISPLAY_TFT); - - dispc_mgr_set_tft_data_lines(dssdev->manager->id, 24); - dispc_lcd_enable_signal_polarity(1); -} - -int omapdss_sdi_display_enable(struct omap_dss_device *dssdev) -{ - struct omap_video_timings *t = &dssdev->panel.timings; - struct dss_clock_info dss_cinfo; - struct dispc_clock_info dispc_cinfo; - u16 lck_div, pck_div; - unsigned long fck; - unsigned long pck; - int r; - - if (dssdev->manager == NULL) { - DSSERR("failed to enable display: no manager\n"); - return -ENODEV; - } - - r = omap_dss_start_device(dssdev); - if (r) { - DSSERR("failed to start device\n"); - goto err_start_dev; - } - - r = regulator_enable(sdi.vdds_sdi_reg); - if (r) - goto err_reg_enable; - - r = dss_runtime_get(); - if (r) - goto err_get_dss; - - r = dispc_runtime_get(); - if (r) - goto err_get_dispc; - - sdi_basic_init(dssdev); - - /* 15.5.9.1.2 */ - dssdev->panel.config |= OMAP_DSS_LCD_RF | OMAP_DSS_LCD_ONOFF; - - dispc_mgr_set_pol_freq(dssdev->manager->id, dssdev->panel.config, - dssdev->panel.acbi, dssdev->panel.acb); - - r = dss_calc_clock_div(1, t->pixel_clock * 1000, - &dss_cinfo, &dispc_cinfo); - if (r) - goto err_calc_clock_div; - - fck = dss_cinfo.fck; - lck_div = dispc_cinfo.lck_div; - pck_div = dispc_cinfo.pck_div; - - pck = fck / lck_div / pck_div / 1000; - - if (pck != t->pixel_clock) { - DSSWARN("Could not find exact pixel clock. Requested %d kHz, " - "got %lu kHz\n", - t->pixel_clock, pck); - - t->pixel_clock = pck; - } - - - dispc_mgr_set_lcd_timings(dssdev->manager->id, t); - - r = dss_set_clock_div(&dss_cinfo); - if (r) - goto err_set_dss_clock_div; - - r = dispc_mgr_set_clock_div(dssdev->manager->id, &dispc_cinfo); - if (r) - goto err_set_dispc_clock_div; - - dss_sdi_init(dssdev->phy.sdi.datapairs); - r = dss_sdi_enable(); - if (r) - goto err_sdi_enable; - mdelay(2); - - r = dss_mgr_enable(dssdev->manager); - if (r) - goto err_mgr_enable; - - return 0; - -err_mgr_enable: - dss_sdi_disable(); -err_sdi_enable: -err_set_dispc_clock_div: -err_set_dss_clock_div: -err_calc_clock_div: - dispc_runtime_put(); -err_get_dispc: - dss_runtime_put(); -err_get_dss: - regulator_disable(sdi.vdds_sdi_reg); -err_reg_enable: - omap_dss_stop_device(dssdev); -err_start_dev: - return r; -} -EXPORT_SYMBOL(omapdss_sdi_display_enable); - -void omapdss_sdi_display_disable(struct omap_dss_device *dssdev) -{ - dss_mgr_disable(dssdev->manager); - - dss_sdi_disable(); - - dispc_runtime_put(); - dss_runtime_put(); - - regulator_disable(sdi.vdds_sdi_reg); - - omap_dss_stop_device(dssdev); -} -EXPORT_SYMBOL(omapdss_sdi_display_disable); - -int sdi_init_display(struct omap_dss_device *dssdev) -{ - DSSDBG("SDI init\n"); - - if (sdi.vdds_sdi_reg == NULL) { - struct regulator *vdds_sdi; - - vdds_sdi = dss_get_vdds_sdi(); - - if (IS_ERR(vdds_sdi)) { - DSSERR("can't get VDDS_SDI regulator\n"); - return PTR_ERR(vdds_sdi); - } - - sdi.vdds_sdi_reg = vdds_sdi; - } - - return 0; -} - -int sdi_init(void) -{ - return 0; -} - -void sdi_exit(void) -{ -} diff --git a/drivers/video/omap2/dss/ti_hdmi.h b/drivers/video/omap2/dss/ti_hdmi.h deleted file mode 100644 index 50dadba5070..00000000000 --- a/drivers/video/omap2/dss/ti_hdmi.h +++ /dev/null @@ -1,150 +0,0 @@ -/* - * ti_hdmi.h - * - * HDMI driver definition for TI OMAP4, DM81xx, DM38xx Processor. - * - * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com/ - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program. If not, see <http://www.gnu.org/licenses/>. - */ - -#ifndef _TI_HDMI_H -#define _TI_HDMI_H - -struct hdmi_ip_data; - -enum hdmi_pll_pwr { - HDMI_PLLPWRCMD_ALLOFF = 0, - HDMI_PLLPWRCMD_PLLONLY = 1, - HDMI_PLLPWRCMD_BOTHON_ALLCLKS = 2, - HDMI_PLLPWRCMD_BOTHON_NOPHYCLK = 3 -}; - -enum hdmi_core_hdmi_dvi { - HDMI_DVI = 0, - HDMI_HDMI = 1 -}; - -enum hdmi_clk_refsel { - HDMI_REFSEL_PCLK = 0, - HDMI_REFSEL_REF1 = 1, - HDMI_REFSEL_REF2 = 2, - HDMI_REFSEL_SYSCLK = 3 -}; - -struct hdmi_video_timings { - u16 x_res; - u16 y_res; - /* Unit: KHz */ - u32 pixel_clock; - u16 hsw; - u16 hfp; - u16 hbp; - u16 vsw; - u16 vfp; - u16 vbp; -}; - -/* HDMI timing structure */ -struct hdmi_timings { - struct hdmi_video_timings timings; - int vsync_pol; - int hsync_pol; -}; - -struct hdmi_cm { - int code; - int mode; -}; - -struct hdmi_config { - struct hdmi_timings timings; - u16 interlace; - struct hdmi_cm cm; -}; - -/* HDMI PLL structure */ -struct hdmi_pll_info { - u16 regn; - u16 regm; - u32 regmf; - u16 regm2; - u16 regsd; - u16 dcofreq; - enum hdmi_clk_refsel refsel; -}; - -struct ti_hdmi_ip_ops { - - void (*video_configure)(struct hdmi_ip_data *ip_data); - - int (*phy_enable)(struct hdmi_ip_data *ip_data); - - void (*phy_disable)(struct hdmi_ip_data *ip_data); - - int (*read_edid)(struct hdmi_ip_data *ip_data, u8 *edid, int len); - - bool (*detect)(struct hdmi_ip_data *ip_data); - - int (*pll_enable)(struct hdmi_ip_data *ip_data); - - void (*pll_disable)(struct hdmi_ip_data *ip_data); - - void (*video_enable)(struct hdmi_ip_data *ip_data, bool start); - - void (*dump_wrapper)(struct hdmi_ip_data *ip_data, struct seq_file *s); - - void (*dump_core)(struct hdmi_ip_data *ip_data, struct seq_file *s); - - void (*dump_pll)(struct hdmi_ip_data *ip_data, struct seq_file *s); - - void (*dump_phy)(struct hdmi_ip_data *ip_data, struct seq_file *s); - -#if defined(CONFIG_SND_OMAP_SOC_OMAP4_HDMI) || \ - defined(CONFIG_SND_OMAP_SOC_OMAP4_HDMI_MODULE) - void (*audio_enable)(struct hdmi_ip_data *ip_data, bool start); -#endif - -}; - -struct hdmi_ip_data { - void __iomem *base_wp; /* HDMI wrapper */ - unsigned long core_sys_offset; - unsigned long core_av_offset; - unsigned long pll_offset; - unsigned long phy_offset; - const struct ti_hdmi_ip_ops *ops; - struct hdmi_config cfg; - struct hdmi_pll_info pll_data; - - /* ti_hdmi_4xxx_ip private data. These should be in a separate struct */ - int hpd_gpio; - bool phy_tx_enabled; -}; -int ti_hdmi_4xxx_phy_enable(struct hdmi_ip_data *ip_data); -void ti_hdmi_4xxx_phy_disable(struct hdmi_ip_data *ip_data); -int ti_hdmi_4xxx_read_edid(struct hdmi_ip_data *ip_data, u8 *edid, int len); -bool ti_hdmi_4xxx_detect(struct hdmi_ip_data *ip_data); -void ti_hdmi_4xxx_wp_video_start(struct hdmi_ip_data *ip_data, bool start); -int ti_hdmi_4xxx_pll_enable(struct hdmi_ip_data *ip_data); -void ti_hdmi_4xxx_pll_disable(struct hdmi_ip_data *ip_data); -void ti_hdmi_4xxx_basic_configure(struct hdmi_ip_data *ip_data); -void ti_hdmi_4xxx_wp_dump(struct hdmi_ip_data *ip_data, struct seq_file *s); -void ti_hdmi_4xxx_pll_dump(struct hdmi_ip_data *ip_data, struct seq_file *s); -void ti_hdmi_4xxx_core_dump(struct hdmi_ip_data *ip_data, struct seq_file *s); -void ti_hdmi_4xxx_phy_dump(struct hdmi_ip_data *ip_data, struct seq_file *s); -#if defined(CONFIG_SND_OMAP_SOC_OMAP4_HDMI) || \ - defined(CONFIG_SND_OMAP_SOC_OMAP4_HDMI_MODULE) -void ti_hdmi_4xxx_wp_audio_enable(struct hdmi_ip_data *ip_data, bool enable); -#endif -#endif diff --git a/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c b/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c deleted file mode 100644 index 2d72334ca3d..00000000000 --- a/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c +++ /dev/null @@ -1,1276 +0,0 @@ -/* - * ti_hdmi_4xxx_ip.c - * - * HDMI TI81xx, TI38xx, TI OMAP4 etc IP driver Library - * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com/ - * Authors: Yong Zhi - * Mythri pk <mythripk@ti.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program. If not, see <http://www.gnu.org/licenses/>. - */ - -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/err.h> -#include <linux/io.h> -#include <linux/interrupt.h> -#include <linux/mutex.h> -#include <linux/delay.h> -#include <linux/string.h> -#include <linux/seq_file.h> -#include <linux/gpio.h> - -#include "ti_hdmi_4xxx_ip.h" -#include "dss.h" - -static inline void hdmi_write_reg(void __iomem *base_addr, - const u16 idx, u32 val) -{ - __raw_writel(val, base_addr + idx); -} - -static inline u32 hdmi_read_reg(void __iomem *base_addr, - const u16 idx) -{ - return __raw_readl(base_addr + idx); -} - -static inline void __iomem *hdmi_wp_base(struct hdmi_ip_data *ip_data) -{ - return ip_data->base_wp; -} - -static inline void __iomem *hdmi_phy_base(struct hdmi_ip_data *ip_data) -{ - return ip_data->base_wp + ip_data->phy_offset; -} - -static inline void __iomem *hdmi_pll_base(struct hdmi_ip_data *ip_data) -{ - return ip_data->base_wp + ip_data->pll_offset; -} - -static inline void __iomem *hdmi_av_base(struct hdmi_ip_data *ip_data) -{ - return ip_data->base_wp + ip_data->core_av_offset; -} - -static inline void __iomem *hdmi_core_sys_base(struct hdmi_ip_data *ip_data) -{ - return ip_data->base_wp + ip_data->core_sys_offset; -} - -static inline int hdmi_wait_for_bit_change(void __iomem *base_addr, - const u16 idx, - int b2, int b1, u32 val) -{ - u32 t = 0; - while (val != REG_GET(base_addr, idx, b2, b1)) { - udelay(1); - if (t++ > 10000) - return !val; - } - return val; -} - -static int hdmi_pll_init(struct hdmi_ip_data *ip_data) -{ - u32 r; - void __iomem *pll_base = hdmi_pll_base(ip_data); - struct hdmi_pll_info *fmt = &ip_data->pll_data; - - /* PLL start always use manual mode */ - REG_FLD_MOD(pll_base, PLLCTRL_PLL_CONTROL, 0x0, 0, 0); - - r = hdmi_read_reg(pll_base, PLLCTRL_CFG1); - r = FLD_MOD(r, fmt->regm, 20, 9); /* CFG1_PLL_REGM */ - r = FLD_MOD(r, fmt->regn - 1, 8, 1); /* CFG1_PLL_REGN */ - - hdmi_write_reg(pll_base, PLLCTRL_CFG1, r); - - r = hdmi_read_reg(pll_base, PLLCTRL_CFG2); - - r = FLD_MOD(r, 0x0, 12, 12); /* PLL_HIGHFREQ divide by 2 */ - r = FLD_MOD(r, 0x1, 13, 13); /* PLL_REFEN */ - r = FLD_MOD(r, 0x0, 14, 14); /* PHY_CLKINEN de-assert during locking */ - r = FLD_MOD(r, fmt->refsel, 22, 21); /* REFSEL */ - - if (fmt->dcofreq) { - /* divider programming for frequency beyond 1000Mhz */ - REG_FLD_MOD(pll_base, PLLCTRL_CFG3, fmt->regsd, 17, 10); - r = FLD_MOD(r, 0x4, 3, 1); /* 1000MHz and 2000MHz */ - } else { - r = FLD_MOD(r, 0x2, 3, 1); /* 500MHz and 1000MHz */ - } - - hdmi_write_reg(pll_base, PLLCTRL_CFG2, r); - - r = hdmi_read_reg(pll_base, PLLCTRL_CFG4); - r = FLD_MOD(r, fmt->regm2, 24, 18); - r = FLD_MOD(r, fmt->regmf, 17, 0); - - hdmi_write_reg(pll_base, PLLCTRL_CFG4, r); - - /* go now */ - REG_FLD_MOD(pll_base, PLLCTRL_PLL_GO, 0x1, 0, 0); - - /* wait for bit change */ - if (hdmi_wait_for_bit_change(pll_base, PLLCTRL_PLL_GO, - 0, 0, 1) != 1) { - pr_err("PLL GO bit not set\n"); - return -ETIMEDOUT; - } - - /* Wait till the lock bit is set in PLL status */ - if (hdmi_wait_for_bit_change(pll_base, - PLLCTRL_PLL_STATUS, 1, 1, 1) != 1) { - pr_err("cannot lock PLL\n"); - pr_err("CFG1 0x%x\n", - hdmi_read_reg(pll_base, PLLCTRL_CFG1)); - pr_err("CFG2 0x%x\n", - hdmi_read_reg(pll_base, PLLCTRL_CFG2)); - pr_err("CFG4 0x%x\n", - hdmi_read_reg(pll_base, PLLCTRL_CFG4)); - return -ETIMEDOUT; - } - - pr_debug("PLL locked!\n"); - - return 0; -} - -/* PHY_PWR_CMD */ -static int hdmi_set_phy_pwr(struct hdmi_ip_data *ip_data, enum hdmi_phy_pwr val) -{ - /* Command for power control of HDMI PHY */ - REG_FLD_MOD(hdmi_wp_base(ip_data), HDMI_WP_PWR_CTRL, val, 7, 6); - - /* Status of the power control of HDMI PHY */ - if (hdmi_wait_for_bit_change(hdmi_wp_base(ip_data), - HDMI_WP_PWR_CTRL, 5, 4, val) != val) { - pr_err("Failed to set PHY power mode to %d\n", val); - return -ETIMEDOUT; - } - - return 0; -} - -/* PLL_PWR_CMD */ -static int hdmi_set_pll_pwr(struct hdmi_ip_data *ip_data, enum hdmi_pll_pwr val) -{ - /* Command for power control of HDMI PLL */ - REG_FLD_MOD(hdmi_wp_base(ip_data), HDMI_WP_PWR_CTRL, val, 3, 2); - - /* wait till PHY_PWR_STATUS is set */ - if (hdmi_wait_for_bit_change(hdmi_wp_base(ip_data), HDMI_WP_PWR_CTRL, - 1, 0, val) != val) { - pr_err("Failed to set PLL_PWR_STATUS\n"); - return -ETIMEDOUT; - } - - return 0; -} - -static int hdmi_pll_reset(struct hdmi_ip_data *ip_data) -{ - /* SYSRESET controlled by power FSM */ - REG_FLD_MOD(hdmi_pll_base(ip_data), PLLCTRL_PLL_CONTROL, 0x0, 3, 3); - - /* READ 0x0 reset is in progress */ - if (hdmi_wait_for_bit_change(hdmi_pll_base(ip_data), - PLLCTRL_PLL_STATUS, 0, 0, 1) != 1) { - pr_err("Failed to sysreset PLL\n"); - return -ETIMEDOUT; - } - - return 0; -} - -int ti_hdmi_4xxx_pll_enable(struct hdmi_ip_data *ip_data) -{ - u16 r = 0; - - r = hdmi_set_pll_pwr(ip_data, HDMI_PLLPWRCMD_ALLOFF); - if (r) - return r; - - r = hdmi_set_pll_pwr(ip_data, HDMI_PLLPWRCMD_BOTHON_ALLCLKS); - if (r) - return r; - - r = hdmi_pll_reset(ip_data); - if (r) - return r; - - r = hdmi_pll_init(ip_data); - if (r) - return r; - - return 0; -} - -void ti_hdmi_4xxx_pll_disable(struct hdmi_ip_data *ip_data) -{ - hdmi_set_pll_pwr(ip_data, HDMI_PLLPWRCMD_ALLOFF); -} - -static int hdmi_check_hpd_state(struct hdmi_ip_data *ip_data) -{ - unsigned long flags; - bool hpd; - int r; - /* this should be in ti_hdmi_4xxx_ip private data */ - static DEFINE_SPINLOCK(phy_tx_lock); - - spin_lock_irqsave(&phy_tx_lock, flags); - - hpd = gpio_get_value(ip_data->hpd_gpio); - - if (hpd == ip_data->phy_tx_enabled) { - spin_unlock_irqrestore(&phy_tx_lock, flags); - return 0; - } - - if (hpd) - r = hdmi_set_phy_pwr(ip_data, HDMI_PHYPWRCMD_TXON); - else - r = hdmi_set_phy_pwr(ip_data, HDMI_PHYPWRCMD_LDOON); - - if (r) { - DSSERR("Failed to %s PHY TX power\n", - hpd ? "enable" : "disable"); - goto err; - } - - ip_data->phy_tx_enabled = hpd; -err: - spin_unlock_irqrestore(&phy_tx_lock, flags); - return r; -} - -static irqreturn_t hpd_irq_handler(int irq, void *data) -{ - struct hdmi_ip_data *ip_data = data; - - hdmi_check_hpd_state(ip_data); - - return IRQ_HANDLED; -} - -int ti_hdmi_4xxx_phy_enable(struct hdmi_ip_data *ip_data) -{ - u16 r = 0; - void __iomem *phy_base = hdmi_phy_base(ip_data); - - r = hdmi_set_phy_pwr(ip_data, HDMI_PHYPWRCMD_LDOON); - if (r) - return r; - - /* - * Read address 0 in order to get the SCP reset done completed - * Dummy access performed to make sure reset is done - */ - hdmi_read_reg(phy_base, HDMI_TXPHY_TX_CTRL); - - /* - * Write to phy address 0 to configure the clock - * use HFBITCLK write HDMI_TXPHY_TX_CONTROL_FREQOUT field - */ - REG_FLD_MOD(phy_base, HDMI_TXPHY_TX_CTRL, 0x1, 31, 30); - - /* Write to phy address 1 to start HDMI line (TXVALID and TMDSCLKEN) */ - hdmi_write_reg(phy_base, HDMI_TXPHY_DIGITAL_CTRL, 0xF0000000); - - /* Setup max LDO voltage */ - REG_FLD_MOD(phy_base, HDMI_TXPHY_POWER_CTRL, 0xB, 3, 0); - - /* Write to phy address 3 to change the polarity control */ - REG_FLD_MOD(phy_base, HDMI_TXPHY_PAD_CFG_CTRL, 0x1, 27, 27); - - r = request_threaded_irq(gpio_to_irq(ip_data->hpd_gpio), - NULL, hpd_irq_handler, - IRQF_DISABLED | IRQF_TRIGGER_RISING | - IRQF_TRIGGER_FALLING, "hpd", ip_data); - if (r) { - DSSERR("HPD IRQ request failed\n"); - hdmi_set_phy_pwr(ip_data, HDMI_PHYPWRCMD_OFF); - return r; - } - - r = hdmi_check_hpd_state(ip_data); - if (r) { - free_irq(gpio_to_irq(ip_data->hpd_gpio), ip_data); - hdmi_set_phy_pwr(ip_data, HDMI_PHYPWRCMD_OFF); - return r; - } - - return 0; -} - -void ti_hdmi_4xxx_phy_disable(struct hdmi_ip_data *ip_data) -{ - free_irq(gpio_to_irq(ip_data->hpd_gpio), ip_data); - - hdmi_set_phy_pwr(ip_data, HDMI_PHYPWRCMD_OFF); - ip_data->phy_tx_enabled = false; -} - -static int hdmi_core_ddc_init(struct hdmi_ip_data *ip_data) -{ - void __iomem *base = hdmi_core_sys_base(ip_data); - - /* Turn on CLK for DDC */ - REG_FLD_MOD(base, HDMI_CORE_AV_DPD, 0x7, 2, 0); - - /* IN_PROG */ - if (REG_GET(base, HDMI_CORE_DDC_STATUS, 4, 4) == 1) { - /* Abort transaction */ - REG_FLD_MOD(base, HDMI_CORE_DDC_CMD, 0xf, 3, 0); - /* IN_PROG */ - if (hdmi_wait_for_bit_change(base, HDMI_CORE_DDC_STATUS, - 4, 4, 0) != 0) { - DSSERR("Timeout aborting DDC transaction\n"); - return -ETIMEDOUT; - } - } - - /* Clk SCL Devices */ - REG_FLD_MOD(base, HDMI_CORE_DDC_CMD, 0xA, 3, 0); - - /* HDMI_CORE_DDC_STATUS_IN_PROG */ - if (hdmi_wait_for_bit_change(base, HDMI_CORE_DDC_STATUS, - 4, 4, 0) != 0) { - DSSERR("Timeout starting SCL clock\n"); - return -ETIMEDOUT; - } - - /* Clear FIFO */ - REG_FLD_MOD(base, HDMI_CORE_DDC_CMD, 0x9, 3, 0); - - /* HDMI_CORE_DDC_STATUS_IN_PROG */ - if (hdmi_wait_for_bit_change(base, HDMI_CORE_DDC_STATUS, - 4, 4, 0) != 0) { - DSSERR("Timeout clearing DDC fifo\n"); - return -ETIMEDOUT; - } - - return 0; -} - -static int hdmi_core_ddc_edid(struct hdmi_ip_data *ip_data, - u8 *pedid, int ext) -{ - void __iomem *base = hdmi_core_sys_base(ip_data); - u32 i; - char checksum; - u32 offset = 0; - - /* HDMI_CORE_DDC_STATUS_IN_PROG */ - if (hdmi_wait_for_bit_change(base, HDMI_CORE_DDC_STATUS, - 4, 4, 0) != 0) { - DSSERR("Timeout waiting DDC to be ready\n"); - return -ETIMEDOUT; - } - - if (ext % 2 != 0) - offset = 0x80; - - /* Load Segment Address Register */ - REG_FLD_MOD(base, HDMI_CORE_DDC_SEGM, ext / 2, 7, 0); - - /* Load Slave Address Register */ - REG_FLD_MOD(base, HDMI_CORE_DDC_ADDR, 0xA0 >> 1, 7, 1); - - /* Load Offset Address Register */ - REG_FLD_MOD(base, HDMI_CORE_DDC_OFFSET, offset, 7, 0); - - /* Load Byte Count */ - REG_FLD_MOD(base, HDMI_CORE_DDC_COUNT1, 0x80, 7, 0); - REG_FLD_MOD(base, HDMI_CORE_DDC_COUNT2, 0x0, 1, 0); - - /* Set DDC_CMD */ - if (ext) - REG_FLD_MOD(base, HDMI_CORE_DDC_CMD, 0x4, 3, 0); - else - REG_FLD_MOD(base, HDMI_CORE_DDC_CMD, 0x2, 3, 0); - - /* HDMI_CORE_DDC_STATUS_BUS_LOW */ - if (REG_GET(base, HDMI_CORE_DDC_STATUS, 6, 6) == 1) { - pr_err("I2C Bus Low?\n"); - return -EIO; - } - /* HDMI_CORE_DDC_STATUS_NO_ACK */ - if (REG_GET(base, HDMI_CORE_DDC_STATUS, 5, 5) == 1) { - pr_err("I2C No Ack\n"); - return -EIO; - } - - for (i = 0; i < 0x80; ++i) { - int t; - - /* IN_PROG */ - if (REG_GET(base, HDMI_CORE_DDC_STATUS, 4, 4) == 0) { - DSSERR("operation stopped when reading edid\n"); - return -EIO; - } - - t = 0; - /* FIFO_EMPTY */ - while (REG_GET(base, HDMI_CORE_DDC_STATUS, 2, 2) == 1) { - if (t++ > 10000) { - DSSERR("timeout reading edid\n"); - return -ETIMEDOUT; - } - udelay(1); - } - - pedid[i] = REG_GET(base, HDMI_CORE_DDC_DATA, 7, 0); - } - - checksum = 0; - for (i = 0; i < 0x80; ++i) - checksum += pedid[i]; - - if (checksum != 0) { - pr_err("E-EDID checksum failed!!\n"); - return -EIO; - } - - return 0; -} - -int ti_hdmi_4xxx_read_edid(struct hdmi_ip_data *ip_data, - u8 *edid, int len) -{ - int r, l; - - if (len < 128) - return -EINVAL; - - r = hdmi_core_ddc_init(ip_data); - if (r) - return r; - - r = hdmi_core_ddc_edid(ip_data, edid, 0); - if (r) - return r; - - l = 128; - - if (len >= 128 * 2 && edid[0x7e] > 0) { - r = hdmi_core_ddc_edid(ip_data, edid + 0x80, 1); - if (r) - return r; - l += 128; - } - - return l; -} - -bool ti_hdmi_4xxx_detect(struct hdmi_ip_data *ip_data) -{ - int r; - - void __iomem *base = hdmi_core_sys_base(ip_data); - - /* HPD */ - r = REG_GET(base, HDMI_CORE_SYS_SYS_STAT, 1, 1); - - return r == 1; -} - -static void hdmi_core_init(struct hdmi_core_video_config *video_cfg, - struct hdmi_core_infoframe_avi *avi_cfg, - struct hdmi_core_packet_enable_repeat *repeat_cfg) -{ - pr_debug("Enter hdmi_core_init\n"); - - /* video core */ - video_cfg->ip_bus_width = HDMI_INPUT_8BIT; - video_cfg->op_dither_truc = HDMI_OUTPUTTRUNCATION_8BIT; - video_cfg->deep_color_pkt = HDMI_DEEPCOLORPACKECTDISABLE; - video_cfg->pkt_mode = HDMI_PACKETMODERESERVEDVALUE; - video_cfg->hdmi_dvi = HDMI_DVI; - video_cfg->tclk_sel_clkmult = HDMI_FPLL10IDCK; - - /* info frame */ - avi_cfg->db1_format = 0; - avi_cfg->db1_active_info = 0; - avi_cfg->db1_bar_info_dv = 0; - avi_cfg->db1_scan_info = 0; - avi_cfg->db2_colorimetry = 0; - avi_cfg->db2_aspect_ratio = 0; - avi_cfg->db2_active_fmt_ar = 0; - avi_cfg->db3_itc = 0; - avi_cfg->db3_ec = 0; - avi_cfg->db3_q_range = 0; - avi_cfg->db3_nup_scaling = 0; - avi_cfg->db4_videocode = 0; - avi_cfg->db5_pixel_repeat = 0; - avi_cfg->db6_7_line_eoftop = 0 ; - avi_cfg->db8_9_line_sofbottom = 0; - avi_cfg->db10_11_pixel_eofleft = 0; - avi_cfg->db12_13_pixel_sofright = 0; - - /* packet enable and repeat */ - repeat_cfg->audio_pkt = 0; - repeat_cfg->audio_pkt_repeat = 0; - repeat_cfg->avi_infoframe = 0; - repeat_cfg->avi_infoframe_repeat = 0; - repeat_cfg->gen_cntrl_pkt = 0; - repeat_cfg->gen_cntrl_pkt_repeat = 0; - repeat_cfg->generic_pkt = 0; - repeat_cfg->generic_pkt_repeat = 0; -} - -static void hdmi_core_powerdown_disable(struct hdmi_ip_data *ip_data) -{ - pr_debug("Enter hdmi_core_powerdown_disable\n"); - REG_FLD_MOD(hdmi_core_sys_base(ip_data), HDMI_CORE_CTRL1, 0x0, 0, 0); -} - -static void hdmi_core_swreset_release(struct hdmi_ip_data *ip_data) -{ - pr_debug("Enter hdmi_core_swreset_release\n"); - REG_FLD_MOD(hdmi_core_sys_base(ip_data), HDMI_CORE_SYS_SRST, 0x0, 0, 0); -} - -static void hdmi_core_swreset_assert(struct hdmi_ip_data *ip_data) -{ - pr_debug("Enter hdmi_core_swreset_assert\n"); - REG_FLD_MOD(hdmi_core_sys_base(ip_data), HDMI_CORE_SYS_SRST, 0x1, 0, 0); -} - -/* HDMI_CORE_VIDEO_CONFIG */ -static void hdmi_core_video_config(struct hdmi_ip_data *ip_data, - struct hdmi_core_video_config *cfg) -{ - u32 r = 0; - void __iomem *core_sys_base = hdmi_core_sys_base(ip_data); - - /* sys_ctrl1 default configuration not tunable */ - r = hdmi_read_reg(core_sys_base, HDMI_CORE_CTRL1); - r = FLD_MOD(r, HDMI_CORE_CTRL1_VEN_FOLLOWVSYNC, 5, 5); - r = FLD_MOD(r, HDMI_CORE_CTRL1_HEN_FOLLOWHSYNC, 4, 4); - r = FLD_MOD(r, HDMI_CORE_CTRL1_BSEL_24BITBUS, 2, 2); - r = FLD_MOD(r, HDMI_CORE_CTRL1_EDGE_RISINGEDGE, 1, 1); - hdmi_write_reg(core_sys_base, HDMI_CORE_CTRL1, r); - - REG_FLD_MOD(core_sys_base, - HDMI_CORE_SYS_VID_ACEN, cfg->ip_bus_width, 7, 6); - - /* Vid_Mode */ - r = hdmi_read_reg(core_sys_base, HDMI_CORE_SYS_VID_MODE); - - /* dither truncation configuration */ - if (cfg->op_dither_truc > HDMI_OUTPUTTRUNCATION_12BIT) { - r = FLD_MOD(r, cfg->op_dither_truc - 3, 7, 6); - r = FLD_MOD(r, 1, 5, 5); - } else { - r = FLD_MOD(r, cfg->op_dither_truc, 7, 6); - r = FLD_MOD(r, 0, 5, 5); - } - hdmi_write_reg(core_sys_base, HDMI_CORE_SYS_VID_MODE, r); - - /* HDMI_Ctrl */ - r = hdmi_read_reg(hdmi_av_base(ip_data), HDMI_CORE_AV_HDMI_CTRL); - r = FLD_MOD(r, cfg->deep_color_pkt, 6, 6); - r = FLD_MOD(r, cfg->pkt_mode, 5, 3); - r = FLD_MOD(r, cfg->hdmi_dvi, 0, 0); - hdmi_write_reg(hdmi_av_base(ip_data), HDMI_CORE_AV_HDMI_CTRL, r); - - /* TMDS_CTRL */ - REG_FLD_MOD(core_sys_base, - HDMI_CORE_SYS_TMDS_CTRL, cfg->tclk_sel_clkmult, 6, 5); -} - -static void hdmi_core_aux_infoframe_avi_config(struct hdmi_ip_data *ip_data, - struct hdmi_core_infoframe_avi info_avi) -{ - u32 val; - char sum = 0, checksum = 0; - void __iomem *av_base = hdmi_av_base(ip_data); - - sum += 0x82 + 0x002 + 0x00D; - hdmi_write_reg(av_base, HDMI_CORE_AV_AVI_TYPE, 0x082); - hdmi_write_reg(av_base, HDMI_CORE_AV_AVI_VERS, 0x002); - hdmi_write_reg(av_base, HDMI_CORE_AV_AVI_LEN, 0x00D); - - val = (info_avi.db1_format << 5) | - (info_avi.db1_active_info << 4) | - (info_avi.db1_bar_info_dv << 2) | - (info_avi.db1_scan_info); - hdmi_write_reg(av_base, HDMI_CORE_AV_AVI_DBYTE(0), val); - sum += val; - - val = (info_avi.db2_colorimetry << 6) | - (info_avi.db2_aspect_ratio << 4) | - (info_avi.db2_active_fmt_ar); - hdmi_write_reg(av_base, HDMI_CORE_AV_AVI_DBYTE(1), val); - sum += val; - - val = (info_avi.db3_itc << 7) | - (info_avi.db3_ec << 4) | - (info_avi.db3_q_range << 2) | - (info_avi.db3_nup_scaling); - hdmi_write_reg(av_base, HDMI_CORE_AV_AVI_DBYTE(2), val); - sum += val; - - hdmi_write_reg(av_base, HDMI_CORE_AV_AVI_DBYTE(3), - info_avi.db4_videocode); - sum += info_avi.db4_videocode; - - val = info_avi.db5_pixel_repeat; - hdmi_write_reg(av_base, HDMI_CORE_AV_AVI_DBYTE(4), val); - sum += val; - - val = info_avi.db6_7_line_eoftop & 0x00FF; - hdmi_write_reg(av_base, HDMI_CORE_AV_AVI_DBYTE(5), val); - sum += val; - - val = ((info_avi.db6_7_line_eoftop >> 8) & 0x00FF); - hdmi_write_reg(av_base, HDMI_CORE_AV_AVI_DBYTE(6), val); - sum += val; - - val = info_avi.db8_9_line_sofbottom & 0x00FF; - hdmi_write_reg(av_base, HDMI_CORE_AV_AVI_DBYTE(7), val); - sum += val; - - val = ((info_avi.db8_9_line_sofbottom >> 8) & 0x00FF); - hdmi_write_reg(av_base, HDMI_CORE_AV_AVI_DBYTE(8), val); - sum += val; - - val = info_avi.db10_11_pixel_eofleft & 0x00FF; - hdmi_write_reg(av_base, HDMI_CORE_AV_AVI_DBYTE(9), val); - sum += val; - - val = ((info_avi.db10_11_pixel_eofleft >> 8) & 0x00FF); - hdmi_write_reg(av_base, HDMI_CORE_AV_AVI_DBYTE(10), val); - sum += val; - - val = info_avi.db12_13_pixel_sofright & 0x00FF; - hdmi_write_reg(av_base, HDMI_CORE_AV_AVI_DBYTE(11), val); - sum += val; - - val = ((info_avi.db12_13_pixel_sofright >> 8) & 0x00FF); - hdmi_write_reg(av_base, HDMI_CORE_AV_AVI_DBYTE(12), val); - sum += val; - - checksum = 0x100 - sum; - hdmi_write_reg(av_base, HDMI_CORE_AV_AVI_CHSUM, checksum); -} - -static void hdmi_core_av_packet_config(struct hdmi_ip_data *ip_data, - struct hdmi_core_packet_enable_repeat repeat_cfg) -{ - /* enable/repeat the infoframe */ - hdmi_write_reg(hdmi_av_base(ip_data), HDMI_CORE_AV_PB_CTRL1, - (repeat_cfg.audio_pkt << 5) | - (repeat_cfg.audio_pkt_repeat << 4) | - (repeat_cfg.avi_infoframe << 1) | - (repeat_cfg.avi_infoframe_repeat)); - - /* enable/repeat the packet */ - hdmi_write_reg(hdmi_av_base(ip_data), HDMI_CORE_AV_PB_CTRL2, - (repeat_cfg.gen_cntrl_pkt << 3) | - (repeat_cfg.gen_cntrl_pkt_repeat << 2) | - (repeat_cfg.generic_pkt << 1) | - (repeat_cfg.generic_pkt_repeat)); -} - -static void hdmi_wp_init(struct omap_video_timings *timings, - struct hdmi_video_format *video_fmt, - struct hdmi_video_interface *video_int) -{ - pr_debug("Enter hdmi_wp_init\n"); - - timings->hbp = 0; - timings->hfp = 0; - timings->hsw = 0; - timings->vbp = 0; - timings->vfp = 0; - timings->vsw = 0; - - video_fmt->packing_mode = HDMI_PACK_10b_RGB_YUV444; - video_fmt->y_res = 0; - video_fmt->x_res = 0; - - video_int->vsp = 0; - video_int->hsp = 0; - - video_int->interlacing = 0; - video_int->tm = 0; /* HDMI_TIMING_SLAVE */ - -} - -void ti_hdmi_4xxx_wp_video_start(struct hdmi_ip_data *ip_data, bool start) -{ - REG_FLD_MOD(hdmi_wp_base(ip_data), HDMI_WP_VIDEO_CFG, start, 31, 31); -} - -static void hdmi_wp_video_init_format(struct hdmi_video_format *video_fmt, - struct omap_video_timings *timings, struct hdmi_config *param) -{ - pr_debug("Enter hdmi_wp_video_init_format\n"); - - video_fmt->y_res = param->timings.timings.y_res; - video_fmt->x_res = param->timings.timings.x_res; - - timings->hbp = param->timings.timings.hbp; - timings->hfp = param->timings.timings.hfp; - timings->hsw = param->timings.timings.hsw; - timings->vbp = param->timings.timings.vbp; - timings->vfp = param->timings.timings.vfp; - timings->vsw = param->timings.timings.vsw; -} - -static void hdmi_wp_video_config_format(struct hdmi_ip_data *ip_data, - struct hdmi_video_format *video_fmt) -{ - u32 l = 0; - - REG_FLD_MOD(hdmi_wp_base(ip_data), HDMI_WP_VIDEO_CFG, - video_fmt->packing_mode, 10, 8); - - l |= FLD_VAL(video_fmt->y_res, 31, 16); - l |= FLD_VAL(video_fmt->x_res, 15, 0); - hdmi_write_reg(hdmi_wp_base(ip_data), HDMI_WP_VIDEO_SIZE, l); -} - -static void hdmi_wp_video_config_interface(struct hdmi_ip_data *ip_data, - struct hdmi_video_interface *video_int) -{ - u32 r; - pr_debug("Enter hdmi_wp_video_config_interface\n"); - - r = hdmi_read_reg(hdmi_wp_base(ip_data), HDMI_WP_VIDEO_CFG); - r = FLD_MOD(r, video_int->vsp, 7, 7); - r = FLD_MOD(r, video_int->hsp, 6, 6); - r = FLD_MOD(r, video_int->interlacing, 3, 3); - r = FLD_MOD(r, video_int->tm, 1, 0); - hdmi_write_reg(hdmi_wp_base(ip_data), HDMI_WP_VIDEO_CFG, r); -} - -static void hdmi_wp_video_config_timing(struct hdmi_ip_data *ip_data, - struct omap_video_timings *timings) -{ - u32 timing_h = 0; - u32 timing_v = 0; - - pr_debug("Enter hdmi_wp_video_config_timing\n"); - - timing_h |= FLD_VAL(timings->hbp, 31, 20); - timing_h |= FLD_VAL(timings->hfp, 19, 8); - timing_h |= FLD_VAL(timings->hsw, 7, 0); - hdmi_write_reg(hdmi_wp_base(ip_data), HDMI_WP_VIDEO_TIMING_H, timing_h); - - timing_v |= FLD_VAL(timings->vbp, 31, 20); - timing_v |= FLD_VAL(timings->vfp, 19, 8); - timing_v |= FLD_VAL(timings->vsw, 7, 0); - hdmi_write_reg(hdmi_wp_base(ip_data), HDMI_WP_VIDEO_TIMING_V, timing_v); -} - -void ti_hdmi_4xxx_basic_configure(struct hdmi_ip_data *ip_data) -{ - /* HDMI */ - struct omap_video_timings video_timing; - struct hdmi_video_format video_format; - struct hdmi_video_interface video_interface; - /* HDMI core */ - struct hdmi_core_infoframe_avi avi_cfg; - struct hdmi_core_video_config v_core_cfg; - struct hdmi_core_packet_enable_repeat repeat_cfg; - struct hdmi_config *cfg = &ip_data->cfg; - - hdmi_wp_init(&video_timing, &video_format, - &video_interface); - - hdmi_core_init(&v_core_cfg, - &avi_cfg, - &repeat_cfg); - - hdmi_wp_video_init_format(&video_format, &video_timing, cfg); - - hdmi_wp_video_config_timing(ip_data, &video_timing); - - /* video config */ - video_format.packing_mode = HDMI_PACK_24b_RGB_YUV444_YUV422; - - hdmi_wp_video_config_format(ip_data, &video_format); - - video_interface.vsp = cfg->timings.vsync_pol; - video_interface.hsp = cfg->timings.hsync_pol; - video_interface.interlacing = cfg->interlace; - video_interface.tm = 1 ; /* HDMI_TIMING_MASTER_24BIT */ - - hdmi_wp_video_config_interface(ip_data, &video_interface); - - /* - * configure core video part - * set software reset in the core - */ - hdmi_core_swreset_assert(ip_data); - - /* power down off */ - hdmi_core_powerdown_disable(ip_data); - - v_core_cfg.pkt_mode = HDMI_PACKETMODE24BITPERPIXEL; - v_core_cfg.hdmi_dvi = cfg->cm.mode; - - hdmi_core_video_config(ip_data, &v_core_cfg); - - /* release software reset in the core */ - hdmi_core_swreset_release(ip_data); - - /* - * configure packet - * info frame video see doc CEA861-D page 65 - */ - avi_cfg.db1_format = HDMI_INFOFRAME_AVI_DB1Y_RGB; - avi_cfg.db1_active_info = - HDMI_INFOFRAME_AVI_DB1A_ACTIVE_FORMAT_OFF; - avi_cfg.db1_bar_info_dv = HDMI_INFOFRAME_AVI_DB1B_NO; - avi_cfg.db1_scan_info = HDMI_INFOFRAME_AVI_DB1S_0; - avi_cfg.db2_colorimetry = HDMI_INFOFRAME_AVI_DB2C_NO; - avi_cfg.db2_aspect_ratio = HDMI_INFOFRAME_AVI_DB2M_NO; - avi_cfg.db2_active_fmt_ar = HDMI_INFOFRAME_AVI_DB2R_SAME; - avi_cfg.db3_itc = HDMI_INFOFRAME_AVI_DB3ITC_NO; - avi_cfg.db3_ec = HDMI_INFOFRAME_AVI_DB3EC_XVYUV601; - avi_cfg.db3_q_range = HDMI_INFOFRAME_AVI_DB3Q_DEFAULT; - avi_cfg.db3_nup_scaling = HDMI_INFOFRAME_AVI_DB3SC_NO; - avi_cfg.db4_videocode = cfg->cm.code; - avi_cfg.db5_pixel_repeat = HDMI_INFOFRAME_AVI_DB5PR_NO; - avi_cfg.db6_7_line_eoftop = 0; - avi_cfg.db8_9_line_sofbottom = 0; - avi_cfg.db10_11_pixel_eofleft = 0; - avi_cfg.db12_13_pixel_sofright = 0; - - hdmi_core_aux_infoframe_avi_config(ip_data, avi_cfg); - - /* enable/repeat the infoframe */ - repeat_cfg.avi_infoframe = HDMI_PACKETENABLE; - repeat_cfg.avi_infoframe_repeat = HDMI_PACKETREPEATON; - /* wakeup */ - repeat_cfg.audio_pkt = HDMI_PACKETENABLE; - repeat_cfg.audio_pkt_repeat = HDMI_PACKETREPEATON; - hdmi_core_av_packet_config(ip_data, repeat_cfg); -} - -void ti_hdmi_4xxx_wp_dump(struct hdmi_ip_data *ip_data, struct seq_file *s) -{ -#define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r,\ - hdmi_read_reg(hdmi_wp_base(ip_data), r)) - - DUMPREG(HDMI_WP_REVISION); - DUMPREG(HDMI_WP_SYSCONFIG); - DUMPREG(HDMI_WP_IRQSTATUS_RAW); - DUMPREG(HDMI_WP_IRQSTATUS); - DUMPREG(HDMI_WP_PWR_CTRL); - DUMPREG(HDMI_WP_IRQENABLE_SET); - DUMPREG(HDMI_WP_VIDEO_CFG); - DUMPREG(HDMI_WP_VIDEO_SIZE); - DUMPREG(HDMI_WP_VIDEO_TIMING_H); - DUMPREG(HDMI_WP_VIDEO_TIMING_V); - DUMPREG(HDMI_WP_WP_CLK); - DUMPREG(HDMI_WP_AUDIO_CFG); - DUMPREG(HDMI_WP_AUDIO_CFG2); - DUMPREG(HDMI_WP_AUDIO_CTRL); - DUMPREG(HDMI_WP_AUDIO_DATA); -} - -void ti_hdmi_4xxx_pll_dump(struct hdmi_ip_data *ip_data, struct seq_file *s) -{ -#define DUMPPLL(r) seq_printf(s, "%-35s %08x\n", #r,\ - hdmi_read_reg(hdmi_pll_base(ip_data), r)) - - DUMPPLL(PLLCTRL_PLL_CONTROL); - DUMPPLL(PLLCTRL_PLL_STATUS); - DUMPPLL(PLLCTRL_PLL_GO); - DUMPPLL(PLLCTRL_CFG1); - DUMPPLL(PLLCTRL_CFG2); - DUMPPLL(PLLCTRL_CFG3); - DUMPPLL(PLLCTRL_CFG4); -} - -void ti_hdmi_4xxx_core_dump(struct hdmi_ip_data *ip_data, struct seq_file *s) -{ - int i; - -#define CORE_REG(i, name) name(i) -#define DUMPCORE(r) seq_printf(s, "%-35s %08x\n", #r,\ - hdmi_read_reg(hdmi_pll_base(ip_data), r)) -#define DUMPCOREAV(i, r) seq_printf(s, "%s[%d]%*s %08x\n", #r, i, \ - (i < 10) ? 32 - strlen(#r) : 31 - strlen(#r), " ", \ - hdmi_read_reg(hdmi_pll_base(ip_data), CORE_REG(i, r))) - - DUMPCORE(HDMI_CORE_SYS_VND_IDL); - DUMPCORE(HDMI_CORE_SYS_DEV_IDL); - DUMPCORE(HDMI_CORE_SYS_DEV_IDH); - DUMPCORE(HDMI_CORE_SYS_DEV_REV); - DUMPCORE(HDMI_CORE_SYS_SRST); - DUMPCORE(HDMI_CORE_CTRL1); - DUMPCORE(HDMI_CORE_SYS_SYS_STAT); - DUMPCORE(HDMI_CORE_SYS_VID_ACEN); - DUMPCORE(HDMI_CORE_SYS_VID_MODE); - DUMPCORE(HDMI_CORE_SYS_INTR_STATE); - DUMPCORE(HDMI_CORE_SYS_INTR1); - DUMPCORE(HDMI_CORE_SYS_INTR2); - DUMPCORE(HDMI_CORE_SYS_INTR3); - DUMPCORE(HDMI_CORE_SYS_INTR4); - DUMPCORE(HDMI_CORE_SYS_UMASK1); - DUMPCORE(HDMI_CORE_SYS_TMDS_CTRL); - DUMPCORE(HDMI_CORE_SYS_DE_DLY); - DUMPCORE(HDMI_CORE_SYS_DE_CTRL); - DUMPCORE(HDMI_CORE_SYS_DE_TOP); - DUMPCORE(HDMI_CORE_SYS_DE_CNTL); - DUMPCORE(HDMI_CORE_SYS_DE_CNTH); - DUMPCORE(HDMI_CORE_SYS_DE_LINL); - DUMPCORE(HDMI_CORE_SYS_DE_LINH_1); - - DUMPCORE(HDMI_CORE_DDC_CMD); - DUMPCORE(HDMI_CORE_DDC_STATUS); - DUMPCORE(HDMI_CORE_DDC_ADDR); - DUMPCORE(HDMI_CORE_DDC_OFFSET); - DUMPCORE(HDMI_CORE_DDC_COUNT1); - DUMPCORE(HDMI_CORE_DDC_COUNT2); - DUMPCORE(HDMI_CORE_DDC_DATA); - DUMPCORE(HDMI_CORE_DDC_SEGM); - - DUMPCORE(HDMI_CORE_AV_HDMI_CTRL); - DUMPCORE(HDMI_CORE_AV_DPD); - DUMPCORE(HDMI_CORE_AV_PB_CTRL1); - DUMPCORE(HDMI_CORE_AV_PB_CTRL2); - DUMPCORE(HDMI_CORE_AV_AVI_TYPE); - DUMPCORE(HDMI_CORE_AV_AVI_VERS); - DUMPCORE(HDMI_CORE_AV_AVI_LEN); - DUMPCORE(HDMI_CORE_AV_AVI_CHSUM); - - for (i = 0; i < HDMI_CORE_AV_AVI_DBYTE_NELEMS; i++) - DUMPCOREAV(i, HDMI_CORE_AV_AVI_DBYTE); - - for (i = 0; i < HDMI_CORE_AV_SPD_DBYTE_NELEMS; i++) - DUMPCOREAV(i, HDMI_CORE_AV_SPD_DBYTE); - - for (i = 0; i < HDMI_CORE_AV_AUD_DBYTE_NELEMS; i++) - DUMPCOREAV(i, HDMI_CORE_AV_AUD_DBYTE); - - for (i = 0; i < HDMI_CORE_AV_MPEG_DBYTE_NELEMS; i++) - DUMPCOREAV(i, HDMI_CORE_AV_MPEG_DBYTE); - - for (i = 0; i < HDMI_CORE_AV_GEN_DBYTE_NELEMS; i++) - DUMPCOREAV(i, HDMI_CORE_AV_GEN_DBYTE); - - for (i = 0; i < HDMI_CORE_AV_GEN2_DBYTE_NELEMS; i++) - DUMPCOREAV(i, HDMI_CORE_AV_GEN2_DBYTE); - - DUMPCORE(HDMI_CORE_AV_ACR_CTRL); - DUMPCORE(HDMI_CORE_AV_FREQ_SVAL); - DUMPCORE(HDMI_CORE_AV_N_SVAL1); - DUMPCORE(HDMI_CORE_AV_N_SVAL2); - DUMPCORE(HDMI_CORE_AV_N_SVAL3); - DUMPCORE(HDMI_CORE_AV_CTS_SVAL1); - DUMPCORE(HDMI_CORE_AV_CTS_SVAL2); - DUMPCORE(HDMI_CORE_AV_CTS_SVAL3); - DUMPCORE(HDMI_CORE_AV_CTS_HVAL1); - DUMPCORE(HDMI_CORE_AV_CTS_HVAL2); - DUMPCORE(HDMI_CORE_AV_CTS_HVAL3); - DUMPCORE(HDMI_CORE_AV_AUD_MODE); - DUMPCORE(HDMI_CORE_AV_SPDIF_CTRL); - DUMPCORE(HDMI_CORE_AV_HW_SPDIF_FS); - DUMPCORE(HDMI_CORE_AV_SWAP_I2S); - DUMPCORE(HDMI_CORE_AV_SPDIF_ERTH); - DUMPCORE(HDMI_CORE_AV_I2S_IN_MAP); - DUMPCORE(HDMI_CORE_AV_I2S_IN_CTRL); - DUMPCORE(HDMI_CORE_AV_I2S_CHST0); - DUMPCORE(HDMI_CORE_AV_I2S_CHST1); - DUMPCORE(HDMI_CORE_AV_I2S_CHST2); - DUMPCORE(HDMI_CORE_AV_I2S_CHST4); - DUMPCORE(HDMI_CORE_AV_I2S_CHST5); - DUMPCORE(HDMI_CORE_AV_ASRC); - DUMPCORE(HDMI_CORE_AV_I2S_IN_LEN); - DUMPCORE(HDMI_CORE_AV_HDMI_CTRL); - DUMPCORE(HDMI_CORE_AV_AUDO_TXSTAT); - DUMPCORE(HDMI_CORE_AV_AUD_PAR_BUSCLK_1); - DUMPCORE(HDMI_CORE_AV_AUD_PAR_BUSCLK_2); - DUMPCORE(HDMI_CORE_AV_AUD_PAR_BUSCLK_3); - DUMPCORE(HDMI_CORE_AV_TEST_TXCTRL); - DUMPCORE(HDMI_CORE_AV_DPD); - DUMPCORE(HDMI_CORE_AV_PB_CTRL1); - DUMPCORE(HDMI_CORE_AV_PB_CTRL2); - DUMPCORE(HDMI_CORE_AV_AVI_TYPE); - DUMPCORE(HDMI_CORE_AV_AVI_VERS); - DUMPCORE(HDMI_CORE_AV_AVI_LEN); - DUMPCORE(HDMI_CORE_AV_AVI_CHSUM); - DUMPCORE(HDMI_CORE_AV_SPD_TYPE); - DUMPCORE(HDMI_CORE_AV_SPD_VERS); - DUMPCORE(HDMI_CORE_AV_SPD_LEN); - DUMPCORE(HDMI_CORE_AV_SPD_CHSUM); - DUMPCORE(HDMI_CORE_AV_AUDIO_TYPE); - DUMPCORE(HDMI_CORE_AV_AUDIO_VERS); - DUMPCORE(HDMI_CORE_AV_AUDIO_LEN); - DUMPCORE(HDMI_CORE_AV_AUDIO_CHSUM); - DUMPCORE(HDMI_CORE_AV_MPEG_TYPE); - DUMPCORE(HDMI_CORE_AV_MPEG_VERS); - DUMPCORE(HDMI_CORE_AV_MPEG_LEN); - DUMPCORE(HDMI_CORE_AV_MPEG_CHSUM); - DUMPCORE(HDMI_CORE_AV_CP_BYTE1); - DUMPCORE(HDMI_CORE_AV_CEC_ADDR_ID); -} - -void ti_hdmi_4xxx_phy_dump(struct hdmi_ip_data *ip_data, struct seq_file *s) -{ -#define DUMPPHY(r) seq_printf(s, "%-35s %08x\n", #r,\ - hdmi_read_reg(hdmi_phy_base(ip_data), r)) - - DUMPPHY(HDMI_TXPHY_TX_CTRL); - DUMPPHY(HDMI_TXPHY_DIGITAL_CTRL); - DUMPPHY(HDMI_TXPHY_POWER_CTRL); - DUMPPHY(HDMI_TXPHY_PAD_CFG_CTRL); -} - -#if defined(CONFIG_SND_OMAP_SOC_OMAP4_HDMI) || \ - defined(CONFIG_SND_OMAP_SOC_OMAP4_HDMI_MODULE) -void hdmi_wp_audio_config_format(struct hdmi_ip_data *ip_data, - struct hdmi_audio_format *aud_fmt) -{ - u32 r; - - DSSDBG("Enter hdmi_wp_audio_config_format\n"); - - r = hdmi_read_reg(hdmi_wp_base(ip_data), HDMI_WP_AUDIO_CFG); - r = FLD_MOD(r, aud_fmt->stereo_channels, 26, 24); - r = FLD_MOD(r, aud_fmt->active_chnnls_msk, 23, 16); - r = FLD_MOD(r, aud_fmt->en_sig_blk_strt_end, 5, 5); - r = FLD_MOD(r, aud_fmt->type, 4, 4); - r = FLD_MOD(r, aud_fmt->justification, 3, 3); - r = FLD_MOD(r, aud_fmt->sample_order, 2, 2); - r = FLD_MOD(r, aud_fmt->samples_per_word, 1, 1); - r = FLD_MOD(r, aud_fmt->sample_size, 0, 0); - hdmi_write_reg(hdmi_wp_base(ip_data), HDMI_WP_AUDIO_CFG, r); -} - -void hdmi_wp_audio_config_dma(struct hdmi_ip_data *ip_data, - struct hdmi_audio_dma *aud_dma) -{ - u32 r; - - DSSDBG("Enter hdmi_wp_audio_config_dma\n"); - - r = hdmi_read_reg(hdmi_wp_base(ip_data), HDMI_WP_AUDIO_CFG2); - r = FLD_MOD(r, aud_dma->transfer_size, 15, 8); - r = FLD_MOD(r, aud_dma->block_size, 7, 0); - hdmi_write_reg(hdmi_wp_base(ip_data), HDMI_WP_AUDIO_CFG2, r); - - r = hdmi_read_reg(hdmi_wp_base(ip_data), HDMI_WP_AUDIO_CTRL); - r = FLD_MOD(r, aud_dma->mode, 9, 9); - r = FLD_MOD(r, aud_dma->fifo_threshold, 8, 0); - hdmi_write_reg(hdmi_wp_base(ip_data), HDMI_WP_AUDIO_CTRL, r); -} - -void hdmi_core_audio_config(struct hdmi_ip_data *ip_data, - struct hdmi_core_audio_config *cfg) -{ - u32 r; - void __iomem *av_base = hdmi_av_base(ip_data); - - /* audio clock recovery parameters */ - r = hdmi_read_reg(av_base, HDMI_CORE_AV_ACR_CTRL); - r = FLD_MOD(r, cfg->use_mclk, 2, 2); - r = FLD_MOD(r, cfg->en_acr_pkt, 1, 1); - r = FLD_MOD(r, cfg->cts_mode, 0, 0); - hdmi_write_reg(av_base, HDMI_CORE_AV_ACR_CTRL, r); - - REG_FLD_MOD(av_base, HDMI_CORE_AV_N_SVAL1, cfg->n, 7, 0); - REG_FLD_MOD(av_base, HDMI_CORE_AV_N_SVAL2, cfg->n >> 8, 7, 0); - REG_FLD_MOD(av_base, HDMI_CORE_AV_N_SVAL3, cfg->n >> 16, 7, 0); - - if (cfg->cts_mode == HDMI_AUDIO_CTS_MODE_SW) { - REG_FLD_MOD(av_base, HDMI_CORE_AV_CTS_SVAL1, cfg->cts, 7, 0); - REG_FLD_MOD(av_base, - HDMI_CORE_AV_CTS_SVAL2, cfg->cts >> 8, 7, 0); - REG_FLD_MOD(av_base, - HDMI_CORE_AV_CTS_SVAL3, cfg->cts >> 16, 7, 0); - } else { - /* - * HDMI IP uses this configuration to divide the MCLK to - * update CTS value. - */ - REG_FLD_MOD(av_base, - HDMI_CORE_AV_FREQ_SVAL, cfg->mclk_mode, 2, 0); - - /* Configure clock for audio packets */ - REG_FLD_MOD(av_base, HDMI_CORE_AV_AUD_PAR_BUSCLK_1, - cfg->aud_par_busclk, 7, 0); - REG_FLD_MOD(av_base, HDMI_CORE_AV_AUD_PAR_BUSCLK_2, - (cfg->aud_par_busclk >> 8), 7, 0); - REG_FLD_MOD(av_base, HDMI_CORE_AV_AUD_PAR_BUSCLK_3, - (cfg->aud_par_busclk >> 16), 7, 0); - } - - /* Override of SPDIF sample frequency with value in I2S_CHST4 */ - REG_FLD_MOD(av_base, HDMI_CORE_AV_SPDIF_CTRL, - cfg->fs_override, 1, 1); - - /* I2S parameters */ - REG_FLD_MOD(av_base, HDMI_CORE_AV_I2S_CHST4, - cfg->freq_sample, 3, 0); - - r = hdmi_read_reg(av_base, HDMI_CORE_AV_I2S_IN_CTRL); - r = FLD_MOD(r, cfg->i2s_cfg.en_high_bitrate_aud, 7, 7); - r = FLD_MOD(r, cfg->i2s_cfg.sck_edge_mode, 6, 6); - r = FLD_MOD(r, cfg->i2s_cfg.cbit_order, 5, 5); - r = FLD_MOD(r, cfg->i2s_cfg.vbit, 4, 4); - r = FLD_MOD(r, cfg->i2s_cfg.ws_polarity, 3, 3); - r = FLD_MOD(r, cfg->i2s_cfg.justification, 2, 2); - r = FLD_MOD(r, cfg->i2s_cfg.direction, 1, 1); - r = FLD_MOD(r, cfg->i2s_cfg.shift, 0, 0); - hdmi_write_reg(av_base, HDMI_CORE_AV_I2S_IN_CTRL, r); - - r = hdmi_read_reg(av_base, HDMI_CORE_AV_I2S_CHST5); - r = FLD_MOD(r, cfg->freq_sample, 7, 4); - r = FLD_MOD(r, cfg->i2s_cfg.word_length, 3, 1); - r = FLD_MOD(r, cfg->i2s_cfg.word_max_length, 0, 0); - hdmi_write_reg(av_base, HDMI_CORE_AV_I2S_CHST5, r); - - REG_FLD_MOD(av_base, HDMI_CORE_AV_I2S_IN_LEN, - cfg->i2s_cfg.in_length_bits, 3, 0); - - /* Audio channels and mode parameters */ - REG_FLD_MOD(av_base, HDMI_CORE_AV_HDMI_CTRL, cfg->layout, 2, 1); - r = hdmi_read_reg(av_base, HDMI_CORE_AV_AUD_MODE); - r = FLD_MOD(r, cfg->i2s_cfg.active_sds, 7, 4); - r = FLD_MOD(r, cfg->en_dsd_audio, 3, 3); - r = FLD_MOD(r, cfg->en_parallel_aud_input, 2, 2); - r = FLD_MOD(r, cfg->en_spdif, 1, 1); - hdmi_write_reg(av_base, HDMI_CORE_AV_AUD_MODE, r); -} - -void hdmi_core_audio_infoframe_config(struct hdmi_ip_data *ip_data, - struct hdmi_core_infoframe_audio *info_aud) -{ - u8 val; - u8 sum = 0, checksum = 0; - void __iomem *av_base = hdmi_av_base(ip_data); - - /* - * Set audio info frame type, version and length as - * described in HDMI 1.4a Section 8.2.2 specification. - * Checksum calculation is defined in Section 5.3.5. - */ - hdmi_write_reg(av_base, HDMI_CORE_AV_AUDIO_TYPE, 0x84); - hdmi_write_reg(av_base, HDMI_CORE_AV_AUDIO_VERS, 0x01); - hdmi_write_reg(av_base, HDMI_CORE_AV_AUDIO_LEN, 0x0a); - sum += 0x84 + 0x001 + 0x00a; - - val = (info_aud->db1_coding_type << 4) - | (info_aud->db1_channel_count - 1); - hdmi_write_reg(av_base, HDMI_CORE_AV_AUD_DBYTE(0), val); - sum += val; - - val = (info_aud->db2_sample_freq << 2) | info_aud->db2_sample_size; - hdmi_write_reg(av_base, HDMI_CORE_AV_AUD_DBYTE(1), val); - sum += val; - - hdmi_write_reg(av_base, HDMI_CORE_AV_AUD_DBYTE(2), 0x00); - - val = info_aud->db4_channel_alloc; - hdmi_write_reg(av_base, HDMI_CORE_AV_AUD_DBYTE(3), val); - sum += val; - - val = (info_aud->db5_downmix_inh << 7) | (info_aud->db5_lsv << 3); - hdmi_write_reg(av_base, HDMI_CORE_AV_AUD_DBYTE(4), val); - sum += val; - - hdmi_write_reg(av_base, HDMI_CORE_AV_AUD_DBYTE(5), 0x00); - hdmi_write_reg(av_base, HDMI_CORE_AV_AUD_DBYTE(6), 0x00); - hdmi_write_reg(av_base, HDMI_CORE_AV_AUD_DBYTE(7), 0x00); - hdmi_write_reg(av_base, HDMI_CORE_AV_AUD_DBYTE(8), 0x00); - hdmi_write_reg(av_base, HDMI_CORE_AV_AUD_DBYTE(9), 0x00); - - checksum = 0x100 - sum; - hdmi_write_reg(av_base, - HDMI_CORE_AV_AUDIO_CHSUM, checksum); - - /* - * TODO: Add MPEG and SPD enable and repeat cfg when EDID parsing - * is available. - */ -} - -int hdmi_config_audio_acr(struct hdmi_ip_data *ip_data, - u32 sample_freq, u32 *n, u32 *cts) -{ - u32 r; - u32 deep_color = 0; - u32 pclk = ip_data->cfg.timings.timings.pixel_clock; - - if (n == NULL || cts == NULL) - return -EINVAL; - /* - * Obtain current deep color configuration. This needed - * to calculate the TMDS clock based on the pixel clock. - */ - r = REG_GET(hdmi_wp_base(ip_data), HDMI_WP_VIDEO_CFG, 1, 0); - switch (r) { - case 1: /* No deep color selected */ - deep_color = 100; - break; - case 2: /* 10-bit deep color selected */ - deep_color = 125; - break; - case 3: /* 12-bit deep color selected */ - deep_color = 150; - break; - default: - return -EINVAL; - } - - switch (sample_freq) { - case 32000: - if ((deep_color == 125) && ((pclk == 54054) - || (pclk == 74250))) - *n = 8192; - else - *n = 4096; - break; - case 44100: - *n = 6272; - break; - case 48000: - if ((deep_color == 125) && ((pclk == 54054) - || (pclk == 74250))) - *n = 8192; - else - *n = 6144; - break; - default: - *n = 0; - return -EINVAL; - } - - /* Calculate CTS. See HDMI 1.3a or 1.4a specifications */ - *cts = pclk * (*n / 128) * deep_color / (sample_freq / 10); - - return 0; -} - -void ti_hdmi_4xxx_wp_audio_enable(struct hdmi_ip_data *ip_data, bool enable) -{ - REG_FLD_MOD(hdmi_av_base(ip_data), - HDMI_CORE_AV_AUD_MODE, enable, 0, 0); - REG_FLD_MOD(hdmi_wp_base(ip_data), - HDMI_WP_AUDIO_CTRL, enable, 31, 31); - REG_FLD_MOD(hdmi_wp_base(ip_data), - HDMI_WP_AUDIO_CTRL, enable, 30, 30); -} -#endif diff --git a/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.h b/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.h deleted file mode 100644 index a442998980f..00000000000 --- a/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.h +++ /dev/null @@ -1,590 +0,0 @@ -/* - * ti_hdmi_4xxx_ip.h - * - * HDMI header definition for DM81xx, DM38xx, TI OMAP4 etc processors. - * - * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com/ - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program. If not, see <http://www.gnu.org/licenses/>. - */ - -#ifndef _HDMI_TI_4xxx_H_ -#define _HDMI_TI_4xxx_H_ - -#include <linux/string.h> -#include <video/omapdss.h> -#include "ti_hdmi.h" -#if defined(CONFIG_SND_OMAP_SOC_OMAP4_HDMI) || \ - defined(CONFIG_SND_OMAP_SOC_OMAP4_HDMI_MODULE) -#include <sound/soc.h> -#include <sound/pcm_params.h> -#endif - -/* HDMI Wrapper */ - -#define HDMI_WP_REVISION 0x0 -#define HDMI_WP_SYSCONFIG 0x10 -#define HDMI_WP_IRQSTATUS_RAW 0x24 -#define HDMI_WP_IRQSTATUS 0x28 -#define HDMI_WP_PWR_CTRL 0x40 -#define HDMI_WP_IRQENABLE_SET 0x2C -#define HDMI_WP_VIDEO_CFG 0x50 -#define HDMI_WP_VIDEO_SIZE 0x60 -#define HDMI_WP_VIDEO_TIMING_H 0x68 -#define HDMI_WP_VIDEO_TIMING_V 0x6C -#define HDMI_WP_WP_CLK 0x70 -#define HDMI_WP_AUDIO_CFG 0x80 -#define HDMI_WP_AUDIO_CFG2 0x84 -#define HDMI_WP_AUDIO_CTRL 0x88 -#define HDMI_WP_AUDIO_DATA 0x8C - -/* HDMI IP Core System */ - -#define HDMI_CORE_SYS_VND_IDL 0x0 -#define HDMI_CORE_SYS_DEV_IDL 0x8 -#define HDMI_CORE_SYS_DEV_IDH 0xC -#define HDMI_CORE_SYS_DEV_REV 0x10 -#define HDMI_CORE_SYS_SRST 0x14 -#define HDMI_CORE_CTRL1 0x20 -#define HDMI_CORE_SYS_SYS_STAT 0x24 -#define HDMI_CORE_SYS_VID_ACEN 0x124 -#define HDMI_CORE_SYS_VID_MODE 0x128 -#define HDMI_CORE_SYS_INTR_STATE 0x1C0 -#define HDMI_CORE_SYS_INTR1 0x1C4 -#define HDMI_CORE_SYS_INTR2 0x1C8 -#define HDMI_CORE_SYS_INTR3 0x1CC -#define HDMI_CORE_SYS_INTR4 0x1D0 -#define HDMI_CORE_SYS_UMASK1 0x1D4 -#define HDMI_CORE_SYS_TMDS_CTRL 0x208 -#define HDMI_CORE_SYS_DE_DLY 0xC8 -#define HDMI_CORE_SYS_DE_CTRL 0xCC -#define HDMI_CORE_SYS_DE_TOP 0xD0 -#define HDMI_CORE_SYS_DE_CNTL 0xD8 -#define HDMI_CORE_SYS_DE_CNTH 0xDC -#define HDMI_CORE_SYS_DE_LINL 0xE0 -#define HDMI_CORE_SYS_DE_LINH_1 0xE4 -#define HDMI_CORE_CTRL1_VEN_FOLLOWVSYNC 0x1 -#define HDMI_CORE_CTRL1_HEN_FOLLOWHSYNC 0x1 -#define HDMI_CORE_CTRL1_BSEL_24BITBUS 0x1 -#define HDMI_CORE_CTRL1_EDGE_RISINGEDGE 0x1 - -/* HDMI DDC E-DID */ -#define HDMI_CORE_DDC_CMD 0x3CC -#define HDMI_CORE_DDC_STATUS 0x3C8 -#define HDMI_CORE_DDC_ADDR 0x3B4 -#define HDMI_CORE_DDC_OFFSET 0x3BC -#define HDMI_CORE_DDC_COUNT1 0x3C0 -#define HDMI_CORE_DDC_COUNT2 0x3C4 -#define HDMI_CORE_DDC_DATA 0x3D0 -#define HDMI_CORE_DDC_SEGM 0x3B8 - -/* HDMI IP Core Audio Video */ - -#define HDMI_CORE_AV_HDMI_CTRL 0xBC -#define HDMI_CORE_AV_DPD 0xF4 -#define HDMI_CORE_AV_PB_CTRL1 0xF8 -#define HDMI_CORE_AV_PB_CTRL2 0xFC -#define HDMI_CORE_AV_AVI_TYPE 0x100 -#define HDMI_CORE_AV_AVI_VERS 0x104 -#define HDMI_CORE_AV_AVI_LEN 0x108 -#define HDMI_CORE_AV_AVI_CHSUM 0x10C -#define HDMI_CORE_AV_AVI_DBYTE(n) (n * 4 + 0x110) -#define HDMI_CORE_AV_AVI_DBYTE_NELEMS 15 -#define HDMI_CORE_AV_SPD_DBYTE(n) (n * 4 + 0x190) -#define HDMI_CORE_AV_SPD_DBYTE_NELEMS 27 -#define HDMI_CORE_AV_AUD_DBYTE(n) (n * 4 + 0x210) -#define HDMI_CORE_AV_AUD_DBYTE_NELEMS 10 -#define HDMI_CORE_AV_MPEG_DBYTE(n) (n * 4 + 0x290) -#define HDMI_CORE_AV_MPEG_DBYTE_NELEMS 27 -#define HDMI_CORE_AV_GEN_DBYTE(n) (n * 4 + 0x300) -#define HDMI_CORE_AV_GEN_DBYTE_NELEMS 31 -#define HDMI_CORE_AV_GEN2_DBYTE(n) (n * 4 + 0x380) -#define HDMI_CORE_AV_GEN2_DBYTE_NELEMS 31 -#define HDMI_CORE_AV_ACR_CTRL 0x4 -#define HDMI_CORE_AV_FREQ_SVAL 0x8 -#define HDMI_CORE_AV_N_SVAL1 0xC -#define HDMI_CORE_AV_N_SVAL2 0x10 -#define HDMI_CORE_AV_N_SVAL3 0x14 -#define HDMI_CORE_AV_CTS_SVAL1 0x18 -#define HDMI_CORE_AV_CTS_SVAL2 0x1C -#define HDMI_CORE_AV_CTS_SVAL3 0x20 -#define HDMI_CORE_AV_CTS_HVAL1 0x24 -#define HDMI_CORE_AV_CTS_HVAL2 0x28 -#define HDMI_CORE_AV_CTS_HVAL3 0x2C -#define HDMI_CORE_AV_AUD_MODE 0x50 -#define HDMI_CORE_AV_SPDIF_CTRL 0x54 -#define HDMI_CORE_AV_HW_SPDIF_FS 0x60 -#define HDMI_CORE_AV_SWAP_I2S 0x64 -#define HDMI_CORE_AV_SPDIF_ERTH 0x6C -#define HDMI_CORE_AV_I2S_IN_MAP 0x70 -#define HDMI_CORE_AV_I2S_IN_CTRL 0x74 -#define HDMI_CORE_AV_I2S_CHST0 0x78 -#define HDMI_CORE_AV_I2S_CHST1 0x7C -#define HDMI_CORE_AV_I2S_CHST2 0x80 -#define HDMI_CORE_AV_I2S_CHST4 0x84 -#define HDMI_CORE_AV_I2S_CHST5 0x88 -#define HDMI_CORE_AV_ASRC 0x8C -#define HDMI_CORE_AV_I2S_IN_LEN 0x90 -#define HDMI_CORE_AV_HDMI_CTRL 0xBC -#define HDMI_CORE_AV_AUDO_TXSTAT 0xC0 -#define HDMI_CORE_AV_AUD_PAR_BUSCLK_1 0xCC -#define HDMI_CORE_AV_AUD_PAR_BUSCLK_2 0xD0 -#define HDMI_CORE_AV_AUD_PAR_BUSCLK_3 0xD4 -#define HDMI_CORE_AV_TEST_TXCTRL 0xF0 -#define HDMI_CORE_AV_DPD 0xF4 -#define HDMI_CORE_AV_PB_CTRL1 0xF8 -#define HDMI_CORE_AV_PB_CTRL2 0xFC -#define HDMI_CORE_AV_AVI_TYPE 0x100 -#define HDMI_CORE_AV_AVI_VERS 0x104 -#define HDMI_CORE_AV_AVI_LEN 0x108 -#define HDMI_CORE_AV_AVI_CHSUM 0x10C -#define HDMI_CORE_AV_SPD_TYPE 0x180 -#define HDMI_CORE_AV_SPD_VERS 0x184 -#define HDMI_CORE_AV_SPD_LEN 0x188 -#define HDMI_CORE_AV_SPD_CHSUM 0x18C -#define HDMI_CORE_AV_AUDIO_TYPE 0x200 -#define HDMI_CORE_AV_AUDIO_VERS 0x204 -#define HDMI_CORE_AV_AUDIO_LEN 0x208 -#define HDMI_CORE_AV_AUDIO_CHSUM 0x20C -#define HDMI_CORE_AV_MPEG_TYPE 0x280 -#define HDMI_CORE_AV_MPEG_VERS 0x284 -#define HDMI_CORE_AV_MPEG_LEN 0x288 -#define HDMI_CORE_AV_MPEG_CHSUM 0x28C -#define HDMI_CORE_AV_CP_BYTE1 0x37C -#define HDMI_CORE_AV_CEC_ADDR_ID 0x3FC -#define HDMI_CORE_AV_SPD_DBYTE_ELSIZE 0x4 -#define HDMI_CORE_AV_GEN2_DBYTE_ELSIZE 0x4 -#define HDMI_CORE_AV_MPEG_DBYTE_ELSIZE 0x4 -#define HDMI_CORE_AV_GEN_DBYTE_ELSIZE 0x4 - -/* PLL */ - -#define PLLCTRL_PLL_CONTROL 0x0 -#define PLLCTRL_PLL_STATUS 0x4 -#define PLLCTRL_PLL_GO 0x8 -#define PLLCTRL_CFG1 0xC -#define PLLCTRL_CFG2 0x10 -#define PLLCTRL_CFG3 0x14 -#define PLLCTRL_CFG4 0x20 - -/* HDMI PHY */ - -#define HDMI_TXPHY_TX_CTRL 0x0 -#define HDMI_TXPHY_DIGITAL_CTRL 0x4 -#define HDMI_TXPHY_POWER_CTRL 0x8 -#define HDMI_TXPHY_PAD_CFG_CTRL 0xC - -#define REG_FLD_MOD(base, idx, val, start, end) \ - hdmi_write_reg(base, idx, FLD_MOD(hdmi_read_reg(base, idx),\ - val, start, end)) -#define REG_GET(base, idx, start, end) \ - FLD_GET(hdmi_read_reg(base, idx), start, end) - -enum hdmi_phy_pwr { - HDMI_PHYPWRCMD_OFF = 0, - HDMI_PHYPWRCMD_LDOON = 1, - HDMI_PHYPWRCMD_TXON = 2 -}; - -enum hdmi_core_inputbus_width { - HDMI_INPUT_8BIT = 0, - HDMI_INPUT_10BIT = 1, - HDMI_INPUT_12BIT = 2 -}; - -enum hdmi_core_dither_trunc { - HDMI_OUTPUTTRUNCATION_8BIT = 0, - HDMI_OUTPUTTRUNCATION_10BIT = 1, - HDMI_OUTPUTTRUNCATION_12BIT = 2, - HDMI_OUTPUTDITHER_8BIT = 3, - HDMI_OUTPUTDITHER_10BIT = 4, - HDMI_OUTPUTDITHER_12BIT = 5 -}; - -enum hdmi_core_deepcolor_ed { - HDMI_DEEPCOLORPACKECTDISABLE = 0, - HDMI_DEEPCOLORPACKECTENABLE = 1 -}; - -enum hdmi_core_packet_mode { - HDMI_PACKETMODERESERVEDVALUE = 0, - HDMI_PACKETMODE24BITPERPIXEL = 4, - HDMI_PACKETMODE30BITPERPIXEL = 5, - HDMI_PACKETMODE36BITPERPIXEL = 6, - HDMI_PACKETMODE48BITPERPIXEL = 7 -}; - -enum hdmi_core_tclkselclkmult { - HDMI_FPLL05IDCK = 0, - HDMI_FPLL10IDCK = 1, - HDMI_FPLL20IDCK = 2, - HDMI_FPLL40IDCK = 3 -}; - -enum hdmi_core_packet_ctrl { - HDMI_PACKETENABLE = 1, - HDMI_PACKETDISABLE = 0, - HDMI_PACKETREPEATON = 1, - HDMI_PACKETREPEATOFF = 0 -}; - -/* INFOFRAME_AVI_ and INFOFRAME_AUDIO_ definitions */ -enum hdmi_core_infoframe { - HDMI_INFOFRAME_AVI_DB1Y_RGB = 0, - HDMI_INFOFRAME_AVI_DB1Y_YUV422 = 1, - HDMI_INFOFRAME_AVI_DB1Y_YUV444 = 2, - HDMI_INFOFRAME_AVI_DB1A_ACTIVE_FORMAT_OFF = 0, - HDMI_INFOFRAME_AVI_DB1A_ACTIVE_FORMAT_ON = 1, - HDMI_INFOFRAME_AVI_DB1B_NO = 0, - HDMI_INFOFRAME_AVI_DB1B_VERT = 1, - HDMI_INFOFRAME_AVI_DB1B_HORI = 2, - HDMI_INFOFRAME_AVI_DB1B_VERTHORI = 3, - HDMI_INFOFRAME_AVI_DB1S_0 = 0, - HDMI_INFOFRAME_AVI_DB1S_1 = 1, - HDMI_INFOFRAME_AVI_DB1S_2 = 2, - HDMI_INFOFRAME_AVI_DB2C_NO = 0, - HDMI_INFOFRAME_AVI_DB2C_ITU601 = 1, - HDMI_INFOFRAME_AVI_DB2C_ITU709 = 2, - HDMI_INFOFRAME_AVI_DB2C_EC_EXTENDED = 3, - HDMI_INFOFRAME_AVI_DB2M_NO = 0, - HDMI_INFOFRAME_AVI_DB2M_43 = 1, - HDMI_INFOFRAME_AVI_DB2M_169 = 2, - HDMI_INFOFRAME_AVI_DB2R_SAME = 8, - HDMI_INFOFRAME_AVI_DB2R_43 = 9, - HDMI_INFOFRAME_AVI_DB2R_169 = 10, - HDMI_INFOFRAME_AVI_DB2R_149 = 11, - HDMI_INFOFRAME_AVI_DB3ITC_NO = 0, - HDMI_INFOFRAME_AVI_DB3ITC_YES = 1, - HDMI_INFOFRAME_AVI_DB3EC_XVYUV601 = 0, - HDMI_INFOFRAME_AVI_DB3EC_XVYUV709 = 1, - HDMI_INFOFRAME_AVI_DB3Q_DEFAULT = 0, - HDMI_INFOFRAME_AVI_DB3Q_LR = 1, - HDMI_INFOFRAME_AVI_DB3Q_FR = 2, - HDMI_INFOFRAME_AVI_DB3SC_NO = 0, - HDMI_INFOFRAME_AVI_DB3SC_HORI = 1, - HDMI_INFOFRAME_AVI_DB3SC_VERT = 2, - HDMI_INFOFRAME_AVI_DB3SC_HORIVERT = 3, - HDMI_INFOFRAME_AVI_DB5PR_NO = 0, - HDMI_INFOFRAME_AVI_DB5PR_2 = 1, - HDMI_INFOFRAME_AVI_DB5PR_3 = 2, - HDMI_INFOFRAME_AVI_DB5PR_4 = 3, - HDMI_INFOFRAME_AVI_DB5PR_5 = 4, - HDMI_INFOFRAME_AVI_DB5PR_6 = 5, - HDMI_INFOFRAME_AVI_DB5PR_7 = 6, - HDMI_INFOFRAME_AVI_DB5PR_8 = 7, - HDMI_INFOFRAME_AVI_DB5PR_9 = 8, - HDMI_INFOFRAME_AVI_DB5PR_10 = 9, - HDMI_INFOFRAME_AUDIO_DB1CT_FROM_STREAM = 0, - HDMI_INFOFRAME_AUDIO_DB1CT_IEC60958 = 1, - HDMI_INFOFRAME_AUDIO_DB1CT_AC3 = 2, - HDMI_INFOFRAME_AUDIO_DB1CT_MPEG1 = 3, - HDMI_INFOFRAME_AUDIO_DB1CT_MP3 = 4, - HDMI_INFOFRAME_AUDIO_DB1CT_MPEG2_MULTICH = 5, - HDMI_INFOFRAME_AUDIO_DB1CT_AAC = 6, - HDMI_INFOFRAME_AUDIO_DB1CT_DTS = 7, - HDMI_INFOFRAME_AUDIO_DB1CT_ATRAC = 8, - HDMI_INFOFRAME_AUDIO_DB1CT_ONEBIT = 9, - HDMI_INFOFRAME_AUDIO_DB1CT_DOLBY_DIGITAL_PLUS = 10, - HDMI_INFOFRAME_AUDIO_DB1CT_DTS_HD = 11, - HDMI_INFOFRAME_AUDIO_DB1CT_MAT = 12, - HDMI_INFOFRAME_AUDIO_DB1CT_DST = 13, - HDMI_INFOFRAME_AUDIO_DB1CT_WMA_PRO = 14, - HDMI_INFOFRAME_AUDIO_DB2SF_FROM_STREAM = 0, - HDMI_INFOFRAME_AUDIO_DB2SF_32000 = 1, - HDMI_INFOFRAME_AUDIO_DB2SF_44100 = 2, - HDMI_INFOFRAME_AUDIO_DB2SF_48000 = 3, - HDMI_INFOFRAME_AUDIO_DB2SF_88200 = 4, - HDMI_INFOFRAME_AUDIO_DB2SF_96000 = 5, - HDMI_INFOFRAME_AUDIO_DB2SF_176400 = 6, - HDMI_INFOFRAME_AUDIO_DB2SF_192000 = 7, - HDMI_INFOFRAME_AUDIO_DB2SS_FROM_STREAM = 0, - HDMI_INFOFRAME_AUDIO_DB2SS_16BIT = 1, - HDMI_INFOFRAME_AUDIO_DB2SS_20BIT = 2, - HDMI_INFOFRAME_AUDIO_DB2SS_24BIT = 3, - HDMI_INFOFRAME_AUDIO_DB5_DM_INH_PERMITTED = 0, - HDMI_INFOFRAME_AUDIO_DB5_DM_INH_PROHIBITED = 1 -}; - -enum hdmi_packing_mode { - HDMI_PACK_10b_RGB_YUV444 = 0, - HDMI_PACK_24b_RGB_YUV444_YUV422 = 1, - HDMI_PACK_20b_YUV422 = 2, - HDMI_PACK_ALREADYPACKED = 7 -}; - -enum hdmi_core_audio_sample_freq { - HDMI_AUDIO_FS_32000 = 0x3, - HDMI_AUDIO_FS_44100 = 0x0, - HDMI_AUDIO_FS_48000 = 0x2, - HDMI_AUDIO_FS_88200 = 0x8, - HDMI_AUDIO_FS_96000 = 0xA, - HDMI_AUDIO_FS_176400 = 0xC, - HDMI_AUDIO_FS_192000 = 0xE, - HDMI_AUDIO_FS_NOT_INDICATED = 0x1 -}; - -enum hdmi_core_audio_layout { - HDMI_AUDIO_LAYOUT_2CH = 0, - HDMI_AUDIO_LAYOUT_8CH = 1 -}; - -enum hdmi_core_cts_mode { - HDMI_AUDIO_CTS_MODE_HW = 0, - HDMI_AUDIO_CTS_MODE_SW = 1 -}; - -enum hdmi_stereo_channels { - HDMI_AUDIO_STEREO_NOCHANNELS = 0, - HDMI_AUDIO_STEREO_ONECHANNEL = 1, - HDMI_AUDIO_STEREO_TWOCHANNELS = 2, - HDMI_AUDIO_STEREO_THREECHANNELS = 3, - HDMI_AUDIO_STEREO_FOURCHANNELS = 4 -}; - -enum hdmi_audio_type { - HDMI_AUDIO_TYPE_LPCM = 0, - HDMI_AUDIO_TYPE_IEC = 1 -}; - -enum hdmi_audio_justify { - HDMI_AUDIO_JUSTIFY_LEFT = 0, - HDMI_AUDIO_JUSTIFY_RIGHT = 1 -}; - -enum hdmi_audio_sample_order { - HDMI_AUDIO_SAMPLE_RIGHT_FIRST = 0, - HDMI_AUDIO_SAMPLE_LEFT_FIRST = 1 -}; - -enum hdmi_audio_samples_perword { - HDMI_AUDIO_ONEWORD_ONESAMPLE = 0, - HDMI_AUDIO_ONEWORD_TWOSAMPLES = 1 -}; - -enum hdmi_audio_sample_size { - HDMI_AUDIO_SAMPLE_16BITS = 0, - HDMI_AUDIO_SAMPLE_24BITS = 1 -}; - -enum hdmi_audio_transf_mode { - HDMI_AUDIO_TRANSF_DMA = 0, - HDMI_AUDIO_TRANSF_IRQ = 1 -}; - -enum hdmi_audio_blk_strt_end_sig { - HDMI_AUDIO_BLOCK_SIG_STARTEND_ON = 0, - HDMI_AUDIO_BLOCK_SIG_STARTEND_OFF = 1 -}; - -enum hdmi_audio_i2s_config { - HDMI_AUDIO_I2S_WS_POLARITY_LOW_IS_LEFT = 0, - HDMI_AUDIO_I2S_WS_POLARIT_YLOW_IS_RIGHT = 1, - HDMI_AUDIO_I2S_MSB_SHIFTED_FIRST = 0, - HDMI_AUDIO_I2S_LSB_SHIFTED_FIRST = 1, - HDMI_AUDIO_I2S_MAX_WORD_20BITS = 0, - HDMI_AUDIO_I2S_MAX_WORD_24BITS = 1, - HDMI_AUDIO_I2S_CHST_WORD_NOT_SPECIFIED = 0, - HDMI_AUDIO_I2S_CHST_WORD_16_BITS = 1, - HDMI_AUDIO_I2S_CHST_WORD_17_BITS = 6, - HDMI_AUDIO_I2S_CHST_WORD_18_BITS = 2, - HDMI_AUDIO_I2S_CHST_WORD_19_BITS = 4, - HDMI_AUDIO_I2S_CHST_WORD_20_BITS_20MAX = 5, - HDMI_AUDIO_I2S_CHST_WORD_20_BITS_24MAX = 1, - HDMI_AUDIO_I2S_CHST_WORD_21_BITS = 6, - HDMI_AUDIO_I2S_CHST_WORD_22_BITS = 2, - HDMI_AUDIO_I2S_CHST_WORD_23_BITS = 4, - HDMI_AUDIO_I2S_CHST_WORD_24_BITS = 5, - HDMI_AUDIO_I2S_SCK_EDGE_FALLING = 0, - HDMI_AUDIO_I2S_SCK_EDGE_RISING = 1, - HDMI_AUDIO_I2S_VBIT_FOR_PCM = 0, - HDMI_AUDIO_I2S_VBIT_FOR_COMPRESSED = 1, - HDMI_AUDIO_I2S_INPUT_LENGTH_NA = 0, - HDMI_AUDIO_I2S_INPUT_LENGTH_16 = 2, - HDMI_AUDIO_I2S_INPUT_LENGTH_17 = 12, - HDMI_AUDIO_I2S_INPUT_LENGTH_18 = 4, - HDMI_AUDIO_I2S_INPUT_LENGTH_19 = 8, - HDMI_AUDIO_I2S_INPUT_LENGTH_20 = 10, - HDMI_AUDIO_I2S_INPUT_LENGTH_21 = 13, - HDMI_AUDIO_I2S_INPUT_LENGTH_22 = 5, - HDMI_AUDIO_I2S_INPUT_LENGTH_23 = 9, - HDMI_AUDIO_I2S_INPUT_LENGTH_24 = 11, - HDMI_AUDIO_I2S_FIRST_BIT_SHIFT = 0, - HDMI_AUDIO_I2S_FIRST_BIT_NO_SHIFT = 1, - HDMI_AUDIO_I2S_SD0_EN = 1, - HDMI_AUDIO_I2S_SD1_EN = 1 << 1, - HDMI_AUDIO_I2S_SD2_EN = 1 << 2, - HDMI_AUDIO_I2S_SD3_EN = 1 << 3, -}; - -enum hdmi_audio_mclk_mode { - HDMI_AUDIO_MCLK_128FS = 0, - HDMI_AUDIO_MCLK_256FS = 1, - HDMI_AUDIO_MCLK_384FS = 2, - HDMI_AUDIO_MCLK_512FS = 3, - HDMI_AUDIO_MCLK_768FS = 4, - HDMI_AUDIO_MCLK_1024FS = 5, - HDMI_AUDIO_MCLK_1152FS = 6, - HDMI_AUDIO_MCLK_192FS = 7 -}; - -struct hdmi_core_video_config { - enum hdmi_core_inputbus_width ip_bus_width; - enum hdmi_core_dither_trunc op_dither_truc; - enum hdmi_core_deepcolor_ed deep_color_pkt; - enum hdmi_core_packet_mode pkt_mode; - enum hdmi_core_hdmi_dvi hdmi_dvi; - enum hdmi_core_tclkselclkmult tclk_sel_clkmult; -}; - -/* - * Refer to section 8.2 in HDMI 1.3 specification for - * details about infoframe databytes - */ -struct hdmi_core_infoframe_avi { - /* Y0, Y1 rgb,yCbCr */ - u8 db1_format; - /* A0 Active information Present */ - u8 db1_active_info; - /* B0, B1 Bar info data valid */ - u8 db1_bar_info_dv; - /* S0, S1 scan information */ - u8 db1_scan_info; - /* C0, C1 colorimetry */ - u8 db2_colorimetry; - /* M0, M1 Aspect ratio (4:3, 16:9) */ - u8 db2_aspect_ratio; - /* R0...R3 Active format aspect ratio */ - u8 db2_active_fmt_ar; - /* ITC IT content. */ - u8 db3_itc; - /* EC0, EC1, EC2 Extended colorimetry */ - u8 db3_ec; - /* Q1, Q0 Quantization range */ - u8 db3_q_range; - /* SC1, SC0 Non-uniform picture scaling */ - u8 db3_nup_scaling; - /* VIC0..6 Video format identification */ - u8 db4_videocode; - /* PR0..PR3 Pixel repetition factor */ - u8 db5_pixel_repeat; - /* Line number end of top bar */ - u16 db6_7_line_eoftop; - /* Line number start of bottom bar */ - u16 db8_9_line_sofbottom; - /* Pixel number end of left bar */ - u16 db10_11_pixel_eofleft; - /* Pixel number start of right bar */ - u16 db12_13_pixel_sofright; -}; -/* - * Refer to section 8.2 in HDMI 1.3 specification for - * details about infoframe databytes - */ -struct hdmi_core_infoframe_audio { - u8 db1_coding_type; - u8 db1_channel_count; - u8 db2_sample_freq; - u8 db2_sample_size; - u8 db4_channel_alloc; - bool db5_downmix_inh; - u8 db5_lsv; /* Level shift values for downmix */ -}; - -struct hdmi_core_packet_enable_repeat { - u32 audio_pkt; - u32 audio_pkt_repeat; - u32 avi_infoframe; - u32 avi_infoframe_repeat; - u32 gen_cntrl_pkt; - u32 gen_cntrl_pkt_repeat; - u32 generic_pkt; - u32 generic_pkt_repeat; -}; - -struct hdmi_video_format { - enum hdmi_packing_mode packing_mode; - u32 y_res; /* Line per panel */ - u32 x_res; /* pixel per line */ -}; - -struct hdmi_video_interface { - int vsp; /* Vsync polarity */ - int hsp; /* Hsync polarity */ - int interlacing; - int tm; /* Timing mode */ -}; - -struct hdmi_audio_format { - enum hdmi_stereo_channels stereo_channels; - u8 active_chnnls_msk; - enum hdmi_audio_type type; - enum hdmi_audio_justify justification; - enum hdmi_audio_sample_order sample_order; - enum hdmi_audio_samples_perword samples_per_word; - enum hdmi_audio_sample_size sample_size; - enum hdmi_audio_blk_strt_end_sig en_sig_blk_strt_end; -}; - -struct hdmi_audio_dma { - u8 transfer_size; - u8 block_size; - enum hdmi_audio_transf_mode mode; - u16 fifo_threshold; -}; - -struct hdmi_core_audio_i2s_config { - u8 word_max_length; - u8 word_length; - u8 in_length_bits; - u8 justification; - u8 en_high_bitrate_aud; - u8 sck_edge_mode; - u8 cbit_order; - u8 vbit; - u8 ws_polarity; - u8 direction; - u8 shift; - u8 active_sds; -}; - -struct hdmi_core_audio_config { - struct hdmi_core_audio_i2s_config i2s_cfg; - enum hdmi_core_audio_sample_freq freq_sample; - bool fs_override; - u32 n; - u32 cts; - u32 aud_par_busclk; - enum hdmi_core_audio_layout layout; - enum hdmi_core_cts_mode cts_mode; - bool use_mclk; - enum hdmi_audio_mclk_mode mclk_mode; - bool en_acr_pkt; - bool en_dsd_audio; - bool en_parallel_aud_input; - bool en_spdif; -}; - -#if defined(CONFIG_SND_OMAP_SOC_OMAP4_HDMI) || \ - defined(CONFIG_SND_OMAP_SOC_OMAP4_HDMI_MODULE) -int hdmi_config_audio_acr(struct hdmi_ip_data *ip_data, - u32 sample_freq, u32 *n, u32 *cts); -void hdmi_core_audio_infoframe_config(struct hdmi_ip_data *ip_data, - struct hdmi_core_infoframe_audio *info_aud); -void hdmi_core_audio_config(struct hdmi_ip_data *ip_data, - struct hdmi_core_audio_config *cfg); -void hdmi_wp_audio_config_dma(struct hdmi_ip_data *ip_data, - struct hdmi_audio_dma *aud_dma); -void hdmi_wp_audio_config_format(struct hdmi_ip_data *ip_data, - struct hdmi_audio_format *aud_fmt); -#endif -#endif diff --git a/drivers/video/omap2/dss/venc.c b/drivers/video/omap2/dss/venc.c deleted file mode 100644 index 5c3d0f90151..00000000000 --- a/drivers/video/omap2/dss/venc.c +++ /dev/null @@ -1,907 +0,0 @@ -/* - * linux/drivers/video/omap2/dss/venc.c - * - * Copyright (C) 2009 Nokia Corporation - * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com> - * - * VENC settings from TI's DSS driver - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program. If not, see <http://www.gnu.org/licenses/>. - */ - -#define DSS_SUBSYS_NAME "VENC" - -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/clk.h> -#include <linux/err.h> -#include <linux/io.h> -#include <linux/mutex.h> -#include <linux/completion.h> -#include <linux/delay.h> -#include <linux/string.h> -#include <linux/seq_file.h> -#include <linux/platform_device.h> -#include <linux/regulator/consumer.h> -#include <linux/pm_runtime.h> - -#include <video/omapdss.h> -#include <plat/cpu.h> - -#include "dss.h" -#include "dss_features.h" - -/* Venc registers */ -#define VENC_REV_ID 0x00 -#define VENC_STATUS 0x04 -#define VENC_F_CONTROL 0x08 -#define VENC_VIDOUT_CTRL 0x10 -#define VENC_SYNC_CTRL 0x14 -#define VENC_LLEN 0x1C -#define VENC_FLENS 0x20 -#define VENC_HFLTR_CTRL 0x24 -#define VENC_CC_CARR_WSS_CARR 0x28 -#define VENC_C_PHASE 0x2C -#define VENC_GAIN_U 0x30 -#define VENC_GAIN_V 0x34 -#define VENC_GAIN_Y 0x38 -#define VENC_BLACK_LEVEL 0x3C -#define VENC_BLANK_LEVEL 0x40 -#define VENC_X_COLOR 0x44 -#define VENC_M_CONTROL 0x48 -#define VENC_BSTAMP_WSS_DATA 0x4C -#define VENC_S_CARR 0x50 -#define VENC_LINE21 0x54 -#define VENC_LN_SEL 0x58 -#define VENC_L21__WC_CTL 0x5C -#define VENC_HTRIGGER_VTRIGGER 0x60 -#define VENC_SAVID__EAVID 0x64 -#define VENC_FLEN__FAL 0x68 -#define VENC_LAL__PHASE_RESET 0x6C -#define VENC_HS_INT_START_STOP_X 0x70 -#define VENC_HS_EXT_START_STOP_X 0x74 -#define VENC_VS_INT_START_X 0x78 -#define VENC_VS_INT_STOP_X__VS_INT_START_Y 0x7C -#define VENC_VS_INT_STOP_Y__VS_EXT_START_X 0x80 -#define VENC_VS_EXT_STOP_X__VS_EXT_START_Y 0x84 -#define VENC_VS_EXT_STOP_Y 0x88 -#define VENC_AVID_START_STOP_X 0x90 -#define VENC_AVID_START_STOP_Y 0x94 -#define VENC_FID_INT_START_X__FID_INT_START_Y 0xA0 -#define VENC_FID_INT_OFFSET_Y__FID_EXT_START_X 0xA4 -#define VENC_FID_EXT_START_Y__FID_EXT_OFFSET_Y 0xA8 -#define VENC_TVDETGP_INT_START_STOP_X 0xB0 -#define VENC_TVDETGP_INT_START_STOP_Y 0xB4 -#define VENC_GEN_CTRL 0xB8 -#define VENC_OUTPUT_CONTROL 0xC4 -#define VENC_OUTPUT_TEST 0xC8 -#define VENC_DAC_B__DAC_C 0xC8 - -struct venc_config { - u32 f_control; - u32 vidout_ctrl; - u32 sync_ctrl; - u32 llen; - u32 flens; - u32 hfltr_ctrl; - u32 cc_carr_wss_carr; - u32 c_phase; - u32 gain_u; - u32 gain_v; - u32 gain_y; - u32 black_level; - u32 blank_level; - u32 x_color; - u32 m_control; - u32 bstamp_wss_data; - u32 s_carr; - u32 line21; - u32 ln_sel; - u32 l21__wc_ctl; - u32 htrigger_vtrigger; - u32 savid__eavid; - u32 flen__fal; - u32 lal__phase_reset; - u32 hs_int_start_stop_x; - u32 hs_ext_start_stop_x; - u32 vs_int_start_x; - u32 vs_int_stop_x__vs_int_start_y; - u32 vs_int_stop_y__vs_ext_start_x; - u32 vs_ext_stop_x__vs_ext_start_y; - u32 vs_ext_stop_y; - u32 avid_start_stop_x; - u32 avid_start_stop_y; - u32 fid_int_start_x__fid_int_start_y; - u32 fid_int_offset_y__fid_ext_start_x; - u32 fid_ext_start_y__fid_ext_offset_y; - u32 tvdetgp_int_start_stop_x; - u32 tvdetgp_int_start_stop_y; - u32 gen_ctrl; -}; - -/* from TRM */ -static const struct venc_config venc_config_pal_trm = { - .f_control = 0, - .vidout_ctrl = 1, - .sync_ctrl = 0x40, - .llen = 0x35F, /* 863 */ - .flens = 0x270, /* 624 */ - .hfltr_ctrl = 0, - .cc_carr_wss_carr = 0x2F7225ED, - .c_phase = 0, - .gain_u = 0x111, - .gain_v = 0x181, - .gain_y = 0x140, - .black_level = 0x3B, - .blank_level = 0x3B, - .x_color = 0x7, - .m_control = 0x2, - .bstamp_wss_data = 0x3F, - .s_carr = 0x2A098ACB, - .line21 = 0, - .ln_sel = 0x01290015, - .l21__wc_ctl = 0x0000F603, - .htrigger_vtrigger = 0, - - .savid__eavid = 0x06A70108, - .flen__fal = 0x00180270, - .lal__phase_reset = 0x00040135, - .hs_int_start_stop_x = 0x00880358, - .hs_ext_start_stop_x = 0x000F035F, - .vs_int_start_x = 0x01A70000, - .vs_int_stop_x__vs_int_start_y = 0x000001A7, - .vs_int_stop_y__vs_ext_start_x = 0x01AF0000, - .vs_ext_stop_x__vs_ext_start_y = 0x000101AF, - .vs_ext_stop_y = 0x00000025, - .avid_start_stop_x = 0x03530083, - .avid_start_stop_y = 0x026C002E, - .fid_int_start_x__fid_int_start_y = 0x0001008A, - .fid_int_offset_y__fid_ext_start_x = 0x002E0138, - .fid_ext_start_y__fid_ext_offset_y = 0x01380001, - - .tvdetgp_int_start_stop_x = 0x00140001, - .tvdetgp_int_start_stop_y = 0x00010001, - .gen_ctrl = 0x00FF0000, -}; - -/* from TRM */ -static const struct venc_config venc_config_ntsc_trm = { - .f_control = 0, - .vidout_ctrl = 1, - .sync_ctrl = 0x8040, - .llen = 0x359, - .flens = 0x20C, - .hfltr_ctrl = 0, - .cc_carr_wss_carr = 0x043F2631, - .c_phase = 0, - .gain_u = 0x102, - .gain_v = 0x16C, - .gain_y = 0x12F, - .black_level = 0x43, - .blank_level = 0x38, - .x_color = 0x7, - .m_control = 0x1, - .bstamp_wss_data = 0x38, - .s_carr = 0x21F07C1F, - .line21 = 0, - .ln_sel = 0x01310011, - .l21__wc_ctl = 0x0000F003, - .htrigger_vtrigger = 0, - - .savid__eavid = 0x069300F4, - .flen__fal = 0x0016020C, - .lal__phase_reset = 0x00060107, - .hs_int_start_stop_x = 0x008E0350, - .hs_ext_start_stop_x = 0x000F0359, - .vs_int_start_x = 0x01A00000, - .vs_int_stop_x__vs_int_start_y = 0x020701A0, - .vs_int_stop_y__vs_ext_start_x = 0x01AC0024, - .vs_ext_stop_x__vs_ext_start_y = 0x020D01AC, - .vs_ext_stop_y = 0x00000006, - .avid_start_stop_x = 0x03480078, - .avid_start_stop_y = 0x02060024, - .fid_int_start_x__fid_int_start_y = 0x0001008A, - .fid_int_offset_y__fid_ext_start_x = 0x01AC0106, - .fid_ext_start_y__fid_ext_offset_y = 0x01060006, - - .tvdetgp_int_start_stop_x = 0x00140001, - .tvdetgp_int_start_stop_y = 0x00010001, - .gen_ctrl = 0x00F90000, -}; - -static const struct venc_config venc_config_pal_bdghi = { - .f_control = 0, - .vidout_ctrl = 0, - .sync_ctrl = 0, - .hfltr_ctrl = 0, - .x_color = 0, - .line21 = 0, - .ln_sel = 21, - .htrigger_vtrigger = 0, - .tvdetgp_int_start_stop_x = 0x00140001, - .tvdetgp_int_start_stop_y = 0x00010001, - .gen_ctrl = 0x00FB0000, - - .llen = 864-1, - .flens = 625-1, - .cc_carr_wss_carr = 0x2F7625ED, - .c_phase = 0xDF, - .gain_u = 0x111, - .gain_v = 0x181, - .gain_y = 0x140, - .black_level = 0x3e, - .blank_level = 0x3e, - .m_control = 0<<2 | 1<<1, - .bstamp_wss_data = 0x42, - .s_carr = 0x2a098acb, - .l21__wc_ctl = 0<<13 | 0x16<<8 | 0<<0, - .savid__eavid = 0x06A70108, - .flen__fal = 23<<16 | 624<<0, - .lal__phase_reset = 2<<17 | 310<<0, - .hs_int_start_stop_x = 0x00920358, - .hs_ext_start_stop_x = 0x000F035F, - .vs_int_start_x = 0x1a7<<16, - .vs_int_stop_x__vs_int_start_y = 0x000601A7, - .vs_int_stop_y__vs_ext_start_x = 0x01AF0036, - .vs_ext_stop_x__vs_ext_start_y = 0x27101af, - .vs_ext_stop_y = 0x05, - .avid_start_stop_x = 0x03530082, - .avid_start_stop_y = 0x0270002E, - .fid_int_start_x__fid_int_start_y = 0x0005008A, - .fid_int_offset_y__fid_ext_start_x = 0x002E0138, - .fid_ext_start_y__fid_ext_offset_y = 0x01380005, -}; - -const struct omap_video_timings omap_dss_pal_timings = { - .x_res = 720, - .y_res = 574, - .pixel_clock = 13500, - .hsw = 64, - .hfp = 12, - .hbp = 68, - .vsw = 5, - .vfp = 5, - .vbp = 41, -}; -EXPORT_SYMBOL(omap_dss_pal_timings); - -const struct omap_video_timings omap_dss_ntsc_timings = { - .x_res = 720, - .y_res = 482, - .pixel_clock = 13500, - .hsw = 64, - .hfp = 16, - .hbp = 58, - .vsw = 6, - .vfp = 6, - .vbp = 31, -}; -EXPORT_SYMBOL(omap_dss_ntsc_timings); - -static struct { - struct platform_device *pdev; - void __iomem *base; - struct mutex venc_lock; - u32 wss_data; - struct regulator *vdda_dac_reg; - - struct clk *tv_dac_clk; -} venc; - -static inline void venc_write_reg(int idx, u32 val) -{ - __raw_writel(val, venc.base + idx); -} - -static inline u32 venc_read_reg(int idx) -{ - u32 l = __raw_readl(venc.base + idx); - return l; -} - -static void venc_write_config(const struct venc_config *config) -{ - DSSDBG("write venc conf\n"); - - venc_write_reg(VENC_LLEN, config->llen); - venc_write_reg(VENC_FLENS, config->flens); - venc_write_reg(VENC_CC_CARR_WSS_CARR, config->cc_carr_wss_carr); - venc_write_reg(VENC_C_PHASE, config->c_phase); - venc_write_reg(VENC_GAIN_U, config->gain_u); - venc_write_reg(VENC_GAIN_V, config->gain_v); - venc_write_reg(VENC_GAIN_Y, config->gain_y); - venc_write_reg(VENC_BLACK_LEVEL, config->black_level); - venc_write_reg(VENC_BLANK_LEVEL, config->blank_level); - venc_write_reg(VENC_M_CONTROL, config->m_control); - venc_write_reg(VENC_BSTAMP_WSS_DATA, config->bstamp_wss_data | - venc.wss_data); - venc_write_reg(VENC_S_CARR, config->s_carr); - venc_write_reg(VENC_L21__WC_CTL, config->l21__wc_ctl); - venc_write_reg(VENC_SAVID__EAVID, config->savid__eavid); - venc_write_reg(VENC_FLEN__FAL, config->flen__fal); - venc_write_reg(VENC_LAL__PHASE_RESET, config->lal__phase_reset); - venc_write_reg(VENC_HS_INT_START_STOP_X, config->hs_int_start_stop_x); - venc_write_reg(VENC_HS_EXT_START_STOP_X, config->hs_ext_start_stop_x); - venc_write_reg(VENC_VS_INT_START_X, config->vs_int_start_x); - venc_write_reg(VENC_VS_INT_STOP_X__VS_INT_START_Y, - config->vs_int_stop_x__vs_int_start_y); - venc_write_reg(VENC_VS_INT_STOP_Y__VS_EXT_START_X, - config->vs_int_stop_y__vs_ext_start_x); - venc_write_reg(VENC_VS_EXT_STOP_X__VS_EXT_START_Y, - config->vs_ext_stop_x__vs_ext_start_y); - venc_write_reg(VENC_VS_EXT_STOP_Y, config->vs_ext_stop_y); - venc_write_reg(VENC_AVID_START_STOP_X, config->avid_start_stop_x); - venc_write_reg(VENC_AVID_START_STOP_Y, config->avid_start_stop_y); - venc_write_reg(VENC_FID_INT_START_X__FID_INT_START_Y, - config->fid_int_start_x__fid_int_start_y); - venc_write_reg(VENC_FID_INT_OFFSET_Y__FID_EXT_START_X, - config->fid_int_offset_y__fid_ext_start_x); - venc_write_reg(VENC_FID_EXT_START_Y__FID_EXT_OFFSET_Y, - config->fid_ext_start_y__fid_ext_offset_y); - - venc_write_reg(VENC_DAC_B__DAC_C, venc_read_reg(VENC_DAC_B__DAC_C)); - venc_write_reg(VENC_VIDOUT_CTRL, config->vidout_ctrl); - venc_write_reg(VENC_HFLTR_CTRL, config->hfltr_ctrl); - venc_write_reg(VENC_X_COLOR, config->x_color); - venc_write_reg(VENC_LINE21, config->line21); - venc_write_reg(VENC_LN_SEL, config->ln_sel); - venc_write_reg(VENC_HTRIGGER_VTRIGGER, config->htrigger_vtrigger); - venc_write_reg(VENC_TVDETGP_INT_START_STOP_X, - config->tvdetgp_int_start_stop_x); - venc_write_reg(VENC_TVDETGP_INT_START_STOP_Y, - config->tvdetgp_int_start_stop_y); - venc_write_reg(VENC_GEN_CTRL, config->gen_ctrl); - venc_write_reg(VENC_F_CONTROL, config->f_control); - venc_write_reg(VENC_SYNC_CTRL, config->sync_ctrl); -} - -static void venc_reset(void) -{ - int t = 1000; - - venc_write_reg(VENC_F_CONTROL, 1<<8); - while (venc_read_reg(VENC_F_CONTROL) & (1<<8)) { - if (--t == 0) { - DSSERR("Failed to reset venc\n"); - return; - } - } - -#ifdef CONFIG_OMAP2_DSS_SLEEP_AFTER_VENC_RESET - /* the magical sleep that makes things work */ - /* XXX more info? What bug this circumvents? */ - msleep(20); -#endif -} - -static int venc_runtime_get(void) -{ - int r; - - DSSDBG("venc_runtime_get\n"); - - r = pm_runtime_get_sync(&venc.pdev->dev); - WARN_ON(r < 0); - return r < 0 ? r : 0; -} - -static void venc_runtime_put(void) -{ - int r; - - DSSDBG("venc_runtime_put\n"); - - r = pm_runtime_put_sync(&venc.pdev->dev); - WARN_ON(r < 0); -} - -static const struct venc_config *venc_timings_to_config( - struct omap_video_timings *timings) -{ - if (memcmp(&omap_dss_pal_timings, timings, sizeof(*timings)) == 0) - return &venc_config_pal_trm; - - if (memcmp(&omap_dss_ntsc_timings, timings, sizeof(*timings)) == 0) - return &venc_config_ntsc_trm; - - BUG(); -} - -static int venc_power_on(struct omap_dss_device *dssdev) -{ - u32 l; - int r; - - venc_reset(); - venc_write_config(venc_timings_to_config(&dssdev->panel.timings)); - - dss_set_venc_output(dssdev->phy.venc.type); - dss_set_dac_pwrdn_bgz(1); - - l = 0; - - if (dssdev->phy.venc.type == OMAP_DSS_VENC_TYPE_COMPOSITE) - l |= 1 << 1; - else /* S-Video */ - l |= (1 << 0) | (1 << 2); - - if (dssdev->phy.venc.invert_polarity == false) - l |= 1 << 3; - - venc_write_reg(VENC_OUTPUT_CONTROL, l); - - dispc_set_digit_size(dssdev->panel.timings.x_res, - dssdev->panel.timings.y_res/2); - - regulator_enable(venc.vdda_dac_reg); - - if (dssdev->platform_enable) - dssdev->platform_enable(dssdev); - - r = dss_mgr_enable(dssdev->manager); - if (r) - goto err; - - return 0; - -err: - venc_write_reg(VENC_OUTPUT_CONTROL, 0); - dss_set_dac_pwrdn_bgz(0); - - if (dssdev->platform_disable) - dssdev->platform_disable(dssdev); - - regulator_disable(venc.vdda_dac_reg); - - return r; -} - -static void venc_power_off(struct omap_dss_device *dssdev) -{ - venc_write_reg(VENC_OUTPUT_CONTROL, 0); - dss_set_dac_pwrdn_bgz(0); - - dss_mgr_disable(dssdev->manager); - - if (dssdev->platform_disable) - dssdev->platform_disable(dssdev); - - regulator_disable(venc.vdda_dac_reg); -} - -unsigned long venc_get_pixel_clock(void) -{ - /* VENC Pixel Clock in Mhz */ - return 13500000; -} - -/* driver */ -static int venc_panel_probe(struct omap_dss_device *dssdev) -{ - dssdev->panel.timings = omap_dss_pal_timings; - - return 0; -} - -static void venc_panel_remove(struct omap_dss_device *dssdev) -{ -} - -static int venc_panel_enable(struct omap_dss_device *dssdev) -{ - int r = 0; - - DSSDBG("venc_enable_display\n"); - - mutex_lock(&venc.venc_lock); - - r = omap_dss_start_device(dssdev); - if (r) { - DSSERR("failed to start device\n"); - goto err0; - } - - if (dssdev->state != OMAP_DSS_DISPLAY_DISABLED) { - r = -EINVAL; - goto err1; - } - - r = venc_runtime_get(); - if (r) - goto err1; - - r = venc_power_on(dssdev); - if (r) - goto err2; - - venc.wss_data = 0; - - dssdev->state = OMAP_DSS_DISPLAY_ACTIVE; - - mutex_unlock(&venc.venc_lock); - return 0; -err2: - venc_runtime_put(); -err1: - omap_dss_stop_device(dssdev); -err0: - mutex_unlock(&venc.venc_lock); - - return r; -} - -static void venc_panel_disable(struct omap_dss_device *dssdev) -{ - DSSDBG("venc_disable_display\n"); - - mutex_lock(&venc.venc_lock); - - if (dssdev->state == OMAP_DSS_DISPLAY_DISABLED) - goto end; - - if (dssdev->state == OMAP_DSS_DISPLAY_SUSPENDED) { - /* suspended is the same as disabled with venc */ - dssdev->state = OMAP_DSS_DISPLAY_DISABLED; - goto end; - } - - venc_power_off(dssdev); - - venc_runtime_put(); - - dssdev->state = OMAP_DSS_DISPLAY_DISABLED; - - omap_dss_stop_device(dssdev); -end: - mutex_unlock(&venc.venc_lock); -} - -static int venc_panel_suspend(struct omap_dss_device *dssdev) -{ - venc_panel_disable(dssdev); - return 0; -} - -static int venc_panel_resume(struct omap_dss_device *dssdev) -{ - return venc_panel_enable(dssdev); -} - -static void venc_get_timings(struct omap_dss_device *dssdev, - struct omap_video_timings *timings) -{ - *timings = dssdev->panel.timings; -} - -static void venc_set_timings(struct omap_dss_device *dssdev, - struct omap_video_timings *timings) -{ - DSSDBG("venc_set_timings\n"); - - /* Reset WSS data when the TV standard changes. */ - if (memcmp(&dssdev->panel.timings, timings, sizeof(*timings))) - venc.wss_data = 0; - - dssdev->panel.timings = *timings; - if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE) { - /* turn the venc off and on to get new timings to use */ - venc_panel_disable(dssdev); - venc_panel_enable(dssdev); - } -} - -static int venc_check_timings(struct omap_dss_device *dssdev, - struct omap_video_timings *timings) -{ - DSSDBG("venc_check_timings\n"); - - if (memcmp(&omap_dss_pal_timings, timings, sizeof(*timings)) == 0) - return 0; - - if (memcmp(&omap_dss_ntsc_timings, timings, sizeof(*timings)) == 0) - return 0; - - return -EINVAL; -} - -static u32 venc_get_wss(struct omap_dss_device *dssdev) -{ - /* Invert due to VENC_L21_WC_CTL:INV=1 */ - return (venc.wss_data >> 8) ^ 0xfffff; -} - -static int venc_set_wss(struct omap_dss_device *dssdev, u32 wss) -{ - const struct venc_config *config; - int r; - - DSSDBG("venc_set_wss\n"); - - mutex_lock(&venc.venc_lock); - - config = venc_timings_to_config(&dssdev->panel.timings); - - /* Invert due to VENC_L21_WC_CTL:INV=1 */ - venc.wss_data = (wss ^ 0xfffff) << 8; - - r = venc_runtime_get(); - if (r) - goto err; - - venc_write_reg(VENC_BSTAMP_WSS_DATA, config->bstamp_wss_data | - venc.wss_data); - - venc_runtime_put(); - -err: - mutex_unlock(&venc.venc_lock); - - return r; -} - -static struct omap_dss_driver venc_driver = { - .probe = venc_panel_probe, - .remove = venc_panel_remove, - - .enable = venc_panel_enable, - .disable = venc_panel_disable, - .suspend = venc_panel_suspend, - .resume = venc_panel_resume, - - .get_resolution = omapdss_default_get_resolution, - .get_recommended_bpp = omapdss_default_get_recommended_bpp, - - .get_timings = venc_get_timings, - .set_timings = venc_set_timings, - .check_timings = venc_check_timings, - - .get_wss = venc_get_wss, - .set_wss = venc_set_wss, - - .driver = { - .name = "venc", - .owner = THIS_MODULE, - }, -}; -/* driver end */ - -int venc_init_display(struct omap_dss_device *dssdev) -{ - DSSDBG("init_display\n"); - - if (venc.vdda_dac_reg == NULL) { - struct regulator *vdda_dac; - - vdda_dac = regulator_get(&venc.pdev->dev, "vdda_dac"); - - if (IS_ERR(vdda_dac)) { - DSSERR("can't get VDDA_DAC regulator\n"); - return PTR_ERR(vdda_dac); - } - - venc.vdda_dac_reg = vdda_dac; - } - - return 0; -} - -void venc_dump_regs(struct seq_file *s) -{ -#define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, venc_read_reg(r)) - - if (venc_runtime_get()) - return; - - DUMPREG(VENC_F_CONTROL); - DUMPREG(VENC_VIDOUT_CTRL); - DUMPREG(VENC_SYNC_CTRL); - DUMPREG(VENC_LLEN); - DUMPREG(VENC_FLENS); - DUMPREG(VENC_HFLTR_CTRL); - DUMPREG(VENC_CC_CARR_WSS_CARR); - DUMPREG(VENC_C_PHASE); - DUMPREG(VENC_GAIN_U); - DUMPREG(VENC_GAIN_V); - DUMPREG(VENC_GAIN_Y); - DUMPREG(VENC_BLACK_LEVEL); - DUMPREG(VENC_BLANK_LEVEL); - DUMPREG(VENC_X_COLOR); - DUMPREG(VENC_M_CONTROL); - DUMPREG(VENC_BSTAMP_WSS_DATA); - DUMPREG(VENC_S_CARR); - DUMPREG(VENC_LINE21); - DUMPREG(VENC_LN_SEL); - DUMPREG(VENC_L21__WC_CTL); - DUMPREG(VENC_HTRIGGER_VTRIGGER); - DUMPREG(VENC_SAVID__EAVID); - DUMPREG(VENC_FLEN__FAL); - DUMPREG(VENC_LAL__PHASE_RESET); - DUMPREG(VENC_HS_INT_START_STOP_X); - DUMPREG(VENC_HS_EXT_START_STOP_X); - DUMPREG(VENC_VS_INT_START_X); - DUMPREG(VENC_VS_INT_STOP_X__VS_INT_START_Y); - DUMPREG(VENC_VS_INT_STOP_Y__VS_EXT_START_X); - DUMPREG(VENC_VS_EXT_STOP_X__VS_EXT_START_Y); - DUMPREG(VENC_VS_EXT_STOP_Y); - DUMPREG(VENC_AVID_START_STOP_X); - DUMPREG(VENC_AVID_START_STOP_Y); - DUMPREG(VENC_FID_INT_START_X__FID_INT_START_Y); - DUMPREG(VENC_FID_INT_OFFSET_Y__FID_EXT_START_X); - DUMPREG(VENC_FID_EXT_START_Y__FID_EXT_OFFSET_Y); - DUMPREG(VENC_TVDETGP_INT_START_STOP_X); - DUMPREG(VENC_TVDETGP_INT_START_STOP_Y); - DUMPREG(VENC_GEN_CTRL); - DUMPREG(VENC_OUTPUT_CONTROL); - DUMPREG(VENC_OUTPUT_TEST); - - venc_runtime_put(); - -#undef DUMPREG -} - -static int venc_get_clocks(struct platform_device *pdev) -{ - struct clk *clk; - - if (dss_has_feature(FEAT_VENC_REQUIRES_TV_DAC_CLK)) { - clk = clk_get(&pdev->dev, "tv_dac_clk"); - if (IS_ERR(clk)) { - DSSERR("can't get tv_dac_clk\n"); - return PTR_ERR(clk); - } - } else { - clk = NULL; - } - - venc.tv_dac_clk = clk; - - return 0; -} - -static void venc_put_clocks(void) -{ - if (venc.tv_dac_clk) - clk_put(venc.tv_dac_clk); -} - -/* VENC HW IP initialisation */ -static int omap_venchw_probe(struct platform_device *pdev) -{ - u8 rev_id; - struct resource *venc_mem; - int r; - - venc.pdev = pdev; - - mutex_init(&venc.venc_lock); - - venc.wss_data = 0; - - venc_mem = platform_get_resource(venc.pdev, IORESOURCE_MEM, 0); - if (!venc_mem) { - DSSERR("can't get IORESOURCE_MEM VENC\n"); - r = -EINVAL; - goto err_ioremap; - } - venc.base = ioremap(venc_mem->start, resource_size(venc_mem)); - if (!venc.base) { - DSSERR("can't ioremap VENC\n"); - r = -ENOMEM; - goto err_ioremap; - } - - r = venc_get_clocks(pdev); - if (r) - goto err_get_clk; - - pm_runtime_enable(&pdev->dev); - - r = venc_runtime_get(); - if (r) - goto err_get_venc; - - rev_id = (u8)(venc_read_reg(VENC_REV_ID) & 0xff); - dev_dbg(&pdev->dev, "OMAP VENC rev %d\n", rev_id); - - venc_runtime_put(); - - return omap_dss_register_driver(&venc_driver); - -err_get_venc: - pm_runtime_disable(&pdev->dev); - venc_put_clocks(); -err_get_clk: - iounmap(venc.base); -err_ioremap: - return r; -} - -static int omap_venchw_remove(struct platform_device *pdev) -{ - if (venc.vdda_dac_reg != NULL) { - regulator_put(venc.vdda_dac_reg); - venc.vdda_dac_reg = NULL; - } - omap_dss_unregister_driver(&venc_driver); - - pm_runtime_disable(&pdev->dev); - venc_put_clocks(); - - iounmap(venc.base); - return 0; -} - -static int venc_runtime_suspend(struct device *dev) -{ - if (venc.tv_dac_clk) - clk_disable(venc.tv_dac_clk); - - dispc_runtime_put(); - dss_runtime_put(); - - return 0; -} - -static int venc_runtime_resume(struct device *dev) -{ - int r; - - r = dss_runtime_get(); - if (r < 0) - goto err_get_dss; - - r = dispc_runtime_get(); - if (r < 0) - goto err_get_dispc; - - if (venc.tv_dac_clk) - clk_enable(venc.tv_dac_clk); - - return 0; - -err_get_dispc: - dss_runtime_put(); -err_get_dss: - return r; -} - -static const struct dev_pm_ops venc_pm_ops = { - .runtime_suspend = venc_runtime_suspend, - .runtime_resume = venc_runtime_resume, -}; - -static struct platform_driver omap_venchw_driver = { - .probe = omap_venchw_probe, - .remove = omap_venchw_remove, - .driver = { - .name = "omapdss_venc", - .owner = THIS_MODULE, - .pm = &venc_pm_ops, - }, -}; - -int venc_init_platform_driver(void) -{ - if (cpu_is_omap44xx()) - return 0; - - return platform_driver_register(&omap_venchw_driver); -} - -void venc_uninit_platform_driver(void) -{ - if (cpu_is_omap44xx()) - return; - - return platform_driver_unregister(&omap_venchw_driver); -} diff --git a/drivers/video/omap2/omapfb/Kconfig b/drivers/video/omap2/omapfb/Kconfig deleted file mode 100644 index 4ea17dc3258..00000000000 --- a/drivers/video/omap2/omapfb/Kconfig +++ /dev/null @@ -1,28 +0,0 @@ -menuconfig FB_OMAP2 - tristate "OMAP2+ frame buffer support" - depends on FB && OMAP2_DSS && !DRM_OMAP - - select OMAP2_VRAM - select OMAP2_VRFB if ARCH_OMAP2 || ARCH_OMAP3 - select FB_CFB_FILLRECT - select FB_CFB_COPYAREA - select FB_CFB_IMAGEBLIT - help - Frame buffer driver for OMAP2+ based boards. - -config FB_OMAP2_DEBUG_SUPPORT - bool "Debug support for OMAP2+ FB" - default y - depends on FB_OMAP2 - help - Support for debug output. You have to enable the actual printing - with 'debug' module parameter. - -config FB_OMAP2_NUM_FBS - int "Number of framebuffers" - range 1 10 - default 3 - depends on FB_OMAP2 - help - Select the number of framebuffers created. OMAP2/3 has 3 overlays - so normally this would be 3. diff --git a/drivers/video/omap2/omapfb/Makefile b/drivers/video/omap2/omapfb/Makefile deleted file mode 100644 index 51c2e00d9bf..00000000000 --- a/drivers/video/omap2/omapfb/Makefile +++ /dev/null @@ -1,2 +0,0 @@ -obj-$(CONFIG_FB_OMAP2) += omapfb.o -omapfb-y := omapfb-main.o omapfb-sysfs.o omapfb-ioctl.o diff --git a/drivers/video/omap2/omapfb/omapfb-ioctl.c b/drivers/video/omap2/omapfb/omapfb-ioctl.c deleted file mode 100644 index 16ba6196f33..00000000000 --- a/drivers/video/omap2/omapfb/omapfb-ioctl.c +++ /dev/null @@ -1,929 +0,0 @@ -/* - * linux/drivers/video/omap2/omapfb-ioctl.c - * - * Copyright (C) 2008 Nokia Corporation - * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com> - * - * Some code and ideas taken from drivers/video/omap/ driver - * by Imre Deak. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program. If not, see <http://www.gnu.org/licenses/>. - */ - -#include <linux/fb.h> -#include <linux/device.h> -#include <linux/uaccess.h> -#include <linux/platform_device.h> -#include <linux/mm.h> -#include <linux/omapfb.h> -#include <linux/vmalloc.h> -#include <linux/export.h> - -#include <video/omapdss.h> -#include <plat/vrfb.h> -#include <plat/vram.h> - -#include "omapfb.h" - -static u8 get_mem_idx(struct omapfb_info *ofbi) -{ - if (ofbi->id == ofbi->region->id) - return 0; - - return OMAPFB_MEM_IDX_ENABLED | ofbi->region->id; -} - -static struct omapfb2_mem_region *get_mem_region(struct omapfb_info *ofbi, - u8 mem_idx) -{ - struct omapfb2_device *fbdev = ofbi->fbdev; - - if (mem_idx & OMAPFB_MEM_IDX_ENABLED) - mem_idx &= OMAPFB_MEM_IDX_MASK; - else - mem_idx = ofbi->id; - - if (mem_idx >= fbdev->num_fbs) - return NULL; - - return &fbdev->regions[mem_idx]; -} - -static int omapfb_setup_plane(struct fb_info *fbi, struct omapfb_plane_info *pi) -{ - struct omapfb_info *ofbi = FB2OFB(fbi); - struct omapfb2_device *fbdev = ofbi->fbdev; - struct omap_overlay *ovl; - struct omap_overlay_info old_info; - struct omapfb2_mem_region *old_rg, *new_rg; - int r = 0; - - DBG("omapfb_setup_plane\n"); - - if (ofbi->num_overlays != 1) { - r = -EINVAL; - goto out; - } - - /* XXX uses only the first overlay */ - ovl = ofbi->overlays[0]; - - old_rg = ofbi->region; - new_rg = get_mem_region(ofbi, pi->mem_idx); - if (!new_rg) { - r = -EINVAL; - goto out; - } - - /* Take the locks in a specific order to keep lockdep happy */ - if (old_rg->id < new_rg->id) { - omapfb_get_mem_region(old_rg); - omapfb_get_mem_region(new_rg); - } else if (new_rg->id < old_rg->id) { - omapfb_get_mem_region(new_rg); - omapfb_get_mem_region(old_rg); - } else - omapfb_get_mem_region(old_rg); - - if (pi->enabled && !new_rg->size) { - /* - * This plane's memory was freed, can't enable it - * until it's reallocated. - */ - r = -EINVAL; - goto put_mem; - } - - ovl->get_overlay_info(ovl, &old_info); - - if (old_rg != new_rg) { - ofbi->region = new_rg; - set_fb_fix(fbi); - } - - if (!pi->enabled) { - r = ovl->disable(ovl); - if (r) - goto undo; - } - - if (pi->enabled) { - r = omapfb_setup_overlay(fbi, ovl, pi->pos_x, pi->pos_y, - pi->out_width, pi->out_height); - if (r) - goto undo; - } else { - struct omap_overlay_info info; - - ovl->get_overlay_info(ovl, &info); - - info.pos_x = pi->pos_x; - info.pos_y = pi->pos_y; - info.out_width = pi->out_width; - info.out_height = pi->out_height; - - r = ovl->set_overlay_info(ovl, &info); - if (r) - goto undo; - } - - if (ovl->manager) - ovl->manager->apply(ovl->manager); - - if (pi->enabled) { - r = ovl->enable(ovl); - if (r) - goto undo; - } - - /* Release the locks in a specific order to keep lockdep happy */ - if (old_rg->id > new_rg->id) { - omapfb_put_mem_region(old_rg); - omapfb_put_mem_region(new_rg); - } else if (new_rg->id > old_rg->id) { - omapfb_put_mem_region(new_rg); - omapfb_put_mem_region(old_rg); - } else - omapfb_put_mem_region(old_rg); - - return 0; - - undo: - if (old_rg != new_rg) { - ofbi->region = old_rg; - set_fb_fix(fbi); - } - - ovl->set_overlay_info(ovl, &old_info); - put_mem: - /* Release the locks in a specific order to keep lockdep happy */ - if (old_rg->id > new_rg->id) { - omapfb_put_mem_region(old_rg); - omapfb_put_mem_region(new_rg); - } else if (new_rg->id > old_rg->id) { - omapfb_put_mem_region(new_rg); - omapfb_put_mem_region(old_rg); - } else - omapfb_put_mem_region(old_rg); - out: - dev_err(fbdev->dev, "setup_plane failed\n"); - - return r; -} - -static int omapfb_query_plane(struct fb_info *fbi, struct omapfb_plane_info *pi) -{ - struct omapfb_info *ofbi = FB2OFB(fbi); - - if (ofbi->num_overlays != 1) { - memset(pi, 0, sizeof(*pi)); - } else { - struct omap_overlay *ovl; - struct omap_overlay_info ovli; - - ovl = ofbi->overlays[0]; - ovl->get_overlay_info(ovl, &ovli); - - pi->pos_x = ovli.pos_x; - pi->pos_y = ovli.pos_y; - pi->enabled = ovl->is_enabled(ovl); - pi->channel_out = 0; /* xxx */ - pi->mirror = 0; - pi->mem_idx = get_mem_idx(ofbi); - pi->out_width = ovli.out_width; - pi->out_height = ovli.out_height; - } - - return 0; -} - -static int omapfb_setup_mem(struct fb_info *fbi, struct omapfb_mem_info *mi) -{ - struct omapfb_info *ofbi = FB2OFB(fbi); - struct omapfb2_device *fbdev = ofbi->fbdev; - struct omapfb2_mem_region *rg; - int r = 0, i; - size_t size; - - if (mi->type > OMAPFB_MEMTYPE_MAX) - return -EINVAL; - - size = PAGE_ALIGN(mi->size); - - rg = ofbi->region; - - down_write_nested(&rg->lock, rg->id); - atomic_inc(&rg->lock_count); - - if (atomic_read(&rg->map_count)) { - r = -EBUSY; - goto out; - } - - for (i = 0; i < fbdev->num_fbs; i++) { - struct omapfb_info *ofbi2 = FB2OFB(fbdev->fbs[i]); - int j; - - if (ofbi2->region != rg) - continue; - - for (j = 0; j < ofbi2->num_overlays; j++) { - struct omap_overlay *ovl; - ovl = ofbi2->overlays[j]; - if (ovl->is_enabled(ovl)) { - r = -EBUSY; - goto out; - } - } - } - - if (rg->size != size || rg->type != mi->type) { - r = omapfb_realloc_fbmem(fbi, size, mi->type); - if (r) { - dev_err(fbdev->dev, "realloc fbmem failed\n"); - goto out; - } - } - - out: - atomic_dec(&rg->lock_count); - up_write(&rg->lock); - - return r; -} - -static int omapfb_query_mem(struct fb_info *fbi, struct omapfb_mem_info *mi) -{ - struct omapfb_info *ofbi = FB2OFB(fbi); - struct omapfb2_mem_region *rg; - - rg = omapfb_get_mem_region(ofbi->region); - memset(mi, 0, sizeof(*mi)); - - mi->size = rg->size; - mi->type = rg->type; - - omapfb_put_mem_region(rg); - - return 0; -} - -static int omapfb_update_window_nolock(struct fb_info *fbi, - u32 x, u32 y, u32 w, u32 h) -{ - struct omap_dss_device *display = fb2display(fbi); - u16 dw, dh; - - if (!display) - return 0; - - if (w == 0 || h == 0) - return 0; - - display->driver->get_resolution(display, &dw, &dh); - - if (x + w > dw || y + h > dh) - return -EINVAL; - - return display->driver->update(display, x, y, w, h); -} - -/* This function is exported for SGX driver use */ -int omapfb_update_window(struct fb_info *fbi, - u32 x, u32 y, u32 w, u32 h) -{ - struct omapfb_info *ofbi = FB2OFB(fbi); - struct omapfb2_device *fbdev = ofbi->fbdev; - int r; - - if (!lock_fb_info(fbi)) - return -ENODEV; - omapfb_lock(fbdev); - - r = omapfb_update_window_nolock(fbi, x, y, w, h); - - omapfb_unlock(fbdev); - unlock_fb_info(fbi); - - return r; -} -EXPORT_SYMBOL(omapfb_update_window); - -int omapfb_set_update_mode(struct fb_info *fbi, - enum omapfb_update_mode mode) -{ - struct omap_dss_device *display = fb2display(fbi); - struct omapfb_info *ofbi = FB2OFB(fbi); - struct omapfb2_device *fbdev = ofbi->fbdev; - struct omapfb_display_data *d; - int r; - - if (!display) - return -EINVAL; - - if (mode != OMAPFB_AUTO_UPDATE && mode != OMAPFB_MANUAL_UPDATE) - return -EINVAL; - - omapfb_lock(fbdev); - - d = get_display_data(fbdev, display); - - if (d->update_mode == mode) { - omapfb_unlock(fbdev); - return 0; - } - - r = 0; - - if (display->caps & OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE) { - if (mode == OMAPFB_AUTO_UPDATE) - omapfb_start_auto_update(fbdev, display); - else /* MANUAL_UPDATE */ - omapfb_stop_auto_update(fbdev, display); - - d->update_mode = mode; - } else { /* AUTO_UPDATE */ - if (mode == OMAPFB_MANUAL_UPDATE) - r = -EINVAL; - } - - omapfb_unlock(fbdev); - - return r; -} - -int omapfb_get_update_mode(struct fb_info *fbi, - enum omapfb_update_mode *mode) -{ - struct omap_dss_device *display = fb2display(fbi); - struct omapfb_info *ofbi = FB2OFB(fbi); - struct omapfb2_device *fbdev = ofbi->fbdev; - struct omapfb_display_data *d; - - if (!display) - return -EINVAL; - - omapfb_lock(fbdev); - - d = get_display_data(fbdev, display); - - *mode = d->update_mode; - - omapfb_unlock(fbdev); - - return 0; -} - -/* XXX this color key handling is a hack... */ -static struct omapfb_color_key omapfb_color_keys[2]; - -static int _omapfb_set_color_key(struct omap_overlay_manager *mgr, - struct omapfb_color_key *ck) -{ - struct omap_overlay_manager_info info; - enum omap_dss_trans_key_type kt; - int r; - - mgr->get_manager_info(mgr, &info); - - if (ck->key_type == OMAPFB_COLOR_KEY_DISABLED) { - info.trans_enabled = false; - omapfb_color_keys[mgr->id] = *ck; - - r = mgr->set_manager_info(mgr, &info); - if (r) - return r; - - r = mgr->apply(mgr); - - return r; - } - - switch (ck->key_type) { - case OMAPFB_COLOR_KEY_GFX_DST: - kt = OMAP_DSS_COLOR_KEY_GFX_DST; - break; - case OMAPFB_COLOR_KEY_VID_SRC: - kt = OMAP_DSS_COLOR_KEY_VID_SRC; - break; - default: - return -EINVAL; - } - - info.default_color = ck->background; - info.trans_key = ck->trans_key; - info.trans_key_type = kt; - info.trans_enabled = true; - - omapfb_color_keys[mgr->id] = *ck; - - r = mgr->set_manager_info(mgr, &info); - if (r) - return r; - - r = mgr->apply(mgr); - - return r; -} - -static int omapfb_set_color_key(struct fb_info *fbi, - struct omapfb_color_key *ck) -{ - struct omapfb_info *ofbi = FB2OFB(fbi); - struct omapfb2_device *fbdev = ofbi->fbdev; - int r; - int i; - struct omap_overlay_manager *mgr = NULL; - - omapfb_lock(fbdev); - - for (i = 0; i < ofbi->num_overlays; i++) { - if (ofbi->overlays[i]->manager) { - mgr = ofbi->overlays[i]->manager; - break; - } - } - - if (!mgr) { - r = -EINVAL; - goto err; - } - - r = _omapfb_set_color_key(mgr, ck); -err: - omapfb_unlock(fbdev); - - return r; -} - -static int omapfb_get_color_key(struct fb_info *fbi, - struct omapfb_color_key *ck) -{ - struct omapfb_info *ofbi = FB2OFB(fbi); - struct omapfb2_device *fbdev = ofbi->fbdev; - struct omap_overlay_manager *mgr = NULL; - int r = 0; - int i; - - omapfb_lock(fbdev); - - for (i = 0; i < ofbi->num_overlays; i++) { - if (ofbi->overlays[i]->manager) { - mgr = ofbi->overlays[i]->manager; - break; - } - } - - if (!mgr) { - r = -EINVAL; - goto err; - } - - *ck = omapfb_color_keys[mgr->id]; -err: - omapfb_unlock(fbdev); - - return r; -} - -static int omapfb_memory_read(struct fb_info *fbi, - struct omapfb_memory_read *mr) -{ - struct omap_dss_device *display = fb2display(fbi); - void *buf; - int r; - - if (!display || !display->driver->memory_read) - return -ENOENT; - - if (!access_ok(VERIFY_WRITE, mr->buffer, mr->buffer_size)) - return -EFAULT; - - if (mr->w * mr->h * 3 > mr->buffer_size) - return -EINVAL; - - buf = vmalloc(mr->buffer_size); - if (!buf) { - DBG("vmalloc failed\n"); - return -ENOMEM; - } - - r = display->driver->memory_read(display, buf, mr->buffer_size, - mr->x, mr->y, mr->w, mr->h); - - if (r > 0) { - if (copy_to_user(mr->buffer, buf, mr->buffer_size)) - r = -EFAULT; - } - - vfree(buf); - - return r; -} - -static int omapfb_get_ovl_colormode(struct omapfb2_device *fbdev, - struct omapfb_ovl_colormode *mode) -{ - int ovl_idx = mode->overlay_idx; - int mode_idx = mode->mode_idx; - struct omap_overlay *ovl; - enum omap_color_mode supported_modes; - struct fb_var_screeninfo var; - int i; - - if (ovl_idx >= fbdev->num_overlays) - return -ENODEV; - ovl = fbdev->overlays[ovl_idx]; - supported_modes = ovl->supported_modes; - - mode_idx = mode->mode_idx; - - for (i = 0; i < sizeof(supported_modes) * 8; i++) { - if (!(supported_modes & (1 << i))) - continue; - /* - * It's possible that the FB doesn't support a mode - * that is supported by the overlay, so call the - * following here. - */ - if (dss_mode_to_fb_mode(1 << i, &var) < 0) - continue; - - mode_idx--; - if (mode_idx < 0) - break; - } - - if (i == sizeof(supported_modes) * 8) - return -ENOENT; - - mode->bits_per_pixel = var.bits_per_pixel; - mode->nonstd = var.nonstd; - mode->red = var.red; - mode->green = var.green; - mode->blue = var.blue; - mode->transp = var.transp; - - return 0; -} - -static int omapfb_wait_for_go(struct fb_info *fbi) -{ - struct omapfb_info *ofbi = FB2OFB(fbi); - int r = 0; - int i; - - for (i = 0; i < ofbi->num_overlays; ++i) { - struct omap_overlay *ovl = ofbi->overlays[i]; - r = ovl->wait_for_go(ovl); - if (r) - break; - } - - return r; -} - -int omapfb_ioctl(struct fb_info *fbi, unsigned int cmd, unsigned long arg) -{ - struct omapfb_info *ofbi = FB2OFB(fbi); - struct omapfb2_device *fbdev = ofbi->fbdev; - struct omap_dss_device *display = fb2display(fbi); - - union { - struct omapfb_update_window_old uwnd_o; - struct omapfb_update_window uwnd; - struct omapfb_plane_info plane_info; - struct omapfb_caps caps; - struct omapfb_mem_info mem_info; - struct omapfb_color_key color_key; - struct omapfb_ovl_colormode ovl_colormode; - enum omapfb_update_mode update_mode; - int test_num; - struct omapfb_memory_read memory_read; - struct omapfb_vram_info vram_info; - struct omapfb_tearsync_info tearsync_info; - struct omapfb_display_info display_info; - u32 crt; - } p; - - int r = 0; - - switch (cmd) { - case OMAPFB_SYNC_GFX: - DBG("ioctl SYNC_GFX\n"); - if (!display || !display->driver->sync) { - /* DSS1 never returns an error here, so we neither */ - /*r = -EINVAL;*/ - break; - } - - r = display->driver->sync(display); - break; - - case OMAPFB_UPDATE_WINDOW_OLD: - DBG("ioctl UPDATE_WINDOW_OLD\n"); - if (!display || !display->driver->update) { - r = -EINVAL; - break; - } - - if (copy_from_user(&p.uwnd_o, - (void __user *)arg, - sizeof(p.uwnd_o))) { - r = -EFAULT; - break; - } - - r = omapfb_update_window_nolock(fbi, p.uwnd_o.x, p.uwnd_o.y, - p.uwnd_o.width, p.uwnd_o.height); - break; - - case OMAPFB_UPDATE_WINDOW: - DBG("ioctl UPDATE_WINDOW\n"); - if (!display || !display->driver->update) { - r = -EINVAL; - break; - } - - if (copy_from_user(&p.uwnd, (void __user *)arg, - sizeof(p.uwnd))) { - r = -EFAULT; - break; - } - - r = omapfb_update_window_nolock(fbi, p.uwnd.x, p.uwnd.y, - p.uwnd.width, p.uwnd.height); - break; - - case OMAPFB_SETUP_PLANE: - DBG("ioctl SETUP_PLANE\n"); - if (copy_from_user(&p.plane_info, (void __user *)arg, - sizeof(p.plane_info))) - r = -EFAULT; - else - r = omapfb_setup_plane(fbi, &p.plane_info); - break; - - case OMAPFB_QUERY_PLANE: - DBG("ioctl QUERY_PLANE\n"); - r = omapfb_query_plane(fbi, &p.plane_info); - if (r < 0) - break; - if (copy_to_user((void __user *)arg, &p.plane_info, - sizeof(p.plane_info))) - r = -EFAULT; - break; - - case OMAPFB_SETUP_MEM: - DBG("ioctl SETUP_MEM\n"); - if (copy_from_user(&p.mem_info, (void __user *)arg, - sizeof(p.mem_info))) - r = -EFAULT; - else - r = omapfb_setup_mem(fbi, &p.mem_info); - break; - - case OMAPFB_QUERY_MEM: - DBG("ioctl QUERY_MEM\n"); - r = omapfb_query_mem(fbi, &p.mem_info); - if (r < 0) - break; - if (copy_to_user((void __user *)arg, &p.mem_info, - sizeof(p.mem_info))) - r = -EFAULT; - break; - - case OMAPFB_GET_CAPS: - DBG("ioctl GET_CAPS\n"); - if (!display) { - r = -EINVAL; - break; - } - - memset(&p.caps, 0, sizeof(p.caps)); - if (display->caps & OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE) - p.caps.ctrl |= OMAPFB_CAPS_MANUAL_UPDATE; - if (display->caps & OMAP_DSS_DISPLAY_CAP_TEAR_ELIM) - p.caps.ctrl |= OMAPFB_CAPS_TEARSYNC; - - if (copy_to_user((void __user *)arg, &p.caps, sizeof(p.caps))) - r = -EFAULT; - break; - - case OMAPFB_GET_OVERLAY_COLORMODE: - DBG("ioctl GET_OVERLAY_COLORMODE\n"); - if (copy_from_user(&p.ovl_colormode, (void __user *)arg, - sizeof(p.ovl_colormode))) { - r = -EFAULT; - break; - } - r = omapfb_get_ovl_colormode(fbdev, &p.ovl_colormode); - if (r < 0) - break; - if (copy_to_user((void __user *)arg, &p.ovl_colormode, - sizeof(p.ovl_colormode))) - r = -EFAULT; - break; - - case OMAPFB_SET_UPDATE_MODE: - DBG("ioctl SET_UPDATE_MODE\n"); - if (get_user(p.update_mode, (int __user *)arg)) - r = -EFAULT; - else - r = omapfb_set_update_mode(fbi, p.update_mode); - break; - - case OMAPFB_GET_UPDATE_MODE: - DBG("ioctl GET_UPDATE_MODE\n"); - r = omapfb_get_update_mode(fbi, &p.update_mode); - if (r) - break; - if (put_user(p.update_mode, - (enum omapfb_update_mode __user *)arg)) - r = -EFAULT; - break; - - case OMAPFB_SET_COLOR_KEY: - DBG("ioctl SET_COLOR_KEY\n"); - if (copy_from_user(&p.color_key, (void __user *)arg, - sizeof(p.color_key))) - r = -EFAULT; - else - r = omapfb_set_color_key(fbi, &p.color_key); - break; - - case OMAPFB_GET_COLOR_KEY: - DBG("ioctl GET_COLOR_KEY\n"); - r = omapfb_get_color_key(fbi, &p.color_key); - if (r) - break; - if (copy_to_user((void __user *)arg, &p.color_key, - sizeof(p.color_key))) - r = -EFAULT; - break; - - case FBIO_WAITFORVSYNC: - if (get_user(p.crt, (__u32 __user *)arg)) { - r = -EFAULT; - break; - } - if (p.crt != 0) { - r = -ENODEV; - break; - } - /* FALLTHROUGH */ - - case OMAPFB_WAITFORVSYNC: - DBG("ioctl WAITFORVSYNC\n"); - if (!display) { - r = -EINVAL; - break; - } - - r = display->manager->wait_for_vsync(display->manager); - break; - - case OMAPFB_WAITFORGO: - DBG("ioctl WAITFORGO\n"); - if (!display) { - r = -EINVAL; - break; - } - - r = omapfb_wait_for_go(fbi); - break; - - /* LCD and CTRL tests do the same thing for backward - * compatibility */ - case OMAPFB_LCD_TEST: - DBG("ioctl LCD_TEST\n"); - if (get_user(p.test_num, (int __user *)arg)) { - r = -EFAULT; - break; - } - if (!display || !display->driver->run_test) { - r = -EINVAL; - break; - } - - r = display->driver->run_test(display, p.test_num); - - break; - - case OMAPFB_CTRL_TEST: - DBG("ioctl CTRL_TEST\n"); - if (get_user(p.test_num, (int __user *)arg)) { - r = -EFAULT; - break; - } - if (!display || !display->driver->run_test) { - r = -EINVAL; - break; - } - - r = display->driver->run_test(display, p.test_num); - - break; - - case OMAPFB_MEMORY_READ: - DBG("ioctl MEMORY_READ\n"); - - if (copy_from_user(&p.memory_read, (void __user *)arg, - sizeof(p.memory_read))) { - r = -EFAULT; - break; - } - - r = omapfb_memory_read(fbi, &p.memory_read); - - break; - - case OMAPFB_GET_VRAM_INFO: { - unsigned long vram, free, largest; - - DBG("ioctl GET_VRAM_INFO\n"); - - omap_vram_get_info(&vram, &free, &largest); - p.vram_info.total = vram; - p.vram_info.free = free; - p.vram_info.largest_free_block = largest; - - if (copy_to_user((void __user *)arg, &p.vram_info, - sizeof(p.vram_info))) - r = -EFAULT; - break; - } - - case OMAPFB_SET_TEARSYNC: { - DBG("ioctl SET_TEARSYNC\n"); - - if (copy_from_user(&p.tearsync_info, (void __user *)arg, - sizeof(p.tearsync_info))) { - r = -EFAULT; - break; - } - - if (!display || !display->driver->enable_te) { - r = -ENODEV; - break; - } - - r = display->driver->enable_te(display, - !!p.tearsync_info.enabled); - - break; - } - - case OMAPFB_GET_DISPLAY_INFO: { - u16 xres, yres; - - DBG("ioctl GET_DISPLAY_INFO\n"); - - if (display == NULL) { - r = -ENODEV; - break; - } - - display->driver->get_resolution(display, &xres, &yres); - - p.display_info.xres = xres; - p.display_info.yres = yres; - - if (display->driver->get_dimensions) { - u32 w, h; - display->driver->get_dimensions(display, &w, &h); - p.display_info.width = w; - p.display_info.height = h; - } else { - p.display_info.width = 0; - p.display_info.height = 0; - } - - if (copy_to_user((void __user *)arg, &p.display_info, - sizeof(p.display_info))) - r = -EFAULT; - break; - } - - default: - dev_err(fbdev->dev, "Unknown ioctl 0x%x\n", cmd); - r = -EINVAL; - } - - if (r < 0) - DBG("ioctl failed: %d\n", r); - - return r; -} - - diff --git a/drivers/video/omap2/omapfb/omapfb-main.c b/drivers/video/omap2/omapfb/omapfb-main.c deleted file mode 100644 index ce158311ff5..00000000000 --- a/drivers/video/omap2/omapfb/omapfb-main.c +++ /dev/null @@ -1,2603 +0,0 @@ -/* - * linux/drivers/video/omap2/omapfb-main.c - * - * Copyright (C) 2008 Nokia Corporation - * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com> - * - * Some code and ideas taken from drivers/video/omap/ driver - * by Imre Deak. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program. If not, see <http://www.gnu.org/licenses/>. - */ - -#include <linux/module.h> -#include <linux/delay.h> -#include <linux/slab.h> -#include <linux/fb.h> -#include <linux/dma-mapping.h> -#include <linux/vmalloc.h> -#include <linux/device.h> -#include <linux/platform_device.h> -#include <linux/omapfb.h> - -#include <video/omapdss.h> -#include <plat/vram.h> -#include <plat/vrfb.h> - -#include "omapfb.h" - -#define MODULE_NAME "omapfb" - -#define OMAPFB_PLANE_XRES_MIN 8 -#define OMAPFB_PLANE_YRES_MIN 8 - -static char *def_mode; -static char *def_vram; -static bool def_vrfb; -static int def_rotate; -static bool def_mirror; -static bool auto_update; -static unsigned int auto_update_freq; -module_param(auto_update, bool, 0); -module_param(auto_update_freq, uint, 0644); - -#ifdef DEBUG -bool omapfb_debug; -module_param_named(debug, omapfb_debug, bool, 0644); -static bool omapfb_test_pattern; -module_param_named(test, omapfb_test_pattern, bool, 0644); -#endif - -static int omapfb_fb_init(struct omapfb2_device *fbdev, struct fb_info *fbi); -static int omapfb_get_recommended_bpp(struct omapfb2_device *fbdev, - struct omap_dss_device *dssdev); - -#ifdef DEBUG -static void draw_pixel(struct fb_info *fbi, int x, int y, unsigned color) -{ - struct fb_var_screeninfo *var = &fbi->var; - struct fb_fix_screeninfo *fix = &fbi->fix; - void __iomem *addr = fbi->screen_base; - const unsigned bytespp = var->bits_per_pixel >> 3; - const unsigned line_len = fix->line_length / bytespp; - - int r = (color >> 16) & 0xff; - int g = (color >> 8) & 0xff; - int b = (color >> 0) & 0xff; - - if (var->bits_per_pixel == 16) { - u16 __iomem *p = (u16 __iomem *)addr; - p += y * line_len + x; - - r = r * 32 / 256; - g = g * 64 / 256; - b = b * 32 / 256; - - __raw_writew((r << 11) | (g << 5) | (b << 0), p); - } else if (var->bits_per_pixel == 24) { - u8 __iomem *p = (u8 __iomem *)addr; - p += (y * line_len + x) * 3; - - __raw_writeb(b, p + 0); - __raw_writeb(g, p + 1); - __raw_writeb(r, p + 2); - } else if (var->bits_per_pixel == 32) { - u32 __iomem *p = (u32 __iomem *)addr; - p += y * line_len + x; - __raw_writel(color, p); - } -} - -static void fill_fb(struct fb_info *fbi) -{ - struct fb_var_screeninfo *var = &fbi->var; - const short w = var->xres_virtual; - const short h = var->yres_virtual; - void __iomem *addr = fbi->screen_base; - int y, x; - - if (!addr) - return; - - DBG("fill_fb %dx%d, line_len %d bytes\n", w, h, fbi->fix.line_length); - - for (y = 0; y < h; y++) { - for (x = 0; x < w; x++) { - if (x < 20 && y < 20) - draw_pixel(fbi, x, y, 0xffffff); - else if (x < 20 && (y > 20 && y < h - 20)) - draw_pixel(fbi, x, y, 0xff); - else if (y < 20 && (x > 20 && x < w - 20)) - draw_pixel(fbi, x, y, 0xff00); - else if (x > w - 20 && (y > 20 && y < h - 20)) - draw_pixel(fbi, x, y, 0xff0000); - else if (y > h - 20 && (x > 20 && x < w - 20)) - draw_pixel(fbi, x, y, 0xffff00); - else if (x == 20 || x == w - 20 || - y == 20 || y == h - 20) - draw_pixel(fbi, x, y, 0xffffff); - else if (x == y || w - x == h - y) - draw_pixel(fbi, x, y, 0xff00ff); - else if (w - x == y || x == h - y) - draw_pixel(fbi, x, y, 0x00ffff); - else if (x > 20 && y > 20 && x < w - 20 && y < h - 20) { - int t = x * 3 / w; - unsigned r = 0, g = 0, b = 0; - unsigned c; - if (var->bits_per_pixel == 16) { - if (t == 0) - b = (y % 32) * 256 / 32; - else if (t == 1) - g = (y % 64) * 256 / 64; - else if (t == 2) - r = (y % 32) * 256 / 32; - } else { - if (t == 0) - b = (y % 256); - else if (t == 1) - g = (y % 256); - else if (t == 2) - r = (y % 256); - } - c = (r << 16) | (g << 8) | (b << 0); - draw_pixel(fbi, x, y, c); - } else { - draw_pixel(fbi, x, y, 0); - } - } - } -} -#endif - -static unsigned omapfb_get_vrfb_offset(const struct omapfb_info *ofbi, int rot) -{ - const struct vrfb *vrfb = &ofbi->region->vrfb; - unsigned offset; - - switch (rot) { - case FB_ROTATE_UR: - offset = 0; - break; - case FB_ROTATE_CW: - offset = vrfb->yoffset; - break; - case FB_ROTATE_UD: - offset = vrfb->yoffset * OMAP_VRFB_LINE_LEN + vrfb->xoffset; - break; - case FB_ROTATE_CCW: - offset = vrfb->xoffset * OMAP_VRFB_LINE_LEN; - break; - default: - BUG(); - } - - offset *= vrfb->bytespp; - - return offset; -} - -static u32 omapfb_get_region_rot_paddr(const struct omapfb_info *ofbi, int rot) -{ - if (ofbi->rotation_type == OMAP_DSS_ROT_VRFB) { - return ofbi->region->vrfb.paddr[rot] - + omapfb_get_vrfb_offset(ofbi, rot); - } else { - return ofbi->region->paddr; - } -} - -static u32 omapfb_get_region_paddr(const struct omapfb_info *ofbi) -{ - if (ofbi->rotation_type == OMAP_DSS_ROT_VRFB) - return ofbi->region->vrfb.paddr[0]; - else - return ofbi->region->paddr; -} - -static void __iomem *omapfb_get_region_vaddr(const struct omapfb_info *ofbi) -{ - if (ofbi->rotation_type == OMAP_DSS_ROT_VRFB) - return ofbi->region->vrfb.vaddr[0]; - else - return ofbi->region->vaddr; -} - -static struct omapfb_colormode omapfb_colormodes[] = { - { - .dssmode = OMAP_DSS_COLOR_UYVY, - .bits_per_pixel = 16, - .nonstd = OMAPFB_COLOR_YUV422, - }, { - .dssmode = OMAP_DSS_COLOR_YUV2, - .bits_per_pixel = 16, - .nonstd = OMAPFB_COLOR_YUY422, - }, { - .dssmode = OMAP_DSS_COLOR_ARGB16, - .bits_per_pixel = 16, - .red = { .length = 4, .offset = 8, .msb_right = 0 }, - .green = { .length = 4, .offset = 4, .msb_right = 0 }, - .blue = { .length = 4, .offset = 0, .msb_right = 0 }, - .transp = { .length = 4, .offset = 12, .msb_right = 0 }, - }, { - .dssmode = OMAP_DSS_COLOR_RGB16, - .bits_per_pixel = 16, - .red = { .length = 5, .offset = 11, .msb_right = 0 }, - .green = { .length = 6, .offset = 5, .msb_right = 0 }, - .blue = { .length = 5, .offset = 0, .msb_right = 0 }, - .transp = { .length = 0, .offset = 0, .msb_right = 0 }, - }, { - .dssmode = OMAP_DSS_COLOR_RGB24P, - .bits_per_pixel = 24, - .red = { .length = 8, .offset = 16, .msb_right = 0 }, - .green = { .length = 8, .offset = 8, .msb_right = 0 }, - .blue = { .length = 8, .offset = 0, .msb_right = 0 }, - .transp = { .length = 0, .offset = 0, .msb_right = 0 }, - }, { - .dssmode = OMAP_DSS_COLOR_RGB24U, - .bits_per_pixel = 32, - .red = { .length = 8, .offset = 16, .msb_right = 0 }, - .green = { .length = 8, .offset = 8, .msb_right = 0 }, - .blue = { .length = 8, .offset = 0, .msb_right = 0 }, - .transp = { .length = 0, .offset = 0, .msb_right = 0 }, - }, { - .dssmode = OMAP_DSS_COLOR_ARGB32, - .bits_per_pixel = 32, - .red = { .length = 8, .offset = 16, .msb_right = 0 }, - .green = { .length = 8, .offset = 8, .msb_right = 0 }, - .blue = { .length = 8, .offset = 0, .msb_right = 0 }, - .transp = { .length = 8, .offset = 24, .msb_right = 0 }, - }, { - .dssmode = OMAP_DSS_COLOR_RGBA32, - .bits_per_pixel = 32, - .red = { .length = 8, .offset = 24, .msb_right = 0 }, - .green = { .length = 8, .offset = 16, .msb_right = 0 }, - .blue = { .length = 8, .offset = 8, .msb_right = 0 }, - .transp = { .length = 8, .offset = 0, .msb_right = 0 }, - }, { - .dssmode = OMAP_DSS_COLOR_RGBX32, - .bits_per_pixel = 32, - .red = { .length = 8, .offset = 24, .msb_right = 0 }, - .green = { .length = 8, .offset = 16, .msb_right = 0 }, - .blue = { .length = 8, .offset = 8, .msb_right = 0 }, - .transp = { .length = 0, .offset = 0, .msb_right = 0 }, - }, -}; - -static bool cmp_var_to_colormode(struct fb_var_screeninfo *var, - struct omapfb_colormode *color) -{ - bool cmp_component(struct fb_bitfield *f1, struct fb_bitfield *f2) - { - return f1->length == f2->length && - f1->offset == f2->offset && - f1->msb_right == f2->msb_right; - } - - if (var->bits_per_pixel == 0 || - var->red.length == 0 || - var->blue.length == 0 || - var->green.length == 0) - return 0; - - return var->bits_per_pixel == color->bits_per_pixel && - cmp_component(&var->red, &color->red) && - cmp_component(&var->green, &color->green) && - cmp_component(&var->blue, &color->blue) && - cmp_component(&var->transp, &color->transp); -} - -static void assign_colormode_to_var(struct fb_var_screeninfo *var, - struct omapfb_colormode *color) -{ - var->bits_per_pixel = color->bits_per_pixel; - var->nonstd = color->nonstd; - var->red = color->red; - var->green = color->green; - var->blue = color->blue; - var->transp = color->transp; -} - -static int fb_mode_to_dss_mode(struct fb_var_screeninfo *var, - enum omap_color_mode *mode) -{ - enum omap_color_mode dssmode; - int i; - - /* first match with nonstd field */ - if (var->nonstd) { - for (i = 0; i < ARRAY_SIZE(omapfb_colormodes); ++i) { - struct omapfb_colormode *m = &omapfb_colormodes[i]; - if (var->nonstd == m->nonstd) { - assign_colormode_to_var(var, m); - *mode = m->dssmode; - return 0; - } - } - - return -EINVAL; - } - - /* then try exact match of bpp and colors */ - for (i = 0; i < ARRAY_SIZE(omapfb_colormodes); ++i) { - struct omapfb_colormode *m = &omapfb_colormodes[i]; - if (cmp_var_to_colormode(var, m)) { - assign_colormode_to_var(var, m); - *mode = m->dssmode; - return 0; - } - } - - /* match with bpp if user has not filled color fields - * properly */ - switch (var->bits_per_pixel) { - case 1: - dssmode = OMAP_DSS_COLOR_CLUT1; - break; - case 2: - dssmode = OMAP_DSS_COLOR_CLUT2; - break; - case 4: - dssmode = OMAP_DSS_COLOR_CLUT4; - break; - case 8: - dssmode = OMAP_DSS_COLOR_CLUT8; - break; - case 12: - dssmode = OMAP_DSS_COLOR_RGB12U; - break; - case 16: - dssmode = OMAP_DSS_COLOR_RGB16; - break; - case 24: - dssmode = OMAP_DSS_COLOR_RGB24P; - break; - case 32: - dssmode = OMAP_DSS_COLOR_RGB24U; - break; - default: - return -EINVAL; - } - - for (i = 0; i < ARRAY_SIZE(omapfb_colormodes); ++i) { - struct omapfb_colormode *m = &omapfb_colormodes[i]; - if (dssmode == m->dssmode) { - assign_colormode_to_var(var, m); - *mode = m->dssmode; - return 0; - } - } - - return -EINVAL; -} - -static int check_fb_res_bounds(struct fb_var_screeninfo *var) -{ - int xres_min = OMAPFB_PLANE_XRES_MIN; - int xres_max = 2048; - int yres_min = OMAPFB_PLANE_YRES_MIN; - int yres_max = 2048; - - /* XXX: some applications seem to set virtual res to 0. */ - if (var->xres_virtual == 0) - var->xres_virtual = var->xres; - - if (var->yres_virtual == 0) - var->yres_virtual = var->yres; - - if (var->xres_virtual < xres_min || var->yres_virtual < yres_min) - return -EINVAL; - - if (var->xres < xres_min) - var->xres = xres_min; - if (var->yres < yres_min) - var->yres = yres_min; - if (var->xres > xres_max) - var->xres = xres_max; - if (var->yres > yres_max) - var->yres = yres_max; - - if (var->xres > var->xres_virtual) - var->xres = var->xres_virtual; - if (var->yres > var->yres_virtual) - var->yres = var->yres_virtual; - - return 0; -} - -static void shrink_height(unsigned long max_frame_size, - struct fb_var_screeninfo *var) -{ - DBG("can't fit FB into memory, reducing y\n"); - var->yres_virtual = max_frame_size / - (var->xres_virtual * var->bits_per_pixel >> 3); - - if (var->yres_virtual < OMAPFB_PLANE_YRES_MIN) - var->yres_virtual = OMAPFB_PLANE_YRES_MIN; - - if (var->yres > var->yres_virtual) - var->yres = var->yres_virtual; -} - -static void shrink_width(unsigned long max_frame_size, - struct fb_var_screeninfo *var) -{ - DBG("can't fit FB into memory, reducing x\n"); - var->xres_virtual = max_frame_size / var->yres_virtual / - (var->bits_per_pixel >> 3); - - if (var->xres_virtual < OMAPFB_PLANE_XRES_MIN) - var->xres_virtual = OMAPFB_PLANE_XRES_MIN; - - if (var->xres > var->xres_virtual) - var->xres = var->xres_virtual; -} - -static int check_vrfb_fb_size(unsigned long region_size, - const struct fb_var_screeninfo *var) -{ - unsigned long min_phys_size = omap_vrfb_min_phys_size(var->xres_virtual, - var->yres_virtual, var->bits_per_pixel >> 3); - - return min_phys_size > region_size ? -EINVAL : 0; -} - -static int check_fb_size(const struct omapfb_info *ofbi, - struct fb_var_screeninfo *var) -{ - unsigned long max_frame_size = ofbi->region->size; - int bytespp = var->bits_per_pixel >> 3; - unsigned long line_size = var->xres_virtual * bytespp; - - if (ofbi->rotation_type == OMAP_DSS_ROT_VRFB) { - /* One needs to check for both VRFB and OMAPFB limitations. */ - if (check_vrfb_fb_size(max_frame_size, var)) - shrink_height(omap_vrfb_max_height( - max_frame_size, var->xres_virtual, bytespp) * - line_size, var); - - if (check_vrfb_fb_size(max_frame_size, var)) { - DBG("cannot fit FB to memory\n"); - return -EINVAL; - } - - return 0; - } - - DBG("max frame size %lu, line size %lu\n", max_frame_size, line_size); - - if (line_size * var->yres_virtual > max_frame_size) - shrink_height(max_frame_size, var); - - if (line_size * var->yres_virtual > max_frame_size) { - shrink_width(max_frame_size, var); - line_size = var->xres_virtual * bytespp; - } - - if (line_size * var->yres_virtual > max_frame_size) { - DBG("cannot fit FB to memory\n"); - return -EINVAL; - } - - return 0; -} - -/* - * Consider if VRFB assisted rotation is in use and if the virtual space for - * the zero degree view needs to be mapped. The need for mapping also acts as - * the trigger for setting up the hardware on the context in question. This - * ensures that one does not attempt to access the virtual view before the - * hardware is serving the address translations. - */ -static int setup_vrfb_rotation(struct fb_info *fbi) -{ - struct omapfb_info *ofbi = FB2OFB(fbi); - struct omapfb2_mem_region *rg = ofbi->region; - struct vrfb *vrfb = &rg->vrfb; - struct fb_var_screeninfo *var = &fbi->var; - struct fb_fix_screeninfo *fix = &fbi->fix; - unsigned bytespp; - bool yuv_mode; - enum omap_color_mode mode; - int r; - bool reconf; - - if (!rg->size || ofbi->rotation_type != OMAP_DSS_ROT_VRFB) - return 0; - - DBG("setup_vrfb_rotation\n"); - - r = fb_mode_to_dss_mode(var, &mode); - if (r) - return r; - - bytespp = var->bits_per_pixel >> 3; - - yuv_mode = mode == OMAP_DSS_COLOR_YUV2 || mode == OMAP_DSS_COLOR_UYVY; - - /* We need to reconfigure VRFB if the resolution changes, if yuv mode - * is enabled/disabled, or if bytes per pixel changes */ - - /* XXX we shouldn't allow this when framebuffer is mmapped */ - - reconf = false; - - if (yuv_mode != vrfb->yuv_mode) - reconf = true; - else if (bytespp != vrfb->bytespp) - reconf = true; - else if (vrfb->xres != var->xres_virtual || - vrfb->yres != var->yres_virtual) - reconf = true; - - if (vrfb->vaddr[0] && reconf) { - fbi->screen_base = NULL; - fix->smem_start = 0; - fix->smem_len = 0; - iounmap(vrfb->vaddr[0]); - vrfb->vaddr[0] = NULL; - DBG("setup_vrfb_rotation: reset fb\n"); - } - - if (vrfb->vaddr[0]) - return 0; - - omap_vrfb_setup(&rg->vrfb, rg->paddr, - var->xres_virtual, - var->yres_virtual, - bytespp, yuv_mode); - - /* Now one can ioremap the 0 angle view */ - r = omap_vrfb_map_angle(vrfb, var->yres_virtual, 0); - if (r) - return r; - - /* used by open/write in fbmem.c */ - fbi->screen_base = ofbi->region->vrfb.vaddr[0]; - - fix->smem_start = ofbi->region->vrfb.paddr[0]; - - switch (var->nonstd) { - case OMAPFB_COLOR_YUV422: - case OMAPFB_COLOR_YUY422: - fix->line_length = - (OMAP_VRFB_LINE_LEN * var->bits_per_pixel) >> 2; - break; - default: - fix->line_length = - (OMAP_VRFB_LINE_LEN * var->bits_per_pixel) >> 3; - break; - } - - fix->smem_len = var->yres_virtual * fix->line_length; - - return 0; -} - -int dss_mode_to_fb_mode(enum omap_color_mode dssmode, - struct fb_var_screeninfo *var) -{ - int i; - - for (i = 0; i < ARRAY_SIZE(omapfb_colormodes); ++i) { - struct omapfb_colormode *mode = &omapfb_colormodes[i]; - if (dssmode == mode->dssmode) { - assign_colormode_to_var(var, mode); - return 0; - } - } - return -ENOENT; -} - -void set_fb_fix(struct fb_info *fbi) -{ - struct fb_fix_screeninfo *fix = &fbi->fix; - struct fb_var_screeninfo *var = &fbi->var; - struct omapfb_info *ofbi = FB2OFB(fbi); - struct omapfb2_mem_region *rg = ofbi->region; - - DBG("set_fb_fix\n"); - - /* used by open/write in fbmem.c */ - fbi->screen_base = (char __iomem *)omapfb_get_region_vaddr(ofbi); - - /* used by mmap in fbmem.c */ - if (ofbi->rotation_type == OMAP_DSS_ROT_VRFB) { - switch (var->nonstd) { - case OMAPFB_COLOR_YUV422: - case OMAPFB_COLOR_YUY422: - fix->line_length = - (OMAP_VRFB_LINE_LEN * var->bits_per_pixel) >> 2; - break; - default: - fix->line_length = - (OMAP_VRFB_LINE_LEN * var->bits_per_pixel) >> 3; - break; - } - - fix->smem_len = var->yres_virtual * fix->line_length; - } else { - fix->line_length = - (var->xres_virtual * var->bits_per_pixel) >> 3; - fix->smem_len = rg->size; - } - - fix->smem_start = omapfb_get_region_paddr(ofbi); - - fix->type = FB_TYPE_PACKED_PIXELS; - - if (var->nonstd) - fix->visual = FB_VISUAL_PSEUDOCOLOR; - else { - switch (var->bits_per_pixel) { - case 32: - case 24: - case 16: - case 12: - fix->visual = FB_VISUAL_TRUECOLOR; - /* 12bpp is stored in 16 bits */ - break; - case 1: - case 2: - case 4: - case 8: - fix->visual = FB_VISUAL_PSEUDOCOLOR; - break; - } - } - - fix->accel = FB_ACCEL_NONE; - - fix->xpanstep = 1; - fix->ypanstep = 1; -} - -/* check new var and possibly modify it to be ok */ -int check_fb_var(struct fb_info *fbi, struct fb_var_screeninfo *var) -{ - struct omapfb_info *ofbi = FB2OFB(fbi); - struct omap_dss_device *display = fb2display(fbi); - enum omap_color_mode mode = 0; - int i; - int r; - - DBG("check_fb_var %d\n", ofbi->id); - - WARN_ON(!atomic_read(&ofbi->region->lock_count)); - - r = fb_mode_to_dss_mode(var, &mode); - if (r) { - DBG("cannot convert var to omap dss mode\n"); - return r; - } - - for (i = 0; i < ofbi->num_overlays; ++i) { - if ((ofbi->overlays[i]->supported_modes & mode) == 0) { - DBG("invalid mode\n"); - return -EINVAL; - } - } - - if (var->rotate > 3) - return -EINVAL; - - if (check_fb_res_bounds(var)) - return -EINVAL; - - /* When no memory is allocated ignore the size check */ - if (ofbi->region->size != 0 && check_fb_size(ofbi, var)) - return -EINVAL; - - if (var->xres + var->xoffset > var->xres_virtual) - var->xoffset = var->xres_virtual - var->xres; - if (var->yres + var->yoffset > var->yres_virtual) - var->yoffset = var->yres_virtual - var->yres; - - DBG("xres = %d, yres = %d, vxres = %d, vyres = %d\n", - var->xres, var->yres, - var->xres_virtual, var->yres_virtual); - - if (display && display->driver->get_dimensions) { - u32 w, h; - display->driver->get_dimensions(display, &w, &h); - var->width = DIV_ROUND_CLOSEST(w, 1000); - var->height = DIV_ROUND_CLOSEST(h, 1000); - } else { - var->height = -1; - var->width = -1; - } - - var->grayscale = 0; - - if (display && display->driver->get_timings) { - struct omap_video_timings timings; - display->driver->get_timings(display, &timings); - - /* pixclock in ps, the rest in pixclock */ - var->pixclock = timings.pixel_clock != 0 ? - KHZ2PICOS(timings.pixel_clock) : - 0; - var->left_margin = timings.hbp; - var->right_margin = timings.hfp; - var->upper_margin = timings.vbp; - var->lower_margin = timings.vfp; - var->hsync_len = timings.hsw; - var->vsync_len = timings.vsw; - } else { - var->pixclock = 0; - var->left_margin = 0; - var->right_margin = 0; - var->upper_margin = 0; - var->lower_margin = 0; - var->hsync_len = 0; - var->vsync_len = 0; - } - - /* TODO: get these from panel->config */ - var->vmode = FB_VMODE_NONINTERLACED; - var->sync = 0; - - return 0; -} - -/* - * --------------------------------------------------------------------------- - * fbdev framework callbacks - * --------------------------------------------------------------------------- - */ -static int omapfb_open(struct fb_info *fbi, int user) -{ - return 0; -} - -static int omapfb_release(struct fb_info *fbi, int user) -{ - return 0; -} - -static unsigned calc_rotation_offset_dma(const struct fb_var_screeninfo *var, - const struct fb_fix_screeninfo *fix, int rotation) -{ - unsigned offset; - - offset = var->yoffset * fix->line_length + - var->xoffset * (var->bits_per_pixel >> 3); - - return offset; -} - -static unsigned calc_rotation_offset_vrfb(const struct fb_var_screeninfo *var, - const struct fb_fix_screeninfo *fix, int rotation) -{ - unsigned offset; - - if (rotation == FB_ROTATE_UD) - offset = (var->yres_virtual - var->yres) * - fix->line_length; - else if (rotation == FB_ROTATE_CW) - offset = (var->yres_virtual - var->yres) * - (var->bits_per_pixel >> 3); - else - offset = 0; - - if (rotation == FB_ROTATE_UR) - offset += var->yoffset * fix->line_length + - var->xoffset * (var->bits_per_pixel >> 3); - else if (rotation == FB_ROTATE_UD) - offset -= var->yoffset * fix->line_length + - var->xoffset * (var->bits_per_pixel >> 3); - else if (rotation == FB_ROTATE_CW) - offset -= var->xoffset * fix->line_length + - var->yoffset * (var->bits_per_pixel >> 3); - else if (rotation == FB_ROTATE_CCW) - offset += var->xoffset * fix->line_length + - var->yoffset * (var->bits_per_pixel >> 3); - - return offset; -} - -static void omapfb_calc_addr(const struct omapfb_info *ofbi, - const struct fb_var_screeninfo *var, - const struct fb_fix_screeninfo *fix, - int rotation, u32 *paddr) -{ - u32 data_start_p; - int offset; - - if (ofbi->rotation_type == OMAP_DSS_ROT_VRFB) - data_start_p = omapfb_get_region_rot_paddr(ofbi, rotation); - else - data_start_p = omapfb_get_region_paddr(ofbi); - - if (ofbi->rotation_type == OMAP_DSS_ROT_VRFB) - offset = calc_rotation_offset_vrfb(var, fix, rotation); - else - offset = calc_rotation_offset_dma(var, fix, rotation); - - data_start_p += offset; - - if (offset) - DBG("offset %d, %d = %d\n", - var->xoffset, var->yoffset, offset); - - DBG("paddr %x\n", data_start_p); - - *paddr = data_start_p; -} - -/* setup overlay according to the fb */ -int omapfb_setup_overlay(struct fb_info *fbi, struct omap_overlay *ovl, - u16 posx, u16 posy, u16 outw, u16 outh) -{ - int r = 0; - struct omapfb_info *ofbi = FB2OFB(fbi); - struct fb_var_screeninfo *var = &fbi->var; - struct fb_fix_screeninfo *fix = &fbi->fix; - enum omap_color_mode mode = 0; - u32 data_start_p = 0; - struct omap_overlay_info info; - int xres, yres; - int screen_width; - int mirror; - int rotation = var->rotate; - int i; - - WARN_ON(!atomic_read(&ofbi->region->lock_count)); - - for (i = 0; i < ofbi->num_overlays; i++) { - if (ovl != ofbi->overlays[i]) - continue; - - rotation = (rotation + ofbi->rotation[i]) % 4; - break; - } - - DBG("setup_overlay %d, posx %d, posy %d, outw %d, outh %d\n", ofbi->id, - posx, posy, outw, outh); - - if (rotation == FB_ROTATE_CW || rotation == FB_ROTATE_CCW) { - xres = var->yres; - yres = var->xres; - } else { - xres = var->xres; - yres = var->yres; - } - - if (ofbi->region->size) - omapfb_calc_addr(ofbi, var, fix, rotation, &data_start_p); - - r = fb_mode_to_dss_mode(var, &mode); - if (r) { - DBG("fb_mode_to_dss_mode failed"); - goto err; - } - - switch (var->nonstd) { - case OMAPFB_COLOR_YUV422: - case OMAPFB_COLOR_YUY422: - if (ofbi->rotation_type == OMAP_DSS_ROT_VRFB) { - screen_width = fix->line_length - / (var->bits_per_pixel >> 2); - break; - } - default: - screen_width = fix->line_length / (var->bits_per_pixel >> 3); - break; - } - - ovl->get_overlay_info(ovl, &info); - - if (ofbi->rotation_type == OMAP_DSS_ROT_VRFB) - mirror = 0; - else - mirror = ofbi->mirror; - - info.paddr = data_start_p; - info.screen_width = screen_width; - info.width = xres; - info.height = yres; - info.color_mode = mode; - info.rotation_type = ofbi->rotation_type; - info.rotation = rotation; - info.mirror = mirror; - - info.pos_x = posx; - info.pos_y = posy; - info.out_width = outw; - info.out_height = outh; - - r = ovl->set_overlay_info(ovl, &info); - if (r) { - DBG("ovl->setup_overlay_info failed\n"); - goto err; - } - - return 0; - -err: - DBG("setup_overlay failed\n"); - return r; -} - -/* apply var to the overlay */ -int omapfb_apply_changes(struct fb_info *fbi, int init) -{ - int r = 0; - struct omapfb_info *ofbi = FB2OFB(fbi); - struct fb_var_screeninfo *var = &fbi->var; - struct omap_overlay *ovl; - u16 posx, posy; - u16 outw, outh; - int i; - -#ifdef DEBUG - if (omapfb_test_pattern) - fill_fb(fbi); -#endif - - WARN_ON(!atomic_read(&ofbi->region->lock_count)); - - for (i = 0; i < ofbi->num_overlays; i++) { - ovl = ofbi->overlays[i]; - - DBG("apply_changes, fb %d, ovl %d\n", ofbi->id, ovl->id); - - if (ofbi->region->size == 0) { - /* the fb is not available. disable the overlay */ - omapfb_overlay_enable(ovl, 0); - if (!init && ovl->manager) - ovl->manager->apply(ovl->manager); - continue; - } - - if (init || (ovl->caps & OMAP_DSS_OVL_CAP_SCALE) == 0) { - int rotation = (var->rotate + ofbi->rotation[i]) % 4; - if (rotation == FB_ROTATE_CW || - rotation == FB_ROTATE_CCW) { - outw = var->yres; - outh = var->xres; - } else { - outw = var->xres; - outh = var->yres; - } - } else { - struct omap_overlay_info info; - ovl->get_overlay_info(ovl, &info); - outw = info.out_width; - outh = info.out_height; - } - - if (init) { - posx = 0; - posy = 0; - } else { - struct omap_overlay_info info; - ovl->get_overlay_info(ovl, &info); - posx = info.pos_x; - posy = info.pos_y; - } - - r = omapfb_setup_overlay(fbi, ovl, posx, posy, outw, outh); - if (r) - goto err; - - if (!init && ovl->manager) - ovl->manager->apply(ovl->manager); - } - return 0; -err: - DBG("apply_changes failed\n"); - return r; -} - -/* checks var and eventually tweaks it to something supported, - * DO NOT MODIFY PAR */ -static int omapfb_check_var(struct fb_var_screeninfo *var, struct fb_info *fbi) -{ - struct omapfb_info *ofbi = FB2OFB(fbi); - int r; - - DBG("check_var(%d)\n", FB2OFB(fbi)->id); - - omapfb_get_mem_region(ofbi->region); - - r = check_fb_var(fbi, var); - - omapfb_put_mem_region(ofbi->region); - - return r; -} - -/* set the video mode according to info->var */ -static int omapfb_set_par(struct fb_info *fbi) -{ - struct omapfb_info *ofbi = FB2OFB(fbi); - int r; - - DBG("set_par(%d)\n", FB2OFB(fbi)->id); - - omapfb_get_mem_region(ofbi->region); - - set_fb_fix(fbi); - - r = setup_vrfb_rotation(fbi); - if (r) - goto out; - - r = omapfb_apply_changes(fbi, 0); - - out: - omapfb_put_mem_region(ofbi->region); - - return r; -} - -static int omapfb_pan_display(struct fb_var_screeninfo *var, - struct fb_info *fbi) -{ - struct omapfb_info *ofbi = FB2OFB(fbi); - struct fb_var_screeninfo new_var; - int r; - - DBG("pan_display(%d)\n", FB2OFB(fbi)->id); - - if (var->xoffset == fbi->var.xoffset && - var->yoffset == fbi->var.yoffset) - return 0; - - new_var = fbi->var; - new_var.xoffset = var->xoffset; - new_var.yoffset = var->yoffset; - - fbi->var = new_var; - - omapfb_get_mem_region(ofbi->region); - - r = omapfb_apply_changes(fbi, 0); - - omapfb_put_mem_region(ofbi->region); - - return r; -} - -static void mmap_user_open(struct vm_area_struct *vma) -{ - struct omapfb2_mem_region *rg = vma->vm_private_data; - - omapfb_get_mem_region(rg); - atomic_inc(&rg->map_count); - omapfb_put_mem_region(rg); -} - -static void mmap_user_close(struct vm_area_struct *vma) -{ - struct omapfb2_mem_region *rg = vma->vm_private_data; - - omapfb_get_mem_region(rg); - atomic_dec(&rg->map_count); - omapfb_put_mem_region(rg); -} - -static struct vm_operations_struct mmap_user_ops = { - .open = mmap_user_open, - .close = mmap_user_close, -}; - -static int omapfb_mmap(struct fb_info *fbi, struct vm_area_struct *vma) -{ - struct omapfb_info *ofbi = FB2OFB(fbi); - struct fb_fix_screeninfo *fix = &fbi->fix; - struct omapfb2_mem_region *rg; - unsigned long off; - unsigned long start; - u32 len; - int r = -EINVAL; - - if (vma->vm_end - vma->vm_start == 0) - return 0; - if (vma->vm_pgoff > (~0UL >> PAGE_SHIFT)) - return -EINVAL; - off = vma->vm_pgoff << PAGE_SHIFT; - - rg = omapfb_get_mem_region(ofbi->region); - - start = omapfb_get_region_paddr(ofbi); - len = fix->smem_len; - if (off >= len) - goto error; - if ((vma->vm_end - vma->vm_start + off) > len) - goto error; - - off += start; - - DBG("user mmap region start %lx, len %d, off %lx\n", start, len, off); - - vma->vm_pgoff = off >> PAGE_SHIFT; - vma->vm_flags |= VM_IO | VM_RESERVED; - vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot); - vma->vm_ops = &mmap_user_ops; - vma->vm_private_data = rg; - if (io_remap_pfn_range(vma, vma->vm_start, off >> PAGE_SHIFT, - vma->vm_end - vma->vm_start, - vma->vm_page_prot)) { - r = -EAGAIN; - goto error; - } - - /* vm_ops.open won't be called for mmap itself. */ - atomic_inc(&rg->map_count); - - omapfb_put_mem_region(rg); - - return 0; - - error: - omapfb_put_mem_region(ofbi->region); - - return r; -} - -/* Store a single color palette entry into a pseudo palette or the hardware - * palette if one is available. For now we support only 16bpp and thus store - * the entry only to the pseudo palette. - */ -static int _setcolreg(struct fb_info *fbi, u_int regno, u_int red, u_int green, - u_int blue, u_int transp, int update_hw_pal) -{ - /*struct omapfb_info *ofbi = FB2OFB(fbi);*/ - /*struct omapfb2_device *fbdev = ofbi->fbdev;*/ - struct fb_var_screeninfo *var = &fbi->var; - int r = 0; - - enum omapfb_color_format mode = OMAPFB_COLOR_RGB24U; /* XXX */ - - /*switch (plane->color_mode) {*/ - switch (mode) { - case OMAPFB_COLOR_YUV422: - case OMAPFB_COLOR_YUV420: - case OMAPFB_COLOR_YUY422: - r = -EINVAL; - break; - case OMAPFB_COLOR_CLUT_8BPP: - case OMAPFB_COLOR_CLUT_4BPP: - case OMAPFB_COLOR_CLUT_2BPP: - case OMAPFB_COLOR_CLUT_1BPP: - /* - if (fbdev->ctrl->setcolreg) - r = fbdev->ctrl->setcolreg(regno, red, green, blue, - transp, update_hw_pal); - */ - /* Fallthrough */ - r = -EINVAL; - break; - case OMAPFB_COLOR_RGB565: - case OMAPFB_COLOR_RGB444: - case OMAPFB_COLOR_RGB24P: - case OMAPFB_COLOR_RGB24U: - if (r != 0) - break; - - if (regno < 16) { - u16 pal; - pal = ((red >> (16 - var->red.length)) << - var->red.offset) | - ((green >> (16 - var->green.length)) << - var->green.offset) | - (blue >> (16 - var->blue.length)); - ((u32 *)(fbi->pseudo_palette))[regno] = pal; - } - break; - default: - BUG(); - } - return r; -} - -static int omapfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, - u_int transp, struct fb_info *info) -{ - DBG("setcolreg\n"); - - return _setcolreg(info, regno, red, green, blue, transp, 1); -} - -static int omapfb_setcmap(struct fb_cmap *cmap, struct fb_info *info) -{ - int count, index, r; - u16 *red, *green, *blue, *transp; - u16 trans = 0xffff; - - DBG("setcmap\n"); - - red = cmap->red; - green = cmap->green; - blue = cmap->blue; - transp = cmap->transp; - index = cmap->start; - - for (count = 0; count < cmap->len; count++) { - if (transp) - trans = *transp++; - r = _setcolreg(info, index++, *red++, *green++, *blue++, trans, - count == cmap->len - 1); - if (r != 0) - return r; - } - - return 0; -} - -static int omapfb_blank(int blank, struct fb_info *fbi) -{ - struct omapfb_info *ofbi = FB2OFB(fbi); - struct omapfb2_device *fbdev = ofbi->fbdev; - struct omap_dss_device *display = fb2display(fbi); - struct omapfb_display_data *d; - int r = 0; - - if (!display) - return -EINVAL; - - omapfb_lock(fbdev); - - d = get_display_data(fbdev, display); - - switch (blank) { - case FB_BLANK_UNBLANK: - if (display->state != OMAP_DSS_DISPLAY_SUSPENDED) - goto exit; - - if (display->driver->resume) - r = display->driver->resume(display); - - if ((display->caps & OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE) && - d->update_mode == OMAPFB_AUTO_UPDATE && - !d->auto_update_work_enabled) - omapfb_start_auto_update(fbdev, display); - - break; - - case FB_BLANK_NORMAL: - /* FB_BLANK_NORMAL could be implemented. - * Needs DSS additions. */ - case FB_BLANK_VSYNC_SUSPEND: - case FB_BLANK_HSYNC_SUSPEND: - case FB_BLANK_POWERDOWN: - if (display->state != OMAP_DSS_DISPLAY_ACTIVE) - goto exit; - - if (d->auto_update_work_enabled) - omapfb_stop_auto_update(fbdev, display); - - if (display->driver->suspend) - r = display->driver->suspend(display); - - break; - - default: - r = -EINVAL; - } - -exit: - omapfb_unlock(fbdev); - - return r; -} - -#if 0 -/* XXX fb_read and fb_write are needed for VRFB */ -ssize_t omapfb_write(struct fb_info *info, const char __user *buf, - size_t count, loff_t *ppos) -{ - DBG("omapfb_write %d, %lu\n", count, (unsigned long)*ppos); - /* XXX needed for VRFB */ - return count; -} -#endif - -static struct fb_ops omapfb_ops = { - .owner = THIS_MODULE, - .fb_open = omapfb_open, - .fb_release = omapfb_release, - .fb_fillrect = cfb_fillrect, - .fb_copyarea = cfb_copyarea, - .fb_imageblit = cfb_imageblit, - .fb_blank = omapfb_blank, - .fb_ioctl = omapfb_ioctl, - .fb_check_var = omapfb_check_var, - .fb_set_par = omapfb_set_par, - .fb_pan_display = omapfb_pan_display, - .fb_mmap = omapfb_mmap, - .fb_setcolreg = omapfb_setcolreg, - .fb_setcmap = omapfb_setcmap, - /*.fb_write = omapfb_write,*/ -}; - -static void omapfb_free_fbmem(struct fb_info *fbi) -{ - struct omapfb_info *ofbi = FB2OFB(fbi); - struct omapfb2_device *fbdev = ofbi->fbdev; - struct omapfb2_mem_region *rg; - - rg = ofbi->region; - - WARN_ON(atomic_read(&rg->map_count)); - - if (rg->paddr) - if (omap_vram_free(rg->paddr, rg->size)) - dev_err(fbdev->dev, "VRAM FREE failed\n"); - - if (rg->vaddr) - iounmap(rg->vaddr); - - if (ofbi->rotation_type == OMAP_DSS_ROT_VRFB) { - /* unmap the 0 angle rotation */ - if (rg->vrfb.vaddr[0]) { - iounmap(rg->vrfb.vaddr[0]); - omap_vrfb_release_ctx(&rg->vrfb); - rg->vrfb.vaddr[0] = NULL; - } - } - - rg->vaddr = NULL; - rg->paddr = 0; - rg->alloc = 0; - rg->size = 0; -} - -static void clear_fb_info(struct fb_info *fbi) -{ - memset(&fbi->var, 0, sizeof(fbi->var)); - memset(&fbi->fix, 0, sizeof(fbi->fix)); - strlcpy(fbi->fix.id, MODULE_NAME, sizeof(fbi->fix.id)); -} - -static int omapfb_free_all_fbmem(struct omapfb2_device *fbdev) -{ - int i; - - DBG("free all fbmem\n"); - - for (i = 0; i < fbdev->num_fbs; i++) { - struct fb_info *fbi = fbdev->fbs[i]; - omapfb_free_fbmem(fbi); - clear_fb_info(fbi); - } - - return 0; -} - -static int omapfb_alloc_fbmem(struct fb_info *fbi, unsigned long size, - unsigned long paddr) -{ - struct omapfb_info *ofbi = FB2OFB(fbi); - struct omapfb2_device *fbdev = ofbi->fbdev; - struct omapfb2_mem_region *rg; - void __iomem *vaddr; - int r; - - rg = ofbi->region; - - rg->paddr = 0; - rg->vaddr = NULL; - memset(&rg->vrfb, 0, sizeof rg->vrfb); - rg->size = 0; - rg->type = 0; - rg->alloc = false; - rg->map = false; - - size = PAGE_ALIGN(size); - - if (!paddr) { - DBG("allocating %lu bytes for fb %d\n", size, ofbi->id); - r = omap_vram_alloc(OMAP_VRAM_MEMTYPE_SDRAM, size, &paddr); - } else { - DBG("reserving %lu bytes at %lx for fb %d\n", size, paddr, - ofbi->id); - r = omap_vram_reserve(paddr, size); - } - - if (r) { - dev_err(fbdev->dev, "failed to allocate framebuffer\n"); - return -ENOMEM; - } - - if (ofbi->rotation_type != OMAP_DSS_ROT_VRFB) { - vaddr = ioremap_wc(paddr, size); - - if (!vaddr) { - dev_err(fbdev->dev, "failed to ioremap framebuffer\n"); - omap_vram_free(paddr, size); - return -ENOMEM; - } - - DBG("allocated VRAM paddr %lx, vaddr %p\n", paddr, vaddr); - } else { - r = omap_vrfb_request_ctx(&rg->vrfb); - if (r) { - dev_err(fbdev->dev, "vrfb create ctx failed\n"); - return r; - } - - vaddr = NULL; - } - - rg->paddr = paddr; - rg->vaddr = vaddr; - rg->size = size; - rg->alloc = 1; - - return 0; -} - -/* allocate fbmem using display resolution as reference */ -static int omapfb_alloc_fbmem_display(struct fb_info *fbi, unsigned long size, - unsigned long paddr) -{ - struct omapfb_info *ofbi = FB2OFB(fbi); - struct omapfb2_device *fbdev = ofbi->fbdev; - struct omap_dss_device *display; - int bytespp; - - display = fb2display(fbi); - - if (!display) - return 0; - - switch (omapfb_get_recommended_bpp(fbdev, display)) { - case 16: - bytespp = 2; - break; - case 24: - bytespp = 4; - break; - default: - bytespp = 4; - break; - } - - if (!size) { - u16 w, h; - - display->driver->get_resolution(display, &w, &h); - - if (ofbi->rotation_type == OMAP_DSS_ROT_VRFB) { - size = max(omap_vrfb_min_phys_size(w, h, bytespp), - omap_vrfb_min_phys_size(h, w, bytespp)); - - DBG("adjusting fb mem size for VRFB, %u -> %lu\n", - w * h * bytespp, size); - } else { - size = w * h * bytespp; - } - } - - if (!size) - return 0; - - return omapfb_alloc_fbmem(fbi, size, paddr); -} - -static enum omap_color_mode fb_format_to_dss_mode(enum omapfb_color_format fmt) -{ - enum omap_color_mode mode; - - switch (fmt) { - case OMAPFB_COLOR_RGB565: - mode = OMAP_DSS_COLOR_RGB16; - break; - case OMAPFB_COLOR_YUV422: - mode = OMAP_DSS_COLOR_YUV2; - break; - case OMAPFB_COLOR_CLUT_8BPP: - mode = OMAP_DSS_COLOR_CLUT8; - break; - case OMAPFB_COLOR_CLUT_4BPP: - mode = OMAP_DSS_COLOR_CLUT4; - break; - case OMAPFB_COLOR_CLUT_2BPP: - mode = OMAP_DSS_COLOR_CLUT2; - break; - case OMAPFB_COLOR_CLUT_1BPP: - mode = OMAP_DSS_COLOR_CLUT1; - break; - case OMAPFB_COLOR_RGB444: - mode = OMAP_DSS_COLOR_RGB12U; - break; - case OMAPFB_COLOR_YUY422: - mode = OMAP_DSS_COLOR_UYVY; - break; - case OMAPFB_COLOR_ARGB16: - mode = OMAP_DSS_COLOR_ARGB16; - break; - case OMAPFB_COLOR_RGB24U: - mode = OMAP_DSS_COLOR_RGB24U; - break; - case OMAPFB_COLOR_RGB24P: - mode = OMAP_DSS_COLOR_RGB24P; - break; - case OMAPFB_COLOR_ARGB32: - mode = OMAP_DSS_COLOR_ARGB32; - break; - case OMAPFB_COLOR_RGBA32: - mode = OMAP_DSS_COLOR_RGBA32; - break; - case OMAPFB_COLOR_RGBX32: - mode = OMAP_DSS_COLOR_RGBX32; - break; - default: - mode = -EINVAL; - } - - return mode; -} - -static int omapfb_parse_vram_param(const char *param, int max_entries, - unsigned long *sizes, unsigned long *paddrs) -{ - int fbnum; - unsigned long size; - unsigned long paddr = 0; - char *p, *start; - - start = (char *)param; - - while (1) { - p = start; - - fbnum = simple_strtoul(p, &p, 10); - - if (p == param) - return -EINVAL; - - if (*p != ':') - return -EINVAL; - - if (fbnum >= max_entries) - return -EINVAL; - - size = memparse(p + 1, &p); - - if (!size) - return -EINVAL; - - paddr = 0; - - if (*p == '@') { - paddr = simple_strtoul(p + 1, &p, 16); - - if (!paddr) - return -EINVAL; - - } - - paddrs[fbnum] = paddr; - sizes[fbnum] = size; - - if (*p == 0) - break; - - if (*p != ',') - return -EINVAL; - - ++p; - - start = p; - } - - return 0; -} - -static int omapfb_allocate_all_fbs(struct omapfb2_device *fbdev) -{ - int i, r; - unsigned long vram_sizes[10]; - unsigned long vram_paddrs[10]; - - memset(&vram_sizes, 0, sizeof(vram_sizes)); - memset(&vram_paddrs, 0, sizeof(vram_paddrs)); - - if (def_vram && omapfb_parse_vram_param(def_vram, 10, - vram_sizes, vram_paddrs)) { - dev_err(fbdev->dev, "failed to parse vram parameter\n"); - - memset(&vram_sizes, 0, sizeof(vram_sizes)); - memset(&vram_paddrs, 0, sizeof(vram_paddrs)); - } - - if (fbdev->dev->platform_data) { - struct omapfb_platform_data *opd; - opd = fbdev->dev->platform_data; - for (i = 0; i < opd->mem_desc.region_cnt; ++i) { - if (!vram_sizes[i]) { - unsigned long size; - unsigned long paddr; - - size = opd->mem_desc.region[i].size; - paddr = opd->mem_desc.region[i].paddr; - - vram_sizes[i] = size; - vram_paddrs[i] = paddr; - } - } - } - - for (i = 0; i < fbdev->num_fbs; i++) { - /* allocate memory automatically only for fb0, or if - * excplicitly defined with vram or plat data option */ - if (i == 0 || vram_sizes[i] != 0) { - r = omapfb_alloc_fbmem_display(fbdev->fbs[i], - vram_sizes[i], vram_paddrs[i]); - - if (r) - return r; - } - } - - for (i = 0; i < fbdev->num_fbs; i++) { - struct omapfb_info *ofbi = FB2OFB(fbdev->fbs[i]); - struct omapfb2_mem_region *rg; - rg = ofbi->region; - - DBG("region%d phys %08x virt %p size=%lu\n", - i, - rg->paddr, - rg->vaddr, - rg->size); - } - - return 0; -} - -int omapfb_realloc_fbmem(struct fb_info *fbi, unsigned long size, int type) -{ - struct omapfb_info *ofbi = FB2OFB(fbi); - struct omapfb2_device *fbdev = ofbi->fbdev; - struct omap_dss_device *display = fb2display(fbi); - struct omapfb2_mem_region *rg = ofbi->region; - unsigned long old_size = rg->size; - unsigned long old_paddr = rg->paddr; - int old_type = rg->type; - int r; - - if (type > OMAPFB_MEMTYPE_MAX) - return -EINVAL; - - size = PAGE_ALIGN(size); - - if (old_size == size && old_type == type) - return 0; - - if (display && display->driver->sync) - display->driver->sync(display); - - omapfb_free_fbmem(fbi); - - if (size == 0) { - clear_fb_info(fbi); - return 0; - } - - r = omapfb_alloc_fbmem(fbi, size, 0); - - if (r) { - if (old_size) - omapfb_alloc_fbmem(fbi, old_size, old_paddr); - - if (rg->size == 0) - clear_fb_info(fbi); - - return r; - } - - if (old_size == size) - return 0; - - if (old_size == 0) { - DBG("initializing fb %d\n", ofbi->id); - r = omapfb_fb_init(fbdev, fbi); - if (r) { - DBG("omapfb_fb_init failed\n"); - goto err; - } - r = omapfb_apply_changes(fbi, 1); - if (r) { - DBG("omapfb_apply_changes failed\n"); - goto err; - } - } else { - struct fb_var_screeninfo new_var; - memcpy(&new_var, &fbi->var, sizeof(new_var)); - r = check_fb_var(fbi, &new_var); - if (r) - goto err; - memcpy(&fbi->var, &new_var, sizeof(fbi->var)); - set_fb_fix(fbi); - r = setup_vrfb_rotation(fbi); - if (r) - goto err; - } - - return 0; -err: - omapfb_free_fbmem(fbi); - clear_fb_info(fbi); - return r; -} - -static void omapfb_auto_update_work(struct work_struct *work) -{ - struct omap_dss_device *dssdev; - struct omap_dss_driver *dssdrv; - struct omapfb_display_data *d; - u16 w, h; - unsigned int freq; - struct omapfb2_device *fbdev; - - d = container_of(work, struct omapfb_display_data, - auto_update_work.work); - - dssdev = d->dssdev; - dssdrv = dssdev->driver; - fbdev = d->fbdev; - - if (!dssdrv || !dssdrv->update) - return; - - if (dssdrv->sync) - dssdrv->sync(dssdev); - - dssdrv->get_resolution(dssdev, &w, &h); - dssdrv->update(dssdev, 0, 0, w, h); - - freq = auto_update_freq; - if (freq == 0) - freq = 20; - queue_delayed_work(fbdev->auto_update_wq, - &d->auto_update_work, HZ / freq); -} - -void omapfb_start_auto_update(struct omapfb2_device *fbdev, - struct omap_dss_device *display) -{ - struct omapfb_display_data *d; - - if (fbdev->auto_update_wq == NULL) { - struct workqueue_struct *wq; - - wq = create_singlethread_workqueue("omapfb_auto_update"); - - if (wq == NULL) { - dev_err(fbdev->dev, "Failed to create workqueue for " - "auto-update\n"); - return; - } - - fbdev->auto_update_wq = wq; - } - - d = get_display_data(fbdev, display); - - INIT_DELAYED_WORK(&d->auto_update_work, omapfb_auto_update_work); - - d->auto_update_work_enabled = true; - - omapfb_auto_update_work(&d->auto_update_work.work); -} - -void omapfb_stop_auto_update(struct omapfb2_device *fbdev, - struct omap_dss_device *display) -{ - struct omapfb_display_data *d; - - d = get_display_data(fbdev, display); - - cancel_delayed_work_sync(&d->auto_update_work); - - d->auto_update_work_enabled = false; -} - -/* initialize fb_info, var, fix to something sane based on the display */ -static int omapfb_fb_init(struct omapfb2_device *fbdev, struct fb_info *fbi) -{ - struct fb_var_screeninfo *var = &fbi->var; - struct omap_dss_device *display = fb2display(fbi); - struct omapfb_info *ofbi = FB2OFB(fbi); - int r = 0; - - fbi->fbops = &omapfb_ops; - fbi->flags = FBINFO_FLAG_DEFAULT; - fbi->pseudo_palette = fbdev->pseudo_palette; - - if (ofbi->region->size == 0) { - clear_fb_info(fbi); - return 0; - } - - var->nonstd = 0; - var->bits_per_pixel = 0; - - var->rotate = def_rotate; - - /* - * Check if there is a default color format set in the board file, - * and use this format instead the default deducted from the - * display bpp. - */ - if (fbdev->dev->platform_data) { - struct omapfb_platform_data *opd; - int id = ofbi->id; - - opd = fbdev->dev->platform_data; - if (opd->mem_desc.region[id].format_used) { - enum omap_color_mode mode; - enum omapfb_color_format format; - - format = opd->mem_desc.region[id].format; - mode = fb_format_to_dss_mode(format); - if (mode < 0) { - r = mode; - goto err; - } - r = dss_mode_to_fb_mode(mode, var); - if (r < 0) - goto err; - } - } - - if (display) { - u16 w, h; - int rotation = (var->rotate + ofbi->rotation[0]) % 4; - - display->driver->get_resolution(display, &w, &h); - - if (rotation == FB_ROTATE_CW || - rotation == FB_ROTATE_CCW) { - var->xres = h; - var->yres = w; - } else { - var->xres = w; - var->yres = h; - } - - var->xres_virtual = var->xres; - var->yres_virtual = var->yres; - - if (!var->bits_per_pixel) { - switch (omapfb_get_recommended_bpp(fbdev, display)) { - case 16: - var->bits_per_pixel = 16; - break; - case 24: - var->bits_per_pixel = 32; - break; - default: - dev_err(fbdev->dev, "illegal display " - "bpp\n"); - return -EINVAL; - } - } - } else { - /* if there's no display, let's just guess some basic values */ - var->xres = 320; - var->yres = 240; - var->xres_virtual = var->xres; - var->yres_virtual = var->yres; - if (!var->bits_per_pixel) - var->bits_per_pixel = 16; - } - - r = check_fb_var(fbi, var); - if (r) - goto err; - - set_fb_fix(fbi); - r = setup_vrfb_rotation(fbi); - if (r) - goto err; - - r = fb_alloc_cmap(&fbi->cmap, 256, 0); - if (r) - dev_err(fbdev->dev, "unable to allocate color map memory\n"); - -err: - return r; -} - -static void fbinfo_cleanup(struct omapfb2_device *fbdev, struct fb_info *fbi) -{ - fb_dealloc_cmap(&fbi->cmap); -} - - -static void omapfb_free_resources(struct omapfb2_device *fbdev) -{ - int i; - - DBG("free_resources\n"); - - if (fbdev == NULL) - return; - - for (i = 0; i < fbdev->num_fbs; i++) - unregister_framebuffer(fbdev->fbs[i]); - - /* free the reserved fbmem */ - omapfb_free_all_fbmem(fbdev); - - for (i = 0; i < fbdev->num_fbs; i++) { - fbinfo_cleanup(fbdev, fbdev->fbs[i]); - framebuffer_release(fbdev->fbs[i]); - } - - for (i = 0; i < fbdev->num_displays; i++) { - struct omap_dss_device *dssdev = fbdev->displays[i].dssdev; - - if (fbdev->displays[i].auto_update_work_enabled) - omapfb_stop_auto_update(fbdev, dssdev); - - if (dssdev->state != OMAP_DSS_DISPLAY_DISABLED) - dssdev->driver->disable(dssdev); - - omap_dss_put_device(dssdev); - } - - if (fbdev->auto_update_wq != NULL) { - flush_workqueue(fbdev->auto_update_wq); - destroy_workqueue(fbdev->auto_update_wq); - fbdev->auto_update_wq = NULL; - } - - dev_set_drvdata(fbdev->dev, NULL); - kfree(fbdev); -} - -static int omapfb_create_framebuffers(struct omapfb2_device *fbdev) -{ - int r, i; - - fbdev->num_fbs = 0; - - DBG("create %d framebuffers\n", CONFIG_FB_OMAP2_NUM_FBS); - - /* allocate fb_infos */ - for (i = 0; i < CONFIG_FB_OMAP2_NUM_FBS; i++) { - struct fb_info *fbi; - struct omapfb_info *ofbi; - - fbi = framebuffer_alloc(sizeof(struct omapfb_info), - fbdev->dev); - - if (fbi == NULL) { - dev_err(fbdev->dev, - "unable to allocate memory for plane info\n"); - return -ENOMEM; - } - - clear_fb_info(fbi); - - fbdev->fbs[i] = fbi; - - ofbi = FB2OFB(fbi); - ofbi->fbdev = fbdev; - ofbi->id = i; - - ofbi->region = &fbdev->regions[i]; - ofbi->region->id = i; - init_rwsem(&ofbi->region->lock); - - /* assign these early, so that fb alloc can use them */ - ofbi->rotation_type = def_vrfb ? OMAP_DSS_ROT_VRFB : - OMAP_DSS_ROT_DMA; - ofbi->mirror = def_mirror; - - fbdev->num_fbs++; - } - - DBG("fb_infos allocated\n"); - - /* assign overlays for the fbs */ - for (i = 0; i < min(fbdev->num_fbs, fbdev->num_overlays); i++) { - struct omapfb_info *ofbi = FB2OFB(fbdev->fbs[i]); - - ofbi->overlays[0] = fbdev->overlays[i]; - ofbi->num_overlays = 1; - } - - /* allocate fb memories */ - r = omapfb_allocate_all_fbs(fbdev); - if (r) { - dev_err(fbdev->dev, "failed to allocate fbmem\n"); - return r; - } - - DBG("fbmems allocated\n"); - - /* setup fb_infos */ - for (i = 0; i < fbdev->num_fbs; i++) { - struct fb_info *fbi = fbdev->fbs[i]; - struct omapfb_info *ofbi = FB2OFB(fbi); - - omapfb_get_mem_region(ofbi->region); - r = omapfb_fb_init(fbdev, fbi); - omapfb_put_mem_region(ofbi->region); - - if (r) { - dev_err(fbdev->dev, "failed to setup fb_info\n"); - return r; - } - } - - DBG("fb_infos initialized\n"); - - for (i = 0; i < fbdev->num_fbs; i++) { - r = register_framebuffer(fbdev->fbs[i]); - if (r != 0) { - dev_err(fbdev->dev, - "registering framebuffer %d failed\n", i); - return r; - } - } - - DBG("framebuffers registered\n"); - - for (i = 0; i < fbdev->num_fbs; i++) { - struct fb_info *fbi = fbdev->fbs[i]; - struct omapfb_info *ofbi = FB2OFB(fbi); - - omapfb_get_mem_region(ofbi->region); - r = omapfb_apply_changes(fbi, 1); - omapfb_put_mem_region(ofbi->region); - - if (r) { - dev_err(fbdev->dev, "failed to change mode\n"); - return r; - } - } - - /* Enable fb0 */ - if (fbdev->num_fbs > 0) { - struct omapfb_info *ofbi = FB2OFB(fbdev->fbs[0]); - - if (ofbi->num_overlays > 0) { - struct omap_overlay *ovl = ofbi->overlays[0]; - - ovl->manager->apply(ovl->manager); - - r = omapfb_overlay_enable(ovl, 1); - - if (r) { - dev_err(fbdev->dev, - "failed to enable overlay\n"); - return r; - } - } - } - - DBG("create_framebuffers done\n"); - - return 0; -} - -static int omapfb_mode_to_timings(const char *mode_str, - struct omap_video_timings *timings, u8 *bpp) -{ - struct fb_info *fbi; - struct fb_var_screeninfo *var; - struct fb_ops *fbops; - int r; - -#ifdef CONFIG_OMAP2_DSS_VENC - if (strcmp(mode_str, "pal") == 0) { - *timings = omap_dss_pal_timings; - *bpp = 24; - return 0; - } else if (strcmp(mode_str, "ntsc") == 0) { - *timings = omap_dss_ntsc_timings; - *bpp = 24; - return 0; - } -#endif - - /* this is quite a hack, but I wanted to use the modedb and for - * that we need fb_info and var, so we create dummy ones */ - - *bpp = 0; - fbi = NULL; - var = NULL; - fbops = NULL; - - fbi = kzalloc(sizeof(*fbi), GFP_KERNEL); - if (fbi == NULL) { - r = -ENOMEM; - goto err; - } - - var = kzalloc(sizeof(*var), GFP_KERNEL); - if (var == NULL) { - r = -ENOMEM; - goto err; - } - - fbops = kzalloc(sizeof(*fbops), GFP_KERNEL); - if (fbops == NULL) { - r = -ENOMEM; - goto err; - } - - fbi->fbops = fbops; - - r = fb_find_mode(var, fbi, mode_str, NULL, 0, NULL, 24); - if (r == 0) { - r = -EINVAL; - goto err; - } - - timings->pixel_clock = PICOS2KHZ(var->pixclock); - timings->hbp = var->left_margin; - timings->hfp = var->right_margin; - timings->vbp = var->upper_margin; - timings->vfp = var->lower_margin; - timings->hsw = var->hsync_len; - timings->vsw = var->vsync_len; - timings->x_res = var->xres; - timings->y_res = var->yres; - - switch (var->bits_per_pixel) { - case 16: - *bpp = 16; - break; - case 24: - case 32: - default: - *bpp = 24; - break; - } - - r = 0; - -err: - kfree(fbi); - kfree(var); - kfree(fbops); - - return r; -} - -static int omapfb_set_def_mode(struct omapfb2_device *fbdev, - struct omap_dss_device *display, char *mode_str) -{ - int r; - u8 bpp; - struct omap_video_timings timings, temp_timings; - struct omapfb_display_data *d; - - r = omapfb_mode_to_timings(mode_str, &timings, &bpp); - if (r) - return r; - - d = get_display_data(fbdev, display); - d->bpp_override = bpp; - - if (display->driver->check_timings) { - r = display->driver->check_timings(display, &timings); - if (r) - return r; - } else { - /* If check_timings is not present compare xres and yres */ - if (display->driver->get_timings) { - display->driver->get_timings(display, &temp_timings); - - if (temp_timings.x_res != timings.x_res || - temp_timings.y_res != timings.y_res) - return -EINVAL; - } - } - - if (display->driver->set_timings) - display->driver->set_timings(display, &timings); - - return 0; -} - -static int omapfb_get_recommended_bpp(struct omapfb2_device *fbdev, - struct omap_dss_device *dssdev) -{ - struct omapfb_display_data *d; - - BUG_ON(dssdev->driver->get_recommended_bpp == NULL); - - d = get_display_data(fbdev, dssdev); - - if (d->bpp_override != 0) - return d->bpp_override; - - return dssdev->driver->get_recommended_bpp(dssdev); -} - -static int omapfb_parse_def_modes(struct omapfb2_device *fbdev) -{ - char *str, *options, *this_opt; - int r = 0; - - str = kstrdup(def_mode, GFP_KERNEL); - if (!str) - return -ENOMEM; - options = str; - - while (!r && (this_opt = strsep(&options, ",")) != NULL) { - char *p, *display_str, *mode_str; - struct omap_dss_device *display; - int i; - - p = strchr(this_opt, ':'); - if (!p) { - r = -EINVAL; - break; - } - - *p = 0; - display_str = this_opt; - mode_str = p + 1; - - display = NULL; - for (i = 0; i < fbdev->num_displays; ++i) { - if (strcmp(fbdev->displays[i].dssdev->name, - display_str) == 0) { - display = fbdev->displays[i].dssdev; - break; - } - } - - if (!display) { - r = -EINVAL; - break; - } - - r = omapfb_set_def_mode(fbdev, display, mode_str); - if (r) - break; - } - - kfree(str); - - return r; -} - -static void fb_videomode_to_omap_timings(struct fb_videomode *m, - struct omap_video_timings *t) -{ - t->x_res = m->xres; - t->y_res = m->yres; - t->pixel_clock = PICOS2KHZ(m->pixclock); - t->hsw = m->hsync_len; - t->hfp = m->right_margin; - t->hbp = m->left_margin; - t->vsw = m->vsync_len; - t->vfp = m->lower_margin; - t->vbp = m->upper_margin; -} - -static int omapfb_find_best_mode(struct omap_dss_device *display, - struct omap_video_timings *timings) -{ - struct fb_monspecs *specs; - u8 *edid; - int r, i, best_xres, best_idx, len; - - if (!display->driver->read_edid) - return -ENODEV; - - len = 0x80 * 2; - edid = kmalloc(len, GFP_KERNEL); - - r = display->driver->read_edid(display, edid, len); - if (r < 0) - goto err1; - - specs = kzalloc(sizeof(*specs), GFP_KERNEL); - - fb_edid_to_monspecs(edid, specs); - - if (edid[126] > 0) - fb_edid_add_monspecs(edid + 0x80, specs); - - best_xres = 0; - best_idx = -1; - - for (i = 0; i < specs->modedb_len; ++i) { - struct fb_videomode *m; - struct omap_video_timings t; - - m = &specs->modedb[i]; - - if (m->pixclock == 0) - continue; - - /* skip repeated pixel modes */ - if (m->xres == 2880 || m->xres == 1440) - continue; - - fb_videomode_to_omap_timings(m, &t); - - r = display->driver->check_timings(display, &t); - if (r == 0 && best_xres < m->xres) { - best_xres = m->xres; - best_idx = i; - } - } - - if (best_xres == 0) { - r = -ENOENT; - goto err2; - } - - fb_videomode_to_omap_timings(&specs->modedb[best_idx], timings); - - r = 0; - -err2: - fb_destroy_modedb(specs->modedb); - kfree(specs); -err1: - kfree(edid); - - return r; -} - -static int omapfb_init_display(struct omapfb2_device *fbdev, - struct omap_dss_device *dssdev) -{ - struct omap_dss_driver *dssdrv = dssdev->driver; - struct omapfb_display_data *d; - int r; - - r = dssdrv->enable(dssdev); - if (r) { - dev_warn(fbdev->dev, "Failed to enable display '%s'\n", - dssdev->name); - return r; - } - - d = get_display_data(fbdev, dssdev); - - d->fbdev = fbdev; - - if (dssdev->caps & OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE) { - u16 w, h; - - if (auto_update) { - omapfb_start_auto_update(fbdev, dssdev); - d->update_mode = OMAPFB_AUTO_UPDATE; - } else { - d->update_mode = OMAPFB_MANUAL_UPDATE; - } - - if (dssdrv->enable_te) { - r = dssdrv->enable_te(dssdev, 1); - if (r) { - dev_err(fbdev->dev, "Failed to set TE\n"); - return r; - } - } - - dssdrv->get_resolution(dssdev, &w, &h); - r = dssdrv->update(dssdev, 0, 0, w, h); - if (r) { - dev_err(fbdev->dev, - "Failed to update display\n"); - return r; - } - } else { - d->update_mode = OMAPFB_AUTO_UPDATE; - } - - return 0; -} - -static int omapfb_probe(struct platform_device *pdev) -{ - struct omapfb2_device *fbdev = NULL; - int r = 0; - int i; - struct omap_overlay *ovl; - struct omap_dss_device *def_display; - struct omap_dss_device *dssdev; - - DBG("omapfb_probe\n"); - - if (pdev->num_resources != 0) { - dev_err(&pdev->dev, "probed for an unknown device\n"); - r = -ENODEV; - goto err0; - } - - fbdev = kzalloc(sizeof(struct omapfb2_device), GFP_KERNEL); - if (fbdev == NULL) { - r = -ENOMEM; - goto err0; - } - - /* TODO : Replace cpu check with omap_has_vrfb once HAS_FEATURE - * available for OMAP2 and OMAP3 - */ - if (def_vrfb && !cpu_is_omap24xx() && !cpu_is_omap34xx()) { - def_vrfb = 0; - dev_warn(&pdev->dev, "VRFB is not supported on this hardware, " - "ignoring the module parameter vrfb=y\n"); - } - - - mutex_init(&fbdev->mtx); - - fbdev->dev = &pdev->dev; - platform_set_drvdata(pdev, fbdev); - - r = 0; - fbdev->num_displays = 0; - dssdev = NULL; - for_each_dss_dev(dssdev) { - struct omapfb_display_data *d; - - omap_dss_get_device(dssdev); - - if (!dssdev->driver) { - dev_warn(&pdev->dev, "no driver for display: %s\n", - dssdev->name); - omap_dss_put_device(dssdev); - continue; - } - - d = &fbdev->displays[fbdev->num_displays++]; - d->dssdev = dssdev; - if (dssdev->caps & OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE) - d->update_mode = OMAPFB_MANUAL_UPDATE; - else - d->update_mode = OMAPFB_AUTO_UPDATE; - } - - if (r) - goto cleanup; - - if (fbdev->num_displays == 0) { - dev_err(&pdev->dev, "no displays\n"); - r = -EINVAL; - goto cleanup; - } - - fbdev->num_overlays = omap_dss_get_num_overlays(); - for (i = 0; i < fbdev->num_overlays; i++) - fbdev->overlays[i] = omap_dss_get_overlay(i); - - fbdev->num_managers = omap_dss_get_num_overlay_managers(); - for (i = 0; i < fbdev->num_managers; i++) - fbdev->managers[i] = omap_dss_get_overlay_manager(i); - - /* gfx overlay should be the default one. find a display - * connected to that, and use it as default display */ - ovl = omap_dss_get_overlay(0); - if (ovl->manager && ovl->manager->device) { - def_display = ovl->manager->device; - } else { - dev_warn(&pdev->dev, "cannot find default display\n"); - def_display = NULL; - } - - if (def_mode && strlen(def_mode) > 0) { - if (omapfb_parse_def_modes(fbdev)) - dev_warn(&pdev->dev, "cannot parse default modes\n"); - } else if (def_display && def_display->driver->set_timings && - def_display->driver->check_timings) { - struct omap_video_timings t; - - r = omapfb_find_best_mode(def_display, &t); - - if (r == 0) - def_display->driver->set_timings(def_display, &t); - } - - r = omapfb_create_framebuffers(fbdev); - if (r) - goto cleanup; - - for (i = 0; i < fbdev->num_managers; i++) { - struct omap_overlay_manager *mgr; - mgr = fbdev->managers[i]; - r = mgr->apply(mgr); - if (r) - dev_warn(fbdev->dev, "failed to apply dispc config\n"); - } - - DBG("mgr->apply'ed\n"); - - if (def_display) { - r = omapfb_init_display(fbdev, def_display); - if (r) { - dev_err(fbdev->dev, - "failed to initialize default " - "display\n"); - goto cleanup; - } - } - - DBG("create sysfs for fbs\n"); - r = omapfb_create_sysfs(fbdev); - if (r) { - dev_err(fbdev->dev, "failed to create sysfs entries\n"); - goto cleanup; - } - - return 0; - -cleanup: - omapfb_free_resources(fbdev); -err0: - dev_err(&pdev->dev, "failed to setup omapfb\n"); - return r; -} - -static int omapfb_remove(struct platform_device *pdev) -{ - struct omapfb2_device *fbdev = platform_get_drvdata(pdev); - - /* FIXME: wait till completion of pending events */ - - omapfb_remove_sysfs(fbdev); - - omapfb_free_resources(fbdev); - - return 0; -} - -static struct platform_driver omapfb_driver = { - .probe = omapfb_probe, - .remove = omapfb_remove, - .driver = { - .name = "omapfb", - .owner = THIS_MODULE, - }, -}; - -static int __init omapfb_init(void) -{ - DBG("omapfb_init\n"); - - if (platform_driver_register(&omapfb_driver)) { - printk(KERN_ERR "failed to register omapfb driver\n"); - return -ENODEV; - } - - return 0; -} - -static void __exit omapfb_exit(void) -{ - DBG("omapfb_exit\n"); - platform_driver_unregister(&omapfb_driver); -} - -module_param_named(mode, def_mode, charp, 0); -module_param_named(vram, def_vram, charp, 0); -module_param_named(rotate, def_rotate, int, 0); -module_param_named(vrfb, def_vrfb, bool, 0); -module_param_named(mirror, def_mirror, bool, 0); - -/* late_initcall to let panel/ctrl drivers loaded first. - * I guess better option would be a more dynamic approach, - * so that omapfb reacts to new panels when they are loaded */ -late_initcall(omapfb_init); -/*module_init(omapfb_init);*/ -module_exit(omapfb_exit); - -MODULE_AUTHOR("Tomi Valkeinen <tomi.valkeinen@nokia.com>"); -MODULE_DESCRIPTION("OMAP2/3 Framebuffer"); -MODULE_LICENSE("GPL v2"); diff --git a/drivers/video/omap2/omapfb/omapfb-sysfs.c b/drivers/video/omap2/omapfb/omapfb-sysfs.c deleted file mode 100644 index e8d8cc76a43..00000000000 --- a/drivers/video/omap2/omapfb/omapfb-sysfs.c +++ /dev/null @@ -1,601 +0,0 @@ -/* - * linux/drivers/video/omap2/omapfb-sysfs.c - * - * Copyright (C) 2008 Nokia Corporation - * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com> - * - * Some code and ideas taken from drivers/video/omap/ driver - * by Imre Deak. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program. If not, see <http://www.gnu.org/licenses/>. - */ - -#include <linux/fb.h> -#include <linux/sysfs.h> -#include <linux/device.h> -#include <linux/uaccess.h> -#include <linux/platform_device.h> -#include <linux/kernel.h> -#include <linux/mm.h> -#include <linux/omapfb.h> - -#include <video/omapdss.h> -#include <plat/vrfb.h> - -#include "omapfb.h" - -static ssize_t show_rotate_type(struct device *dev, - struct device_attribute *attr, char *buf) -{ - struct fb_info *fbi = dev_get_drvdata(dev); - struct omapfb_info *ofbi = FB2OFB(fbi); - - return snprintf(buf, PAGE_SIZE, "%d\n", ofbi->rotation_type); -} - -static ssize_t store_rotate_type(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t count) -{ - struct fb_info *fbi = dev_get_drvdata(dev); - struct omapfb_info *ofbi = FB2OFB(fbi); - struct omapfb2_mem_region *rg; - int rot_type; - int r; - - r = kstrtoint(buf, 0, &rot_type); - if (r) - return r; - - if (rot_type != OMAP_DSS_ROT_DMA && rot_type != OMAP_DSS_ROT_VRFB) - return -EINVAL; - - if (!lock_fb_info(fbi)) - return -ENODEV; - - r = 0; - if (rot_type == ofbi->rotation_type) - goto out; - - rg = omapfb_get_mem_region(ofbi->region); - - if (rg->size) { - r = -EBUSY; - goto put_region; - } - - ofbi->rotation_type = rot_type; - - /* - * Since the VRAM for this FB is not allocated at the moment we don't - * need to do any further parameter checking at this point. - */ -put_region: - omapfb_put_mem_region(rg); -out: - unlock_fb_info(fbi); - - return r ? r : count; -} - - -static ssize_t show_mirror(struct device *dev, - struct device_attribute *attr, char *buf) -{ - struct fb_info *fbi = dev_get_drvdata(dev); - struct omapfb_info *ofbi = FB2OFB(fbi); - - return snprintf(buf, PAGE_SIZE, "%d\n", ofbi->mirror); -} - -static ssize_t store_mirror(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t count) -{ - struct fb_info *fbi = dev_get_drvdata(dev); - struct omapfb_info *ofbi = FB2OFB(fbi); - bool mirror; - int r; - struct fb_var_screeninfo new_var; - - r = strtobool(buf, &mirror); - if (r) - return r; - - if (!lock_fb_info(fbi)) - return -ENODEV; - - ofbi->mirror = mirror; - - omapfb_get_mem_region(ofbi->region); - - memcpy(&new_var, &fbi->var, sizeof(new_var)); - r = check_fb_var(fbi, &new_var); - if (r) - goto out; - memcpy(&fbi->var, &new_var, sizeof(fbi->var)); - - set_fb_fix(fbi); - - r = omapfb_apply_changes(fbi, 0); - if (r) - goto out; - - r = count; -out: - omapfb_put_mem_region(ofbi->region); - - unlock_fb_info(fbi); - - return r; -} - -static ssize_t show_overlays(struct device *dev, - struct device_attribute *attr, char *buf) -{ - struct fb_info *fbi = dev_get_drvdata(dev); - struct omapfb_info *ofbi = FB2OFB(fbi); - struct omapfb2_device *fbdev = ofbi->fbdev; - ssize_t l = 0; - int t; - - if (!lock_fb_info(fbi)) - return -ENODEV; - omapfb_lock(fbdev); - - for (t = 0; t < ofbi->num_overlays; t++) { - struct omap_overlay *ovl = ofbi->overlays[t]; - int ovlnum; - - for (ovlnum = 0; ovlnum < fbdev->num_overlays; ++ovlnum) - if (ovl == fbdev->overlays[ovlnum]) - break; - - l += snprintf(buf + l, PAGE_SIZE - l, "%s%d", - t == 0 ? "" : ",", ovlnum); - } - - l += snprintf(buf + l, PAGE_SIZE - l, "\n"); - - omapfb_unlock(fbdev); - unlock_fb_info(fbi); - - return l; -} - -static struct omapfb_info *get_overlay_fb(struct omapfb2_device *fbdev, - struct omap_overlay *ovl) -{ - int i, t; - - for (i = 0; i < fbdev->num_fbs; i++) { - struct omapfb_info *ofbi = FB2OFB(fbdev->fbs[i]); - - for (t = 0; t < ofbi->num_overlays; t++) { - if (ofbi->overlays[t] == ovl) - return ofbi; - } - } - - return NULL; -} - -static ssize_t store_overlays(struct device *dev, struct device_attribute *attr, - const char *buf, size_t count) -{ - struct fb_info *fbi = dev_get_drvdata(dev); - struct omapfb_info *ofbi = FB2OFB(fbi); - struct omapfb2_device *fbdev = ofbi->fbdev; - struct omap_overlay *ovls[OMAPFB_MAX_OVL_PER_FB]; - struct omap_overlay *ovl; - int num_ovls, r, i; - int len; - bool added = false; - - num_ovls = 0; - - len = strlen(buf); - if (buf[len - 1] == '\n') - len = len - 1; - - if (!lock_fb_info(fbi)) - return -ENODEV; - omapfb_lock(fbdev); - - if (len > 0) { - char *p = (char *)buf; - int ovlnum; - - while (p < buf + len) { - int found; - if (num_ovls == OMAPFB_MAX_OVL_PER_FB) { - r = -EINVAL; - goto out; - } - - ovlnum = simple_strtoul(p, &p, 0); - if (ovlnum > fbdev->num_overlays) { - r = -EINVAL; - goto out; - } - - found = 0; - for (i = 0; i < num_ovls; ++i) { - if (ovls[i] == fbdev->overlays[ovlnum]) { - found = 1; - break; - } - } - - if (!found) - ovls[num_ovls++] = fbdev->overlays[ovlnum]; - - p++; - } - } - - for (i = 0; i < num_ovls; ++i) { - struct omapfb_info *ofbi2 = get_overlay_fb(fbdev, ovls[i]); - if (ofbi2 && ofbi2 != ofbi) { - dev_err(fbdev->dev, "overlay already in use\n"); - r = -EINVAL; - goto out; - } - } - - /* detach unused overlays */ - for (i = 0; i < ofbi->num_overlays; ++i) { - int t, found; - - ovl = ofbi->overlays[i]; - - found = 0; - - for (t = 0; t < num_ovls; ++t) { - if (ovl == ovls[t]) { - found = 1; - break; - } - } - - if (found) - continue; - - DBG("detaching %d\n", ofbi->overlays[i]->id); - - omapfb_get_mem_region(ofbi->region); - - omapfb_overlay_enable(ovl, 0); - - if (ovl->manager) - ovl->manager->apply(ovl->manager); - - omapfb_put_mem_region(ofbi->region); - - for (t = i + 1; t < ofbi->num_overlays; t++) { - ofbi->rotation[t-1] = ofbi->rotation[t]; - ofbi->overlays[t-1] = ofbi->overlays[t]; - } - - ofbi->num_overlays--; - i--; - } - - for (i = 0; i < num_ovls; ++i) { - int t, found; - - ovl = ovls[i]; - - found = 0; - - for (t = 0; t < ofbi->num_overlays; ++t) { - if (ovl == ofbi->overlays[t]) { - found = 1; - break; - } - } - - if (found) - continue; - ofbi->rotation[ofbi->num_overlays] = 0; - ofbi->overlays[ofbi->num_overlays++] = ovl; - - added = true; - } - - if (added) { - omapfb_get_mem_region(ofbi->region); - - r = omapfb_apply_changes(fbi, 0); - - omapfb_put_mem_region(ofbi->region); - - if (r) - goto out; - } - - r = count; -out: - omapfb_unlock(fbdev); - unlock_fb_info(fbi); - - return r; -} - -static ssize_t show_overlays_rotate(struct device *dev, - struct device_attribute *attr, char *buf) -{ - struct fb_info *fbi = dev_get_drvdata(dev); - struct omapfb_info *ofbi = FB2OFB(fbi); - ssize_t l = 0; - int t; - - if (!lock_fb_info(fbi)) - return -ENODEV; - - for (t = 0; t < ofbi->num_overlays; t++) { - l += snprintf(buf + l, PAGE_SIZE - l, "%s%d", - t == 0 ? "" : ",", ofbi->rotation[t]); - } - - l += snprintf(buf + l, PAGE_SIZE - l, "\n"); - - unlock_fb_info(fbi); - - return l; -} - -static ssize_t store_overlays_rotate(struct device *dev, - struct device_attribute *attr, const char *buf, size_t count) -{ - struct fb_info *fbi = dev_get_drvdata(dev); - struct omapfb_info *ofbi = FB2OFB(fbi); - int num_ovls = 0, r, i; - int len; - bool changed = false; - u8 rotation[OMAPFB_MAX_OVL_PER_FB]; - - len = strlen(buf); - if (buf[len - 1] == '\n') - len = len - 1; - - if (!lock_fb_info(fbi)) - return -ENODEV; - - if (len > 0) { - char *p = (char *)buf; - - while (p < buf + len) { - int rot; - - if (num_ovls == ofbi->num_overlays) { - r = -EINVAL; - goto out; - } - - rot = simple_strtoul(p, &p, 0); - if (rot < 0 || rot > 3) { - r = -EINVAL; - goto out; - } - - if (ofbi->rotation[num_ovls] != rot) - changed = true; - - rotation[num_ovls++] = rot; - - p++; - } - } - - if (num_ovls != ofbi->num_overlays) { - r = -EINVAL; - goto out; - } - - if (changed) { - for (i = 0; i < num_ovls; ++i) - ofbi->rotation[i] = rotation[i]; - - omapfb_get_mem_region(ofbi->region); - - r = omapfb_apply_changes(fbi, 0); - - omapfb_put_mem_region(ofbi->region); - - if (r) - goto out; - - /* FIXME error handling? */ - } - - r = count; -out: - unlock_fb_info(fbi); - - return r; -} - -static ssize_t show_size(struct device *dev, - struct device_attribute *attr, char *buf) -{ - struct fb_info *fbi = dev_get_drvdata(dev); - struct omapfb_info *ofbi = FB2OFB(fbi); - - return snprintf(buf, PAGE_SIZE, "%lu\n", ofbi->region->size); -} - -static ssize_t store_size(struct device *dev, struct device_attribute *attr, - const char *buf, size_t count) -{ - struct fb_info *fbi = dev_get_drvdata(dev); - struct omapfb_info *ofbi = FB2OFB(fbi); - struct omapfb2_device *fbdev = ofbi->fbdev; - struct omapfb2_mem_region *rg; - unsigned long size; - int r; - int i; - - r = kstrtoul(buf, 0, &size); - if (r) - return r; - - size = PAGE_ALIGN(size); - - if (!lock_fb_info(fbi)) - return -ENODEV; - - rg = ofbi->region; - - down_write_nested(&rg->lock, rg->id); - atomic_inc(&rg->lock_count); - - if (atomic_read(&rg->map_count)) { - r = -EBUSY; - goto out; - } - - for (i = 0; i < fbdev->num_fbs; i++) { - struct omapfb_info *ofbi2 = FB2OFB(fbdev->fbs[i]); - int j; - - if (ofbi2->region != rg) - continue; - - for (j = 0; j < ofbi2->num_overlays; j++) { - struct omap_overlay *ovl; - ovl = ofbi2->overlays[j]; - if (ovl->is_enabled(ovl)) { - r = -EBUSY; - goto out; - } - } - } - - if (size != ofbi->region->size) { - r = omapfb_realloc_fbmem(fbi, size, ofbi->region->type); - if (r) { - dev_err(dev, "realloc fbmem failed\n"); - goto out; - } - } - - r = count; -out: - atomic_dec(&rg->lock_count); - up_write(&rg->lock); - - unlock_fb_info(fbi); - - return r; -} - -static ssize_t show_phys(struct device *dev, - struct device_attribute *attr, char *buf) -{ - struct fb_info *fbi = dev_get_drvdata(dev); - struct omapfb_info *ofbi = FB2OFB(fbi); - - return snprintf(buf, PAGE_SIZE, "%0x\n", ofbi->region->paddr); -} - -static ssize_t show_virt(struct device *dev, - struct device_attribute *attr, char *buf) -{ - struct fb_info *fbi = dev_get_drvdata(dev); - struct omapfb_info *ofbi = FB2OFB(fbi); - - return snprintf(buf, PAGE_SIZE, "%p\n", ofbi->region->vaddr); -} - -static ssize_t show_upd_mode(struct device *dev, - struct device_attribute *attr, char *buf) -{ - struct fb_info *fbi = dev_get_drvdata(dev); - enum omapfb_update_mode mode; - int r; - - r = omapfb_get_update_mode(fbi, &mode); - - if (r) - return r; - - return snprintf(buf, PAGE_SIZE, "%u\n", (unsigned)mode); -} - -static ssize_t store_upd_mode(struct device *dev, struct device_attribute *attr, - const char *buf, size_t count) -{ - struct fb_info *fbi = dev_get_drvdata(dev); - unsigned mode; - int r; - - r = kstrtouint(buf, 0, &mode); - if (r) - return r; - - r = omapfb_set_update_mode(fbi, mode); - if (r) - return r; - - return count; -} - -static struct device_attribute omapfb_attrs[] = { - __ATTR(rotate_type, S_IRUGO | S_IWUSR, show_rotate_type, - store_rotate_type), - __ATTR(mirror, S_IRUGO | S_IWUSR, show_mirror, store_mirror), - __ATTR(size, S_IRUGO | S_IWUSR, show_size, store_size), - __ATTR(overlays, S_IRUGO | S_IWUSR, show_overlays, store_overlays), - __ATTR(overlays_rotate, S_IRUGO | S_IWUSR, show_overlays_rotate, - store_overlays_rotate), - __ATTR(phys_addr, S_IRUGO, show_phys, NULL), - __ATTR(virt_addr, S_IRUGO, show_virt, NULL), - __ATTR(update_mode, S_IRUGO | S_IWUSR, show_upd_mode, store_upd_mode), -}; - -int omapfb_create_sysfs(struct omapfb2_device *fbdev) -{ - int i; - int r; - - DBG("create sysfs for fbs\n"); - for (i = 0; i < fbdev->num_fbs; i++) { - int t; - for (t = 0; t < ARRAY_SIZE(omapfb_attrs); t++) { - r = device_create_file(fbdev->fbs[i]->dev, - &omapfb_attrs[t]); - - if (r) { - dev_err(fbdev->dev, "failed to create sysfs " - "file\n"); - return r; - } - } - } - - return 0; -} - -void omapfb_remove_sysfs(struct omapfb2_device *fbdev) -{ - int i, t; - - DBG("remove sysfs for fbs\n"); - for (i = 0; i < fbdev->num_fbs; i++) { - for (t = 0; t < ARRAY_SIZE(omapfb_attrs); t++) - device_remove_file(fbdev->fbs[i]->dev, - &omapfb_attrs[t]); - } -} - diff --git a/drivers/video/omap2/omapfb/omapfb.h b/drivers/video/omap2/omapfb/omapfb.h deleted file mode 100644 index c0bdc9b54ec..00000000000 --- a/drivers/video/omap2/omapfb/omapfb.h +++ /dev/null @@ -1,204 +0,0 @@ -/* - * linux/drivers/video/omap2/omapfb.h - * - * Copyright (C) 2008 Nokia Corporation - * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com> - * - * Some code and ideas taken from drivers/video/omap/ driver - * by Imre Deak. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program. If not, see <http://www.gnu.org/licenses/>. - */ - -#ifndef __DRIVERS_VIDEO_OMAP2_OMAPFB_H__ -#define __DRIVERS_VIDEO_OMAP2_OMAPFB_H__ - -#ifdef CONFIG_FB_OMAP2_DEBUG_SUPPORT -#define DEBUG -#endif - -#include <linux/rwsem.h> - -#include <video/omapdss.h> - -#ifdef DEBUG -extern bool omapfb_debug; -#define DBG(format, ...) \ - do { \ - if (omapfb_debug) \ - printk(KERN_DEBUG "OMAPFB: " format, ## __VA_ARGS__); \ - } while (0) -#else -#define DBG(format, ...) -#endif - -#define FB2OFB(fb_info) ((struct omapfb_info *)(fb_info->par)) - -/* max number of overlays to which a framebuffer data can be direct */ -#define OMAPFB_MAX_OVL_PER_FB 3 - -struct omapfb2_mem_region { - int id; - u32 paddr; - void __iomem *vaddr; - struct vrfb vrfb; - unsigned long size; - u8 type; /* OMAPFB_PLANE_MEM_* */ - bool alloc; /* allocated by the driver */ - bool map; /* kernel mapped by the driver */ - atomic_t map_count; - struct rw_semaphore lock; - atomic_t lock_count; -}; - -/* appended to fb_info */ -struct omapfb_info { - int id; - struct omapfb2_mem_region *region; - int num_overlays; - struct omap_overlay *overlays[OMAPFB_MAX_OVL_PER_FB]; - struct omapfb2_device *fbdev; - enum omap_dss_rotation_type rotation_type; - u8 rotation[OMAPFB_MAX_OVL_PER_FB]; - bool mirror; -}; - -struct omapfb_display_data { - struct omapfb2_device *fbdev; - struct omap_dss_device *dssdev; - u8 bpp_override; - enum omapfb_update_mode update_mode; - bool auto_update_work_enabled; - struct delayed_work auto_update_work; -}; - -struct omapfb2_device { - struct device *dev; - struct mutex mtx; - - u32 pseudo_palette[17]; - - int state; - - unsigned num_fbs; - struct fb_info *fbs[10]; - struct omapfb2_mem_region regions[10]; - - unsigned num_displays; - struct omapfb_display_data displays[10]; - unsigned num_overlays; - struct omap_overlay *overlays[10]; - unsigned num_managers; - struct omap_overlay_manager *managers[10]; - - struct workqueue_struct *auto_update_wq; -}; - -struct omapfb_colormode { - enum omap_color_mode dssmode; - u32 bits_per_pixel; - u32 nonstd; - struct fb_bitfield red; - struct fb_bitfield green; - struct fb_bitfield blue; - struct fb_bitfield transp; -}; - -void set_fb_fix(struct fb_info *fbi); -int check_fb_var(struct fb_info *fbi, struct fb_var_screeninfo *var); -int omapfb_realloc_fbmem(struct fb_info *fbi, unsigned long size, int type); -int omapfb_apply_changes(struct fb_info *fbi, int init); - -int omapfb_create_sysfs(struct omapfb2_device *fbdev); -void omapfb_remove_sysfs(struct omapfb2_device *fbdev); - -int omapfb_ioctl(struct fb_info *fbi, unsigned int cmd, unsigned long arg); - -int omapfb_update_window(struct fb_info *fbi, - u32 x, u32 y, u32 w, u32 h); - -int dss_mode_to_fb_mode(enum omap_color_mode dssmode, - struct fb_var_screeninfo *var); - -int omapfb_setup_overlay(struct fb_info *fbi, struct omap_overlay *ovl, - u16 posx, u16 posy, u16 outw, u16 outh); - -void omapfb_start_auto_update(struct omapfb2_device *fbdev, - struct omap_dss_device *display); -void omapfb_stop_auto_update(struct omapfb2_device *fbdev, - struct omap_dss_device *display); -int omapfb_get_update_mode(struct fb_info *fbi, enum omapfb_update_mode *mode); -int omapfb_set_update_mode(struct fb_info *fbi, enum omapfb_update_mode mode); - -/* find the display connected to this fb, if any */ -static inline struct omap_dss_device *fb2display(struct fb_info *fbi) -{ - struct omapfb_info *ofbi = FB2OFB(fbi); - int i; - - /* XXX: returns the display connected to first attached overlay */ - for (i = 0; i < ofbi->num_overlays; i++) { - if (ofbi->overlays[i]->manager) - return ofbi->overlays[i]->manager->device; - } - - return NULL; -} - -static inline struct omapfb_display_data *get_display_data( - struct omapfb2_device *fbdev, struct omap_dss_device *dssdev) -{ - int i; - - for (i = 0; i < fbdev->num_displays; ++i) - if (fbdev->displays[i].dssdev == dssdev) - return &fbdev->displays[i]; - - /* This should never happen */ - BUG(); -} - -static inline void omapfb_lock(struct omapfb2_device *fbdev) -{ - mutex_lock(&fbdev->mtx); -} - -static inline void omapfb_unlock(struct omapfb2_device *fbdev) -{ - mutex_unlock(&fbdev->mtx); -} - -static inline int omapfb_overlay_enable(struct omap_overlay *ovl, - int enable) -{ - if (enable) - return ovl->enable(ovl); - else - return ovl->disable(ovl); -} - -static inline struct omapfb2_mem_region * -omapfb_get_mem_region(struct omapfb2_mem_region *rg) -{ - down_read_nested(&rg->lock, rg->id); - atomic_inc(&rg->lock_count); - return rg; -} - -static inline void omapfb_put_mem_region(struct omapfb2_mem_region *rg) -{ - atomic_dec(&rg->lock_count); - up_read(&rg->lock); -} - -#endif diff --git a/drivers/video/omap2/vram.c b/drivers/video/omap2/vram.c deleted file mode 100644 index 9441e2eb3de..00000000000 --- a/drivers/video/omap2/vram.c +++ /dev/null @@ -1,659 +0,0 @@ -/* - * VRAM manager for OMAP - * - * Copyright (C) 2009 Nokia Corporation - * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - */ - -/*#define DEBUG*/ - -#include <linux/kernel.h> -#include <linux/mm.h> -#include <linux/list.h> -#include <linux/slab.h> -#include <linux/seq_file.h> -#include <linux/memblock.h> -#include <linux/completion.h> -#include <linux/debugfs.h> -#include <linux/jiffies.h> -#include <linux/module.h> - -#include <asm/setup.h> - -#include <plat/sram.h> -#include <plat/vram.h> -#include <plat/dma.h> - -#ifdef DEBUG -#define DBG(format, ...) pr_debug("VRAM: " format, ## __VA_ARGS__) -#else -#define DBG(format, ...) -#endif - -#define OMAP2_SRAM_START 0x40200000 -/* Maximum size, in reality this is smaller if SRAM is partially locked. */ -#define OMAP2_SRAM_SIZE 0xa0000 /* 640k */ - -/* postponed regions are used to temporarily store region information at boot - * time when we cannot yet allocate the region list */ -#define MAX_POSTPONED_REGIONS 10 - -static bool vram_initialized; -static int postponed_cnt; -static struct { - unsigned long paddr; - size_t size; -} postponed_regions[MAX_POSTPONED_REGIONS]; - -struct vram_alloc { - struct list_head list; - unsigned long paddr; - unsigned pages; -}; - -struct vram_region { - struct list_head list; - struct list_head alloc_list; - unsigned long paddr; - unsigned pages; -}; - -static DEFINE_MUTEX(region_mutex); -static LIST_HEAD(region_list); - -static inline int region_mem_type(unsigned long paddr) -{ - if (paddr >= OMAP2_SRAM_START && - paddr < OMAP2_SRAM_START + OMAP2_SRAM_SIZE) - return OMAP_VRAM_MEMTYPE_SRAM; - else - return OMAP_VRAM_MEMTYPE_SDRAM; -} - -static struct vram_region *omap_vram_create_region(unsigned long paddr, - unsigned pages) -{ - struct vram_region *rm; - - rm = kzalloc(sizeof(*rm), GFP_KERNEL); - - if (rm) { - INIT_LIST_HEAD(&rm->alloc_list); - rm->paddr = paddr; - rm->pages = pages; - } - - return rm; -} - -#if 0 -static void omap_vram_free_region(struct vram_region *vr) -{ - list_del(&vr->list); - kfree(vr); -} -#endif - -static struct vram_alloc *omap_vram_create_allocation(struct vram_region *vr, - unsigned long paddr, unsigned pages) -{ - struct vram_alloc *va; - struct vram_alloc *new; - - new = kzalloc(sizeof(*va), GFP_KERNEL); - - if (!new) - return NULL; - - new->paddr = paddr; - new->pages = pages; - - list_for_each_entry(va, &vr->alloc_list, list) { - if (va->paddr > new->paddr) - break; - } - - list_add_tail(&new->list, &va->list); - - return new; -} - -static void omap_vram_free_allocation(struct vram_alloc *va) -{ - list_del(&va->list); - kfree(va); -} - -int omap_vram_add_region(unsigned long paddr, size_t size) -{ - struct vram_region *rm; - unsigned pages; - - if (vram_initialized) { - DBG("adding region paddr %08lx size %d\n", - paddr, size); - - size &= PAGE_MASK; - pages = size >> PAGE_SHIFT; - - rm = omap_vram_create_region(paddr, pages); - if (rm == NULL) - return -ENOMEM; - - list_add(&rm->list, ®ion_list); - } else { - if (postponed_cnt == MAX_POSTPONED_REGIONS) - return -ENOMEM; - - postponed_regions[postponed_cnt].paddr = paddr; - postponed_regions[postponed_cnt].size = size; - - ++postponed_cnt; - } - return 0; -} - -int omap_vram_free(unsigned long paddr, size_t size) -{ - struct vram_region *rm; - struct vram_alloc *alloc; - unsigned start, end; - - DBG("free mem paddr %08lx size %d\n", paddr, size); - - size = PAGE_ALIGN(size); - - mutex_lock(®ion_mutex); - - list_for_each_entry(rm, ®ion_list, list) { - list_for_each_entry(alloc, &rm->alloc_list, list) { - start = alloc->paddr; - end = alloc->paddr + (alloc->pages >> PAGE_SHIFT); - - if (start >= paddr && end < paddr + size) - goto found; - } - } - - mutex_unlock(®ion_mutex); - return -EINVAL; - -found: - omap_vram_free_allocation(alloc); - - mutex_unlock(®ion_mutex); - return 0; -} -EXPORT_SYMBOL(omap_vram_free); - -static int _omap_vram_reserve(unsigned long paddr, unsigned pages) -{ - struct vram_region *rm; - struct vram_alloc *alloc; - size_t size; - - size = pages << PAGE_SHIFT; - - list_for_each_entry(rm, ®ion_list, list) { - unsigned long start, end; - - DBG("checking region %lx %d\n", rm->paddr, rm->pages); - - if (region_mem_type(rm->paddr) != region_mem_type(paddr)) - continue; - - start = rm->paddr; - end = start + (rm->pages << PAGE_SHIFT) - 1; - if (start > paddr || end < paddr + size - 1) - continue; - - DBG("block ok, checking allocs\n"); - - list_for_each_entry(alloc, &rm->alloc_list, list) { - end = alloc->paddr - 1; - - if (start <= paddr && end >= paddr + size - 1) - goto found; - - start = alloc->paddr + (alloc->pages << PAGE_SHIFT); - } - - end = rm->paddr + (rm->pages << PAGE_SHIFT) - 1; - - if (!(start <= paddr && end >= paddr + size - 1)) - continue; -found: - DBG("found area start %lx, end %lx\n", start, end); - - if (omap_vram_create_allocation(rm, paddr, pages) == NULL) - return -ENOMEM; - - return 0; - } - - return -ENOMEM; -} - -int omap_vram_reserve(unsigned long paddr, size_t size) -{ - unsigned pages; - int r; - - DBG("reserve mem paddr %08lx size %d\n", paddr, size); - - size = PAGE_ALIGN(size); - pages = size >> PAGE_SHIFT; - - mutex_lock(®ion_mutex); - - r = _omap_vram_reserve(paddr, pages); - - mutex_unlock(®ion_mutex); - - return r; -} -EXPORT_SYMBOL(omap_vram_reserve); - -static void _omap_vram_dma_cb(int lch, u16 ch_status, void *data) -{ - struct completion *compl = data; - complete(compl); -} - -static int _omap_vram_clear(u32 paddr, unsigned pages) -{ - struct completion compl; - unsigned elem_count; - unsigned frame_count; - int r; - int lch; - - init_completion(&compl); - - r = omap_request_dma(OMAP_DMA_NO_DEVICE, "VRAM DMA", - _omap_vram_dma_cb, - &compl, &lch); - if (r) { - pr_err("VRAM: request_dma failed for memory clear\n"); - return -EBUSY; - } - - elem_count = pages * PAGE_SIZE / 4; - frame_count = 1; - - omap_set_dma_transfer_params(lch, OMAP_DMA_DATA_TYPE_S32, - elem_count, frame_count, - OMAP_DMA_SYNC_ELEMENT, - 0, 0); - - omap_set_dma_dest_params(lch, 0, OMAP_DMA_AMODE_POST_INC, - paddr, 0, 0); - - omap_set_dma_color_mode(lch, OMAP_DMA_CONSTANT_FILL, 0x000000); - - omap_start_dma(lch); - - if (wait_for_completion_timeout(&compl, msecs_to_jiffies(1000)) == 0) { - omap_stop_dma(lch); - pr_err("VRAM: dma timeout while clearing memory\n"); - r = -EIO; - goto err; - } - - r = 0; -err: - omap_free_dma(lch); - - return r; -} - -static int _omap_vram_alloc(int mtype, unsigned pages, unsigned long *paddr) -{ - struct vram_region *rm; - struct vram_alloc *alloc; - - list_for_each_entry(rm, ®ion_list, list) { - unsigned long start, end; - - DBG("checking region %lx %d\n", rm->paddr, rm->pages); - - if (region_mem_type(rm->paddr) != mtype) - continue; - - start = rm->paddr; - - list_for_each_entry(alloc, &rm->alloc_list, list) { - end = alloc->paddr; - - if (end - start >= pages << PAGE_SHIFT) - goto found; - - start = alloc->paddr + (alloc->pages << PAGE_SHIFT); - } - - end = rm->paddr + (rm->pages << PAGE_SHIFT); -found: - if (end - start < pages << PAGE_SHIFT) - continue; - - DBG("found %lx, end %lx\n", start, end); - - alloc = omap_vram_create_allocation(rm, start, pages); - if (alloc == NULL) - return -ENOMEM; - - *paddr = start; - - _omap_vram_clear(start, pages); - - return 0; - } - - return -ENOMEM; -} - -int omap_vram_alloc(int mtype, size_t size, unsigned long *paddr) -{ - unsigned pages; - int r; - - BUG_ON(mtype > OMAP_VRAM_MEMTYPE_MAX || !size); - - DBG("alloc mem type %d size %d\n", mtype, size); - - size = PAGE_ALIGN(size); - pages = size >> PAGE_SHIFT; - - mutex_lock(®ion_mutex); - - r = _omap_vram_alloc(mtype, pages, paddr); - - mutex_unlock(®ion_mutex); - - return r; -} -EXPORT_SYMBOL(omap_vram_alloc); - -void omap_vram_get_info(unsigned long *vram, - unsigned long *free_vram, - unsigned long *largest_free_block) -{ - struct vram_region *vr; - struct vram_alloc *va; - - *vram = 0; - *free_vram = 0; - *largest_free_block = 0; - - mutex_lock(®ion_mutex); - - list_for_each_entry(vr, ®ion_list, list) { - unsigned free; - unsigned long pa; - - pa = vr->paddr; - *vram += vr->pages << PAGE_SHIFT; - - list_for_each_entry(va, &vr->alloc_list, list) { - free = va->paddr - pa; - *free_vram += free; - if (free > *largest_free_block) - *largest_free_block = free; - pa = va->paddr + (va->pages << PAGE_SHIFT); - } - - free = vr->paddr + (vr->pages << PAGE_SHIFT) - pa; - *free_vram += free; - if (free > *largest_free_block) - *largest_free_block = free; - } - - mutex_unlock(®ion_mutex); -} -EXPORT_SYMBOL(omap_vram_get_info); - -#if defined(CONFIG_DEBUG_FS) -static int vram_debug_show(struct seq_file *s, void *unused) -{ - struct vram_region *vr; - struct vram_alloc *va; - unsigned size; - - mutex_lock(®ion_mutex); - - list_for_each_entry(vr, ®ion_list, list) { - size = vr->pages << PAGE_SHIFT; - seq_printf(s, "%08lx-%08lx (%d bytes)\n", - vr->paddr, vr->paddr + size - 1, - size); - - list_for_each_entry(va, &vr->alloc_list, list) { - size = va->pages << PAGE_SHIFT; - seq_printf(s, " %08lx-%08lx (%d bytes)\n", - va->paddr, va->paddr + size - 1, - size); - } - } - - mutex_unlock(®ion_mutex); - - return 0; -} - -static int vram_debug_open(struct inode *inode, struct file *file) -{ - return single_open(file, vram_debug_show, inode->i_private); -} - -static const struct file_operations vram_debug_fops = { - .open = vram_debug_open, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; - -static int __init omap_vram_create_debugfs(void) -{ - struct dentry *d; - - d = debugfs_create_file("vram", S_IRUGO, NULL, - NULL, &vram_debug_fops); - if (IS_ERR(d)) - return PTR_ERR(d); - - return 0; -} -#endif - -static __init int omap_vram_init(void) -{ - int i; - - vram_initialized = 1; - - for (i = 0; i < postponed_cnt; i++) - omap_vram_add_region(postponed_regions[i].paddr, - postponed_regions[i].size); - -#ifdef CONFIG_DEBUG_FS - if (omap_vram_create_debugfs()) - pr_err("VRAM: Failed to create debugfs file\n"); -#endif - - return 0; -} - -arch_initcall(omap_vram_init); - -/* boottime vram alloc stuff */ - -/* set from board file */ -static u32 omap_vram_sram_start __initdata; -static u32 omap_vram_sram_size __initdata; - -/* set from board file */ -static u32 omap_vram_sdram_start __initdata; -static u32 omap_vram_sdram_size __initdata; - -/* set from kernel cmdline */ -static u32 omap_vram_def_sdram_size __initdata; -static u32 omap_vram_def_sdram_start __initdata; - -static int __init omap_vram_early_vram(char *p) -{ - omap_vram_def_sdram_size = memparse(p, &p); - if (*p == ',') - omap_vram_def_sdram_start = simple_strtoul(p + 1, &p, 16); - return 0; -} -early_param("vram", omap_vram_early_vram); - -/* - * Called from map_io. We need to call to this early enough so that we - * can reserve the fixed SDRAM regions before VM could get hold of them. - */ -void __init omap_vram_reserve_sdram_memblock(void) -{ - u32 paddr; - u32 size = 0; - - /* cmdline arg overrides the board file definition */ - if (omap_vram_def_sdram_size) { - size = omap_vram_def_sdram_size; - paddr = omap_vram_def_sdram_start; - } - - if (!size) { - size = omap_vram_sdram_size; - paddr = omap_vram_sdram_start; - } - -#ifdef CONFIG_OMAP2_VRAM_SIZE - if (!size) { - size = CONFIG_OMAP2_VRAM_SIZE * 1024 * 1024; - paddr = 0; - } -#endif - - if (!size) - return; - - size = ALIGN(size, SZ_2M); - - if (paddr) { - if (paddr & ~PAGE_MASK) { - pr_err("VRAM start address 0x%08x not page aligned\n", - paddr); - return; - } - - if (!memblock_is_region_memory(paddr, size)) { - pr_err("Illegal SDRAM region 0x%08x..0x%08x for VRAM\n", - paddr, paddr + size - 1); - return; - } - - if (memblock_is_region_reserved(paddr, size)) { - pr_err("FB: failed to reserve VRAM - busy\n"); - return; - } - - if (memblock_reserve(paddr, size) < 0) { - pr_err("FB: failed to reserve VRAM - no memory\n"); - return; - } - } else { - paddr = memblock_alloc(size, SZ_2M); - } - - memblock_free(paddr, size); - memblock_remove(paddr, size); - - omap_vram_add_region(paddr, size); - - pr_info("Reserving %u bytes SDRAM for VRAM\n", size); -} - -/* - * Called at sram init time, before anything is pushed to the SRAM stack. - * Because of the stack scheme, we will allocate everything from the - * start of the lowest address region to the end of SRAM. This will also - * include padding for page alignment and possible holes between regions. - * - * As opposed to the SDRAM case, we'll also do any dynamic allocations at - * this point, since the driver built as a module would have problem with - * freeing / reallocating the regions. - */ -unsigned long __init omap_vram_reserve_sram(unsigned long sram_pstart, - unsigned long sram_vstart, - unsigned long sram_size, - unsigned long pstart_avail, - unsigned long size_avail) -{ - unsigned long pend_avail; - unsigned long reserved; - u32 paddr; - u32 size; - - paddr = omap_vram_sram_start; - size = omap_vram_sram_size; - - if (!size) - return 0; - - reserved = 0; - pend_avail = pstart_avail + size_avail; - - if (!paddr) { - /* Dynamic allocation */ - if ((size_avail & PAGE_MASK) < size) { - pr_err("Not enough SRAM for VRAM\n"); - return 0; - } - size_avail = (size_avail - size) & PAGE_MASK; - paddr = pstart_avail + size_avail; - } - - if (paddr < sram_pstart || - paddr + size > sram_pstart + sram_size) { - pr_err("Illegal SRAM region for VRAM\n"); - return 0; - } - - /* Reserve everything above the start of the region. */ - if (pend_avail - paddr > reserved) - reserved = pend_avail - paddr; - size_avail = pend_avail - reserved - pstart_avail; - - omap_vram_add_region(paddr, size); - - if (reserved) - pr_info("Reserving %lu bytes SRAM for VRAM\n", reserved); - - return reserved; -} - -void __init omap_vram_set_sdram_vram(u32 size, u32 start) -{ - omap_vram_sdram_start = start; - omap_vram_sdram_size = size; -} - -void __init omap_vram_set_sram_vram(u32 size, u32 start) -{ - omap_vram_sram_start = start; - omap_vram_sram_size = size; -} diff --git a/drivers/video/omap2/vrfb.c b/drivers/video/omap2/vrfb.c deleted file mode 100644 index fd227160037..00000000000 --- a/drivers/video/omap2/vrfb.c +++ /dev/null @@ -1,315 +0,0 @@ -/* - * VRFB Rotation Engine - * - * Copyright (C) 2009 Nokia Corporation - * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - */ - -/*#define DEBUG*/ - -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/ioport.h> -#include <linux/io.h> -#include <linux/bitops.h> -#include <linux/mutex.h> - -#include <mach/io.h> -#include <plat/vrfb.h> -#include <plat/sdrc.h> - -#ifdef DEBUG -#define DBG(format, ...) pr_debug("VRFB: " format, ## __VA_ARGS__) -#else -#define DBG(format, ...) -#endif - -#define SMS_ROT_VIRT_BASE(context, rot) \ - (((context >= 4) ? 0xD0000000 : 0x70000000) \ - + (0x4000000 * (context)) \ - + (0x1000000 * (rot))) - -#define OMAP_VRFB_SIZE (2048 * 2048 * 4) - -#define VRFB_PAGE_WIDTH_EXP 5 /* Assuming SDRAM pagesize= 1024 */ -#define VRFB_PAGE_HEIGHT_EXP 5 /* 1024 = 2^5 * 2^5 */ -#define VRFB_PAGE_WIDTH (1 << VRFB_PAGE_WIDTH_EXP) -#define VRFB_PAGE_HEIGHT (1 << VRFB_PAGE_HEIGHT_EXP) -#define SMS_IMAGEHEIGHT_OFFSET 16 -#define SMS_IMAGEWIDTH_OFFSET 0 -#define SMS_PH_OFFSET 8 -#define SMS_PW_OFFSET 4 -#define SMS_PS_OFFSET 0 - -#define VRFB_NUM_CTXS 12 -/* bitmap of reserved contexts */ -static unsigned long ctx_map; - -static DEFINE_MUTEX(ctx_lock); - -/* - * Access to this happens from client drivers or the PM core after wake-up. - * For the first case we require locking at the driver level, for the second - * we don't need locking, since no drivers will run until after the wake-up - * has finished. - */ -static struct { - u32 physical_ba; - u32 control; - u32 size; -} vrfb_hw_context[VRFB_NUM_CTXS]; - -static inline void restore_hw_context(int ctx) -{ - omap2_sms_write_rot_control(vrfb_hw_context[ctx].control, ctx); - omap2_sms_write_rot_size(vrfb_hw_context[ctx].size, ctx); - omap2_sms_write_rot_physical_ba(vrfb_hw_context[ctx].physical_ba, ctx); -} - -static u32 get_image_width_roundup(u16 width, u8 bytespp) -{ - unsigned long stride = width * bytespp; - unsigned long ceil_pages_per_stride = (stride / VRFB_PAGE_WIDTH) + - (stride % VRFB_PAGE_WIDTH != 0); - - return ceil_pages_per_stride * VRFB_PAGE_WIDTH / bytespp; -} - -/* - * This the extra space needed in the VRFB physical area for VRFB to safely wrap - * any memory accesses to the invisible part of the virtual view to the physical - * area. - */ -static inline u32 get_extra_physical_size(u16 image_width_roundup, u8 bytespp) -{ - return (OMAP_VRFB_LINE_LEN - image_width_roundup) * VRFB_PAGE_HEIGHT * - bytespp; -} - -void omap_vrfb_restore_context(void) -{ - int i; - unsigned long map = ctx_map; - - for (i = ffs(map); i; i = ffs(map)) { - /* i=1..32 */ - i--; - map &= ~(1 << i); - restore_hw_context(i); - } -} - -void omap_vrfb_adjust_size(u16 *width, u16 *height, - u8 bytespp) -{ - *width = ALIGN(*width * bytespp, VRFB_PAGE_WIDTH) / bytespp; - *height = ALIGN(*height, VRFB_PAGE_HEIGHT); -} -EXPORT_SYMBOL(omap_vrfb_adjust_size); - -u32 omap_vrfb_min_phys_size(u16 width, u16 height, u8 bytespp) -{ - unsigned long image_width_roundup = get_image_width_roundup(width, - bytespp); - - if (image_width_roundup > OMAP_VRFB_LINE_LEN) - return 0; - - return (width * height * bytespp) + get_extra_physical_size( - image_width_roundup, bytespp); -} -EXPORT_SYMBOL(omap_vrfb_min_phys_size); - -u16 omap_vrfb_max_height(u32 phys_size, u16 width, u8 bytespp) -{ - unsigned long image_width_roundup = get_image_width_roundup(width, - bytespp); - unsigned long height; - unsigned long extra; - - if (image_width_roundup > OMAP_VRFB_LINE_LEN) - return 0; - - extra = get_extra_physical_size(image_width_roundup, bytespp); - - if (phys_size < extra) - return 0; - - height = (phys_size - extra) / (width * bytespp); - - /* Virtual views provided by VRFB are limited to 2048x2048. */ - return min_t(unsigned long, height, 2048); -} -EXPORT_SYMBOL(omap_vrfb_max_height); - -void omap_vrfb_setup(struct vrfb *vrfb, unsigned long paddr, - u16 width, u16 height, - unsigned bytespp, bool yuv_mode) -{ - unsigned pixel_size_exp; - u16 vrfb_width; - u16 vrfb_height; - u8 ctx = vrfb->context; - u32 size; - u32 control; - - DBG("omapfb_set_vrfb(%d, %lx, %dx%d, %d, %d)\n", ctx, paddr, - width, height, bytespp, yuv_mode); - - /* For YUV2 and UYVY modes VRFB needs to handle pixels a bit - * differently. See TRM. */ - if (yuv_mode) { - bytespp *= 2; - width /= 2; - } - - if (bytespp == 4) - pixel_size_exp = 2; - else if (bytespp == 2) - pixel_size_exp = 1; - else - BUG(); - - vrfb_width = ALIGN(width * bytespp, VRFB_PAGE_WIDTH) / bytespp; - vrfb_height = ALIGN(height, VRFB_PAGE_HEIGHT); - - DBG("vrfb w %u, h %u bytespp %d\n", vrfb_width, vrfb_height, bytespp); - - size = vrfb_width << SMS_IMAGEWIDTH_OFFSET; - size |= vrfb_height << SMS_IMAGEHEIGHT_OFFSET; - - control = pixel_size_exp << SMS_PS_OFFSET; - control |= VRFB_PAGE_WIDTH_EXP << SMS_PW_OFFSET; - control |= VRFB_PAGE_HEIGHT_EXP << SMS_PH_OFFSET; - - vrfb_hw_context[ctx].physical_ba = paddr; - vrfb_hw_context[ctx].size = size; - vrfb_hw_context[ctx].control = control; - - omap2_sms_write_rot_physical_ba(paddr, ctx); - omap2_sms_write_rot_size(size, ctx); - omap2_sms_write_rot_control(control, ctx); - - DBG("vrfb offset pixels %d, %d\n", - vrfb_width - width, vrfb_height - height); - - vrfb->xres = width; - vrfb->yres = height; - vrfb->xoffset = vrfb_width - width; - vrfb->yoffset = vrfb_height - height; - vrfb->bytespp = bytespp; - vrfb->yuv_mode = yuv_mode; -} -EXPORT_SYMBOL(omap_vrfb_setup); - -int omap_vrfb_map_angle(struct vrfb *vrfb, u16 height, u8 rot) -{ - unsigned long size = height * OMAP_VRFB_LINE_LEN * vrfb->bytespp; - - vrfb->vaddr[rot] = ioremap_wc(vrfb->paddr[rot], size); - - if (!vrfb->vaddr[rot]) { - printk(KERN_ERR "vrfb: ioremap failed\n"); - return -ENOMEM; - } - - DBG("ioremapped vrfb area %d of size %lu into %p\n", rot, size, - vrfb->vaddr[rot]); - - return 0; -} -EXPORT_SYMBOL(omap_vrfb_map_angle); - -void omap_vrfb_release_ctx(struct vrfb *vrfb) -{ - int rot; - int ctx = vrfb->context; - - if (ctx == 0xff) - return; - - DBG("release ctx %d\n", ctx); - - mutex_lock(&ctx_lock); - - BUG_ON(!(ctx_map & (1 << ctx))); - - clear_bit(ctx, &ctx_map); - - for (rot = 0; rot < 4; ++rot) { - if (vrfb->paddr[rot]) { - release_mem_region(vrfb->paddr[rot], OMAP_VRFB_SIZE); - vrfb->paddr[rot] = 0; - } - } - - vrfb->context = 0xff; - - mutex_unlock(&ctx_lock); -} -EXPORT_SYMBOL(omap_vrfb_release_ctx); - -int omap_vrfb_request_ctx(struct vrfb *vrfb) -{ - int rot; - u32 paddr; - u8 ctx; - int r; - - DBG("request ctx\n"); - - mutex_lock(&ctx_lock); - - for (ctx = 0; ctx < VRFB_NUM_CTXS; ++ctx) - if ((ctx_map & (1 << ctx)) == 0) - break; - - if (ctx == VRFB_NUM_CTXS) { - pr_err("vrfb: no free contexts\n"); - r = -EBUSY; - goto out; - } - - DBG("found free ctx %d\n", ctx); - - set_bit(ctx, &ctx_map); - - memset(vrfb, 0, sizeof(*vrfb)); - - vrfb->context = ctx; - - for (rot = 0; rot < 4; ++rot) { - paddr = SMS_ROT_VIRT_BASE(ctx, rot); - if (!request_mem_region(paddr, OMAP_VRFB_SIZE, "vrfb")) { - pr_err("vrfb: failed to reserve VRFB " - "area for ctx %d, rotation %d\n", - ctx, rot * 90); - omap_vrfb_release_ctx(vrfb); - r = -ENOMEM; - goto out; - } - - vrfb->paddr[rot] = paddr; - - DBG("VRFB %d/%d: %lx\n", ctx, rot*90, vrfb->paddr[rot]); - } - - r = 0; -out: - mutex_unlock(&ctx_lock); - return r; -} -EXPORT_SYMBOL(omap_vrfb_request_ctx); |