diff options
Diffstat (limited to 'drivers/usb/host/uhci-hcd.c')
| -rw-r--r-- | drivers/usb/host/uhci-hcd.c | 1191 |
1 files changed, 610 insertions, 581 deletions
diff --git a/drivers/usb/host/uhci-hcd.c b/drivers/usb/host/uhci-hcd.c index 49bd83ee0c7..27f35e8f161 100644 --- a/drivers/usb/host/uhci-hcd.c +++ b/drivers/usb/host/uhci-hcd.c @@ -13,35 +13,22 @@ * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com). * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c) - * (C) Copyright 2004 Alan Stern, stern@rowland.harvard.edu + * (C) Copyright 2004-2007 Alan Stern, stern@rowland.harvard.edu * * Intel documents this fairly well, and as far as I know there * are no royalties or anything like that, but even so there are * people who decided that they want to do the same thing in a * completely different way. * - * WARNING! The USB documentation is downright evil. Most of it - * is just crap, written by a committee. You're better off ignoring - * most of it, the important stuff is: - * - the low-level protocol (fairly simple but lots of small details) - * - working around the horridness of the rest */ -#include <linux/config.h> -#ifdef CONFIG_USB_DEBUG -#define DEBUG -#else -#undef DEBUG -#endif #include <linux/module.h> #include <linux/pci.h> #include <linux/kernel.h> #include <linux/init.h> #include <linux/delay.h> #include <linux/ioport.h> -#include <linux/sched.h> #include <linux/slab.h> -#include <linux/smp_lock.h> #include <linux/errno.h> #include <linux/unistd.h> #include <linux/interrupt.h> @@ -51,358 +38,478 @@ #include <linux/dmapool.h> #include <linux/dma-mapping.h> #include <linux/usb.h> +#include <linux/usb/hcd.h> #include <linux/bitops.h> +#include <linux/dmi.h> #include <asm/uaccess.h> #include <asm/io.h> #include <asm/irq.h> -#include <asm/system.h> -#include "../core/hcd.h" #include "uhci-hcd.h" /* * Version Information */ -#define DRIVER_VERSION "v2.2" -#define DRIVER_AUTHOR "Linus 'Frodo Rabbit' Torvalds, Johannes Erdfelt, \ -Randy Dunlap, Georg Acher, Deti Fliegl, Thomas Sailer, Roman Weissgaerber, \ -Alan Stern" +#define DRIVER_AUTHOR \ + "Linus 'Frodo Rabbit' Torvalds, Johannes Erdfelt, " \ + "Randy Dunlap, Georg Acher, Deti Fliegl, Thomas Sailer, " \ + "Roman Weissgaerber, Alan Stern" #define DRIVER_DESC "USB Universal Host Controller Interface driver" +/* for flakey hardware, ignore overcurrent indicators */ +static bool ignore_oc; +module_param(ignore_oc, bool, S_IRUGO); +MODULE_PARM_DESC(ignore_oc, "ignore hardware overcurrent indications"); + /* * debug = 0, no debugging messages - * debug = 1, dump failed URB's except for stalls - * debug = 2, dump all failed URB's (including stalls) - * show all queues in /debug/uhci/[pci_addr] - * debug = 3, show all TD's in URB's when dumping + * debug = 1, dump failed URBs except for stalls + * debug = 2, dump all failed URBs (including stalls) + * show all queues in /sys/kernel/debug/uhci/[pci_addr] + * debug = 3, show all TDs in URBs when dumping */ -#ifdef DEBUG +#ifdef CONFIG_DYNAMIC_DEBUG + static int debug = 1; -#else -static int debug = 0; -#endif module_param(debug, int, S_IRUGO | S_IWUSR); MODULE_PARM_DESC(debug, "Debug level"); static char *errbuf; -#define ERRBUF_LEN (32 * 1024) -static kmem_cache_t *uhci_up_cachep; /* urb_priv */ +#else -static void uhci_get_current_frame_number(struct uhci_hcd *uhci); -static void hc_state_transitions(struct uhci_hcd *uhci); +#define debug 0 +#define errbuf NULL + +#endif -/* If a transfer is still active after this much time, turn off FSBR */ -#define IDLE_TIMEOUT msecs_to_jiffies(50) -#define FSBR_DELAY msecs_to_jiffies(50) -/* When we timeout an idle transfer for FSBR, we'll switch it over to */ -/* depth first traversal. We'll do it in groups of this number of TD's */ -/* to make sure it doesn't hog all of the bandwidth */ -#define DEPTH_INTERVAL 5 +#define ERRBUF_LEN (32 * 1024) -#include "uhci-hub.c" -#include "uhci-debug.c" -#include "uhci-q.c" +static struct kmem_cache *uhci_up_cachep; /* urb_priv */ -static int init_stall_timer(struct usb_hcd *hcd); +static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state); +static void wakeup_rh(struct uhci_hcd *uhci); +static void uhci_get_current_frame_number(struct uhci_hcd *uhci); -static void stall_callback(unsigned long ptr) +/* + * Calculate the link pointer DMA value for the first Skeleton QH in a frame. + */ +static __hc32 uhci_frame_skel_link(struct uhci_hcd *uhci, int frame) { - struct usb_hcd *hcd = (struct usb_hcd *)ptr; - struct uhci_hcd *uhci = hcd_to_uhci(hcd); - struct urb_priv *up; - unsigned long flags; - - spin_lock_irqsave(&uhci->lock, flags); - uhci_scan_schedule(uhci, NULL); + int skelnum; - list_for_each_entry(up, &uhci->urb_list, urb_list) { - struct urb *u = up->urb; + /* + * The interrupt queues will be interleaved as evenly as possible. + * There's not much to be done about period-1 interrupts; they have + * to occur in every frame. But we can schedule period-2 interrupts + * in odd-numbered frames, period-4 interrupts in frames congruent + * to 2 (mod 4), and so on. This way each frame only has two + * interrupt QHs, which will help spread out bandwidth utilization. + * + * ffs (Find First bit Set) does exactly what we need: + * 1,3,5,... => ffs = 0 => use period-2 QH = skelqh[8], + * 2,6,10,... => ffs = 1 => use period-4 QH = skelqh[7], etc. + * ffs >= 7 => not on any high-period queue, so use + * period-1 QH = skelqh[9]. + * Add in UHCI_NUMFRAMES to insure at least one bit is set. + */ + skelnum = 8 - (int) __ffs(frame | UHCI_NUMFRAMES); + if (skelnum <= 1) + skelnum = 9; + return LINK_TO_QH(uhci, uhci->skelqh[skelnum]); +} - spin_lock(&u->lock); +#include "uhci-debug.c" +#include "uhci-q.c" +#include "uhci-hub.c" - /* Check if the FSBR timed out */ - if (up->fsbr && !up->fsbr_timeout && time_after_eq(jiffies, up->fsbrtime + IDLE_TIMEOUT)) - uhci_fsbr_timeout(uhci, u); +/* + * Finish up a host controller reset and update the recorded state. + */ +static void finish_reset(struct uhci_hcd *uhci) +{ + int port; - spin_unlock(&u->lock); - } + /* HCRESET doesn't affect the Suspend, Reset, and Resume Detect + * bits in the port status and control registers. + * We have to clear them by hand. + */ + for (port = 0; port < uhci->rh_numports; ++port) + uhci_writew(uhci, 0, USBPORTSC1 + (port * 2)); - /* Really disable FSBR */ - if (!uhci->fsbr && uhci->fsbrtimeout && time_after_eq(jiffies, uhci->fsbrtimeout)) { - uhci->fsbrtimeout = 0; - uhci->skel_term_qh->link = UHCI_PTR_TERM; - } + uhci->port_c_suspend = uhci->resuming_ports = 0; + uhci->rh_state = UHCI_RH_RESET; + uhci->is_stopped = UHCI_IS_STOPPED; + clear_bit(HCD_FLAG_POLL_RH, &uhci_to_hcd(uhci)->flags); +} - /* Poll for and perform state transitions */ - hc_state_transitions(uhci); - if (unlikely(uhci->suspended_ports && uhci->state != UHCI_SUSPENDED)) - uhci_check_ports(uhci); +/* + * Last rites for a defunct/nonfunctional controller + * or one we don't want to use any more. + */ +static void uhci_hc_died(struct uhci_hcd *uhci) +{ + uhci_get_current_frame_number(uhci); + uhci->reset_hc(uhci); + finish_reset(uhci); + uhci->dead = 1; - init_stall_timer(hcd); - spin_unlock_irqrestore(&uhci->lock, flags); + /* The current frame may already be partway finished */ + ++uhci->frame_number; } -static int init_stall_timer(struct usb_hcd *hcd) +/* + * Initialize a controller that was newly discovered or has lost power + * or otherwise been reset while it was suspended. In none of these cases + * can we be sure of its previous state. + */ +static void check_and_reset_hc(struct uhci_hcd *uhci) { - struct uhci_hcd *uhci = hcd_to_uhci(hcd); + if (uhci->check_and_reset_hc(uhci)) + finish_reset(uhci); +} - init_timer(&uhci->stall_timer); - uhci->stall_timer.function = stall_callback; - uhci->stall_timer.data = (unsigned long)hcd; - uhci->stall_timer.expires = jiffies + msecs_to_jiffies(100); - add_timer(&uhci->stall_timer); +#if defined(CONFIG_USB_UHCI_SUPPORT_NON_PCI_HC) +/* + * The two functions below are generic reset functions that are used on systems + * that do not have keyboard and mouse legacy support. We assume that we are + * running on such a system if CONFIG_USB_UHCI_SUPPORT_NON_PCI_HC is defined. + */ - return 0; +/* + * Make sure the controller is completely inactive, unable to + * generate interrupts or do DMA. + */ +static void uhci_generic_reset_hc(struct uhci_hcd *uhci) +{ + /* Reset the HC - this will force us to get a + * new notification of any already connected + * ports due to the virtual disconnect that it + * implies. + */ + uhci_writew(uhci, USBCMD_HCRESET, USBCMD); + mb(); + udelay(5); + if (uhci_readw(uhci, USBCMD) & USBCMD_HCRESET) + dev_warn(uhci_dev(uhci), "HCRESET not completed yet!\n"); + + /* Just to be safe, disable interrupt requests and + * make sure the controller is stopped. + */ + uhci_writew(uhci, 0, USBINTR); + uhci_writew(uhci, 0, USBCMD); } -static irqreturn_t uhci_irq(struct usb_hcd *hcd, struct pt_regs *regs) +/* + * Initialize a controller that was newly discovered or has just been + * resumed. In either case we can't be sure of its previous state. + * + * Returns: 1 if the controller was reset, 0 otherwise. + */ +static int uhci_generic_check_and_reset_hc(struct uhci_hcd *uhci) { - struct uhci_hcd *uhci = hcd_to_uhci(hcd); - unsigned long io_addr = uhci->io_addr; - unsigned short status; + unsigned int cmd, intr; /* - * Read the interrupt status, and write it back to clear the - * interrupt cause. Contrary to the UHCI specification, the - * "HC Halted" status bit is persistent: it is RO, not R/WC. + * When restarting a suspended controller, we expect all the + * settings to be the same as we left them: + * + * Controller is stopped and configured with EGSM set; + * No interrupts enabled except possibly Resume Detect. + * + * If any of these conditions are violated we do a complete reset. */ - status = inw(io_addr + USBSTS); - if (!(status & ~USBSTS_HCH)) /* shared interrupt, not mine */ - return IRQ_NONE; - outw(status, io_addr + USBSTS); /* Clear it */ - if (status & ~(USBSTS_USBINT | USBSTS_ERROR | USBSTS_RD)) { - if (status & USBSTS_HSE) - dev_err(uhci_dev(uhci), "host system error, " - "PCI problems?\n"); - if (status & USBSTS_HCPE) - dev_err(uhci_dev(uhci), "host controller process " - "error, something bad happened!\n"); - if ((status & USBSTS_HCH) && uhci->state > 0) { - dev_err(uhci_dev(uhci), "host controller halted, " - "very bad!\n"); - /* FIXME: Reset the controller, fix the offending TD */ - } + cmd = uhci_readw(uhci, USBCMD); + if ((cmd & USBCMD_RS) || !(cmd & USBCMD_CF) || !(cmd & USBCMD_EGSM)) { + dev_dbg(uhci_dev(uhci), "%s: cmd = 0x%04x\n", + __func__, cmd); + goto reset_needed; } - if (status & USBSTS_RD) - uhci->resume_detect = 1; - - spin_lock(&uhci->lock); - uhci_scan_schedule(uhci, regs); - spin_unlock(&uhci->lock); + intr = uhci_readw(uhci, USBINTR); + if (intr & (~USBINTR_RESUME)) { + dev_dbg(uhci_dev(uhci), "%s: intr = 0x%04x\n", + __func__, intr); + goto reset_needed; + } + return 0; - return IRQ_HANDLED; +reset_needed: + dev_dbg(uhci_dev(uhci), "Performing full reset\n"); + uhci_generic_reset_hc(uhci); + return 1; } +#endif /* CONFIG_USB_UHCI_SUPPORT_NON_PCI_HC */ -static void reset_hc(struct uhci_hcd *uhci) +/* + * Store the basic register settings needed by the controller. + */ +static void configure_hc(struct uhci_hcd *uhci) { - unsigned long io_addr = uhci->io_addr; + /* Set the frame length to the default: 1 ms exactly */ + uhci_writeb(uhci, USBSOF_DEFAULT, USBSOF); - /* Turn off PIRQ, SMI, and all interrupts. This also turns off - * the BIOS's USB Legacy Support. - */ - pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, 0); - outw(0, uhci->io_addr + USBINTR); - - /* Global reset for 50ms */ - uhci->state = UHCI_RESET; - outw(USBCMD_GRESET, io_addr + USBCMD); - msleep(50); - outw(0, io_addr + USBCMD); - - /* Another 10ms delay */ - msleep(10); - uhci->resume_detect = 0; - uhci->is_stopped = UHCI_IS_STOPPED; + /* Store the frame list base address */ + uhci_writel(uhci, uhci->frame_dma_handle, USBFLBASEADD); + + /* Set the current frame number */ + uhci_writew(uhci, uhci->frame_number & UHCI_MAX_SOF_NUMBER, + USBFRNUM); + + /* perform any arch/bus specific configuration */ + if (uhci->configure_hc) + uhci->configure_hc(uhci); } -static void suspend_hc(struct uhci_hcd *uhci) +static int resume_detect_interrupts_are_broken(struct uhci_hcd *uhci) { - unsigned long io_addr = uhci->io_addr; - - dev_dbg(uhci_dev(uhci), "%s\n", __FUNCTION__); - uhci->state = UHCI_SUSPENDED; - uhci->resume_detect = 0; - outw(USBCMD_EGSM, io_addr + USBCMD); + /* If we have to ignore overcurrent events then almost by definition + * we can't depend on resume-detect interrupts. */ + if (ignore_oc) + return 1; - /* FIXME: Wait for the controller to actually stop */ - uhci_get_current_frame_number(uhci); - uhci->is_stopped = UHCI_IS_STOPPED; + return uhci->resume_detect_interrupts_are_broken ? + uhci->resume_detect_interrupts_are_broken(uhci) : 0; +} - uhci_scan_schedule(uhci, NULL); +static int global_suspend_mode_is_broken(struct uhci_hcd *uhci) +{ + return uhci->global_suspend_mode_is_broken ? + uhci->global_suspend_mode_is_broken(uhci) : 0; } -static void wakeup_hc(struct uhci_hcd *uhci) +static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state) +__releases(uhci->lock) +__acquires(uhci->lock) { - unsigned long io_addr = uhci->io_addr; + int auto_stop; + int int_enable, egsm_enable, wakeup_enable; + struct usb_device *rhdev = uhci_to_hcd(uhci)->self.root_hub; - switch (uhci->state) { - case UHCI_SUSPENDED: /* Start the resume */ - dev_dbg(uhci_dev(uhci), "%s\n", __FUNCTION__); + auto_stop = (new_state == UHCI_RH_AUTO_STOPPED); + dev_dbg(&rhdev->dev, "%s%s\n", __func__, + (auto_stop ? " (auto-stop)" : "")); - /* Global resume for >= 20ms */ - outw(USBCMD_FGR | USBCMD_EGSM, io_addr + USBCMD); - uhci->state = UHCI_RESUMING_1; - uhci->state_end = jiffies + msecs_to_jiffies(20); - uhci->is_stopped = 0; - break; + /* Start off by assuming Resume-Detect interrupts and EGSM work + * and that remote wakeups should be enabled. + */ + egsm_enable = USBCMD_EGSM; + int_enable = USBINTR_RESUME; + wakeup_enable = 1; - case UHCI_RESUMING_1: /* End global resume */ - uhci->state = UHCI_RESUMING_2; - outw(0, io_addr + USBCMD); - /* Falls through */ - - case UHCI_RESUMING_2: /* Wait for EOP to be sent */ - if (inw(io_addr + USBCMD) & USBCMD_FGR) - break; - - /* Run for at least 1 second, and - * mark it configured with a 64-byte max packet */ - uhci->state = UHCI_RUNNING_GRACE; - uhci->state_end = jiffies + HZ; - outw(USBCMD_RS | USBCMD_CF | USBCMD_MAXP, - io_addr + USBCMD); - break; + /* + * In auto-stop mode, we must be able to detect new connections. + * The user can force us to poll by disabling remote wakeup; + * otherwise we will use the EGSM/RD mechanism. + */ + if (auto_stop) { + if (!device_may_wakeup(&rhdev->dev)) + egsm_enable = int_enable = 0; + } - case UHCI_RUNNING_GRACE: /* Now allowed to suspend */ - uhci->state = UHCI_RUNNING; - break; +#ifdef CONFIG_PM + /* + * In bus-suspend mode, we use the wakeup setting specified + * for the root hub. + */ + else { + if (!rhdev->do_remote_wakeup) + wakeup_enable = 0; + } +#endif - default: - break; + /* + * UHCI doesn't distinguish between wakeup requests from downstream + * devices and local connect/disconnect events. There's no way to + * enable one without the other; both are controlled by EGSM. Thus + * if wakeups are disallowed then EGSM must be turned off -- in which + * case remote wakeup requests from downstream during system sleep + * will be lost. + * + * In addition, if EGSM is broken then we can't use it. Likewise, + * if Resume-Detect interrupts are broken then we can't use them. + * + * Finally, neither EGSM nor RD is useful by itself. Without EGSM, + * the RD status bit will never get set. Without RD, the controller + * won't generate interrupts to tell the system about wakeup events. + */ + if (!wakeup_enable || global_suspend_mode_is_broken(uhci) || + resume_detect_interrupts_are_broken(uhci)) + egsm_enable = int_enable = 0; + + uhci->RD_enable = !!int_enable; + uhci_writew(uhci, int_enable, USBINTR); + uhci_writew(uhci, egsm_enable | USBCMD_CF, USBCMD); + mb(); + udelay(5); + + /* If we're auto-stopping then no devices have been attached + * for a while, so there shouldn't be any active URBs and the + * controller should stop after a few microseconds. Otherwise + * we will give the controller one frame to stop. + */ + if (!auto_stop && !(uhci_readw(uhci, USBSTS) & USBSTS_HCH)) { + uhci->rh_state = UHCI_RH_SUSPENDING; + spin_unlock_irq(&uhci->lock); + msleep(1); + spin_lock_irq(&uhci->lock); + if (uhci->dead) + return; } -} + if (!(uhci_readw(uhci, USBSTS) & USBSTS_HCH)) + dev_warn(uhci_dev(uhci), "Controller not stopped yet!\n"); -static int ports_active(struct uhci_hcd *uhci) -{ - unsigned long io_addr = uhci->io_addr; - int connection = 0; - int i; + uhci_get_current_frame_number(uhci); - for (i = 0; i < uhci->rh_numports; i++) - connection |= (inw(io_addr + USBPORTSC1 + i * 2) & USBPORTSC_CCS); + uhci->rh_state = new_state; + uhci->is_stopped = UHCI_IS_STOPPED; - return connection; + /* + * If remote wakeup is enabled but either EGSM or RD interrupts + * doesn't work, then we won't get an interrupt when a wakeup event + * occurs. Thus the suspended root hub needs to be polled. + */ + if (wakeup_enable && (!int_enable || !egsm_enable)) + set_bit(HCD_FLAG_POLL_RH, &uhci_to_hcd(uhci)->flags); + else + clear_bit(HCD_FLAG_POLL_RH, &uhci_to_hcd(uhci)->flags); + + uhci_scan_schedule(uhci); + uhci_fsbr_off(uhci); } -static int suspend_allowed(struct uhci_hcd *uhci) +static void start_rh(struct uhci_hcd *uhci) { - unsigned long io_addr = uhci->io_addr; - int i; + uhci->is_stopped = 0; - if (to_pci_dev(uhci_dev(uhci))->vendor != PCI_VENDOR_ID_INTEL) - return 1; + /* Mark it configured and running with a 64-byte max packet. + * All interrupts are enabled, even though RESUME won't do anything. + */ + uhci_writew(uhci, USBCMD_RS | USBCMD_CF | USBCMD_MAXP, USBCMD); + uhci_writew(uhci, USBINTR_TIMEOUT | USBINTR_RESUME | + USBINTR_IOC | USBINTR_SP, USBINTR); + mb(); + uhci->rh_state = UHCI_RH_RUNNING; + set_bit(HCD_FLAG_POLL_RH, &uhci_to_hcd(uhci)->flags); +} - /* Some of Intel's USB controllers have a bug that causes false - * resume indications if any port has an over current condition. - * To prevent problems, we will not allow a global suspend if - * any ports are OC. - * - * Some motherboards using Intel's chipsets (but not using all - * the USB ports) appear to hardwire the over current inputs active - * to disable the USB ports. +static void wakeup_rh(struct uhci_hcd *uhci) +__releases(uhci->lock) +__acquires(uhci->lock) +{ + dev_dbg(&uhci_to_hcd(uhci)->self.root_hub->dev, + "%s%s\n", __func__, + uhci->rh_state == UHCI_RH_AUTO_STOPPED ? + " (auto-start)" : ""); + + /* If we are auto-stopped then no devices are attached so there's + * no need for wakeup signals. Otherwise we send Global Resume + * for 20 ms. */ + if (uhci->rh_state == UHCI_RH_SUSPENDED) { + unsigned egsm; - /* check for over current condition on any port */ - for (i = 0; i < uhci->rh_numports; i++) { - if (inw(io_addr + USBPORTSC1 + i * 2) & USBPORTSC_OC) - return 0; + /* Keep EGSM on if it was set before */ + egsm = uhci_readw(uhci, USBCMD) & USBCMD_EGSM; + uhci->rh_state = UHCI_RH_RESUMING; + uhci_writew(uhci, USBCMD_FGR | USBCMD_CF | egsm, USBCMD); + spin_unlock_irq(&uhci->lock); + msleep(20); + spin_lock_irq(&uhci->lock); + if (uhci->dead) + return; + + /* End Global Resume and wait for EOP to be sent */ + uhci_writew(uhci, USBCMD_CF, USBCMD); + mb(); + udelay(4); + if (uhci_readw(uhci, USBCMD) & USBCMD_FGR) + dev_warn(uhci_dev(uhci), "FGR not stopped yet!\n"); } - return 1; + start_rh(uhci); + + /* Restart root hub polling */ + mod_timer(&uhci_to_hcd(uhci)->rh_timer, jiffies); } -static void hc_state_transitions(struct uhci_hcd *uhci) +static irqreturn_t uhci_irq(struct usb_hcd *hcd) { - switch (uhci->state) { - case UHCI_RUNNING: - - /* global suspend if nothing connected for 1 second */ - if (!ports_active(uhci) && suspend_allowed(uhci)) { - uhci->state = UHCI_SUSPENDING_GRACE; - uhci->state_end = jiffies + HZ; - } - break; - - case UHCI_SUSPENDING_GRACE: - if (ports_active(uhci)) - uhci->state = UHCI_RUNNING; - else if (time_after_eq(jiffies, uhci->state_end)) - suspend_hc(uhci); - break; + struct uhci_hcd *uhci = hcd_to_uhci(hcd); + unsigned short status; - case UHCI_SUSPENDED: + /* + * Read the interrupt status, and write it back to clear the + * interrupt cause. Contrary to the UHCI specification, the + * "HC Halted" status bit is persistent: it is RO, not R/WC. + */ + status = uhci_readw(uhci, USBSTS); + if (!(status & ~USBSTS_HCH)) /* shared interrupt, not mine */ + return IRQ_NONE; + uhci_writew(uhci, status, USBSTS); /* Clear it */ - /* wakeup if requested by a device */ - if (uhci->resume_detect) - wakeup_hc(uhci); - break; + spin_lock(&uhci->lock); + if (unlikely(!uhci->is_initialized)) /* not yet configured */ + goto done; - case UHCI_RESUMING_1: - case UHCI_RESUMING_2: - case UHCI_RUNNING_GRACE: - if (time_after_eq(jiffies, uhci->state_end)) - wakeup_hc(uhci); - break; + if (status & ~(USBSTS_USBINT | USBSTS_ERROR | USBSTS_RD)) { + if (status & USBSTS_HSE) + dev_err(uhci_dev(uhci), + "host system error, PCI problems?\n"); + if (status & USBSTS_HCPE) + dev_err(uhci_dev(uhci), + "host controller process error, something bad happened!\n"); + if (status & USBSTS_HCH) { + if (uhci->rh_state >= UHCI_RH_RUNNING) { + dev_err(uhci_dev(uhci), + "host controller halted, very bad!\n"); + if (debug > 1 && errbuf) { + /* Print the schedule for debugging */ + uhci_sprint_schedule(uhci, errbuf, + ERRBUF_LEN - EXTRA_SPACE); + lprintk(errbuf); + } + uhci_hc_died(uhci); + usb_hc_died(hcd); + + /* Force a callback in case there are + * pending unlinks */ + mod_timer(&hcd->rh_timer, jiffies); + } + } + } - default: - break; + if (status & USBSTS_RD) { + spin_unlock(&uhci->lock); + usb_hcd_poll_rh_status(hcd); + } else { + uhci_scan_schedule(uhci); + done: + spin_unlock(&uhci->lock); } + + return IRQ_HANDLED; } /* * Store the current frame number in uhci->frame_number if the controller - * is runnning + * is running. Expand from 11 bits (of which we use only 10) to a + * full-sized integer. + * + * Like many other parts of the driver, this code relies on being polled + * more than once per second as long as the controller is running. */ static void uhci_get_current_frame_number(struct uhci_hcd *uhci) { - if (!uhci->is_stopped) - uhci->frame_number = inw(uhci->io_addr + USBFRNUM); -} - -static int start_hc(struct uhci_hcd *uhci) -{ - unsigned long io_addr = uhci->io_addr; - int timeout = 10; + if (!uhci->is_stopped) { + unsigned delta; - /* - * Reset the HC - this will force us to get a - * new notification of any already connected - * ports due to the virtual disconnect that it - * implies. - */ - outw(USBCMD_HCRESET, io_addr + USBCMD); - while (inw(io_addr + USBCMD) & USBCMD_HCRESET) { - if (--timeout < 0) { - dev_err(uhci_dev(uhci), "USBCMD_HCRESET timed out!\n"); - return -ETIMEDOUT; - } - msleep(1); + delta = (uhci_readw(uhci, USBFRNUM) - uhci->frame_number) & + (UHCI_NUMFRAMES - 1); + uhci->frame_number += delta; } - - /* Mark controller as running before we enable interrupts */ - uhci_to_hcd(uhci)->state = HC_STATE_RUNNING; - - /* Turn on PIRQ and all interrupts */ - pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, - USBLEGSUP_DEFAULT); - outw(USBINTR_TIMEOUT | USBINTR_RESUME | USBINTR_IOC | USBINTR_SP, - io_addr + USBINTR); - - /* Start at frame 0 */ - outw(0, io_addr + USBFRNUM); - outl(uhci->fl->dma_handle, io_addr + USBFLBASEADD); - - /* Run and mark it configured with a 64-byte max packet */ - uhci->state = UHCI_RUNNING_GRACE; - uhci->state_end = jiffies + HZ; - outw(USBCMD_RS | USBCMD_CF | USBCMD_MAXP, io_addr + USBCMD); - uhci->is_stopped = 0; - - return 0; } /* @@ -412,50 +519,27 @@ static void release_uhci(struct uhci_hcd *uhci) { int i; - for (i = 0; i < UHCI_NUM_SKELQH; i++) - if (uhci->skelqh[i]) { - uhci_free_qh(uhci, uhci->skelqh[i]); - uhci->skelqh[i] = NULL; - } - if (uhci->term_td) { - uhci_free_td(uhci, uhci->term_td); - uhci->term_td = NULL; - } + spin_lock_irq(&uhci->lock); + uhci->is_initialized = 0; + spin_unlock_irq(&uhci->lock); - if (uhci->qh_pool) { - dma_pool_destroy(uhci->qh_pool); - uhci->qh_pool = NULL; - } + debugfs_remove(uhci->dentry); - if (uhci->td_pool) { - dma_pool_destroy(uhci->td_pool); - uhci->td_pool = NULL; - } + for (i = 0; i < UHCI_NUM_SKELQH; i++) + uhci_free_qh(uhci, uhci->skelqh[i]); - if (uhci->fl) { - dma_free_coherent(uhci_dev(uhci), sizeof(*uhci->fl), - uhci->fl, uhci->fl->dma_handle); - uhci->fl = NULL; - } + uhci_free_td(uhci, uhci->term_td); - if (uhci->dentry) { - debugfs_remove(uhci->dentry); - uhci->dentry = NULL; - } -} + dma_pool_destroy(uhci->qh_pool); -static int uhci_reset(struct usb_hcd *hcd) -{ - struct uhci_hcd *uhci = hcd_to_uhci(hcd); + dma_pool_destroy(uhci->td_pool); - uhci->io_addr = (unsigned long) hcd->rsrc_start; + kfree(uhci->frame_cpu); - /* Kick BIOS off this hardware and reset, so we won't get - * interrupts from any previous setup. - */ - reset_hc(uhci); - return 0; + dma_free_coherent(uhci_dev(uhci), + UHCI_NUMFRAMES * sizeof(*uhci->frame), + uhci->frame, uhci->frame_dma_handle); } /* @@ -463,64 +547,65 @@ static int uhci_reset(struct usb_hcd *hcd) * * The hardware doesn't really know any difference * in the queues, but the order does matter for the - * protocols higher up. The order is: + * protocols higher up. The order in which the queues + * are encountered by the hardware is: * - * - any isochronous events handled before any + * - All isochronous events are handled before any * of the queues. We don't do that here, because * we'll create the actual TD entries on demand. - * - The first queue is the interrupt queue. - * - The second queue is the control queue, split into low- and full-speed - * - The third queue is bulk queue. - * - The fourth queue is the bandwidth reclamation queue, which loops back - * to the full-speed control queue. + * - The first queue is the high-period interrupt queue. + * - The second queue is the period-1 interrupt and async + * (low-speed control, full-speed control, then bulk) queue. + * - The third queue is the terminating bandwidth reclamation queue, + * which contains no members, loops back to itself, and is present + * only when FSBR is on and there are no full-speed control or bulk QHs. */ static int uhci_start(struct usb_hcd *hcd) { struct uhci_hcd *uhci = hcd_to_uhci(hcd); int retval = -EBUSY; - int i, port; - unsigned io_size; - dma_addr_t dma_handle; - struct usb_device *udev; - struct dentry *dentry; + int i; + struct dentry __maybe_unused *dentry; - io_size = (unsigned) hcd->rsrc_len; + hcd->uses_new_polling = 1; + /* Accept arbitrarily long scatter-gather lists */ + if (!(hcd->driver->flags & HCD_LOCAL_MEM)) + hcd->self.sg_tablesize = ~0; + + spin_lock_init(&uhci->lock); + setup_timer(&uhci->fsbr_timer, uhci_fsbr_timeout, + (unsigned long) uhci); + INIT_LIST_HEAD(&uhci->idle_qh_list); + init_waitqueue_head(&uhci->waitqh); - dentry = debugfs_create_file(hcd->self.bus_name, S_IFREG|S_IRUGO|S_IWUSR, uhci_debugfs_root, uhci, &uhci_debug_operations); +#ifdef UHCI_DEBUG_OPS + dentry = debugfs_create_file(hcd->self.bus_name, + S_IFREG|S_IRUGO|S_IWUSR, uhci_debugfs_root, + uhci, &uhci_debug_operations); if (!dentry) { dev_err(uhci_dev(uhci), "couldn't create uhci debugfs entry\n"); - retval = -ENOMEM; - goto err_create_debug_entry; + return -ENOMEM; } uhci->dentry = dentry; +#endif - uhci->fsbr = 0; - uhci->fsbrtimeout = 0; - - spin_lock_init(&uhci->lock); - INIT_LIST_HEAD(&uhci->qh_remove_list); - - INIT_LIST_HEAD(&uhci->td_remove_list); - - INIT_LIST_HEAD(&uhci->urb_remove_list); - - INIT_LIST_HEAD(&uhci->urb_list); - - INIT_LIST_HEAD(&uhci->complete_list); - - init_waitqueue_head(&uhci->waitqh); - - uhci->fl = dma_alloc_coherent(uhci_dev(uhci), sizeof(*uhci->fl), - &dma_handle, 0); - if (!uhci->fl) { - dev_err(uhci_dev(uhci), "unable to allocate " - "consistent memory for frame list\n"); - goto err_alloc_fl; + uhci->frame = dma_alloc_coherent(uhci_dev(uhci), + UHCI_NUMFRAMES * sizeof(*uhci->frame), + &uhci->frame_dma_handle, 0); + if (!uhci->frame) { + dev_err(uhci_dev(uhci), + "unable to allocate consistent memory for frame list\n"); + goto err_alloc_frame; + } + memset(uhci->frame, 0, UHCI_NUMFRAMES * sizeof(*uhci->frame)); + + uhci->frame_cpu = kcalloc(UHCI_NUMFRAMES, sizeof(*uhci->frame_cpu), + GFP_KERNEL); + if (!uhci->frame_cpu) { + dev_err(uhci_dev(uhci), + "unable to allocate memory for frame pointers\n"); + goto err_alloc_frame_cpu; } - - memset((void *)uhci->fl, 0, sizeof(*uhci->fl)); - - uhci->fl->dma_handle = dma_handle; uhci->td_pool = dma_pool_create("uhci_td", uhci_dev(uhci), sizeof(struct uhci_td), 16, 0); @@ -536,46 +621,14 @@ static int uhci_start(struct usb_hcd *hcd) goto err_create_qh_pool; } - /* Initialize the root hub */ - - /* UHCI specs says devices must have 2 ports, but goes on to say */ - /* they may have more but give no way to determine how many they */ - /* have. However, according to the UHCI spec, Bit 7 is always set */ - /* to 1. So we try to use this to our advantage */ - for (port = 0; port < (io_size - 0x10) / 2; port++) { - unsigned int portstatus; - - portstatus = inw(uhci->io_addr + 0x10 + (port * 2)); - if (!(portstatus & 0x0080)) - break; - } - if (debug) - dev_info(uhci_dev(uhci), "detected %d ports\n", port); - - /* This is experimental so anything less than 2 or greater than 8 is */ - /* something weird and we'll ignore it */ - if (port < 2 || port > UHCI_RH_MAXCHILD) { - dev_info(uhci_dev(uhci), "port count misdetected? " - "forcing to 2 ports\n"); - port = 2; - } - - uhci->rh_numports = port; - - udev = usb_alloc_dev(NULL, &hcd->self, 0); - if (!udev) { - dev_err(uhci_dev(uhci), "unable to allocate root hub\n"); - goto err_alloc_root_hub; - } - - uhci->term_td = uhci_alloc_td(uhci, udev); + uhci->term_td = uhci_alloc_td(uhci); if (!uhci->term_td) { dev_err(uhci_dev(uhci), "unable to allocate terminating TD\n"); goto err_alloc_term_td; } for (i = 0; i < UHCI_NUM_SKELQH; i++) { - uhci->skelqh[i] = uhci_alloc_qh(uhci, udev); + uhci->skelqh[i] = uhci_alloc_qh(uhci, NULL, NULL); if (!uhci->skelqh[i]) { dev_err(uhci_dev(uhci), "unable to allocate QH\n"); goto err_alloc_skelqh; @@ -583,121 +636,71 @@ static int uhci_start(struct usb_hcd *hcd) } /* - * 8 Interrupt queues; link all higher int queues to int1, - * then link int1 to control and control to bulk + * 8 Interrupt queues; link all higher int queues to int1 = async */ - uhci->skel_int128_qh->link = - uhci->skel_int64_qh->link = - uhci->skel_int32_qh->link = - uhci->skel_int16_qh->link = - uhci->skel_int8_qh->link = - uhci->skel_int4_qh->link = - uhci->skel_int2_qh->link = - cpu_to_le32(uhci->skel_int1_qh->dma_handle) | UHCI_PTR_QH; - uhci->skel_int1_qh->link = cpu_to_le32(uhci->skel_ls_control_qh->dma_handle) | UHCI_PTR_QH; - - uhci->skel_ls_control_qh->link = cpu_to_le32(uhci->skel_fs_control_qh->dma_handle) | UHCI_PTR_QH; - uhci->skel_fs_control_qh->link = cpu_to_le32(uhci->skel_bulk_qh->dma_handle) | UHCI_PTR_QH; - uhci->skel_bulk_qh->link = cpu_to_le32(uhci->skel_term_qh->dma_handle) | UHCI_PTR_QH; + for (i = SKEL_ISO + 1; i < SKEL_ASYNC; ++i) + uhci->skelqh[i]->link = LINK_TO_QH(uhci, uhci->skel_async_qh); + uhci->skel_async_qh->link = UHCI_PTR_TERM(uhci); + uhci->skel_term_qh->link = LINK_TO_QH(uhci, uhci->skel_term_qh); /* This dummy TD is to work around a bug in Intel PIIX controllers */ - uhci_fill_td(uhci->term_td, 0, (UHCI_NULL_DATA_SIZE << 21) | - (0x7f << TD_TOKEN_DEVADDR_SHIFT) | USB_PID_IN, 0); - uhci->term_td->link = cpu_to_le32(uhci->term_td->dma_handle); - - uhci->skel_term_qh->link = UHCI_PTR_TERM; - uhci->skel_term_qh->element = cpu_to_le32(uhci->term_td->dma_handle); + uhci_fill_td(uhci, uhci->term_td, 0, uhci_explen(0) | + (0x7f << TD_TOKEN_DEVADDR_SHIFT) | USB_PID_IN, 0); + uhci->term_td->link = UHCI_PTR_TERM(uhci); + uhci->skel_async_qh->element = uhci->skel_term_qh->element = + LINK_TO_TD(uhci, uhci->term_td); /* * Fill the frame list: make all entries point to the proper * interrupt queue. - * - * The interrupt queues will be interleaved as evenly as possible. - * There's not much to be done about period-1 interrupts; they have - * to occur in every frame. But we can schedule period-2 interrupts - * in odd-numbered frames, period-4 interrupts in frames congruent - * to 2 (mod 4), and so on. This way each frame only has two - * interrupt QHs, which will help spread out bandwidth utilization. */ for (i = 0; i < UHCI_NUMFRAMES; i++) { - int irq; - - /* - * ffs (Find First bit Set) does exactly what we need: - * 1,3,5,... => ffs = 0 => use skel_int2_qh = skelqh[6], - * 2,6,10,... => ffs = 1 => use skel_int4_qh = skelqh[5], etc. - * ffs > 6 => not on any high-period queue, so use - * skel_int1_qh = skelqh[7]. - * Add UHCI_NUMFRAMES to insure at least one bit is set. - */ - irq = 6 - (int) __ffs(i + UHCI_NUMFRAMES); - if (irq < 0) - irq = 7; /* Only place we don't use the frame list routines */ - uhci->fl->frame[i] = UHCI_PTR_QH | - cpu_to_le32(uhci->skelqh[irq]->dma_handle); + uhci->frame[i] = uhci_frame_skel_link(uhci, i); } /* * Some architectures require a full mb() to enforce completion of - * the memory writes above before the I/O transfers in start_hc(). + * the memory writes above before the I/O transfers in configure_hc(). */ mb(); - if ((retval = start_hc(uhci)) != 0) - goto err_alloc_skelqh; - - init_stall_timer(hcd); - - udev->speed = USB_SPEED_FULL; - - if (usb_hcd_register_root_hub(udev, hcd) != 0) { - dev_err(uhci_dev(uhci), "unable to start root hub\n"); - retval = -ENOMEM; - goto err_start_root_hub; - } + spin_lock_irq(&uhci->lock); + configure_hc(uhci); + uhci->is_initialized = 1; + start_rh(uhci); + spin_unlock_irq(&uhci->lock); return 0; /* * error exits: */ -err_start_root_hub: - reset_hc(uhci); - - del_timer_sync(&uhci->stall_timer); - err_alloc_skelqh: - for (i = 0; i < UHCI_NUM_SKELQH; i++) - if (uhci->skelqh[i]) { + for (i = 0; i < UHCI_NUM_SKELQH; i++) { + if (uhci->skelqh[i]) uhci_free_qh(uhci, uhci->skelqh[i]); - uhci->skelqh[i] = NULL; - } + } uhci_free_td(uhci, uhci->term_td); - uhci->term_td = NULL; err_alloc_term_td: - usb_put_dev(udev); - -err_alloc_root_hub: dma_pool_destroy(uhci->qh_pool); - uhci->qh_pool = NULL; err_create_qh_pool: dma_pool_destroy(uhci->td_pool); - uhci->td_pool = NULL; err_create_td_pool: - dma_free_coherent(uhci_dev(uhci), sizeof(*uhci->fl), - uhci->fl, uhci->fl->dma_handle); - uhci->fl = NULL; + kfree(uhci->frame_cpu); -err_alloc_fl: +err_alloc_frame_cpu: + dma_free_coherent(uhci_dev(uhci), + UHCI_NUMFRAMES * sizeof(*uhci->frame), + uhci->frame, uhci->frame_dma_handle); + +err_alloc_frame: debugfs_remove(uhci->dentry); - uhci->dentry = NULL; -err_create_debug_entry: return retval; } @@ -705,207 +708,233 @@ static void uhci_stop(struct usb_hcd *hcd) { struct uhci_hcd *uhci = hcd_to_uhci(hcd); - del_timer_sync(&uhci->stall_timer); - reset_hc(uhci); - spin_lock_irq(&uhci->lock); - uhci_scan_schedule(uhci, NULL); + if (HCD_HW_ACCESSIBLE(hcd) && !uhci->dead) + uhci_hc_died(uhci); + uhci_scan_schedule(uhci); spin_unlock_irq(&uhci->lock); - + synchronize_irq(hcd->irq); + + del_timer_sync(&uhci->fsbr_timer); release_uhci(uhci); } #ifdef CONFIG_PM -static int uhci_suspend(struct usb_hcd *hcd, pm_message_t message) +static int uhci_rh_suspend(struct usb_hcd *hcd) { struct uhci_hcd *uhci = hcd_to_uhci(hcd); + int rc = 0; spin_lock_irq(&uhci->lock); + if (!HCD_HW_ACCESSIBLE(hcd)) + rc = -ESHUTDOWN; + else if (uhci->dead) + ; /* Dead controllers tell no tales */ + + /* Once the controller is stopped, port resumes that are already + * in progress won't complete. Hence if remote wakeup is enabled + * for the root hub and any ports are in the middle of a resume or + * remote wakeup, we must fail the suspend. + */ + else if (hcd->self.root_hub->do_remote_wakeup && + uhci->resuming_ports) { + dev_dbg(uhci_dev(uhci), + "suspend failed because a port is resuming\n"); + rc = -EBUSY; + } else + suspend_rh(uhci, UHCI_RH_SUSPENDED); + spin_unlock_irq(&uhci->lock); + return rc; +} - /* Don't try to suspend broken motherboards, reset instead */ - if (suspend_allowed(uhci)) - suspend_hc(uhci); - else { - spin_unlock_irq(&uhci->lock); - reset_hc(uhci); - spin_lock_irq(&uhci->lock); - uhci_scan_schedule(uhci, NULL); - } +static int uhci_rh_resume(struct usb_hcd *hcd) +{ + struct uhci_hcd *uhci = hcd_to_uhci(hcd); + int rc = 0; + spin_lock_irq(&uhci->lock); + if (!HCD_HW_ACCESSIBLE(hcd)) + rc = -ESHUTDOWN; + else if (!uhci->dead) + wakeup_rh(uhci); spin_unlock_irq(&uhci->lock); - return 0; + return rc; } -static int uhci_resume(struct usb_hcd *hcd) +#endif + +/* Wait until a particular device/endpoint's QH is idle, and free it */ +static void uhci_hcd_endpoint_disable(struct usb_hcd *hcd, + struct usb_host_endpoint *hep) { struct uhci_hcd *uhci = hcd_to_uhci(hcd); - int rc; - - pci_set_master(to_pci_dev(uhci_dev(uhci))); + struct uhci_qh *qh; spin_lock_irq(&uhci->lock); + qh = (struct uhci_qh *) hep->hcpriv; + if (qh == NULL) + goto done; - if (uhci->state == UHCI_SUSPENDED) { - - /* - * Some systems don't maintain the UHCI register values - * during a PM suspend/resume cycle, so reinitialize - * the Frame Number, Framelist Base Address, Interrupt - * Enable, and Legacy Support registers. - */ - pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, - 0); - outw(uhci->frame_number, uhci->io_addr + USBFRNUM); - outl(uhci->fl->dma_handle, uhci->io_addr + USBFLBASEADD); - outw(USBINTR_TIMEOUT | USBINTR_RESUME | USBINTR_IOC | - USBINTR_SP, uhci->io_addr + USBINTR); - uhci->resume_detect = 1; - pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, - USBLEGSUP_DEFAULT); - } else { + while (qh->state != QH_STATE_IDLE) { + ++uhci->num_waiting; spin_unlock_irq(&uhci->lock); - reset_hc(uhci); - if ((rc = start_hc(uhci)) != 0) - return rc; + wait_event_interruptible(uhci->waitqh, + qh->state == QH_STATE_IDLE); spin_lock_irq(&uhci->lock); + --uhci->num_waiting; } - hcd->state = HC_STATE_RUNNING; + uhci_free_qh(uhci, qh); +done: spin_unlock_irq(&uhci->lock); - return 0; } -#endif -/* Wait until all the URBs for a particular device/endpoint are gone */ -static void uhci_hcd_endpoint_disable(struct usb_hcd *hcd, - struct usb_host_endpoint *ep) +static int uhci_hcd_get_frame_number(struct usb_hcd *hcd) { struct uhci_hcd *uhci = hcd_to_uhci(hcd); + unsigned frame_number; + unsigned delta; - wait_event_interruptible(uhci->waitqh, list_empty(&ep->urb_list)); + /* Minimize latency by avoiding the spinlock */ + frame_number = uhci->frame_number; + barrier(); + delta = (uhci_readw(uhci, USBFRNUM) - frame_number) & + (UHCI_NUMFRAMES - 1); + return frame_number + delta; } -static int uhci_hcd_get_frame_number(struct usb_hcd *hcd) +/* Determines number of ports on controller */ +static int uhci_count_ports(struct usb_hcd *hcd) { struct uhci_hcd *uhci = hcd_to_uhci(hcd); - int frame_number; - unsigned long flags; + unsigned io_size = (unsigned) hcd->rsrc_len; + int port; + + /* The UHCI spec says devices must have 2 ports, and goes on to say + * they may have more but gives no way to determine how many there + * are. However according to the UHCI spec, Bit 7 of the port + * status and control register is always set to 1. So we try to + * use this to our advantage. Another common failure mode when + * a nonexistent register is addressed is to return all ones, so + * we test for that also. + */ + for (port = 0; port < (io_size - USBPORTSC1) / 2; port++) { + unsigned int portstatus; - /* Minimize latency by avoiding the spinlock */ - local_irq_save(flags); - rmb(); - frame_number = (uhci->is_stopped ? uhci->frame_number : - inw(uhci->io_addr + USBFRNUM)); - local_irq_restore(flags); - return frame_number; -} + portstatus = uhci_readw(uhci, USBPORTSC1 + (port * 2)); + if (!(portstatus & 0x0080) || portstatus == 0xffff) + break; + } + if (debug) + dev_info(uhci_dev(uhci), "detected %d ports\n", port); -static const char hcd_name[] = "uhci_hcd"; + /* Anything greater than 7 is weird so we'll ignore it. */ + if (port > UHCI_RH_MAXCHILD) { + dev_info(uhci_dev(uhci), + "port count misdetected? forcing to 2 ports\n"); + port = 2; + } -static const struct hc_driver uhci_driver = { - .description = hcd_name, - .product_desc = "UHCI Host Controller", - .hcd_priv_size = sizeof(struct uhci_hcd), + return port; +} - /* Generic hardware linkage */ - .irq = uhci_irq, - .flags = HCD_USB11, +static const char hcd_name[] = "uhci_hcd"; - /* Basic lifecycle operations */ - .reset = uhci_reset, - .start = uhci_start, -#ifdef CONFIG_PM - .suspend = uhci_suspend, - .resume = uhci_resume, +#ifdef CONFIG_PCI +#include "uhci-pci.c" +#define PCI_DRIVER uhci_pci_driver #endif - .stop = uhci_stop, - - .urb_enqueue = uhci_urb_enqueue, - .urb_dequeue = uhci_urb_dequeue, - .endpoint_disable = uhci_hcd_endpoint_disable, - .get_frame_number = uhci_hcd_get_frame_number, - - .hub_status_data = uhci_hub_status_data, - .hub_control = uhci_hub_control, -}; - -static const struct pci_device_id uhci_pci_ids[] = { { - /* handle any USB UHCI controller */ - PCI_DEVICE_CLASS(((PCI_CLASS_SERIAL_USB << 8) | 0x00), ~0), - .driver_data = (unsigned long) &uhci_driver, - }, { /* end: all zeroes */ } -}; - -MODULE_DEVICE_TABLE(pci, uhci_pci_ids); +#ifdef CONFIG_SPARC_LEON +#include "uhci-grlib.c" +#define PLATFORM_DRIVER uhci_grlib_driver +#endif -static struct pci_driver uhci_pci_driver = { - .name = (char *)hcd_name, - .id_table = uhci_pci_ids, +#ifdef CONFIG_USB_UHCI_PLATFORM +#include "uhci-platform.c" +#define PLATFORM_DRIVER uhci_platform_driver +#endif - .probe = usb_hcd_pci_probe, - .remove = usb_hcd_pci_remove, +#if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) +#error "missing bus glue for uhci-hcd" +#endif -#ifdef CONFIG_PM - .suspend = usb_hcd_pci_suspend, - .resume = usb_hcd_pci_resume, -#endif /* PM */ -}; - static int __init uhci_hcd_init(void) { int retval = -ENOMEM; - printk(KERN_INFO DRIVER_DESC " " DRIVER_VERSION "\n"); - if (usb_disabled()) return -ENODEV; - if (debug) { - errbuf = kmalloc(ERRBUF_LEN, GFP_KERNEL); - if (!errbuf) - goto errbuf_failed; - } + printk(KERN_INFO "uhci_hcd: " DRIVER_DESC "%s\n", + ignore_oc ? ", overcurrent ignored" : ""); + set_bit(USB_UHCI_LOADED, &usb_hcds_loaded); - uhci_debugfs_root = debugfs_create_dir("uhci", NULL); +#ifdef CONFIG_DYNAMIC_DEBUG + errbuf = kmalloc(ERRBUF_LEN, GFP_KERNEL); + if (!errbuf) + goto errbuf_failed; + uhci_debugfs_root = debugfs_create_dir("uhci", usb_debug_root); if (!uhci_debugfs_root) goto debug_failed; +#endif uhci_up_cachep = kmem_cache_create("uhci_urb_priv", - sizeof(struct urb_priv), 0, 0, NULL, NULL); + sizeof(struct urb_priv), 0, 0, NULL); if (!uhci_up_cachep) goto up_failed; - retval = pci_register_driver(&uhci_pci_driver); - if (retval) - goto init_failed; +#ifdef PLATFORM_DRIVER + retval = platform_driver_register(&PLATFORM_DRIVER); + if (retval < 0) + goto clean0; +#endif + +#ifdef PCI_DRIVER + retval = pci_register_driver(&PCI_DRIVER); + if (retval < 0) + goto clean1; +#endif return 0; -init_failed: - if (kmem_cache_destroy(uhci_up_cachep)) - warn("not all urb_priv's were freed!"); +#ifdef PCI_DRIVER +clean1: +#endif +#ifdef PLATFORM_DRIVER + platform_driver_unregister(&PLATFORM_DRIVER); +clean0: +#endif + kmem_cache_destroy(uhci_up_cachep); up_failed: +#if defined(DEBUG) || defined(CONFIG_DYNAMIC_DEBUG) debugfs_remove(uhci_debugfs_root); debug_failed: kfree(errbuf); errbuf_failed: +#endif + clear_bit(USB_UHCI_LOADED, &usb_hcds_loaded); return retval; } static void __exit uhci_hcd_cleanup(void) { - pci_unregister_driver(&uhci_pci_driver); - - if (kmem_cache_destroy(uhci_up_cachep)) - warn("not all urb_priv's were freed!"); - +#ifdef PLATFORM_DRIVER + platform_driver_unregister(&PLATFORM_DRIVER); +#endif +#ifdef PCI_DRIVER + pci_unregister_driver(&PCI_DRIVER); +#endif + kmem_cache_destroy(uhci_up_cachep); debugfs_remove(uhci_debugfs_root); +#ifdef CONFIG_DYNAMIC_DEBUG kfree(errbuf); +#endif + clear_bit(USB_UHCI_LOADED, &usb_hcds_loaded); } module_init(uhci_hcd_init); |