diff options
Diffstat (limited to 'drivers/staging/vt6655/rf.c')
| -rw-r--r-- | drivers/staging/vt6655/rf.c | 125 |
1 files changed, 38 insertions, 87 deletions
diff --git a/drivers/staging/vt6655/rf.c b/drivers/staging/vt6655/rf.c index 6948984a25a..99c89a14d89 100644 --- a/drivers/staging/vt6655/rf.c +++ b/drivers/staging/vt6655/rf.c @@ -39,8 +39,6 @@ /*--------------------- Static Definitions -------------------------*/ -//static int msglevel =MSG_LEVEL_INFO; - #define BY_AL2230_REG_LEN 23 //24bit #define CB_AL2230_INIT_SEQ 15 #define SWITCH_CHANNEL_DELAY_AL2230 200 //us @@ -55,7 +53,7 @@ /*--------------------- Static Variables --------------------------*/ -const unsigned long dwAL2230InitTable[CB_AL2230_INIT_SEQ] = { +static const unsigned long dwAL2230InitTable[CB_AL2230_INIT_SEQ] = { 0x03F79000+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // 0x03333100+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // 0x01A00200+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // @@ -73,7 +71,7 @@ const unsigned long dwAL2230InitTable[CB_AL2230_INIT_SEQ] = { 0x00580F00+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW }; -const unsigned long dwAL2230ChannelTable0[CB_MAX_CHANNEL] = { +static const unsigned long dwAL2230ChannelTable0[CB_MAX_CHANNEL] = { 0x03F79000+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 1, Tf = 2412MHz 0x03F79000+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 2, Tf = 2417MHz 0x03E79000+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 3, Tf = 2422MHz @@ -90,7 +88,7 @@ const unsigned long dwAL2230ChannelTable0[CB_MAX_CHANNEL] = { 0x03E7C000+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW // channel = 14, Tf = 2412M }; -const unsigned long dwAL2230ChannelTable1[CB_MAX_CHANNEL] = { +static const unsigned long dwAL2230ChannelTable1[CB_MAX_CHANNEL] = { 0x03333100+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 1, Tf = 2412MHz 0x0B333100+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 2, Tf = 2417MHz 0x03333100+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 3, Tf = 2422MHz @@ -107,7 +105,7 @@ const unsigned long dwAL2230ChannelTable1[CB_MAX_CHANNEL] = { 0x06666100+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW // channel = 14, Tf = 2412M }; -unsigned long dwAL2230PowerTable[AL2230_PWR_IDX_LEN] = { +static unsigned long dwAL2230PowerTable[AL2230_PWR_IDX_LEN] = { 0x04040900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x04041900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, 0x04042900+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW, @@ -177,13 +175,12 @@ unsigned long dwAL2230PowerTable[AL2230_PWR_IDX_LEN] = { //{{ RobertYu:20050104 // 40MHz reference frequency // Need to Pull PLLON(PE3) low when writing channel registers through 3-wire. -const unsigned long dwAL7230InitTable[CB_AL7230_INIT_SEQ] = { +static const unsigned long dwAL7230InitTable[CB_AL7230_INIT_SEQ] = { 0x00379000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // Channel1 // Need modify for 11a 0x13333100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // Channel1 // Need modify for 11a 0x841FF200+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // Need modify for 11a: 451FE2 0x3FDFA300+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // Need modify for 11a: 5FDFA3 0x7FD78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // 11b/g // Need modify for 11a - //0x802B4500+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // Need modify for 11a: 8D1B45 // RoberYu:20050113, Rev0.47 Regsiter Setting Guide 0x802B5500+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // Need modify for 11a: 8D1B55 0x56AF3600+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, @@ -192,7 +189,6 @@ const unsigned long dwAL7230InitTable[CB_AL7230_INIT_SEQ] = { 0x221BB900+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, 0xE0000A00+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // Need modify for 11a: E0600A 0x08031B00+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // init 0x080B1B00 => 0x080F1B00 for 3 wire control TxGain(D10) - //0x00093C00+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // Need modify for 11a: 00143C // RoberYu:20050113, Rev0.47 Regsiter Setting Guide 0x000A3C00+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // Need modify for 11a: 00143C 0xFFFFFD00+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, @@ -200,7 +196,7 @@ const unsigned long dwAL7230InitTable[CB_AL7230_INIT_SEQ] = { 0x1ABA8F00+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW // Need modify for 11a: 12BACF }; -const unsigned long dwAL7230InitTableAMode[CB_AL7230_INIT_SEQ] = { +static const unsigned long dwAL7230InitTableAMode[CB_AL7230_INIT_SEQ] = { 0x0FF52000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // Channel184 // Need modify for 11b/g 0x00000100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // Channel184 // Need modify for 11b/g 0x451FE200+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // Need modify for 11b/g @@ -219,7 +215,7 @@ const unsigned long dwAL7230InitTableAMode[CB_AL7230_INIT_SEQ] = { 0x12BACF00+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW // Need modify for 11b/g }; -const unsigned long dwAL7230ChannelTable0[CB_MAX_CHANNEL] = { +static const unsigned long dwAL7230ChannelTable0[CB_MAX_CHANNEL] = { 0x00379000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 1, Tf = 2412MHz 0x00379000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 2, Tf = 2417MHz 0x00379000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 3, Tf = 2422MHz @@ -285,7 +281,7 @@ const unsigned long dwAL7230ChannelTable0[CB_MAX_CHANNEL] = { 0x0FF61000+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW // channel = 165, Tf = 5825MHz (56) }; -const unsigned long dwAL7230ChannelTable1[CB_MAX_CHANNEL] = { +static const unsigned long dwAL7230ChannelTable1[CB_MAX_CHANNEL] = { 0x13333100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 1, Tf = 2412MHz 0x1B333100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 2, Tf = 2417MHz 0x03333100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 3, Tf = 2422MHz @@ -349,7 +345,7 @@ const unsigned long dwAL7230ChannelTable1[CB_MAX_CHANNEL] = { 0x02AAA100+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW // channel = 165, Tf = 5825MHz (56) }; -const unsigned long dwAL7230ChannelTable2[CB_MAX_CHANNEL] = { +static const unsigned long dwAL7230ChannelTable2[CB_MAX_CHANNEL] = { 0x7FD78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 1, Tf = 2412MHz 0x7FD78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 2, Tf = 2417MHz 0x7FD78400+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW, // channel = 3, Tf = 2422MHz @@ -428,7 +424,7 @@ const unsigned long dwAL7230ChannelTable2[CB_MAX_CHANNEL] = { * Return Value: true if succeeded; false if failed. * */ -bool s_bAL7230Init(unsigned long dwIoBase) +static bool s_bAL7230Init(unsigned long dwIoBase) { int ii; bool bResult; @@ -471,7 +467,7 @@ bool s_bAL7230Init(unsigned long dwIoBase) } // Need to Pull PLLON low when writing channel registers through 3-wire interface -bool s_bAL7230SelectChannel(unsigned long dwIoBase, unsigned char byChannel) +static bool s_bAL7230SelectChannel(unsigned long dwIoBase, unsigned char byChannel) { bool bResult; @@ -585,10 +581,9 @@ bool IFRFbWriteEmbedded(unsigned long dwIoBase, unsigned long dwData) break; } - if (ww == W_MAX_TIMEOUT) { -// DBG_PORT80_ALWAYS(0x32); + if (ww == W_MAX_TIMEOUT) return false; - } + return true; } @@ -631,7 +626,7 @@ bool IFRFbWriteEmbedded(unsigned long dwIoBase, unsigned long dwData) * Return Value: true if succeeded; false if failed. * */ -bool RFbAL2230Init(unsigned long dwIoBase) +static bool RFbAL2230Init(unsigned long dwIoBase) { int ii; bool bResult; @@ -678,7 +673,7 @@ bool RFbAL2230Init(unsigned long dwIoBase) return bResult; } -bool RFbAL2230SelectChannel(unsigned long dwIoBase, unsigned char byChannel) +static bool RFbAL2230SelectChannel(unsigned long dwIoBase, unsigned char byChannel) { bool bResult; @@ -776,36 +771,6 @@ bool RFbInit( } /* - * Description: RF ShutDown function - * - * Parameters: - * In: - * byBBType - * byRFType - * Out: - * none - * - * Return Value: true if succeeded; false if failed. - * - */ -bool RFbShutDown( - PSDevice pDevice -) -{ - bool bResult = true; - - switch (pDevice->byRFType) { - case RF_AIROHA7230: - bResult = IFRFbWriteEmbedded(pDevice->PortOffset, 0x1ABAEF00 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW); - break; - default: - bResult = true; - break; - } - return bResult; -} - -/* * Description: Select channel * * Parameters: @@ -869,13 +834,12 @@ bool RFvWriteWakeProgSyn(unsigned long dwIoBase, unsigned char byRFType, unsigne byInitCount = CB_AL2230_INIT_SEQ + 2; // Init Reg + Channel Reg (2) bySleepCount = 0; - if (byInitCount > (MISCFIFO_SYNDATASIZE - bySleepCount)) { + if (byInitCount > (MISCFIFO_SYNDATASIZE - bySleepCount)) return false; - } - for (ii = 0; ii < CB_AL2230_INIT_SEQ; ii++) { + for (ii = 0; ii < CB_AL2230_INIT_SEQ; ii++) MACvSetMISCFifo(dwIoBase, (unsigned short)(MISCFIFO_SYNDATA_IDX + ii), dwAL2230InitTable[ii]); - } + MACvSetMISCFifo(dwIoBase, (unsigned short)(MISCFIFO_SYNDATA_IDX + ii), dwAL2230ChannelTable0[uChannel-1]); ii++; MACvSetMISCFifo(dwIoBase, (unsigned short)(MISCFIFO_SYNDATA_IDX + ii), dwAL2230ChannelTable1[uChannel-1]); @@ -886,18 +850,15 @@ bool RFvWriteWakeProgSyn(unsigned long dwIoBase, unsigned char byRFType, unsigne case RF_AIROHA7230: byInitCount = CB_AL7230_INIT_SEQ + 3; // Init Reg + Channel Reg (3) bySleepCount = 0; - if (byInitCount > (MISCFIFO_SYNDATASIZE - bySleepCount)) { + if (byInitCount > (MISCFIFO_SYNDATASIZE - bySleepCount)) return false; - } if (uChannel <= CB_MAX_CHANNEL_24G) { - for (ii = 0; ii < CB_AL7230_INIT_SEQ; ii++) { + for (ii = 0; ii < CB_AL7230_INIT_SEQ; ii++) MACvSetMISCFifo(dwIoBase, (unsigned short)(MISCFIFO_SYNDATA_IDX + ii), dwAL7230InitTable[ii]); - } } else { - for (ii = 0; ii < CB_AL7230_INIT_SEQ; ii++) { + for (ii = 0; ii < CB_AL7230_INIT_SEQ; ii++) MACvSetMISCFifo(dwIoBase, (unsigned short)(MISCFIFO_SYNDATA_IDX + ii), dwAL7230InitTableAMode[ii]); - } } MACvSetMISCFifo(dwIoBase, (unsigned short)(MISCFIFO_SYNDATA_IDX + ii), dwAL7230ChannelTable0[uChannel-1]); @@ -946,12 +907,11 @@ bool RFbSetPower( unsigned char byDec = 0; unsigned char byPwrdBm = 0; - if (pDevice->dwDiagRefCount != 0) { + if (pDevice->dwDiagRefCount != 0) return true; - } - if ((uCH < 1) || (uCH > CB_MAX_CHANNEL)) { + + if ((uCH < 1) || (uCH > CB_MAX_CHANNEL)) return false; - } switch (uRATE) { case RATE_1M: @@ -960,22 +920,19 @@ bool RFbSetPower( case RATE_11M: byPwr = pDevice->abyCCKPwrTbl[uCH]; byPwrdBm = pDevice->abyCCKDefaultPwr[uCH]; -//PLICE_DEBUG-> - //byPwr+=5; -//PLICE_DEBUG <- break; case RATE_6M: case RATE_9M: case RATE_18M: byPwr = pDevice->abyOFDMPwrTbl[uCH]; - if (pDevice->byRFType == RF_UW2452) { + if (pDevice->byRFType == RF_UW2452) byDec = byPwr + 14; - } else { + else byDec = byPwr + 10; - } - if (byDec >= pDevice->byMaxPwrLevel) { + + if (byDec >= pDevice->byMaxPwrLevel) byDec = pDevice->byMaxPwrLevel-1; - } + if (pDevice->byRFType == RF_UW2452) { byPwrdBm = byDec - byPwr; byPwrdBm /= 3; @@ -983,11 +940,9 @@ bool RFbSetPower( byPwrdBm = byDec - byPwr; byPwrdBm >>= 1; } + byPwrdBm += pDevice->abyOFDMDefaultPwr[uCH]; byPwr = byDec; -//PLICE_DEBUG-> - //byPwr+=5; -//PLICE_DEBUG<- break; case RATE_24M: case RATE_36M: @@ -995,20 +950,16 @@ bool RFbSetPower( case RATE_54M: byPwr = pDevice->abyOFDMPwrTbl[uCH]; byPwrdBm = pDevice->abyOFDMDefaultPwr[uCH]; -//PLICE_DEBUG-> - //byPwr+=5; -//PLICE_DEBUG<- break; } - if (pDevice->byCurPwr == byPwr) { + if (pDevice->byCurPwr == byPwr) return true; - } bResult = RFbRawSetPower(pDevice, byPwr, uRATE); - if (bResult == true) { + if (bResult) pDevice->byCurPwr = byPwr; - } + return bResult; } @@ -1035,17 +986,17 @@ bool RFbRawSetPower( bool bResult = true; unsigned long dwMax7230Pwr = 0; - if (byPwr >= pDevice->byMaxPwrLevel) { + if (byPwr >= pDevice->byMaxPwrLevel) return false; - } + switch (pDevice->byRFType) { case RF_AIROHA: bResult &= IFRFbWriteEmbedded(pDevice->PortOffset, dwAL2230PowerTable[byPwr]); - if (uRATE <= RATE_11M) { + if (uRATE <= RATE_11M) bResult &= IFRFbWriteEmbedded(pDevice->PortOffset, 0x0001B400+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW); - } else { + else bResult &= IFRFbWriteEmbedded(pDevice->PortOffset, 0x0005A400+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW); - } + break; case RF_AL2230S: |