diff options
Diffstat (limited to 'drivers/staging/tidspbridge/Kconfig')
| -rw-r--r-- | drivers/staging/tidspbridge/Kconfig | 69 |
1 files changed, 69 insertions, 0 deletions
diff --git a/drivers/staging/tidspbridge/Kconfig b/drivers/staging/tidspbridge/Kconfig new file mode 100644 index 00000000000..b5e74e9de6b --- /dev/null +++ b/drivers/staging/tidspbridge/Kconfig @@ -0,0 +1,69 @@ +# +# DSP Bridge Driver Support +# + +menuconfig TIDSPBRIDGE + tristate "DSP Bridge driver" + depends on ARCH_OMAP3 && !ARCH_MULTIPLATFORM && BROKEN + select MAILBOX + select OMAP2PLUS_MBOX + help + DSP/BIOS Bridge is designed for platforms that contain a GPP and + one or more attached DSPs. The GPP is considered the master or + "host" processor, and the attached DSPs are processing resources + that can be utilized by applications and drivers running on the GPP. + + This driver depends on OMAP Mailbox (OMAP_MBOX_FWK). + +config TIDSPBRIDGE_DVFS + bool "Enable Bridge Dynamic Voltage and Frequency Scaling (DVFS)" + depends on TIDSPBRIDGE && CPU_FREQ + help + DVFS allows DSP Bridge to initiate the operating point change to + scale the chip voltage and frequency in order to match the + performance and power consumption to the current processing + requirements. + +config TIDSPBRIDGE_MEMPOOL_SIZE + hex "Physical memory pool size (Byte)" + depends on TIDSPBRIDGE + default 0x600000 + help + Allocate specified size of memory at booting time to avoid allocation + failure under heavy memory fragmentation after some use time. + +config TIDSPBRIDGE_RECOVERY + bool "Recovery Support" + depends on TIDSPBRIDGE + default y + help + In case of DSP fatal error, BRIDGE driver will try to + recover itself. + +config TIDSPBRIDGE_CACHE_LINE_CHECK + bool "Check buffers to be 128 byte aligned" + depends on TIDSPBRIDGE + help + When the DSP processes data, the DSP cache controller loads 128-Byte + chunks (lines) from SDRAM and writes the data back in 128-Byte chunks. + If a DMM buffer does not start and end on a 128-Byte boundary, the data + preceding the start address (SA) from the 128-Byte boundary to the SA + and the data at addresses trailing the end address (EA) from the EA to + the next 128-Byte boundary will be loaded and written back as well. + This can lead to heap corruption. Say Y, to enforce the check for 128 + byte alignment, buffers failing this check will be rejected. + +config TIDSPBRIDGE_NTFY_PWRERR + bool "Notify power errors" + depends on TIDSPBRIDGE + help + Enable notifications to registered clients on the event of power error + trying to suspend bridge driver. Say Y, to signal this event as a fatal + error, this will require a bridge restart to recover. + +config TIDSPBRIDGE_BACKTRACE + bool "Dump backtraces on fatal errors" + depends on TIDSPBRIDGE + help + Enable useful information to backtrace fatal errors. Say Y if you + want to dump information for testing purposes. |