diff options
Diffstat (limited to 'drivers/ssb/driver_pcicore.c')
| -rw-r--r-- | drivers/ssb/driver_pcicore.c | 25 |
1 files changed, 12 insertions, 13 deletions
diff --git a/drivers/ssb/driver_pcicore.c b/drivers/ssb/driver_pcicore.c index 49d209173f5..d75b72ba267 100644 --- a/drivers/ssb/driver_pcicore.c +++ b/drivers/ssb/driver_pcicore.c @@ -263,8 +263,7 @@ int ssb_pcicore_plat_dev_init(struct pci_dev *d) return -ENODEV; } - ssb_printk(KERN_INFO "PCI: Fixing up device %s\n", - pci_name(d)); + ssb_info("PCI: Fixing up device %s\n", pci_name(d)); /* Fix up interrupt lines */ d->irq = ssb_mips_irq(extpci_core->dev) + 2; @@ -285,12 +284,12 @@ static void ssb_pcicore_fixup_pcibridge(struct pci_dev *dev) if (dev->bus->number != 0 || PCI_SLOT(dev->devfn) != 0) return; - ssb_printk(KERN_INFO "PCI: Fixing up bridge %s\n", pci_name(dev)); + ssb_info("PCI: Fixing up bridge %s\n", pci_name(dev)); /* Enable PCI bridge bus mastering and memory space */ pci_set_master(dev); if (pcibios_enable_device(dev, ~0) < 0) { - ssb_printk(KERN_ERR "PCI: SSB bridge enable failed\n"); + ssb_err("PCI: SSB bridge enable failed\n"); return; } @@ -299,8 +298,8 @@ static void ssb_pcicore_fixup_pcibridge(struct pci_dev *dev) /* Make sure our latency is high enough to handle the devices behind us */ lat = 168; - ssb_printk(KERN_INFO "PCI: Fixing latency timer of device %s to %u\n", - pci_name(dev), lat); + ssb_info("PCI: Fixing latency timer of device %s to %u\n", + pci_name(dev), lat); pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat); } DECLARE_PCI_FIXUP_EARLY(PCI_ANY_ID, PCI_ANY_ID, ssb_pcicore_fixup_pcibridge); @@ -315,7 +314,7 @@ int ssb_pcicore_pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) return ssb_mips_irq(extpci_core->dev) + 2; } -static void __devinit ssb_pcicore_init_hostmode(struct ssb_pcicore *pc) +static void ssb_pcicore_init_hostmode(struct ssb_pcicore *pc) { u32 val; @@ -323,7 +322,7 @@ static void __devinit ssb_pcicore_init_hostmode(struct ssb_pcicore *pc) return; extpci_core = pc; - ssb_dprintk(KERN_INFO PFX "PCIcore in host mode found\n"); + ssb_dbg("PCIcore in host mode found\n"); /* Reset devices on the external PCI bus */ val = SSB_PCICORE_CTL_RST_OE; val |= SSB_PCICORE_CTL_CLK_OE; @@ -338,7 +337,7 @@ static void __devinit ssb_pcicore_init_hostmode(struct ssb_pcicore *pc) udelay(1); /* Assertion time demanded by the PCI standard */ if (pc->dev->bus->has_cardbus_slot) { - ssb_dprintk(KERN_INFO PFX "CardBus slot detected\n"); + ssb_dbg("CardBus slot detected\n"); pc->cardbusmode = 1; /* GPIO 1 resets the bridge */ ssb_gpio_out(pc->dev->bus, 1, 1); @@ -380,7 +379,7 @@ static void __devinit ssb_pcicore_init_hostmode(struct ssb_pcicore *pc) register_pci_controller(&ssb_pcicore_controller); } -static int __devinit pcicore_is_in_hostmode(struct ssb_pcicore *pc) +static int pcicore_is_in_hostmode(struct ssb_pcicore *pc) { struct ssb_bus *bus = pc->dev->bus; u16 chipid_top; @@ -413,7 +412,7 @@ static int __devinit pcicore_is_in_hostmode(struct ssb_pcicore *pc) * Workarounds. **************************************************/ -static void __devinit ssb_pcicore_fix_sprom_core_index(struct ssb_pcicore *pc) +static void ssb_pcicore_fix_sprom_core_index(struct ssb_pcicore *pc) { u16 tmp = pcicore_read16(pc, SSB_PCICORE_SPROM(0)); if (((tmp & 0xF000) >> 12) != pc->dev->core_index) { @@ -515,7 +514,7 @@ static void ssb_pcicore_pcie_setup_workarounds(struct ssb_pcicore *pc) * Generic and Clientmode operation code. **************************************************/ -static void __devinit ssb_pcicore_init_clientmode(struct ssb_pcicore *pc) +static void ssb_pcicore_init_clientmode(struct ssb_pcicore *pc) { struct ssb_device *pdev = pc->dev; struct ssb_bus *bus = pdev->bus; @@ -534,7 +533,7 @@ static void __devinit ssb_pcicore_init_clientmode(struct ssb_pcicore *pc) } } -void __devinit ssb_pcicore_init(struct ssb_pcicore *pc) +void ssb_pcicore_init(struct ssb_pcicore *pc) { struct ssb_device *dev = pc->dev; |