diff options
Diffstat (limited to 'drivers/scsi/mvsas/mv_sas.h')
| -rw-r--r-- | drivers/scsi/mvsas/mv_sas.h | 130 |
1 files changed, 103 insertions, 27 deletions
diff --git a/drivers/scsi/mvsas/mv_sas.h b/drivers/scsi/mvsas/mv_sas.h index 77ddc7c1e5f..d6b19dc80be 100644 --- a/drivers/scsi/mvsas/mv_sas.h +++ b/drivers/scsi/mvsas/mv_sas.h @@ -3,6 +3,7 @@ * * Copyright 2007 Red Hat, Inc. * Copyright 2008 Marvell. <kewei@marvell.com> + * Copyright 2009-2011 Marvell. <yuxiangl@marvell.com> * * This file is licensed under GPLv2. * @@ -38,21 +39,17 @@ #include <linux/irq.h> #include <linux/slab.h> #include <linux/vmalloc.h> +#include <asm/unaligned.h> #include <scsi/libsas.h> #include <scsi/scsi.h> #include <scsi/scsi_tcq.h> #include <scsi/sas_ata.h> -#include <linux/version.h> #include "mv_defs.h" #define DRV_NAME "mvsas" -#define DRV_VERSION "0.8.2" -#define _MV_DUMP 0 +#define DRV_VERSION "0.8.16" #define MVS_ID_NOT_MAPPED 0x7f -/* #define DISABLE_HOTPLUG_DMA_FIX */ -// #define MAX_EXP_RUNNING_REQ 2 #define WIDE_PORT_MAX_PHY 4 -#define MV_DISABLE_NCQ 0 #define mv_printk(fmt, arg ...) \ printk(KERN_DEBUG"%s %d:" fmt, __FILE__, __LINE__, ## arg) #ifdef MV_DEBUG @@ -63,21 +60,24 @@ #endif #define MV_MAX_U32 0xffffffff +extern int interrupt_coalescing; extern struct mvs_tgt_initiator mvs_tgt; extern struct mvs_info *tgt_mvi; extern const struct mvs_dispatch mvs_64xx_dispatch; extern const struct mvs_dispatch mvs_94xx_dispatch; +extern struct kmem_cache *mvs_task_list_cache; #define DEV_IS_EXPANDER(type) \ - ((type == EDGE_DEV) || (type == FANOUT_DEV)) + ((type == SAS_EDGE_EXPANDER_DEVICE) || (type == SAS_FANOUT_EXPANDER_DEVICE)) -#define bit(n) ((u32)1 << n) +#define bit(n) ((u64)1 << n) #define for_each_phy(__lseq_mask, __mc, __lseq) \ for ((__mc) = (__lseq_mask), (__lseq) = 0; \ (__mc) != 0 ; \ (++__lseq), (__mc) >>= 1) +#define MVS_PHY_ID (1U << sas_phy->id) #define MV_INIT_DELAYED_WORK(w, f, d) INIT_DELAYED_WORK(w, f) #define UNASSOC_D2H_FIS(id) \ ((void *) mvi->rx_fis + 0x100 * id) @@ -97,6 +97,11 @@ enum dev_status { MVS_DEV_EH = 0x1, }; +enum dev_reset { + MVS_SOFT_RESET = 0, + MVS_HARD_RESET = 1, + MVS_PHY_TUNE = 2, +}; struct mvs_info; @@ -128,7 +133,6 @@ struct mvs_dispatch { u32 (*read_port_irq_mask)(struct mvs_info *mvi, u32 port); void (*write_port_irq_mask)(struct mvs_info *mvi, u32 port, u32 val); - void (*get_sas_addr)(void *buf, u32 buflen); void (*command_active)(struct mvs_info *mvi, u32 slot_idx); void (*clear_srs_irq)(struct mvs_info *mvi, u8 reg_set, u8 clear_all); void (*issue_stop)(struct mvs_info *mvi, enum mvs_port_type type, @@ -165,9 +169,10 @@ struct mvs_dispatch { ); int (*spi_issuecmd)(struct mvs_info *mvi, u32 cmd); int (*spi_waitdataready)(struct mvs_info *mvi, u32 timeout); -#ifndef DISABLE_HOTPLUG_DMA_FIX - void (*dma_fix)(dma_addr_t buf_dma, int buf_len, int from, void *prd); -#endif + void (*dma_fix)(struct mvs_info *mvi, u32 phy_mask, + int buf_len, int from, void *prd); + void (*tune_interrupt)(struct mvs_info *mvi, u32 time); + void (*non_spec_ncq_error)(struct mvs_info *mvi); }; @@ -177,9 +182,11 @@ struct mvs_chip_info { u32 fis_offs; u32 fis_count; u32 srs_sz; + u32 sg_width; u32 slot_width; const struct mvs_dispatch *dispatch; }; +#define MVS_MAX_SG (1U << mvi->chip->sg_width) #define MVS_CHIP_SLOT_SZ (1U << mvi->chip->slot_width) #define MVS_RX_FISL_SZ \ (mvi->chip->fis_offs + (mvi->chip->fis_count * 0x100)) @@ -235,7 +242,7 @@ struct mvs_phy { struct mvs_device { struct list_head dev_entry; - enum sas_dev_type dev_type; + enum sas_device_type dev_type; struct mvs_info *mvi_info; struct domain_device *sas_device; struct timer_list timer; @@ -247,6 +254,73 @@ struct mvs_device { u16 reserved; }; +/* Generate PHY tunning parameters */ +struct phy_tuning { + /* 1 bit, transmitter emphasis enable */ + u8 trans_emp_en:1; + /* 4 bits, transmitter emphasis amplitude */ + u8 trans_emp_amp:4; + /* 3 bits, reserved space */ + u8 Reserved_2bit_1:3; + /* 5 bits, transmitter amplitude */ + u8 trans_amp:5; + /* 2 bits, transmitter amplitude adjust */ + u8 trans_amp_adj:2; + /* 1 bit, reserved space */ + u8 resv_2bit_2:1; + /* 2 bytes, reserved space */ + u8 reserved[2]; +}; + +struct ffe_control { + /* 4 bits, FFE Capacitor Select (value range 0~F) */ + u8 ffe_cap_sel:4; + /* 3 bits, FFE Resistor Select (value range 0~7) */ + u8 ffe_rss_sel:3; + /* 1 bit reserve*/ + u8 reserved:1; +}; + +/* + * HBA_Info_Page is saved in Flash/NVRAM, total 256 bytes. + * The data area is valid only Signature="MRVL". + * If any member fills with 0xFF, the member is invalid. + */ +struct hba_info_page { + /* Dword 0 */ + /* 4 bytes, structure signature,should be "MRVL" at first initial */ + u8 signature[4]; + + /* Dword 1-13 */ + u32 reserved1[13]; + + /* Dword 14-29 */ + /* 64 bytes, SAS address for each port */ + u64 sas_addr[8]; + + /* Dword 30-31 */ + /* 8 bytes for vanir 8 port PHY FFE seeting + * BIT 0~3 : FFE Capacitor select(value range 0~F) + * BIT 4~6 : FFE Resistor select(value range 0~7) + * BIT 7: reserve. + */ + + struct ffe_control ffe_ctl[8]; + /* Dword 32 -43 */ + u32 reserved2[12]; + + /* Dword 44-45 */ + /* 8 bytes, 0: 1.5G, 1: 3.0G, should be 0x01 at first initial */ + u8 phy_rate[8]; + + /* Dword 46-53 */ + /* 32 bytes, PHY tuning parameters for each PHY*/ + struct phy_tuning phy_tuning[8]; + + /* Dword 54-63 */ + u32 reserved3[10]; +}; /* total 256 bytes */ + struct mvs_slot_info { struct list_head entry; union { @@ -262,9 +336,6 @@ struct mvs_slot_info { */ void *buf; dma_addr_t buf_dma; -#if _MV_DUMP - u32 cmd_size; -#endif void *response; struct mvs_port *port; struct mvs_device *device; @@ -318,12 +389,10 @@ struct mvs_info { const struct mvs_chip_info *chip; int tags_num; - DECLARE_BITMAP(tags, MVS_SLOTS); + unsigned long *tags; /* further per-slot information */ struct mvs_phy phy[MVS_MAX_PHYS]; struct mvs_port port[MVS_MAX_PHYS]; - u32 irq; - u32 exp_req; u32 id; u64 sata_reg_set; struct list_head *hba_list; @@ -335,20 +404,24 @@ struct mvs_info { u32 flashsectSize; void *addon; + struct hba_info_page hba_info_param; struct mvs_device devices[MVS_MAX_DEVICES]; -#ifndef DISABLE_HOTPLUG_DMA_FIX void *bulk_buffer; dma_addr_t bulk_buffer_dma; + void *bulk_buffer1; + dma_addr_t bulk_buffer_dma1; #define TRASH_BUCKET_SIZE 0x20000 -#endif + void *dma_pool; struct mvs_slot_info slot_info[0]; }; struct mvs_prv_info{ u8 n_host; u8 n_phy; - u16 reserve; + u8 scan_finished; + u8 reserve; struct mvs_info *mvi[2]; + struct tasklet_struct mv_tasklet; }; struct mvs_wq { @@ -367,6 +440,11 @@ struct mvs_task_exec_info { int n_elem; }; +struct mvs_task_list { + struct sas_task *task; + struct list_head list; +}; + /******************** function prototype *********************/ void mvs_get_sas_addr(void *buf, u32 buflen); @@ -380,10 +458,8 @@ int mvs_ioremap(struct mvs_info *mvi, int bar, int bar_ex); void mvs_phys_reset(struct mvs_info *mvi, u32 phy_mask, int hard); int mvs_phy_control(struct asd_sas_phy *sas_phy, enum phy_func func, void *funcdata); -void __devinit mvs_set_sas_addr(struct mvs_info *mvi, int port_id, - u32 off_lo, u32 off_hi, u64 sas_addr); -int mvs_slave_alloc(struct scsi_device *scsi_dev); -int mvs_slave_configure(struct scsi_device *sdev); +void mvs_set_sas_addr(struct mvs_info *mvi, int port_id, u32 off_lo, + u32 off_hi, u64 sas_addr); void mvs_scan_start(struct Scsi_Host *shost); int mvs_scan_finished(struct Scsi_Host *shost, unsigned long time); int mvs_queue_command(struct sas_task *task, const int num, @@ -407,6 +483,6 @@ void mvs_do_release_task(struct mvs_info *mvi, int phy_no, void mvs_int_port(struct mvs_info *mvi, int phy_no, u32 events); void mvs_update_phyinfo(struct mvs_info *mvi, int i, int get_st); int mvs_int_rx(struct mvs_info *mvi, bool self_clear); -void mvs_hexdump(u32 size, u8 *data, u32 baseaddr); +struct mvs_device *mvs_find_dev_by_reg_set(struct mvs_info *mvi, u8 reg_set); #endif |