diff options
Diffstat (limited to 'drivers/reset')
| -rw-r--r-- | drivers/reset/Kconfig | 2 | ||||
| -rw-r--r-- | drivers/reset/Makefile | 3 | ||||
| -rw-r--r-- | drivers/reset/core.c | 71 | ||||
| -rw-r--r-- | drivers/reset/reset-socfpga.c | 146 | ||||
| -rw-r--r-- | drivers/reset/reset-sunxi.c | 190 | ||||
| -rw-r--r-- | drivers/reset/sti/Kconfig | 15 | ||||
| -rw-r--r-- | drivers/reset/sti/Makefile | 4 | ||||
| -rw-r--r-- | drivers/reset/sti/reset-stih415.c | 113 | ||||
| -rw-r--r-- | drivers/reset/sti/reset-stih416.c | 144 | ||||
| -rw-r--r-- | drivers/reset/sti/reset-syscfg.c | 186 | ||||
| -rw-r--r-- | drivers/reset/sti/reset-syscfg.h | 69 | 
11 files changed, 904 insertions, 39 deletions
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index c9d04f79786..0615f50a14c 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -11,3 +11,5 @@ menuconfig RESET_CONTROLLER  	  via GPIOs or SoC-internal reset controller modules.  	  If unsure, say no. + +source "drivers/reset/sti/Kconfig" diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile index 1e2d83f2b99..60fed3d7820 100644 --- a/drivers/reset/Makefile +++ b/drivers/reset/Makefile @@ -1 +1,4 @@  obj-$(CONFIG_RESET_CONTROLLER) += core.o +obj-$(CONFIG_ARCH_SOCFPGA) += reset-socfpga.o +obj-$(CONFIG_ARCH_SUNXI) += reset-sunxi.o +obj-$(CONFIG_ARCH_STI) += sti/ diff --git a/drivers/reset/core.c b/drivers/reset/core.c index d1b6089a0ef..baeaf82d40d 100644 --- a/drivers/reset/core.c +++ b/drivers/reset/core.c @@ -43,7 +43,7 @@ struct reset_control {   * This simple translation function should be used for reset controllers   * with 1:1 mapping, where reset lines can be indexed by number without gaps.   */ -int of_reset_simple_xlate(struct reset_controller_dev *rcdev, +static int of_reset_simple_xlate(struct reset_controller_dev *rcdev,  			  const struct of_phandle_args *reset_spec)  {  	if (WARN_ON(reset_spec->args_count != rcdev->of_reset_n_cells)) @@ -54,7 +54,6 @@ int of_reset_simple_xlate(struct reset_controller_dev *rcdev,  	return reset_spec->args[0];  } -EXPORT_SYMBOL_GPL(of_reset_simple_xlate);  /**   * reset_controller_register - register a reset controller device @@ -127,15 +126,16 @@ int reset_control_deassert(struct reset_control *rstc)  EXPORT_SYMBOL_GPL(reset_control_deassert);  /** - * reset_control_get - Lookup and obtain a reference to a reset controller. - * @dev: device to be reset by the controller + * of_reset_control_get - Lookup and obtain a reference to a reset controller. + * @node: device to be reset by the controller   * @id: reset line name   *   * Returns a struct reset_control or IS_ERR() condition containing errno.   *   * Use of id names is optional.   */ -struct reset_control *reset_control_get(struct device *dev, const char *id) +struct reset_control *of_reset_control_get(struct device_node *node, +					   const char *id)  {  	struct reset_control *rstc = ERR_PTR(-EPROBE_DEFER);  	struct reset_controller_dev *r, *rcdev; @@ -144,13 +144,10 @@ struct reset_control *reset_control_get(struct device *dev, const char *id)  	int rstc_id;  	int ret; -	if (!dev) -		return ERR_PTR(-EINVAL); -  	if (id) -		index = of_property_match_string(dev->of_node, +		index = of_property_match_string(node,  						 "reset-names", id); -	ret = of_parse_phandle_with_args(dev->of_node, "resets", "#reset-cells", +	ret = of_parse_phandle_with_args(node, "resets", "#reset-cells",  					 index, &args);  	if (ret)  		return ERR_PTR(ret); @@ -167,7 +164,7 @@ struct reset_control *reset_control_get(struct device *dev, const char *id)  	if (!rcdev) {  		mutex_unlock(&reset_controller_list_mutex); -		return ERR_PTR(-ENODEV); +		return ERR_PTR(-EPROBE_DEFER);  	}  	rstc_id = rcdev->of_xlate(rcdev, &args); @@ -185,12 +182,35 @@ struct reset_control *reset_control_get(struct device *dev, const char *id)  		return ERR_PTR(-ENOMEM);  	} -	rstc->dev = dev;  	rstc->rcdev = rcdev;  	rstc->id = rstc_id;  	return rstc;  } +EXPORT_SYMBOL_GPL(of_reset_control_get); + +/** + * reset_control_get - Lookup and obtain a reference to a reset controller. + * @dev: device to be reset by the controller + * @id: reset line name + * + * Returns a struct reset_control or IS_ERR() condition containing errno. + * + * Use of id names is optional. + */ +struct reset_control *reset_control_get(struct device *dev, const char *id) +{ +	struct reset_control *rstc; + +	if (!dev) +		return ERR_PTR(-EINVAL); + +	rstc = of_reset_control_get(dev->of_node, id); +	if (!IS_ERR(rstc)) +		rstc->dev = dev; + +	return rstc; +}  EXPORT_SYMBOL_GPL(reset_control_get);  /** @@ -243,33 +263,6 @@ struct reset_control *devm_reset_control_get(struct device *dev, const char *id)  }  EXPORT_SYMBOL_GPL(devm_reset_control_get); -static int devm_reset_control_match(struct device *dev, void *res, void *data) -{ -	struct reset_control **rstc = res; -	if (WARN_ON(!rstc || !*rstc)) -		return 0; -	return *rstc == data; -} - -/** - * devm_reset_control_put - resource managed reset_control_put() - * @rstc: reset controller to free - * - * Deallocate a reset control allocated withd devm_reset_control_get(). - * This function will not need to be called normally, as devres will take - * care of freeing the resource. - */ -void devm_reset_control_put(struct reset_control *rstc) -{ -	int ret; - -	ret = devres_release(rstc->dev, devm_reset_control_release, -			     devm_reset_control_match, rstc); -	if (ret) -		WARN_ON(ret); -} -EXPORT_SYMBOL_GPL(devm_reset_control_put); -  /**   * device_reset - find reset controller associated with the device   *                and perform reset diff --git a/drivers/reset/reset-socfpga.c b/drivers/reset/reset-socfpga.c new file mode 100644 index 00000000000..79c32ca84ef --- /dev/null +++ b/drivers/reset/reset-socfpga.c @@ -0,0 +1,146 @@ +/* + * Copyright 2014 Steffen Trumtrar <s.trumtrar@pengutronix.de> + * + * based on + * Allwinner SoCs Reset Controller driver + * + * Copyright 2013 Maxime Ripard + * + * Maxime Ripard <maxime.ripard@free-electrons.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include <linux/err.h> +#include <linux/io.h> +#include <linux/module.h> +#include <linux/of.h> +#include <linux/platform_device.h> +#include <linux/reset-controller.h> +#include <linux/spinlock.h> +#include <linux/types.h> + +#define NR_BANKS		4 +#define OFFSET_MODRST		0x10 + +struct socfpga_reset_data { +	spinlock_t			lock; +	void __iomem			*membase; +	struct reset_controller_dev	rcdev; +}; + +static int socfpga_reset_assert(struct reset_controller_dev *rcdev, +				unsigned long id) +{ +	struct socfpga_reset_data *data = container_of(rcdev, +						     struct socfpga_reset_data, +						     rcdev); +	int bank = id / BITS_PER_LONG; +	int offset = id % BITS_PER_LONG; +	unsigned long flags; +	u32 reg; + +	spin_lock_irqsave(&data->lock, flags); + +	reg = readl(data->membase + OFFSET_MODRST + (bank * NR_BANKS)); +	writel(reg | BIT(offset), data->membase + OFFSET_MODRST + +				 (bank * NR_BANKS)); +	spin_unlock_irqrestore(&data->lock, flags); + +	return 0; +} + +static int socfpga_reset_deassert(struct reset_controller_dev *rcdev, +				  unsigned long id) +{ +	struct socfpga_reset_data *data = container_of(rcdev, +						     struct socfpga_reset_data, +						     rcdev); + +	int bank = id / BITS_PER_LONG; +	int offset = id % BITS_PER_LONG; +	unsigned long flags; +	u32 reg; + +	spin_lock_irqsave(&data->lock, flags); + +	reg = readl(data->membase + OFFSET_MODRST + (bank * NR_BANKS)); +	writel(reg & ~BIT(offset), data->membase + OFFSET_MODRST + +				  (bank * NR_BANKS)); + +	spin_unlock_irqrestore(&data->lock, flags); + +	return 0; +} + +static struct reset_control_ops socfpga_reset_ops = { +	.assert		= socfpga_reset_assert, +	.deassert	= socfpga_reset_deassert, +}; + +static int socfpga_reset_probe(struct platform_device *pdev) +{ +	struct socfpga_reset_data *data; +	struct resource *res; + +	/* +	 * The binding was mainlined without the required property. +	 * Do not continue, when we encounter an old DT. +	 */ +	if (!of_find_property(pdev->dev.of_node, "#reset-cells", NULL)) { +		dev_err(&pdev->dev, "%s missing #reset-cells property\n", +			pdev->dev.of_node->full_name); +		return -EINVAL; +	} + +	data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); +	if (!data) +		return -ENOMEM; + +	res = platform_get_resource(pdev, IORESOURCE_MEM, 0); +	data->membase = devm_ioremap_resource(&pdev->dev, res); +	if (IS_ERR(data->membase)) +		return PTR_ERR(data->membase); + +	spin_lock_init(&data->lock); + +	data->rcdev.owner = THIS_MODULE; +	data->rcdev.nr_resets = NR_BANKS * BITS_PER_LONG; +	data->rcdev.ops = &socfpga_reset_ops; +	data->rcdev.of_node = pdev->dev.of_node; +	reset_controller_register(&data->rcdev); + +	return 0; +} + +static int socfpga_reset_remove(struct platform_device *pdev) +{ +	struct socfpga_reset_data *data = platform_get_drvdata(pdev); + +	reset_controller_unregister(&data->rcdev); + +	return 0; +} + +static const struct of_device_id socfpga_reset_dt_ids[] = { +	{ .compatible = "altr,rst-mgr", }, +	{ /* sentinel */ }, +}; + +static struct platform_driver socfpga_reset_driver = { +	.probe	= socfpga_reset_probe, +	.remove	= socfpga_reset_remove, +	.driver = { +		.name		= "socfpga-reset", +		.owner		= THIS_MODULE, +		.of_match_table	= socfpga_reset_dt_ids, +	}, +}; +module_platform_driver(socfpga_reset_driver); + +MODULE_AUTHOR("Steffen Trumtrar <s.trumtrar@pengutronix.de"); +MODULE_DESCRIPTION("Socfpga Reset Controller Driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/reset/reset-sunxi.c b/drivers/reset/reset-sunxi.c new file mode 100644 index 00000000000..a94e7a7820b --- /dev/null +++ b/drivers/reset/reset-sunxi.c @@ -0,0 +1,190 @@ +/* + * Allwinner SoCs Reset Controller driver + * + * Copyright 2013 Maxime Ripard + * + * Maxime Ripard <maxime.ripard@free-electrons.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include <linux/err.h> +#include <linux/io.h> +#include <linux/module.h> +#include <linux/of.h> +#include <linux/of_address.h> +#include <linux/platform_device.h> +#include <linux/reset-controller.h> +#include <linux/slab.h> +#include <linux/spinlock.h> +#include <linux/types.h> + +struct sunxi_reset_data { +	spinlock_t			lock; +	void __iomem			*membase; +	struct reset_controller_dev	rcdev; +}; + +static int sunxi_reset_assert(struct reset_controller_dev *rcdev, +			      unsigned long id) +{ +	struct sunxi_reset_data *data = container_of(rcdev, +						     struct sunxi_reset_data, +						     rcdev); +	int bank = id / BITS_PER_LONG; +	int offset = id % BITS_PER_LONG; +	unsigned long flags; +	u32 reg; + +	spin_lock_irqsave(&data->lock, flags); + +	reg = readl(data->membase + (bank * 4)); +	writel(reg & ~BIT(offset), data->membase + (bank * 4)); + +	spin_unlock_irqrestore(&data->lock, flags); + +	return 0; +} + +static int sunxi_reset_deassert(struct reset_controller_dev *rcdev, +				unsigned long id) +{ +	struct sunxi_reset_data *data = container_of(rcdev, +						     struct sunxi_reset_data, +						     rcdev); +	int bank = id / BITS_PER_LONG; +	int offset = id % BITS_PER_LONG; +	unsigned long flags; +	u32 reg; + +	spin_lock_irqsave(&data->lock, flags); + +	reg = readl(data->membase + (bank * 4)); +	writel(reg | BIT(offset), data->membase + (bank * 4)); + +	spin_unlock_irqrestore(&data->lock, flags); + +	return 0; +} + +static struct reset_control_ops sunxi_reset_ops = { +	.assert		= sunxi_reset_assert, +	.deassert	= sunxi_reset_deassert, +}; + +static int sunxi_reset_init(struct device_node *np) +{ +	struct sunxi_reset_data *data; +	struct resource res; +	resource_size_t size; +	int ret; + +	data = kzalloc(sizeof(*data), GFP_KERNEL); +	if (!data) +		return -ENOMEM; + +	ret = of_address_to_resource(np, 0, &res); +	if (ret) +		goto err_alloc; + +	size = resource_size(&res); +	if (!request_mem_region(res.start, size, np->name)) { +		ret = -EBUSY; +		goto err_alloc; +	} + +	data->membase = ioremap(res.start, size); +	if (!data->membase) { +		ret = -ENOMEM; +		goto err_alloc; +	} + +	data->rcdev.owner = THIS_MODULE; +	data->rcdev.nr_resets = size * 32; +	data->rcdev.ops = &sunxi_reset_ops; +	data->rcdev.of_node = np; +	reset_controller_register(&data->rcdev); + +	return 0; + +err_alloc: +	kfree(data); +	return ret; +}; + +/* + * These are the reset controller we need to initialize early on in + * our system, before we can even think of using a regular device + * driver for it. + */ +static const struct of_device_id sunxi_early_reset_dt_ids[] __initdata = { +	{ .compatible = "allwinner,sun6i-a31-ahb1-reset", }, +	{ /* sentinel */ }, +}; + +void __init sun6i_reset_init(void) +{ +	struct device_node *np; + +	for_each_matching_node(np, sunxi_early_reset_dt_ids) +		sunxi_reset_init(np); +} + +/* + * And these are the controllers we can register through the regular + * device model. + */ +static const struct of_device_id sunxi_reset_dt_ids[] = { +	 { .compatible = "allwinner,sun6i-a31-clock-reset", }, +	 { /* sentinel */ }, +}; +MODULE_DEVICE_TABLE(of, sunxi_reset_dt_ids); + +static int sunxi_reset_probe(struct platform_device *pdev) +{ +	struct sunxi_reset_data *data; +	struct resource *res; + +	data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); +	if (!data) +		return -ENOMEM; + +	res = platform_get_resource(pdev, IORESOURCE_MEM, 0); +	data->membase = devm_ioremap_resource(&pdev->dev, res); +	if (IS_ERR(data->membase)) +		return PTR_ERR(data->membase); + +	data->rcdev.owner = THIS_MODULE; +	data->rcdev.nr_resets = resource_size(res) * 32; +	data->rcdev.ops = &sunxi_reset_ops; +	data->rcdev.of_node = pdev->dev.of_node; + +	return reset_controller_register(&data->rcdev); +} + +static int sunxi_reset_remove(struct platform_device *pdev) +{ +	struct sunxi_reset_data *data = platform_get_drvdata(pdev); + +	reset_controller_unregister(&data->rcdev); + +	return 0; +} + +static struct platform_driver sunxi_reset_driver = { +	.probe	= sunxi_reset_probe, +	.remove	= sunxi_reset_remove, +	.driver = { +		.name		= "sunxi-reset", +		.owner		= THIS_MODULE, +		.of_match_table	= sunxi_reset_dt_ids, +	}, +}; +module_platform_driver(sunxi_reset_driver); + +MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com"); +MODULE_DESCRIPTION("Allwinner SoCs Reset Controller Driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/reset/sti/Kconfig b/drivers/reset/sti/Kconfig new file mode 100644 index 00000000000..88d2d031661 --- /dev/null +++ b/drivers/reset/sti/Kconfig @@ -0,0 +1,15 @@ +if ARCH_STI + +config STI_RESET_SYSCFG +	bool +	select RESET_CONTROLLER + +config STIH415_RESET +	bool +	select STI_RESET_SYSCFG + +config STIH416_RESET +	bool +	select STI_RESET_SYSCFG + +endif diff --git a/drivers/reset/sti/Makefile b/drivers/reset/sti/Makefile new file mode 100644 index 00000000000..be1c9764787 --- /dev/null +++ b/drivers/reset/sti/Makefile @@ -0,0 +1,4 @@ +obj-$(CONFIG_STI_RESET_SYSCFG) += reset-syscfg.o + +obj-$(CONFIG_STIH415_RESET) += reset-stih415.o +obj-$(CONFIG_STIH416_RESET) += reset-stih416.o diff --git a/drivers/reset/sti/reset-stih415.c b/drivers/reset/sti/reset-stih415.c new file mode 100644 index 00000000000..c93fd260447 --- /dev/null +++ b/drivers/reset/sti/reset-stih415.c @@ -0,0 +1,113 @@ +/* + * Copyright (C) 2013 STMicroelectronics (R&D) Limited + * Author: Stephen Gallimore <stephen.gallimore@st.com> + * Author: Srinivas Kandagatla <srinivas.kandagatla@st.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ +#include <linux/module.h> +#include <linux/of.h> +#include <linux/of_platform.h> +#include <linux/platform_device.h> + +#include <dt-bindings/reset-controller/stih415-resets.h> + +#include "reset-syscfg.h" + +/* + * STiH415 Peripheral powerdown definitions. + */ +static const char stih415_front[] = "st,stih415-front-syscfg"; +static const char stih415_rear[] = "st,stih415-rear-syscfg"; +static const char stih415_sbc[] = "st,stih415-sbc-syscfg"; +static const char stih415_lpm[] = "st,stih415-lpm-syscfg"; + +#define STIH415_PDN_FRONT(_bit) \ +	_SYSCFG_RST_CH(stih415_front, SYSCFG_114, _bit, SYSSTAT_187, _bit) + +#define STIH415_PDN_REAR(_cntl, _stat) \ +	_SYSCFG_RST_CH(stih415_rear, SYSCFG_336, _cntl, SYSSTAT_384, _stat) + +#define STIH415_SRST_REAR(_reg, _bit) \ +	_SYSCFG_RST_CH_NO_ACK(stih415_rear, _reg, _bit) + +#define STIH415_SRST_SBC(_reg, _bit) \ +	_SYSCFG_RST_CH_NO_ACK(stih415_sbc, _reg, _bit) + +#define STIH415_SRST_FRONT(_reg, _bit) \ +	_SYSCFG_RST_CH_NO_ACK(stih415_front, _reg, _bit) + +#define STIH415_SRST_LPM(_reg, _bit) \ +	_SYSCFG_RST_CH_NO_ACK(stih415_lpm, _reg, _bit) + +#define SYSCFG_114	0x38 /* Powerdown request EMI/NAND/Keyscan */ +#define SYSSTAT_187	0x15c /* Powerdown status EMI/NAND/Keyscan */ + +#define SYSCFG_336	0x90 /* Powerdown request USB/SATA/PCIe */ +#define SYSSTAT_384	0x150 /* Powerdown status USB/SATA/PCIe */ + +#define SYSCFG_376	0x130 /* Reset generator 0 control 0 */ +#define SYSCFG_166	0x108 /* Softreset Ethernet 0 */ +#define SYSCFG_31	0x7c /* Softreset Ethernet 1 */ +#define LPM_SYSCFG_1	0x4 /* Softreset IRB */ + +static const struct syscfg_reset_channel_data stih415_powerdowns[] = { +	[STIH415_EMISS_POWERDOWN]	= STIH415_PDN_FRONT(0), +	[STIH415_NAND_POWERDOWN]	= STIH415_PDN_FRONT(1), +	[STIH415_KEYSCAN_POWERDOWN]	= STIH415_PDN_FRONT(2), +	[STIH415_USB0_POWERDOWN]	= STIH415_PDN_REAR(0, 0), +	[STIH415_USB1_POWERDOWN]	= STIH415_PDN_REAR(1, 1), +	[STIH415_USB2_POWERDOWN]	= STIH415_PDN_REAR(2, 2), +	[STIH415_SATA0_POWERDOWN]	= STIH415_PDN_REAR(3, 3), +	[STIH415_SATA1_POWERDOWN]	= STIH415_PDN_REAR(4, 4), +	[STIH415_PCIE_POWERDOWN]	= STIH415_PDN_REAR(5, 8), +}; + +static const struct syscfg_reset_channel_data stih415_softresets[] = { +	[STIH415_ETH0_SOFTRESET] = STIH415_SRST_FRONT(SYSCFG_166, 0), +	[STIH415_ETH1_SOFTRESET] = STIH415_SRST_SBC(SYSCFG_31, 0), +	[STIH415_IRB_SOFTRESET]	 = STIH415_SRST_LPM(LPM_SYSCFG_1, 6), +	[STIH415_USB0_SOFTRESET] = STIH415_SRST_REAR(SYSCFG_376, 9), +	[STIH415_USB1_SOFTRESET] = STIH415_SRST_REAR(SYSCFG_376, 10), +	[STIH415_USB2_SOFTRESET] = STIH415_SRST_REAR(SYSCFG_376, 11), +	[STIH415_KEYSCAN_SOFTRESET] = STIH415_SRST_LPM(LPM_SYSCFG_1, 8), +}; + +static struct syscfg_reset_controller_data stih415_powerdown_controller = { +	.wait_for_ack = true, +	.nr_channels = ARRAY_SIZE(stih415_powerdowns), +	.channels = stih415_powerdowns, +}; + +static struct syscfg_reset_controller_data stih415_softreset_controller = { +	.wait_for_ack = false, +	.active_low = true, +	.nr_channels = ARRAY_SIZE(stih415_softresets), +	.channels = stih415_softresets, +}; + +static struct of_device_id stih415_reset_match[] = { +	{ .compatible = "st,stih415-powerdown", +	  .data = &stih415_powerdown_controller, }, +	{ .compatible = "st,stih415-softreset", +	  .data = &stih415_softreset_controller, }, +	{}, +}; + +static struct platform_driver stih415_reset_driver = { +	.probe = syscfg_reset_probe, +	.driver = { +		.name = "reset-stih415", +		.owner = THIS_MODULE, +		.of_match_table = stih415_reset_match, +	}, +}; + +static int __init stih415_reset_init(void) +{ +	return platform_driver_register(&stih415_reset_driver); +} +arch_initcall(stih415_reset_init); diff --git a/drivers/reset/sti/reset-stih416.c b/drivers/reset/sti/reset-stih416.c new file mode 100644 index 00000000000..5fc987076a9 --- /dev/null +++ b/drivers/reset/sti/reset-stih416.c @@ -0,0 +1,144 @@ +/* + * Copyright (C) 2013 STMicroelectronics (R&D) Limited + * Author: Stephen Gallimore <stephen.gallimore@st.com> + * Author: Srinivas Kandagatla <srinivas.kandagatla@st.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ +#include <linux/module.h> +#include <linux/of.h> +#include <linux/of_platform.h> +#include <linux/platform_device.h> + +#include <dt-bindings/reset-controller/stih416-resets.h> + +#include "reset-syscfg.h" + +/* + * STiH416 Peripheral powerdown definitions. + */ +static const char stih416_front[] = "st,stih416-front-syscfg"; +static const char stih416_rear[] = "st,stih416-rear-syscfg"; +static const char stih416_sbc[] = "st,stih416-sbc-syscfg"; +static const char stih416_lpm[] = "st,stih416-lpm-syscfg"; +static const char stih416_cpu[] = "st,stih416-cpu-syscfg"; + +#define STIH416_PDN_FRONT(_bit) \ +	_SYSCFG_RST_CH(stih416_front, SYSCFG_1500, _bit, SYSSTAT_1578, _bit) + +#define STIH416_PDN_REAR(_cntl, _stat) \ +	_SYSCFG_RST_CH(stih416_rear, SYSCFG_2525, _cntl, SYSSTAT_2583, _stat) + +#define SYSCFG_1500	0x7d0 /* Powerdown request EMI/NAND/Keyscan */ +#define SYSSTAT_1578	0x908 /* Powerdown status EMI/NAND/Keyscan */ + +#define SYSCFG_2525	0x834 /* Powerdown request USB/SATA/PCIe */ +#define SYSSTAT_2583	0x91c /* Powerdown status USB/SATA/PCIe */ + +#define SYSCFG_2552	0x8A0 /* Reset Generator control 0 */ +#define SYSCFG_1539	0x86c /* Softreset Ethernet 0 */ +#define SYSCFG_510	0x7f8 /* Softreset Ethernet 1 */ +#define LPM_SYSCFG_1	0x4 /* Softreset IRB */ +#define SYSCFG_2553	0x8a4 /* Softreset SATA0/1, PCIE0/1 */ +#define SYSCFG_7563	0x8cc /* MPE softresets 0 */ +#define SYSCFG_7564	0x8d0 /* MPE softresets 1 */ + +#define STIH416_SRST_CPU(_reg, _bit) \ +	 _SYSCFG_RST_CH_NO_ACK(stih416_cpu, _reg, _bit) + +#define STIH416_SRST_FRONT(_reg, _bit) \ +	 _SYSCFG_RST_CH_NO_ACK(stih416_front, _reg, _bit) + +#define STIH416_SRST_REAR(_reg, _bit) \ +	 _SYSCFG_RST_CH_NO_ACK(stih416_rear, _reg, _bit) + +#define STIH416_SRST_LPM(_reg, _bit) \ +	 _SYSCFG_RST_CH_NO_ACK(stih416_lpm, _reg, _bit) + +#define STIH416_SRST_SBC(_reg, _bit) \ +	 _SYSCFG_RST_CH_NO_ACK(stih416_sbc, _reg, _bit) + +static const struct syscfg_reset_channel_data stih416_powerdowns[] = { +	[STIH416_EMISS_POWERDOWN]	= STIH416_PDN_FRONT(0), +	[STIH416_NAND_POWERDOWN]	= STIH416_PDN_FRONT(1), +	[STIH416_KEYSCAN_POWERDOWN]	= STIH416_PDN_FRONT(2), +	[STIH416_USB0_POWERDOWN]	= STIH416_PDN_REAR(0, 0), +	[STIH416_USB1_POWERDOWN]	= STIH416_PDN_REAR(1, 1), +	[STIH416_USB2_POWERDOWN]	= STIH416_PDN_REAR(2, 2), +	[STIH416_USB3_POWERDOWN]	= STIH416_PDN_REAR(6, 5), +	[STIH416_SATA0_POWERDOWN]	= STIH416_PDN_REAR(3, 3), +	[STIH416_SATA1_POWERDOWN]	= STIH416_PDN_REAR(4, 4), +	[STIH416_PCIE0_POWERDOWN]	= STIH416_PDN_REAR(7, 9), +	[STIH416_PCIE1_POWERDOWN]	= STIH416_PDN_REAR(5, 8), +}; + +static const struct syscfg_reset_channel_data stih416_softresets[] = { +	[STIH416_ETH0_SOFTRESET] = STIH416_SRST_FRONT(SYSCFG_1539, 0), +	[STIH416_ETH1_SOFTRESET] = STIH416_SRST_SBC(SYSCFG_510, 0), +	[STIH416_IRB_SOFTRESET]	 = STIH416_SRST_LPM(LPM_SYSCFG_1, 6), +	[STIH416_USB0_SOFTRESET] = STIH416_SRST_REAR(SYSCFG_2552, 9), +	[STIH416_USB1_SOFTRESET] = STIH416_SRST_REAR(SYSCFG_2552, 10), +	[STIH416_USB2_SOFTRESET] = STIH416_SRST_REAR(SYSCFG_2552, 11), +	[STIH416_USB3_SOFTRESET] = STIH416_SRST_REAR(SYSCFG_2552, 28), +	[STIH416_SATA0_SOFTRESET] = STIH416_SRST_REAR(SYSCFG_2553, 7), +	[STIH416_SATA1_SOFTRESET] = STIH416_SRST_REAR(SYSCFG_2553, 3), +	[STIH416_PCIE0_SOFTRESET] = STIH416_SRST_REAR(SYSCFG_2553, 15), +	[STIH416_PCIE1_SOFTRESET] = STIH416_SRST_REAR(SYSCFG_2553, 2), +	[STIH416_AUD_DAC_SOFTRESET] = STIH416_SRST_REAR(SYSCFG_2553, 14), +	[STIH416_HDTVOUT_SOFTRESET] = STIH416_SRST_REAR(SYSCFG_2552, 5), +	[STIH416_VTAC_M_RX_SOFTRESET] = STIH416_SRST_REAR(SYSCFG_2552, 25), +	[STIH416_VTAC_A_RX_SOFTRESET] = STIH416_SRST_REAR(SYSCFG_2552, 26), +	[STIH416_SYNC_HD_SOFTRESET] = STIH416_SRST_REAR(SYSCFG_2553, 5), +	[STIH416_SYNC_SD_SOFTRESET] = STIH416_SRST_REAR(SYSCFG_2553, 6), +	[STIH416_BLITTER_SOFTRESET] = STIH416_SRST_CPU(SYSCFG_7563, 10), +	[STIH416_GPU_SOFTRESET] = STIH416_SRST_CPU(SYSCFG_7563, 11), +	[STIH416_VTAC_M_TX_SOFTRESET] = STIH416_SRST_CPU(SYSCFG_7563, 18), +	[STIH416_VTAC_A_TX_SOFTRESET] = STIH416_SRST_CPU(SYSCFG_7563, 19), +	[STIH416_VTG_AUX_SOFTRESET] = STIH416_SRST_CPU(SYSCFG_7563, 21), +	[STIH416_JPEG_DEC_SOFTRESET] = STIH416_SRST_CPU(SYSCFG_7563, 23), +	[STIH416_HVA_SOFTRESET] = STIH416_SRST_CPU(SYSCFG_7564, 2), +	[STIH416_COMPO_M_SOFTRESET] = STIH416_SRST_CPU(SYSCFG_7564, 3), +	[STIH416_COMPO_A_SOFTRESET] = STIH416_SRST_CPU(SYSCFG_7564, 4), +	[STIH416_VP8_DEC_SOFTRESET] = STIH416_SRST_CPU(SYSCFG_7564, 10), +	[STIH416_VTG_MAIN_SOFTRESET] = STIH416_SRST_CPU(SYSCFG_7564, 16), +	[STIH416_KEYSCAN_SOFTRESET] = STIH416_SRST_LPM(LPM_SYSCFG_1, 8), +}; + +static struct syscfg_reset_controller_data stih416_powerdown_controller = { +	.wait_for_ack	= true, +	.nr_channels	= ARRAY_SIZE(stih416_powerdowns), +	.channels	= stih416_powerdowns, +}; + +static struct syscfg_reset_controller_data stih416_softreset_controller = { +	.wait_for_ack = false, +	.active_low = true, +	.nr_channels = ARRAY_SIZE(stih416_softresets), +	.channels = stih416_softresets, +}; + +static struct of_device_id stih416_reset_match[] = { +	{ .compatible = "st,stih416-powerdown", +	  .data = &stih416_powerdown_controller, }, +	{ .compatible = "st,stih416-softreset", +	  .data = &stih416_softreset_controller, }, +	{}, +}; + +static struct platform_driver stih416_reset_driver = { +	.probe = syscfg_reset_probe, +	.driver = { +		.name = "reset-stih416", +		.owner = THIS_MODULE, +		.of_match_table = stih416_reset_match, +	}, +}; + +static int __init stih416_reset_init(void) +{ +	return platform_driver_register(&stih416_reset_driver); +} +arch_initcall(stih416_reset_init); diff --git a/drivers/reset/sti/reset-syscfg.c b/drivers/reset/sti/reset-syscfg.c new file mode 100644 index 00000000000..a145cc066d4 --- /dev/null +++ b/drivers/reset/sti/reset-syscfg.c @@ -0,0 +1,186 @@ +/* + * Copyright (C) 2013 STMicroelectronics Limited + * Author: Stephen Gallimore <stephen.gallimore@st.com> + * + * Inspired by mach-imx/src.c + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ +#include <linux/kernel.h> +#include <linux/platform_device.h> +#include <linux/module.h> +#include <linux/err.h> +#include <linux/types.h> +#include <linux/of_device.h> +#include <linux/regmap.h> +#include <linux/mfd/syscon.h> + +#include "reset-syscfg.h" + +/** + * Reset channel regmap configuration + * + * @reset: regmap field for the channel's reset bit. + * @ack: regmap field for the channel's ack bit (optional). + */ +struct syscfg_reset_channel { +	struct regmap_field *reset; +	struct regmap_field *ack; +}; + +/** + * A reset controller which groups together a set of related reset bits, which + * may be located in different system configuration registers. + * + * @rst: base reset controller structure. + * @active_low: are the resets in this controller active low, i.e. clearing + *              the reset bit puts the hardware into reset. + * @channels: An array of reset channels for this controller. + */ +struct syscfg_reset_controller { +	struct reset_controller_dev rst; +	bool active_low; +	struct syscfg_reset_channel *channels; +}; + +#define to_syscfg_reset_controller(_rst) \ +	container_of(_rst, struct syscfg_reset_controller, rst) + +static int syscfg_reset_program_hw(struct reset_controller_dev *rcdev, +				   unsigned long idx, int assert) +{ +	struct syscfg_reset_controller *rst = to_syscfg_reset_controller(rcdev); +	const struct syscfg_reset_channel *ch; +	u32 ctrl_val = rst->active_low ? !assert : !!assert; +	int err; + +	if (idx >= rcdev->nr_resets) +		return -EINVAL; + +	ch = &rst->channels[idx]; + +	err = regmap_field_write(ch->reset, ctrl_val); +	if (err) +		return err; + +	if (ch->ack) { +		unsigned long timeout = jiffies + msecs_to_jiffies(1000); +		u32 ack_val; + +		while (true) { +			err = regmap_field_read(ch->ack, &ack_val); +			if (err) +				return err; + +			if (ack_val == ctrl_val) +				break; + +			if (time_after(jiffies, timeout)) +				return -ETIME; + +			cpu_relax(); +		} +	} + +	return 0; +} + +static int syscfg_reset_assert(struct reset_controller_dev *rcdev, +			       unsigned long idx) +{ +	return syscfg_reset_program_hw(rcdev, idx, true); +} + +static int syscfg_reset_deassert(struct reset_controller_dev *rcdev, +				 unsigned long idx) +{ +	return syscfg_reset_program_hw(rcdev, idx, false); +} + +static int syscfg_reset_dev(struct reset_controller_dev *rcdev, +			    unsigned long idx) +{ +	int err = syscfg_reset_assert(rcdev, idx); +	if (err) +		return err; + +	return syscfg_reset_deassert(rcdev, idx); +} + +static struct reset_control_ops syscfg_reset_ops = { +	.reset    = syscfg_reset_dev, +	.assert   = syscfg_reset_assert, +	.deassert = syscfg_reset_deassert, +}; + +static int syscfg_reset_controller_register(struct device *dev, +				const struct syscfg_reset_controller_data *data) +{ +	struct syscfg_reset_controller *rc; +	size_t size; +	int i, err; + +	rc = devm_kzalloc(dev, sizeof(*rc), GFP_KERNEL); +	if (!rc) +		return -ENOMEM; + +	size = sizeof(struct syscfg_reset_channel) * data->nr_channels; + +	rc->channels = devm_kzalloc(dev, size, GFP_KERNEL); +	if (!rc->channels) +		return -ENOMEM; + +	rc->rst.ops = &syscfg_reset_ops, +	rc->rst.of_node = dev->of_node; +	rc->rst.nr_resets = data->nr_channels; +	rc->active_low = data->active_low; + +	for (i = 0; i < data->nr_channels; i++) { +		struct regmap *map; +		struct regmap_field *f; +		const char *compatible = data->channels[i].compatible; + +		map = syscon_regmap_lookup_by_compatible(compatible); +		if (IS_ERR(map)) +			return PTR_ERR(map); + +		f = devm_regmap_field_alloc(dev, map, data->channels[i].reset); +		if (IS_ERR(f)) +			return PTR_ERR(f); + +		rc->channels[i].reset = f; + +		if (!data->wait_for_ack) +			continue; + +		f = devm_regmap_field_alloc(dev, map, data->channels[i].ack); +		if (IS_ERR(f)) +			return PTR_ERR(f); + +		rc->channels[i].ack = f; +	} + +	err = reset_controller_register(&rc->rst); +	if (!err) +		dev_info(dev, "registered\n"); + +	return err; +} + +int syscfg_reset_probe(struct platform_device *pdev) +{ +	struct device *dev = pdev ? &pdev->dev : NULL; +	const struct of_device_id *match; + +	if (!dev || !dev->driver) +		return -ENODEV; + +	match = of_match_device(dev->driver->of_match_table, dev); +	if (!match || !match->data) +		return -EINVAL; + +	return syscfg_reset_controller_register(dev, match->data); +} diff --git a/drivers/reset/sti/reset-syscfg.h b/drivers/reset/sti/reset-syscfg.h new file mode 100644 index 00000000000..2cc2283bac4 --- /dev/null +++ b/drivers/reset/sti/reset-syscfg.h @@ -0,0 +1,69 @@ +/* + * Copyright (C) 2013 STMicroelectronics (R&D) Limited + * Author: Stephen Gallimore <stephen.gallimore@st.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ +#ifndef __STI_RESET_SYSCFG_H +#define __STI_RESET_SYSCFG_H + +#include <linux/device.h> +#include <linux/regmap.h> +#include <linux/reset-controller.h> + +/** + * Reset channel description for a system configuration register based + * reset controller. + * + * @compatible: Compatible string of the syscon regmap containing this + *              channel's control and ack (status) bits. + * @reset: Regmap field description of the channel's reset bit. + * @ack: Regmap field description of the channel's acknowledge bit. + */ +struct syscfg_reset_channel_data { +	const char *compatible; +	struct reg_field reset; +	struct reg_field ack; +}; + +#define _SYSCFG_RST_CH(_c, _rr, _rb, _ar, _ab)		\ +	{ .compatible	= _c,				\ +	  .reset	= REG_FIELD(_rr, _rb, _rb),	\ +	  .ack		= REG_FIELD(_ar, _ab, _ab), } + +#define _SYSCFG_RST_CH_NO_ACK(_c, _rr, _rb)		\ +	{ .compatible	= _c,			\ +	  .reset	= REG_FIELD(_rr, _rb, _rb), } + +/** + * Description of a system configuration register based reset controller. + * + * @wait_for_ack: The controller will wait for reset assert and de-assert to + *                be "ack'd" in a channel's ack field. + * @active_low: Are the resets in this controller active low, i.e. clearing + *              the reset bit puts the hardware into reset. + * @nr_channels: The number of reset channels in this controller. + * @channels: An array of reset channel descriptions. + */ +struct syscfg_reset_controller_data { +	bool wait_for_ack; +	bool active_low; +	int nr_channels; +	const struct syscfg_reset_channel_data *channels; +}; + +/** + * syscfg_reset_probe(): platform device probe function used by syscfg + *                       reset controller drivers. This registers a reset + *                       controller configured by the OF match data for + *                       the compatible device which should be of type + *                       "struct syscfg_reset_controller_data". + * + * @pdev: platform device + */ +int syscfg_reset_probe(struct platform_device *pdev); + +#endif /* __STI_RESET_SYSCFG_H */  | 
