diff options
Diffstat (limited to 'drivers/net/usb/smsc95xx.h')
| -rw-r--r-- | drivers/net/usb/smsc95xx.h | 40 |
1 files changed, 37 insertions, 3 deletions
diff --git a/drivers/net/usb/smsc95xx.h b/drivers/net/usb/smsc95xx.h index 86bc44977fb..526faa0c44e 100644 --- a/drivers/net/usb/smsc95xx.h +++ b/drivers/net/usb/smsc95xx.h @@ -13,8 +13,7 @@ * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * along with this program; if not, see <http://www.gnu.org/licenses/>. * *****************************************************************************/ @@ -53,6 +52,11 @@ #define ID_REV_CHIP_ID_MASK_ (0xFFFF0000) #define ID_REV_CHIP_REV_MASK_ (0x0000FFFF) #define ID_REV_CHIP_ID_9500_ (0x9500) +#define ID_REV_CHIP_ID_9500A_ (0x9E00) +#define ID_REV_CHIP_ID_9512_ (0xEC00) +#define ID_REV_CHIP_ID_9530_ (0x9530) +#define ID_REV_CHIP_ID_89530_ (0x9E08) +#define ID_REV_CHIP_ID_9730_ (0x9730) #define INT_STS (0x08) #define INT_STS_TX_STOP_ (0x00020000) @@ -63,6 +67,7 @@ #define INT_STS_TDFO_ (0x00001000) #define INT_STS_RXDF_ (0x00000800) #define INT_STS_GPIOS_ (0x000007FF) +#define INT_STS_CLEAR_ALL_ (0xFFFFFFFF) #define RX_CFG (0x0C) #define RX_FIFO_FLUSH_ (0x00000001) @@ -83,12 +88,16 @@ #define HW_CFG_BCE_ (0x00000002) #define HW_CFG_SRST_ (0x00000001) +#define RX_FIFO_INF (0x18) + #define PM_CTRL (0x20) +#define PM_CTL_RES_CLR_WKP_STS (0x00000200) #define PM_CTL_DEV_RDY_ (0x00000080) #define PM_CTL_SUS_MODE_ (0x00000060) #define PM_CTL_SUS_MODE_0 (0x00000000) #define PM_CTL_SUS_MODE_1 (0x00000020) -#define PM_CTL_SUS_MODE_2 (0x00000060) +#define PM_CTL_SUS_MODE_2 (0x00000040) +#define PM_CTL_SUS_MODE_3 (0x00000060) #define PM_CTL_PHY_RST_ (0x00000010) #define PM_CTL_WOL_EN_ (0x00000008) #define PM_CTL_ED_EN_ (0x00000004) @@ -198,8 +207,16 @@ #define VLAN2 (0x124) #define WUFF (0x128) +#define LAN9500_WUFF_NUM (4) +#define LAN9500A_WUFF_NUM (8) #define WUCSR (0x12C) +#define WUCSR_WFF_PTR_RST_ (0x80000000) +#define WUCSR_GUE_ (0x00000200) +#define WUCSR_WUFR_ (0x00000040) +#define WUCSR_MPR_ (0x00000020) +#define WUCSR_WAKE_EN_ (0x00000004) +#define WUCSR_MPEN_ (0x00000002) #define COE_CR (0x130) #define Tx_COE_EN_ (0x00010000) @@ -208,6 +225,23 @@ /* Vendor-specific PHY Definitions */ +/* EDPD NLP / crossover time configuration (LAN9500A only) */ +#define PHY_EDPD_CONFIG (16) +#define PHY_EDPD_CONFIG_TX_NLP_EN_ ((u16)0x8000) +#define PHY_EDPD_CONFIG_TX_NLP_1000_ ((u16)0x0000) +#define PHY_EDPD_CONFIG_TX_NLP_768_ ((u16)0x2000) +#define PHY_EDPD_CONFIG_TX_NLP_512_ ((u16)0x4000) +#define PHY_EDPD_CONFIG_TX_NLP_256_ ((u16)0x6000) +#define PHY_EDPD_CONFIG_RX_1_NLP_ ((u16)0x1000) +#define PHY_EDPD_CONFIG_RX_NLP_64_ ((u16)0x0000) +#define PHY_EDPD_CONFIG_RX_NLP_256_ ((u16)0x0400) +#define PHY_EDPD_CONFIG_RX_NLP_512_ ((u16)0x0800) +#define PHY_EDPD_CONFIG_RX_NLP_1000_ ((u16)0x0C00) +#define PHY_EDPD_CONFIG_EXT_CROSSOVER_ ((u16)0x0001) +#define PHY_EDPD_CONFIG_DEFAULT (PHY_EDPD_CONFIG_TX_NLP_EN_ | \ + PHY_EDPD_CONFIG_TX_NLP_768_ | \ + PHY_EDPD_CONFIG_RX_1_NLP_) + /* Mode Control/Status Register */ #define PHY_MODE_CTRL_STS (17) #define MODE_CTRL_STS_EDPWRDOWN_ ((u16)0x2000) |