diff options
Diffstat (limited to 'drivers/net/ethernet/intel/igb')
21 files changed, 1896 insertions, 1279 deletions
diff --git a/drivers/net/ethernet/intel/igb/Makefile b/drivers/net/ethernet/intel/igb/Makefile index f19700e285b..5bcb2de7593 100644 --- a/drivers/net/ethernet/intel/igb/Makefile +++ b/drivers/net/ethernet/intel/igb/Makefile @@ -1,7 +1,7 @@  ################################################################################  #  # Intel 82575 PCI-Express Ethernet Linux driver -# Copyright(c) 1999 - 2013 Intel Corporation. +# Copyright(c) 1999 - 2014 Intel Corporation.  #  # This program is free software; you can redistribute it and/or modify it  # under the terms and conditions of the GNU General Public License, @@ -13,8 +13,7 @@  # more details.  #  # You should have received a copy of the GNU General Public License along with -# this program; if not, write to the Free Software Foundation, Inc., -# 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. +# this program; if not, see <http://www.gnu.org/licenses/>.  #  # The full GNU General Public License is included in this distribution in  # the file called "COPYING". diff --git a/drivers/net/ethernet/intel/igb/e1000_82575.c b/drivers/net/ethernet/intel/igb/e1000_82575.c index 47c2d10df82..ee74f9536b3 100644 --- a/drivers/net/ethernet/intel/igb/e1000_82575.c +++ b/drivers/net/ethernet/intel/igb/e1000_82575.c @@ -1,29 +1,25 @@ -/******************************************************************************* - -  Intel(R) Gigabit Ethernet Linux driver -  Copyright(c) 2007-2013 Intel Corporation. - -  This program is free software; you can redistribute it and/or modify it -  under the terms and conditions of the GNU General Public License, -  version 2, as published by the Free Software Foundation. - -  This program is distributed in the hope it will be useful, but WITHOUT -  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for -  more details. - -  You should have received a copy of the GNU General Public License along with -  this program; if not, write to the Free Software Foundation, Inc., -  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. - -  The full GNU General Public License is included in this distribution in -  the file called "COPYING". - -  Contact Information: -  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> -  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 - -*******************************************************************************/ +/* Intel(R) Gigabit Ethernet Linux driver + * Copyright(c) 2007-2014 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, see <http://www.gnu.org/licenses/>. + * + * The full GNU General Public License is included in this distribution in + * the file called "COPYING". + * + * Contact Information: + * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> + * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 + */  /* e1000_82575   * e1000_82576 @@ -74,11 +70,8 @@ static s32  igb_validate_nvm_checksum_82580(struct e1000_hw *hw);  static s32  igb_update_nvm_checksum_82580(struct e1000_hw *hw);  static s32 igb_validate_nvm_checksum_i350(struct e1000_hw *hw);  static s32 igb_update_nvm_checksum_i350(struct e1000_hw *hw); -static const u16 e1000_82580_rxpbs_table[] = -	{ 36, 72, 144, 1, 2, 4, 8, 16, -	  35, 70, 140 }; -#define E1000_82580_RXPBS_TABLE_SIZE \ -	(sizeof(e1000_82580_rxpbs_table)/sizeof(u16)) +static const u16 e1000_82580_rxpbs_table[] = { +	36, 72, 144, 1, 2, 4, 8, 16, 35, 70, 140 };  /**   *  igb_sgmii_uses_mdio_82575 - Determine if I2C pins are for external MDIO @@ -113,6 +106,59 @@ static bool igb_sgmii_uses_mdio_82575(struct e1000_hw *hw)  }  /** + *  igb_check_for_link_media_swap - Check which M88E1112 interface linked + *  @hw: pointer to the HW structure + * + *  Poll the M88E1112 interfaces to see which interface achieved link. + */ +static s32 igb_check_for_link_media_swap(struct e1000_hw *hw) +{ +	struct e1000_phy_info *phy = &hw->phy; +	s32 ret_val; +	u16 data; +	u8 port = 0; + +	/* Check the copper medium. */ +	ret_val = phy->ops.write_reg(hw, E1000_M88E1112_PAGE_ADDR, 0); +	if (ret_val) +		return ret_val; + +	ret_val = phy->ops.read_reg(hw, E1000_M88E1112_STATUS, &data); +	if (ret_val) +		return ret_val; + +	if (data & E1000_M88E1112_STATUS_LINK) +		port = E1000_MEDIA_PORT_COPPER; + +	/* Check the other medium. */ +	ret_val = phy->ops.write_reg(hw, E1000_M88E1112_PAGE_ADDR, 1); +	if (ret_val) +		return ret_val; + +	ret_val = phy->ops.read_reg(hw, E1000_M88E1112_STATUS, &data); +	if (ret_val) +		return ret_val; + +	/* reset page to 0 */ +	ret_val = phy->ops.write_reg(hw, E1000_M88E1112_PAGE_ADDR, 0); +	if (ret_val) +		return ret_val; + +	if (data & E1000_M88E1112_STATUS_LINK) +		port = E1000_MEDIA_PORT_OTHER; + +	/* Determine if a swap needs to happen. */ +	if (port && (hw->dev_spec._82575.media_port != port)) { +		hw->dev_spec._82575.media_port = port; +		hw->dev_spec._82575.media_changed = true; +	} else { +		ret_val = igb_check_for_link_82575(hw); +	} + +	return 0; +} + +/**   *  igb_init_phy_params_82575 - Init PHY func ptrs.   *  @hw: pointer to the HW structure   **/ @@ -189,6 +235,29 @@ static s32 igb_init_phy_params_82575(struct e1000_hw *hw)  		else  			phy->ops.get_cable_length = igb_get_cable_length_m88;  		phy->ops.force_speed_duplex = igb_phy_force_speed_duplex_m88; +		/* Check if this PHY is confgured for media swap. */ +		if (phy->id == M88E1112_E_PHY_ID) { +			u16 data; + +			ret_val = phy->ops.write_reg(hw, +						     E1000_M88E1112_PAGE_ADDR, +						     2); +			if (ret_val) +				goto out; + +			ret_val = phy->ops.read_reg(hw, +						    E1000_M88E1112_MAC_CTRL_1, +						    &data); +			if (ret_val) +				goto out; + +			data = (data & E1000_M88E1112_MAC_CTRL_1_MODE_MASK) >> +			       E1000_M88E1112_MAC_CTRL_1_MODE_SHIFT; +			if (data == E1000_M88E1112_AUTO_COPPER_SGMII || +			    data == E1000_M88E1112_AUTO_COPPER_BASEX) +				hw->mac.ops.check_for_link = +						igb_check_for_link_media_swap; +		}  		break;  	case IGP03E1000_E_PHY_ID:  		phy->type = e1000_phy_igp_3; @@ -365,6 +434,19 @@ static s32 igb_init_mac_params_82575(struct e1000_hw *hw)  			? igb_setup_copper_link_82575  			: igb_setup_serdes_link_82575; +	if (mac->type == e1000_82580) { +		switch (hw->device_id) { +		/* feature not supported on these id's */ +		case E1000_DEV_ID_DH89XXCC_SGMII: +		case E1000_DEV_ID_DH89XXCC_SERDES: +		case E1000_DEV_ID_DH89XXCC_BACKPLANE: +		case E1000_DEV_ID_DH89XXCC_SFP: +			break; +		default: +			hw->dev_spec._82575.mas_capable = true; +			break; +		} +	}  	return 0;  } @@ -440,7 +522,7 @@ out:  static s32 igb_get_invariants_82575(struct e1000_hw *hw)  {  	struct e1000_mac_info *mac = &hw->mac; -	struct e1000_dev_spec_82575 * dev_spec = &hw->dev_spec._82575; +	struct e1000_dev_spec_82575 *dev_spec = &hw->dev_spec._82575;  	s32 ret_val;  	u32 ctrl_ext = 0;  	u32 link_mode = 0; @@ -922,7 +1004,6 @@ out:  static s32 igb_set_d0_lplu_state_82580(struct e1000_hw *hw, bool active)  {  	struct e1000_phy_info *phy = &hw->phy; -	s32 ret_val = 0;  	u16 data;  	data = rd32(E1000_82580_PHY_POWER_MGMT); @@ -946,7 +1027,7 @@ static s32 igb_set_d0_lplu_state_82580(struct e1000_hw *hw, bool active)  			data &= ~E1000_82580_PM_SPD; }  	wr32(E1000_82580_PHY_POWER_MGMT, data); -	return ret_val; +	return 0;  }  /** @@ -966,7 +1047,6 @@ static s32 igb_set_d0_lplu_state_82580(struct e1000_hw *hw, bool active)  static s32 igb_set_d3_lplu_state_82580(struct e1000_hw *hw, bool active)  {  	struct e1000_phy_info *phy = &hw->phy; -	s32 ret_val = 0;  	u16 data;  	data = rd32(E1000_82580_PHY_POWER_MGMT); @@ -991,7 +1071,7 @@ static s32 igb_set_d3_lplu_state_82580(struct e1000_hw *hw, bool active)  	}  	wr32(E1000_82580_PHY_POWER_MGMT, data); -	return ret_val; +	return 0;  }  /** @@ -1094,8 +1174,8 @@ static void igb_release_swfw_sync_82575(struct e1000_hw *hw, u16 mask)  {  	u32 swfw_sync; -	while (igb_get_hw_semaphore(hw) != 0); -	/* Empty */ +	while (igb_get_hw_semaphore(hw) != 0) +		; /* Empty */  	swfw_sync = rd32(E1000_SW_FW_SYNC);  	swfw_sync &= ~mask; @@ -1117,7 +1197,6 @@ static void igb_release_swfw_sync_82575(struct e1000_hw *hw, u16 mask)  static s32 igb_get_cfg_done_82575(struct e1000_hw *hw)  {  	s32 timeout = PHY_CFG_TIMEOUT; -	s32 ret_val = 0;  	u32 mask = E1000_NVM_CFG_DONE_PORT_0;  	if (hw->bus.func == 1) @@ -1130,7 +1209,7 @@ static s32 igb_get_cfg_done_82575(struct e1000_hw *hw)  	while (timeout) {  		if (rd32(E1000_EEMNGCTL) & mask)  			break; -		msleep(1); +		usleep_range(1000, 2000);  		timeout--;  	}  	if (!timeout) @@ -1141,7 +1220,7 @@ static s32 igb_get_cfg_done_82575(struct e1000_hw *hw)  	    (hw->phy.type == e1000_phy_igp_3))  		igb_phy_init_script_igp3(hw); -	return ret_val; +	return 0;  }  /** @@ -1183,7 +1262,7 @@ static s32 igb_check_for_link_82575(struct e1000_hw *hw)  	if (hw->phy.media_type != e1000_media_type_copper) {  		ret_val = igb_get_pcs_speed_and_duplex_82575(hw, &speed, -		                                             &duplex); +							     &duplex);  		/* Use this flag to determine if link needs to be checked or  		 * not.  If  we have link clear the flag so that we do not  		 * continue to check for link. @@ -1230,7 +1309,7 @@ void igb_power_up_serdes_link_82575(struct e1000_hw *hw)  	/* flush the write to verify completion */  	wrfl(); -	msleep(1); +	usleep_range(1000, 2000);  }  /** @@ -1325,7 +1404,7 @@ void igb_shutdown_serdes_link_82575(struct e1000_hw *hw)  		/* flush the write to verify completion */  		wrfl(); -		msleep(1); +		usleep_range(1000, 2000);  	}  } @@ -1350,9 +1429,8 @@ static s32 igb_reset_hw_82575(struct e1000_hw *hw)  	/* set the completion timeout for interface */  	ret_val = igb_set_pcie_completion_timeout(hw); -	if (ret_val) { +	if (ret_val)  		hw_dbg("PCI-E Set completion timeout has failed.\n"); -	}  	hw_dbg("Masking off all interrupts\n");  	wr32(E1000_IMC, 0xffffffff); @@ -1361,7 +1439,7 @@ static s32 igb_reset_hw_82575(struct e1000_hw *hw)  	wr32(E1000_TCTL, E1000_TCTL_PSP);  	wrfl(); -	msleep(10); +	usleep_range(10000, 20000);  	ctrl = rd32(E1000_CTRL); @@ -1403,6 +1481,13 @@ static s32 igb_init_hw_82575(struct e1000_hw *hw)  	s32 ret_val;  	u16 i, rar_count = mac->rar_entry_count; +	if ((hw->mac.type >= e1000_i210) && +	    !(igb_get_flash_presence_i210(hw))) { +		ret_val = igb_pll_workaround_i210(hw); +		if (ret_val) +			return ret_val; +	} +  	/* Initialize identification LED */  	ret_val = igb_id_led_init(hw);  	if (ret_val) { @@ -1536,7 +1621,7 @@ static s32 igb_setup_serdes_link_82575(struct e1000_hw *hw)  {  	u32 ctrl_ext, ctrl_reg, reg, anadv_reg;  	bool pcs_autoneg; -	s32 ret_val = E1000_SUCCESS; +	s32 ret_val = 0;  	u16 data;  	if ((hw->phy.media_type != e1000_media_type_internal_serdes) && @@ -1590,7 +1675,7 @@ static s32 igb_setup_serdes_link_82575(struct e1000_hw *hw)  		    hw->mac.type == e1000_82576) {  			ret_val = hw->nvm.ops.read(hw, NVM_COMPAT, 1, &data);  			if (ret_val) { -				printk(KERN_DEBUG "NVM Read Error\n\n"); +				hw_dbg(KERN_DEBUG "NVM Read Error\n\n");  				return ret_val;  			} @@ -1603,7 +1688,7 @@ static s32 igb_setup_serdes_link_82575(struct e1000_hw *hw)  		 * link either autoneg or be forced to 1000/Full  		 */  		ctrl_reg |= E1000_CTRL_SPD_1000 | E1000_CTRL_FRCSPD | -		            E1000_CTRL_FD | E1000_CTRL_FRCDPX; +				E1000_CTRL_FD | E1000_CTRL_FRCDPX;  		/* set speed of 1000/Full if speed/duplex is forced */  		reg |= E1000_PCS_LCTL_FSV_1000 | E1000_PCS_LCTL_FDV_FULL; @@ -1839,7 +1924,7 @@ void igb_rx_fifo_flush_82575(struct e1000_hw *hw)  	}  	/* Poll all queues to verify they have shut down */  	for (ms_wait = 0; ms_wait < 10; ms_wait++) { -		msleep(1); +		usleep_range(1000, 2000);  		rx_enabled = 0;  		for (i = 0; i < 4; i++)  			rx_enabled |= rd32(E1000_RXDCTL(i)); @@ -1867,7 +1952,7 @@ void igb_rx_fifo_flush_82575(struct e1000_hw *hw)  	wr32(E1000_RCTL, temp_rctl);  	wr32(E1000_RCTL, temp_rctl | E1000_RCTL_EN);  	wrfl(); -	msleep(2); +	usleep_range(2000, 3000);  	/* Enable RX queues that were previously enabled and restore our  	 * previous state @@ -1919,14 +2004,14 @@ static s32 igb_set_pcie_completion_timeout(struct e1000_hw *hw)  	 * 16ms to 55ms  	 */  	ret_val = igb_read_pcie_cap_reg(hw, PCIE_DEVICE_CONTROL2, -	                                &pcie_devctl2); +					&pcie_devctl2);  	if (ret_val)  		goto out;  	pcie_devctl2 |= PCIE_DEVICE_CONTROL2_16ms;  	ret_val = igb_write_pcie_cap_reg(hw, PCIE_DEVICE_CONTROL2, -	                                 &pcie_devctl2); +					 &pcie_devctl2);  out:  	/* disable completion timeout resend */  	gcr &= ~E1000_GCR_CMPL_TMOUT_RESEND; @@ -2155,7 +2240,7 @@ static s32 igb_reset_hw_82580(struct e1000_hw *hw)  	wr32(E1000_TCTL, E1000_TCTL_PSP);  	wrfl(); -	msleep(10); +	usleep_range(10000, 11000);  	/* Determine whether or not a global dev reset is requested */  	if (global_device_reset && @@ -2173,7 +2258,7 @@ static s32 igb_reset_hw_82580(struct e1000_hw *hw)  	/* Add delay to insure DEV_RST has time to complete */  	if (global_device_reset) -		msleep(5); +		usleep_range(5000, 6000);  	ret_val = igb_get_auto_rd_done(hw);  	if (ret_val) { @@ -2219,7 +2304,7 @@ u16 igb_rxpbs_adjust_82580(u32 data)  {  	u16 ret_val = 0; -	if (data < E1000_82580_RXPBS_TABLE_SIZE) +	if (data < ARRAY_SIZE(e1000_82580_rxpbs_table))  		ret_val = e1000_82580_rxpbs_table[data];  	return ret_val; @@ -2350,8 +2435,7 @@ static s32 igb_update_nvm_checksum_82580(struct e1000_hw *hw)  	ret_val = hw->nvm.ops.read(hw, NVM_COMPATIBILITY_REG_3, 1, &nvm_data);  	if (ret_val) { -		hw_dbg("NVM Read Error while updating checksum" -			" compatibility bit.\n"); +		hw_dbg("NVM Read Error while updating checksum compatibility bit.\n");  		goto out;  	} @@ -2361,8 +2445,7 @@ static s32 igb_update_nvm_checksum_82580(struct e1000_hw *hw)  		ret_val = hw->nvm.ops.write(hw, NVM_COMPATIBILITY_REG_3, 1,  					&nvm_data);  		if (ret_val) { -			hw_dbg("NVM Write Error while updating checksum" -				" compatibility bit.\n"); +			hw_dbg("NVM Write Error while updating checksum compatibility bit.\n");  			goto out;  		}  	} @@ -2439,7 +2522,7 @@ out:  static s32 __igb_access_emi_reg(struct e1000_hw *hw, u16 address,  				  u16 *data, bool read)  { -	s32 ret_val = E1000_SUCCESS; +	s32 ret_val = 0;  	ret_val = hw->phy.ops.write_reg(hw, E1000_EMIADD, address);  	if (ret_val) @@ -2473,7 +2556,6 @@ s32 igb_read_emi_reg(struct e1000_hw *hw, u16 addr, u16 *data)   **/  s32 igb_set_eee_i350(struct e1000_hw *hw)  { -	s32 ret_val = 0;  	u32 ipcnfg, eeer;  	if ((hw->mac.type < e1000_i350) || @@ -2507,7 +2589,7 @@ s32 igb_set_eee_i350(struct e1000_hw *hw)  	rd32(E1000_EEER);  out: -	return ret_val; +	return 0;  }  /** @@ -2625,15 +2707,15 @@ static const u8 e1000_emc_therm_limit[4] = {  	E1000_EMC_DIODE3_THERM_LIMIT  }; +#ifdef CONFIG_IGB_HWMON  /**   *  igb_get_thermal_sensor_data_generic - Gathers thermal sensor data   *  @hw: pointer to hardware structure   *   *  Updates the temperatures in mac.thermal_sensor_data   **/ -s32 igb_get_thermal_sensor_data_generic(struct e1000_hw *hw) +static s32 igb_get_thermal_sensor_data_generic(struct e1000_hw *hw)  { -	s32 status = E1000_SUCCESS;  	u16 ets_offset;  	u16 ets_cfg;  	u16 ets_sensor; @@ -2651,7 +2733,7 @@ s32 igb_get_thermal_sensor_data_generic(struct e1000_hw *hw)  	/* Return the internal sensor only if ETS is unsupported */  	hw->nvm.ops.read(hw, NVM_ETS_CFG, 1, &ets_offset);  	if ((ets_offset == 0x0000) || (ets_offset == 0xFFFF)) -		return status; +		return 0;  	hw->nvm.ops.read(hw, ets_offset, 1, &ets_cfg);  	if (((ets_cfg & NVM_ETS_TYPE_MASK) >> NVM_ETS_TYPE_SHIFT) @@ -2675,7 +2757,7 @@ s32 igb_get_thermal_sensor_data_generic(struct e1000_hw *hw)  					E1000_I2C_THERMAL_SENSOR_ADDR,  					&data->sensor[i].temp);  	} -	return status; +	return 0;  }  /** @@ -2685,9 +2767,8 @@ s32 igb_get_thermal_sensor_data_generic(struct e1000_hw *hw)   *  Sets the thermal sensor thresholds according to the NVM map   *  and save off the threshold and location values into mac.thermal_sensor_data   **/ -s32 igb_init_thermal_sensor_thresh_generic(struct e1000_hw *hw) +static s32 igb_init_thermal_sensor_thresh_generic(struct e1000_hw *hw)  { -	s32 status = E1000_SUCCESS;  	u16 ets_offset;  	u16 ets_cfg;  	u16 ets_sensor; @@ -2713,7 +2794,7 @@ s32 igb_init_thermal_sensor_thresh_generic(struct e1000_hw *hw)  	/* Return the internal sensor only if ETS is unsupported */  	hw->nvm.ops.read(hw, NVM_ETS_CFG, 1, &ets_offset);  	if ((ets_offset == 0x0000) || (ets_offset == 0xFFFF)) -		return status; +		return 0;  	hw->nvm.ops.read(hw, ets_offset, 1, &ets_cfg);  	if (((ets_cfg & NVM_ETS_TYPE_MASK) >> NVM_ETS_TYPE_SHIFT) @@ -2744,9 +2825,10 @@ s32 igb_init_thermal_sensor_thresh_generic(struct e1000_hw *hw)  							low_thresh_delta;  		}  	} -	return status; +	return 0;  } +#endif  static struct e1000_mac_operations e1000_mac_ops_82575 = {  	.init_hw              = igb_init_hw_82575,  	.check_for_link       = igb_check_for_link_82575, diff --git a/drivers/net/ethernet/intel/igb/e1000_82575.h b/drivers/net/ethernet/intel/igb/e1000_82575.h index 74a1506b423..b407c55738f 100644 --- a/drivers/net/ethernet/intel/igb/e1000_82575.h +++ b/drivers/net/ethernet/intel/igb/e1000_82575.h @@ -1,46 +1,42 @@ -/******************************************************************************* - -  Intel(R) Gigabit Ethernet Linux driver -  Copyright(c) 2007-2013 Intel Corporation. - -  This program is free software; you can redistribute it and/or modify it -  under the terms and conditions of the GNU General Public License, -  version 2, as published by the Free Software Foundation. - -  This program is distributed in the hope it will be useful, but WITHOUT -  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for -  more details. - -  You should have received a copy of the GNU General Public License along with -  this program; if not, write to the Free Software Foundation, Inc., -  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. - -  The full GNU General Public License is included in this distribution in -  the file called "COPYING". - -  Contact Information: -  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> -  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 - -*******************************************************************************/ +/* Intel(R) Gigabit Ethernet Linux driver + * Copyright(c) 2007-2014 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, see <http://www.gnu.org/licenses/>. + * + * The full GNU General Public License is included in this distribution in + * the file called "COPYING". + * + * Contact Information: + * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> + * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 + */  #ifndef _E1000_82575_H_  #define _E1000_82575_H_ -extern void igb_shutdown_serdes_link_82575(struct e1000_hw *hw); -extern void igb_power_up_serdes_link_82575(struct e1000_hw *hw); -extern void igb_power_down_phy_copper_82575(struct e1000_hw *hw); -extern void igb_rx_fifo_flush_82575(struct e1000_hw *hw); -extern s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset, -				u8 dev_addr, u8 *data); -extern s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset, -				 u8 dev_addr, u8 data); +void igb_shutdown_serdes_link_82575(struct e1000_hw *hw); +void igb_power_up_serdes_link_82575(struct e1000_hw *hw); +void igb_power_down_phy_copper_82575(struct e1000_hw *hw); +void igb_rx_fifo_flush_82575(struct e1000_hw *hw); +s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset, u8 dev_addr, +		      u8 *data); +s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset, u8 dev_addr, +		       u8 data);  #define ID_LED_DEFAULT_82575_SERDES ((ID_LED_DEF1_DEF2 << 12) | \ -                                     (ID_LED_DEF1_DEF2 <<  8) | \ -                                     (ID_LED_DEF1_DEF2 <<  4) | \ -                                     (ID_LED_OFF1_ON2)) +				     (ID_LED_DEF1_DEF2 <<  8) | \ +				     (ID_LED_DEF1_DEF2 <<  4) | \ +				     (ID_LED_OFF1_ON2))  #define E1000_RAR_ENTRIES_82575        16  #define E1000_RAR_ENTRIES_82576        24 @@ -68,16 +64,16 @@ extern s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset,  #define E1000_MRQC_RSS_FIELD_IPV6_UDP_EX    0x01000000  #define E1000_EICR_TX_QUEUE ( \ -    E1000_EICR_TX_QUEUE0 |    \ -    E1000_EICR_TX_QUEUE1 |    \ -    E1000_EICR_TX_QUEUE2 |    \ -    E1000_EICR_TX_QUEUE3) +	E1000_EICR_TX_QUEUE0 |    \ +	E1000_EICR_TX_QUEUE1 |    \ +	E1000_EICR_TX_QUEUE2 |    \ +	E1000_EICR_TX_QUEUE3)  #define E1000_EICR_RX_QUEUE ( \ -    E1000_EICR_RX_QUEUE0 |    \ -    E1000_EICR_RX_QUEUE1 |    \ -    E1000_EICR_RX_QUEUE2 |    \ -    E1000_EICR_RX_QUEUE3) +	E1000_EICR_RX_QUEUE0 |    \ +	E1000_EICR_RX_QUEUE1 |    \ +	E1000_EICR_RX_QUEUE2 |    \ +	E1000_EICR_RX_QUEUE3)  /* Immediate Interrupt Rx (A.K.A. Low Latency Interrupt) */  #define E1000_IMIREXT_SIZE_BP     0x00001000  /* Packet size bypass */ @@ -93,8 +89,7 @@ union e1000_adv_rx_desc {  		struct {  			struct {  				__le16 pkt_info;   /* RSS type, Packet type */ -				__le16 hdr_info;   /* Split Header, -						    * header buffer length */ +				__le16 hdr_info;   /* Split Head, buf len */  			} lo_dword;  			union {  				__le32 rss;          /* RSS Hash */ @@ -231,6 +226,10 @@ struct e1000_adv_tx_context_desc {  #define E1000_VMOLR_STRVLAN    0x40000000 /* Vlan stripping enable */  #define E1000_VMOLR_STRCRC     0x80000000 /* CRC stripping enable */ +#define E1000_DVMOLR_HIDEVLAN  0x20000000 /* Hide vlan enable */ +#define E1000_DVMOLR_STRVLAN   0x40000000 /* Vlan stripping enable */ +#define E1000_DVMOLR_STRCRC    0x80000000 /* CRC stripping enable */ +  #define E1000_VLVF_ARRAY_SIZE     32  #define E1000_VLVF_VLANID_MASK    0x00000FFF  #define E1000_VLVF_POOLSEL_SHIFT  12 @@ -266,8 +265,7 @@ u16 igb_rxpbs_adjust_82580(u32 data);  s32 igb_read_emi_reg(struct e1000_hw *, u16 addr, u16 *data);  s32 igb_set_eee_i350(struct e1000_hw *);  s32 igb_set_eee_i354(struct e1000_hw *); -s32 igb_init_thermal_sensor_thresh_generic(struct e1000_hw *); -s32 igb_get_thermal_sensor_data_generic(struct e1000_hw *hw); +s32 igb_get_eee_status_i354(struct e1000_hw *hw, bool *status);  #define E1000_I2C_THERMAL_SENSOR_ADDR	0xF8  #define E1000_EMC_INTERNAL_DATA		0x00 diff --git a/drivers/net/ethernet/intel/igb/e1000_defines.h b/drivers/net/ethernet/intel/igb/e1000_defines.h index 978eca31ced..217f8138851 100644 --- a/drivers/net/ethernet/intel/igb/e1000_defines.h +++ b/drivers/net/ethernet/intel/igb/e1000_defines.h @@ -1,29 +1,25 @@ -/******************************************************************************* - -  Intel(R) Gigabit Ethernet Linux driver -  Copyright(c) 2007-2013 Intel Corporation. - -  This program is free software; you can redistribute it and/or modify it -  under the terms and conditions of the GNU General Public License, -  version 2, as published by the Free Software Foundation. - -  This program is distributed in the hope it will be useful, but WITHOUT -  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for -  more details. - -  You should have received a copy of the GNU General Public License along with -  this program; if not, write to the Free Software Foundation, Inc., -  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. - -  The full GNU General Public License is included in this distribution in -  the file called "COPYING". - -  Contact Information: -  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> -  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 - -*******************************************************************************/ +/* Intel(R) Gigabit Ethernet Linux driver + * Copyright(c) 2007-2014 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, see <http://www.gnu.org/licenses/>. + * + * The full GNU General Public License is included in this distribution in + * the file called "COPYING". + * + * Contact Information: + * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> + * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 + */  #ifndef _E1000_DEFINES_H_  #define _E1000_DEFINES_H_ @@ -44,16 +40,21 @@  #define E1000_WUFC_BC   0x00000010 /* Broadcast Wakeup Enable */  /* Extended Device Control */ +#define E1000_CTRL_EXT_SDP2_DATA 0x00000040 /* Value of SW Defineable Pin 2 */  #define E1000_CTRL_EXT_SDP3_DATA 0x00000080 /* Value of SW Defineable Pin 3 */ +#define E1000_CTRL_EXT_SDP2_DIR  0x00000400 /* SDP2 Data direction */ +#define E1000_CTRL_EXT_SDP3_DIR  0x00000800 /* SDP3 Data direction */ +  /* Physical Func Reset Done Indication */ -#define E1000_CTRL_EXT_PFRSTD    0x00004000 -#define E1000_CTRL_EXT_LINK_MODE_MASK 0x00C00000 -#define E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES  0x00C00000 -#define E1000_CTRL_EXT_LINK_MODE_1000BASE_KX  0x00400000 -#define E1000_CTRL_EXT_LINK_MODE_SGMII   0x00800000 -#define E1000_CTRL_EXT_LINK_MODE_GMII   0x00000000 -#define E1000_CTRL_EXT_EIAME          0x01000000 -#define E1000_CTRL_EXT_IRCA           0x00000001 +#define E1000_CTRL_EXT_PFRSTD	0x00004000 +#define E1000_CTRL_EXT_SDLPE	0X00040000  /* SerDes Low Power Enable */ +#define E1000_CTRL_EXT_LINK_MODE_MASK	0x00C00000 +#define E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES	0x00C00000 +#define E1000_CTRL_EXT_LINK_MODE_1000BASE_KX	0x00400000 +#define E1000_CTRL_EXT_LINK_MODE_SGMII	0x00800000 +#define E1000_CTRL_EXT_LINK_MODE_GMII	0x00000000 +#define E1000_CTRL_EXT_EIAME	0x01000000 +#define E1000_CTRL_EXT_IRCA		0x00000001  /* Interrupt delay cancellation */  /* Driver loaded bit for FW */  #define E1000_CTRL_EXT_DRV_LOAD       0x10000000 @@ -62,6 +63,7 @@  /* packet buffer parity error detection enabled */  /* descriptor FIFO parity error detection enable */  #define E1000_CTRL_EXT_PBA_CLR		0x80000000 /* PBA Clear */ +#define E1000_CTRL_EXT_PHYPDEN		0x00100000  #define E1000_I2CCMD_REG_ADDR_SHIFT	16  #define E1000_I2CCMD_PHY_ADDR_SHIFT	24  #define E1000_I2CCMD_OPCODE_READ	0x08000000 @@ -98,11 +100,11 @@  /* Same mask, but for extended and packet split descriptors */  #define E1000_RXDEXT_ERR_FRAME_ERR_MASK ( \ -    E1000_RXDEXT_STATERR_CE  |            \ -    E1000_RXDEXT_STATERR_SE  |            \ -    E1000_RXDEXT_STATERR_SEQ |            \ -    E1000_RXDEXT_STATERR_CXE |            \ -    E1000_RXDEXT_STATERR_RXE) +	E1000_RXDEXT_STATERR_CE  |            \ +	E1000_RXDEXT_STATERR_SE  |            \ +	E1000_RXDEXT_STATERR_SEQ |            \ +	E1000_RXDEXT_STATERR_CXE |            \ +	E1000_RXDEXT_STATERR_RXE)  #define E1000_MRQC_RSS_FIELD_IPV4_TCP          0x00010000  #define E1000_MRQC_RSS_FIELD_IPV4              0x00020000 @@ -191,7 +193,8 @@  /* enable link status from external LINK_0 and LINK_1 pins */  #define E1000_CTRL_SWDPIN0  0x00040000  /* SWDPIN 0 value */  #define E1000_CTRL_SWDPIN1  0x00080000  /* SWDPIN 1 value */ -#define E1000_CTRL_SWDPIO0  0x00400000  /* SWDPIN 0 Input or output */ +#define E1000_CTRL_SDP0_DIR 0x00400000  /* SDP0 Data direction */ +#define E1000_CTRL_SDP1_DIR 0x00800000  /* SDP1 Data direction */  #define E1000_CTRL_RST      0x04000000  /* Global reset */  #define E1000_CTRL_RFCE     0x08000000  /* Receive Flow Control enable */  #define E1000_CTRL_TFCE     0x10000000  /* Transmit flow control enable */ @@ -205,6 +208,11 @@   */  #define E1000_CONNSW_ENRGSRC             0x4 +#define E1000_CONNSW_PHYSD		0x400 +#define E1000_CONNSW_PHY_PDN		0x800 +#define E1000_CONNSW_SERDESD		0x200 +#define E1000_CONNSW_AUTOSENSE_CONF	0x2 +#define E1000_CONNSW_AUTOSENSE_EN	0x1  #define E1000_PCS_CFG_PCS_EN             8  #define E1000_PCS_LCTL_FLV_LINK_UP       1  #define E1000_PCS_LCTL_FSV_100           2 @@ -298,39 +306,34 @@  #define E1000_TCTL_RTLC   0x01000000    /* Re-transmit on late collision */  /* DMA Coalescing register fields */ -#define E1000_DMACR_DMACWT_MASK         0x00003FFF /* DMA Coalescing -							* Watchdog Timer */ -#define E1000_DMACR_DMACTHR_MASK        0x00FF0000 /* DMA Coalescing Receive -							* Threshold */ +#define E1000_DMACR_DMACWT_MASK         0x00003FFF /* DMA Coal Watchdog Timer */ +#define E1000_DMACR_DMACTHR_MASK        0x00FF0000 /* DMA Coal Rx Threshold */  #define E1000_DMACR_DMACTHR_SHIFT       16 -#define E1000_DMACR_DMAC_LX_MASK        0x30000000 /* Lx when no PCIe -							* transactions */ +#define E1000_DMACR_DMAC_LX_MASK        0x30000000 /* Lx when no PCIe trans */  #define E1000_DMACR_DMAC_LX_SHIFT       28  #define E1000_DMACR_DMAC_EN             0x80000000 /* Enable DMA Coalescing */  /* DMA Coalescing BMC-to-OS Watchdog Enable */  #define E1000_DMACR_DC_BMC2OSW_EN	0x00008000 -#define E1000_DMCTXTH_DMCTTHR_MASK      0x00000FFF /* DMA Coalescing Transmit -							* Threshold */ +#define E1000_DMCTXTH_DMCTTHR_MASK      0x00000FFF /* DMA Coal Tx Threshold */  #define E1000_DMCTLX_TTLX_MASK          0x00000FFF /* Time to LX request */ -#define E1000_DMCRTRH_UTRESH_MASK       0x0007FFFF /* Receive Traffic Rate -							* Threshold */ -#define E1000_DMCRTRH_LRPRCW            0x80000000 /* Rcv packet rate in -							* current window */ +#define E1000_DMCRTRH_UTRESH_MASK       0x0007FFFF /* Rx Traffic Rate Thresh */ +#define E1000_DMCRTRH_LRPRCW            0x80000000 /* Rx pkt rate curr window */ -#define E1000_DMCCNT_CCOUNT_MASK        0x01FFFFFF /* DMA Coal Rcv Traffic -							* Current Cnt */ +#define E1000_DMCCNT_CCOUNT_MASK        0x01FFFFFF /* DMA Coal Rx Current Cnt */ -#define E1000_FCRTC_RTH_COAL_MASK       0x0003FFF0 /* Flow ctrl Rcv Threshold -							* High val */ +#define E1000_FCRTC_RTH_COAL_MASK       0x0003FFF0 /* FC Rx Thresh High val */  #define E1000_FCRTC_RTH_COAL_SHIFT      4  #define E1000_PCIEMISC_LX_DECISION      0x00000080 /* Lx power decision */  /* Timestamp in Rx buffer */  #define E1000_RXPBS_CFG_TS_EN           0x80000000 +#define I210_RXPBSIZE_DEFAULT		0x000000A2 /* RXPBSIZE default */ +#define I210_TXPBSIZE_DEFAULT		0x04000014 /* TXPBSIZE default */ +  /* SerDes Control */  #define E1000_SCTL_DISABLE_SERDES_LOOPBACK 0x0400 @@ -397,12 +400,12 @@   *   o LSC    = Link Status Change   */  #define IMS_ENABLE_MASK ( \ -    E1000_IMS_RXT0   |    \ -    E1000_IMS_TXDW   |    \ -    E1000_IMS_RXDMT0 |    \ -    E1000_IMS_RXSEQ  |    \ -    E1000_IMS_LSC    |    \ -    E1000_IMS_DOUTSYNC) +	E1000_IMS_RXT0   |    \ +	E1000_IMS_TXDW   |    \ +	E1000_IMS_RXDMT0 |    \ +	E1000_IMS_RXSEQ  |    \ +	E1000_IMS_LSC    |    \ +	E1000_IMS_DOUTSYNC)  /* Interrupt Mask Set */  #define E1000_IMS_TXDW      E1000_ICR_TXDW      /* Transmit desc written back */ @@ -458,7 +461,6 @@  #define E1000_RAH_POOL_1 0x00040000  /* Error Codes */ -#define E1000_SUCCESS      0  #define E1000_ERR_NVM      1  #define E1000_ERR_PHY      2  #define E1000_ERR_CONFIG   3 @@ -524,14 +526,84 @@  #define E1000_TIMINCA_16NS_SHIFT 24 -#define E1000_TSICR_TXTS 0x00000002 -#define E1000_TSIM_TXTS 0x00000002 +/* Time Sync Interrupt Cause/Mask Register Bits */ + +#define TSINTR_SYS_WRAP  (1 << 0) /* SYSTIM Wrap around. */ +#define TSINTR_TXTS      (1 << 1) /* Transmit Timestamp. */ +#define TSINTR_RXTS      (1 << 2) /* Receive Timestamp. */ +#define TSINTR_TT0       (1 << 3) /* Target Time 0 Trigger. */ +#define TSINTR_TT1       (1 << 4) /* Target Time 1 Trigger. */ +#define TSINTR_AUTT0     (1 << 5) /* Auxiliary Timestamp 0 Taken. */ +#define TSINTR_AUTT1     (1 << 6) /* Auxiliary Timestamp 1 Taken. */ +#define TSINTR_TADJ      (1 << 7) /* Time Adjust Done. */ + +#define TSYNC_INTERRUPTS TSINTR_TXTS +#define E1000_TSICR_TXTS TSINTR_TXTS + +/* TSAUXC Configuration Bits */ +#define TSAUXC_EN_TT0    (1 << 0)  /* Enable target time 0. */ +#define TSAUXC_EN_TT1    (1 << 1)  /* Enable target time 1. */ +#define TSAUXC_EN_CLK0   (1 << 2)  /* Enable Configurable Frequency Clock 0. */ +#define TSAUXC_SAMP_AUT0 (1 << 3)  /* Latch SYSTIML/H into AUXSTMPL/0. */ +#define TSAUXC_ST0       (1 << 4)  /* Start Clock 0 Toggle on Target Time 0. */ +#define TSAUXC_EN_CLK1   (1 << 5)  /* Enable Configurable Frequency Clock 1. */ +#define TSAUXC_SAMP_AUT1 (1 << 6)  /* Latch SYSTIML/H into AUXSTMPL/1. */ +#define TSAUXC_ST1       (1 << 7)  /* Start Clock 1 Toggle on Target Time 1. */ +#define TSAUXC_EN_TS0    (1 << 8)  /* Enable hardware timestamp 0. */ +#define TSAUXC_AUTT0     (1 << 9)  /* Auxiliary Timestamp Taken. */ +#define TSAUXC_EN_TS1    (1 << 10) /* Enable hardware timestamp 0. */ +#define TSAUXC_AUTT1     (1 << 11) /* Auxiliary Timestamp Taken. */ +#define TSAUXC_PLSG      (1 << 17) /* Generate a pulse. */ +#define TSAUXC_DISABLE   (1 << 31) /* Disable SYSTIM Count Operation. */ + +/* SDP Configuration Bits */ +#define AUX0_SEL_SDP0    (0 << 0)  /* Assign SDP0 to auxiliary time stamp 0. */ +#define AUX0_SEL_SDP1    (1 << 0)  /* Assign SDP1 to auxiliary time stamp 0. */ +#define AUX0_SEL_SDP2    (2 << 0)  /* Assign SDP2 to auxiliary time stamp 0. */ +#define AUX0_SEL_SDP3    (3 << 0)  /* Assign SDP3 to auxiliary time stamp 0. */ +#define AUX0_TS_SDP_EN   (1 << 2)  /* Enable auxiliary time stamp trigger 0. */ +#define AUX1_SEL_SDP0    (0 << 3)  /* Assign SDP0 to auxiliary time stamp 1. */ +#define AUX1_SEL_SDP1    (1 << 3)  /* Assign SDP1 to auxiliary time stamp 1. */ +#define AUX1_SEL_SDP2    (2 << 3)  /* Assign SDP2 to auxiliary time stamp 1. */ +#define AUX1_SEL_SDP3    (3 << 3)  /* Assign SDP3 to auxiliary time stamp 1. */ +#define AUX1_TS_SDP_EN   (1 << 5)  /* Enable auxiliary time stamp trigger 1. */ +#define TS_SDP0_SEL_TT0  (0 << 6)  /* Target time 0 is output on SDP0. */ +#define TS_SDP0_SEL_TT1  (1 << 6)  /* Target time 1 is output on SDP0. */ +#define TS_SDP0_SEL_FC0  (2 << 6)  /* Freq clock  0 is output on SDP0. */ +#define TS_SDP0_SEL_FC1  (3 << 6)  /* Freq clock  1 is output on SDP0. */ +#define TS_SDP0_EN       (1 << 8)  /* SDP0 is assigned to Tsync. */ +#define TS_SDP1_SEL_TT0  (0 << 9)  /* Target time 0 is output on SDP1. */ +#define TS_SDP1_SEL_TT1  (1 << 9)  /* Target time 1 is output on SDP1. */ +#define TS_SDP1_SEL_FC0  (2 << 9)  /* Freq clock  0 is output on SDP1. */ +#define TS_SDP1_SEL_FC1  (3 << 9)  /* Freq clock  1 is output on SDP1. */ +#define TS_SDP1_EN       (1 << 11) /* SDP1 is assigned to Tsync. */ +#define TS_SDP2_SEL_TT0  (0 << 12) /* Target time 0 is output on SDP2. */ +#define TS_SDP2_SEL_TT1  (1 << 12) /* Target time 1 is output on SDP2. */ +#define TS_SDP2_SEL_FC0  (2 << 12) /* Freq clock  0 is output on SDP2. */ +#define TS_SDP2_SEL_FC1  (3 << 12) /* Freq clock  1 is output on SDP2. */ +#define TS_SDP2_EN       (1 << 14) /* SDP2 is assigned to Tsync. */ +#define TS_SDP3_SEL_TT0  (0 << 15) /* Target time 0 is output on SDP3. */ +#define TS_SDP3_SEL_TT1  (1 << 15) /* Target time 1 is output on SDP3. */ +#define TS_SDP3_SEL_FC0  (2 << 15) /* Freq clock  0 is output on SDP3. */ +#define TS_SDP3_SEL_FC1  (3 << 15) /* Freq clock  1 is output on SDP3. */ +#define TS_SDP3_EN       (1 << 17) /* SDP3 is assigned to Tsync. */  #define E1000_MDICNFG_EXT_MDIO    0x80000000      /* MDI ext/int destination */  #define E1000_MDICNFG_COM_MDIO    0x40000000      /* MDI shared w/ lan 0 */  #define E1000_MDICNFG_PHY_MASK    0x03E00000  #define E1000_MDICNFG_PHY_SHIFT   21 +#define E1000_MEDIA_PORT_COPPER			1 +#define E1000_MEDIA_PORT_OTHER			2 +#define E1000_M88E1112_AUTO_COPPER_SGMII	0x2 +#define E1000_M88E1112_AUTO_COPPER_BASEX	0x3 +#define E1000_M88E1112_STATUS_LINK		0x0004 /* Interface Link Bit */ +#define E1000_M88E1112_MAC_CTRL_1		0x10 +#define E1000_M88E1112_MAC_CTRL_1_MODE_MASK	0x0380 /* Mode Select */ +#define E1000_M88E1112_MAC_CTRL_1_MODE_SHIFT	7 +#define E1000_M88E1112_PAGE_ADDR		0x16 +#define E1000_M88E1112_STATUS			0x01 +  /* PCI Express Control */  #define E1000_GCR_CMPL_TMOUT_MASK       0x0000F000  #define E1000_GCR_CMPL_TMOUT_10ms       0x00001000 @@ -932,8 +1004,7 @@  #define E1000_VFTA_ENTRY_BIT_SHIFT_MASK      0x1F  /* DMA Coalescing register fields */ -#define E1000_PCIEMISC_LX_DECISION      0x00000080 /* Lx power decision based -                                                      on DMA coal */ +#define E1000_PCIEMISC_LX_DECISION      0x00000080 /* Lx power on DMA coal */  /* Tx Rate-Scheduler Config fields */  #define E1000_RTTBCNRC_RS_ENA		0x80000000 diff --git a/drivers/net/ethernet/intel/igb/e1000_hw.h b/drivers/net/ethernet/intel/igb/e1000_hw.h index 37a9c06a6c6..ce55ea5d750 100644 --- a/drivers/net/ethernet/intel/igb/e1000_hw.h +++ b/drivers/net/ethernet/intel/igb/e1000_hw.h @@ -1,29 +1,24 @@ -/******************************************************************************* - -  Intel(R) Gigabit Ethernet Linux driver -  Copyright(c) 2007-2013 Intel Corporation. - -  This program is free software; you can redistribute it and/or modify it -  under the terms and conditions of the GNU General Public License, -  version 2, as published by the Free Software Foundation. - -  This program is distributed in the hope it will be useful, but WITHOUT -  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for -  more details. - -  You should have received a copy of the GNU General Public License along with -  this program; if not, write to the Free Software Foundation, Inc., -  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. - -  The full GNU General Public License is included in this distribution in -  the file called "COPYING". - -  Contact Information: -  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> -  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 - -*******************************************************************************/ +/* Intel(R) Gigabit Ethernet Linux driver + * Copyright(c) 2007-2014 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, see <http://www.gnu.org/licenses/>. + * + * The full GNU General Public License is included in this distribution in + * the file called "COPYING". + * + * Contact Information: + * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> + * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 + */  #ifndef _E1000_HW_H_  #define _E1000_HW_H_ @@ -321,15 +316,15 @@ struct e1000_host_mng_command_info {  #include "e1000_mbx.h"  struct e1000_mac_operations { -	s32  (*check_for_link)(struct e1000_hw *); -	s32  (*reset_hw)(struct e1000_hw *); -	s32  (*init_hw)(struct e1000_hw *); +	s32 (*check_for_link)(struct e1000_hw *); +	s32 (*reset_hw)(struct e1000_hw *); +	s32 (*init_hw)(struct e1000_hw *);  	bool (*check_mng_mode)(struct e1000_hw *); -	s32  (*setup_physical_interface)(struct e1000_hw *); +	s32 (*setup_physical_interface)(struct e1000_hw *);  	void (*rar_set)(struct e1000_hw *, u8 *, u32); -	s32  (*read_mac_addr)(struct e1000_hw *); -	s32  (*get_speed_and_duplex)(struct e1000_hw *, u16 *, u16 *); -	s32  (*acquire_swfw_sync)(struct e1000_hw *, u16); +	s32 (*read_mac_addr)(struct e1000_hw *); +	s32 (*get_speed_and_duplex)(struct e1000_hw *, u16 *, u16 *); +	s32 (*acquire_swfw_sync)(struct e1000_hw *, u16);  	void (*release_swfw_sync)(struct e1000_hw *, u16);  #ifdef CONFIG_IGB_HWMON  	s32 (*get_thermal_sensor_data)(struct e1000_hw *); @@ -339,31 +334,31 @@ struct e1000_mac_operations {  };  struct e1000_phy_operations { -	s32  (*acquire)(struct e1000_hw *); -	s32  (*check_polarity)(struct e1000_hw *); -	s32  (*check_reset_block)(struct e1000_hw *); -	s32  (*force_speed_duplex)(struct e1000_hw *); -	s32  (*get_cfg_done)(struct e1000_hw *hw); -	s32  (*get_cable_length)(struct e1000_hw *); -	s32  (*get_phy_info)(struct e1000_hw *); -	s32  (*read_reg)(struct e1000_hw *, u32, u16 *); +	s32 (*acquire)(struct e1000_hw *); +	s32 (*check_polarity)(struct e1000_hw *); +	s32 (*check_reset_block)(struct e1000_hw *); +	s32 (*force_speed_duplex)(struct e1000_hw *); +	s32 (*get_cfg_done)(struct e1000_hw *hw); +	s32 (*get_cable_length)(struct e1000_hw *); +	s32 (*get_phy_info)(struct e1000_hw *); +	s32 (*read_reg)(struct e1000_hw *, u32, u16 *);  	void (*release)(struct e1000_hw *); -	s32  (*reset)(struct e1000_hw *); -	s32  (*set_d0_lplu_state)(struct e1000_hw *, bool); -	s32  (*set_d3_lplu_state)(struct e1000_hw *, bool); -	s32  (*write_reg)(struct e1000_hw *, u32, u16); +	s32 (*reset)(struct e1000_hw *); +	s32 (*set_d0_lplu_state)(struct e1000_hw *, bool); +	s32 (*set_d3_lplu_state)(struct e1000_hw *, bool); +	s32 (*write_reg)(struct e1000_hw *, u32, u16);  	s32 (*read_i2c_byte)(struct e1000_hw *, u8, u8, u8 *);  	s32 (*write_i2c_byte)(struct e1000_hw *, u8, u8, u8);  };  struct e1000_nvm_operations { -	s32  (*acquire)(struct e1000_hw *); -	s32  (*read)(struct e1000_hw *, u16, u16, u16 *); +	s32 (*acquire)(struct e1000_hw *); +	s32 (*read)(struct e1000_hw *, u16, u16, u16 *);  	void (*release)(struct e1000_hw *); -	s32  (*write)(struct e1000_hw *, u16, u16, u16 *); -	s32  (*update)(struct e1000_hw *); -	s32  (*validate)(struct e1000_hw *); -	s32  (*valid_led_default)(struct e1000_hw *, u16 *); +	s32 (*write)(struct e1000_hw *, u16, u16, u16 *); +	s32 (*update)(struct e1000_hw *); +	s32 (*validate)(struct e1000_hw *); +	s32 (*valid_led_default)(struct e1000_hw *, u16 *);  };  #define E1000_MAX_SENSORS		3 @@ -533,6 +528,9 @@ struct e1000_dev_spec_82575 {  	bool clear_semaphore_once;  	struct e1000_sfp_flags eth_flags;  	bool module_plugged; +	u8 media_port; +	bool media_changed; +	bool mas_capable;  };  struct e1000_hw { @@ -562,11 +560,14 @@ struct e1000_hw {  	u8  revision_id;  }; -extern struct net_device *igb_get_hw_dev(struct e1000_hw *hw); +struct net_device *igb_get_hw_dev(struct e1000_hw *hw);  #define hw_dbg(format, arg...) \  	netdev_dbg(igb_get_hw_dev(hw), format, ##arg)  /* These functions must be implemented by drivers */ -s32  igb_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value); -s32  igb_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value); +s32 igb_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value); +s32 igb_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value); + +void igb_read_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value); +void igb_write_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value);  #endif /* _E1000_HW_H_ */ diff --git a/drivers/net/ethernet/intel/igb/e1000_i210.c b/drivers/net/ethernet/intel/igb/e1000_i210.c index 0c0393316a3..65d931669f8 100644 --- a/drivers/net/ethernet/intel/igb/e1000_i210.c +++ b/drivers/net/ethernet/intel/igb/e1000_i210.c @@ -1,29 +1,25 @@ -/******************************************************************************* - -  Intel(R) Gigabit Ethernet Linux driver -  Copyright(c) 2007-2013 Intel Corporation. - -  This program is free software; you can redistribute it and/or modify it -  under the terms and conditions of the GNU General Public License, -  version 2, as published by the Free Software Foundation. - -  This program is distributed in the hope it will be useful, but WITHOUT -  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for -  more details. - -  You should have received a copy of the GNU General Public License along with -  this program; if not, write to the Free Software Foundation, Inc., -  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. - -  The full GNU General Public License is included in this distribution in -  the file called "COPYING". - -  Contact Information: -  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> -  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 - -******************************************************************************/ +/* Intel(R) Gigabit Ethernet Linux driver + * Copyright(c) 2007-2014 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, see <http://www.gnu.org/licenses/>. + * + * The full GNU General Public License is included in this distribution in + * the file called "COPYING". + * + * Contact Information: + * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> + * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 + */  /* e1000_i210   * e1000_i211 @@ -35,6 +31,8 @@  #include "e1000_hw.h"  #include "e1000_i210.h" +static s32 igb_update_flash_i210(struct e1000_hw *hw); +  /**   * igb_get_hw_semaphore_i210 - Acquire hardware semaphore   *  @hw: pointer to the HW structure @@ -99,7 +97,7 @@ static s32 igb_get_hw_semaphore_i210(struct e1000_hw *hw)  		return -E1000_ERR_NVM;  	} -	return E1000_SUCCESS; +	return 0;  }  /** @@ -111,7 +109,7 @@ static s32 igb_get_hw_semaphore_i210(struct e1000_hw *hw)   *  Return successful if access grant bit set, else clear the request for   *  EEPROM access and return -E1000_ERR_NVM (-1).   **/ -s32 igb_acquire_nvm_i210(struct e1000_hw *hw) +static s32 igb_acquire_nvm_i210(struct e1000_hw *hw)  {  	return igb_acquire_swfw_sync_i210(hw, E1000_SWFW_EEP_SM);  } @@ -123,7 +121,7 @@ s32 igb_acquire_nvm_i210(struct e1000_hw *hw)   *  Stop any current commands to the EEPROM and clear the EEPROM request bit,   *  then release the semaphores acquired.   **/ -void igb_release_nvm_i210(struct e1000_hw *hw) +static void igb_release_nvm_i210(struct e1000_hw *hw)  {  	igb_release_swfw_sync_i210(hw, E1000_SWFW_EEP_SM);  } @@ -141,7 +139,7 @@ s32 igb_acquire_swfw_sync_i210(struct e1000_hw *hw, u16 mask)  	u32 swfw_sync;  	u32 swmask = mask;  	u32 fwmask = mask << 16; -	s32 ret_val = E1000_SUCCESS; +	s32 ret_val = 0;  	s32 i = 0, timeout = 200; /* FIXME: find real value to use here */  	while (i < timeout) { @@ -186,7 +184,7 @@ void igb_release_swfw_sync_i210(struct e1000_hw *hw, u16 mask)  {  	u32 swfw_sync; -	while (igb_get_hw_semaphore_i210(hw) != E1000_SUCCESS) +	while (igb_get_hw_semaphore_i210(hw))  		; /* Empty */  	swfw_sync = rd32(E1000_SW_FW_SYNC); @@ -206,10 +204,10 @@ void igb_release_swfw_sync_i210(struct e1000_hw *hw, u16 mask)   *  Reads a 16 bit word from the Shadow Ram using the EERD register.   *  Uses necessary synchronization semaphores.   **/ -s32 igb_read_nvm_srrd_i210(struct e1000_hw *hw, u16 offset, u16 words, -			     u16 *data) +static s32 igb_read_nvm_srrd_i210(struct e1000_hw *hw, u16 offset, u16 words, +				  u16 *data)  { -	s32 status = E1000_SUCCESS; +	s32 status = 0;  	u16 i, count;  	/* We cannot hold synchronization semaphores for too long, @@ -219,7 +217,7 @@ s32 igb_read_nvm_srrd_i210(struct e1000_hw *hw, u16 offset, u16 words,  	for (i = 0; i < words; i += E1000_EERD_EEWR_MAX_COUNT) {  		count = (words - i) / E1000_EERD_EEWR_MAX_COUNT > 0 ?  			E1000_EERD_EEWR_MAX_COUNT : (words - i); -		if (hw->nvm.ops.acquire(hw) == E1000_SUCCESS) { +		if (!(hw->nvm.ops.acquire(hw))) {  			status = igb_read_nvm_eerd(hw, offset, count,  						     data + i);  			hw->nvm.ops.release(hw); @@ -227,7 +225,7 @@ s32 igb_read_nvm_srrd_i210(struct e1000_hw *hw, u16 offset, u16 words,  			status = E1000_ERR_SWFW_SYNC;  		} -		if (status != E1000_SUCCESS) +		if (status)  			break;  	} @@ -252,7 +250,7 @@ static s32 igb_write_nvm_srwr(struct e1000_hw *hw, u16 offset, u16 words,  	struct e1000_nvm_info *nvm = &hw->nvm;  	u32 i, k, eewr = 0;  	u32 attempts = 100000; -	s32 ret_val = E1000_SUCCESS; +	s32 ret_val = 0;  	/* A check for invalid values:  offset too large, too many words,  	 * too many words for the offset, and not enough words. @@ -274,13 +272,13 @@ static s32 igb_write_nvm_srwr(struct e1000_hw *hw, u16 offset, u16 words,  		for (k = 0; k < attempts; k++) {  			if (E1000_NVM_RW_REG_DONE &  			    rd32(E1000_SRWR)) { -				ret_val = E1000_SUCCESS; +				ret_val = 0;  				break;  			}  			udelay(5);  	} -		if (ret_val != E1000_SUCCESS) { +		if (ret_val) {  			hw_dbg("Shadow RAM write EEWR timed out\n");  			break;  		} @@ -306,10 +304,10 @@ out:   *  If error code is returned, data and Shadow RAM may be inconsistent - buffer   *  partially written.   **/ -s32 igb_write_nvm_srwr_i210(struct e1000_hw *hw, u16 offset, u16 words, -			      u16 *data) +static s32 igb_write_nvm_srwr_i210(struct e1000_hw *hw, u16 offset, u16 words, +				   u16 *data)  { -	s32 status = E1000_SUCCESS; +	s32 status = 0;  	u16 i, count;  	/* We cannot hold synchronization semaphores for too long, @@ -319,7 +317,7 @@ s32 igb_write_nvm_srwr_i210(struct e1000_hw *hw, u16 offset, u16 words,  	for (i = 0; i < words; i += E1000_EERD_EEWR_MAX_COUNT) {  		count = (words - i) / E1000_EERD_EEWR_MAX_COUNT > 0 ?  			E1000_EERD_EEWR_MAX_COUNT : (words - i); -		if (hw->nvm.ops.acquire(hw) == E1000_SUCCESS) { +		if (!(hw->nvm.ops.acquire(hw))) {  			status = igb_write_nvm_srwr(hw, offset, count,  						      data + i);  			hw->nvm.ops.release(hw); @@ -327,7 +325,7 @@ s32 igb_write_nvm_srwr_i210(struct e1000_hw *hw, u16 offset, u16 words,  			status = E1000_ERR_SWFW_SYNC;  		} -		if (status != E1000_SUCCESS) +		if (status)  			break;  	} @@ -364,14 +362,14 @@ static s32 igb_read_invm_word_i210(struct e1000_hw *hw, u8 address, u16 *data)  			word_address = INVM_DWORD_TO_WORD_ADDRESS(invm_dword);  			if (word_address == address) {  				*data = INVM_DWORD_TO_WORD_DATA(invm_dword); -				hw_dbg("Read INVM Word 0x%02x = %x", +				hw_dbg("Read INVM Word 0x%02x = %x\n",  					  address, *data); -				status = E1000_SUCCESS; +				status = 0;  				break;  			}  		}  	} -	if (status != E1000_SUCCESS) +	if (status)  		hw_dbg("Requested word 0x%02x not found in OTP\n", address);  	return status;  } @@ -387,7 +385,7 @@ static s32 igb_read_invm_word_i210(struct e1000_hw *hw, u8 address, u16 *data)  static s32 igb_read_invm_i210(struct e1000_hw *hw, u16 offset,  				u16 words __always_unused, u16 *data)  { -	s32 ret_val = E1000_SUCCESS; +	s32 ret_val = 0;  	/* Only the MAC addr is required to be present in the iNVM */  	switch (offset) { @@ -397,43 +395,44 @@ static s32 igb_read_invm_i210(struct e1000_hw *hw, u16 offset,  						     &data[1]);  		ret_val |= igb_read_invm_word_i210(hw, (u8)offset+2,  						     &data[2]); -		if (ret_val != E1000_SUCCESS) +		if (ret_val)  			hw_dbg("MAC Addr not found in iNVM\n");  		break;  	case NVM_INIT_CTRL_2:  		ret_val = igb_read_invm_word_i210(hw, (u8)offset, data); -		if (ret_val != E1000_SUCCESS) { +		if (ret_val) {  			*data = NVM_INIT_CTRL_2_DEFAULT_I211; -			ret_val = E1000_SUCCESS; +			ret_val = 0;  		}  		break;  	case NVM_INIT_CTRL_4:  		ret_val = igb_read_invm_word_i210(hw, (u8)offset, data); -		if (ret_val != E1000_SUCCESS) { +		if (ret_val) {  			*data = NVM_INIT_CTRL_4_DEFAULT_I211; -			ret_val = E1000_SUCCESS; +			ret_val = 0;  		}  		break;  	case NVM_LED_1_CFG:  		ret_val = igb_read_invm_word_i210(hw, (u8)offset, data); -		if (ret_val != E1000_SUCCESS) { +		if (ret_val) {  			*data = NVM_LED_1_CFG_DEFAULT_I211; -			ret_val = E1000_SUCCESS; +			ret_val = 0;  		}  		break;  	case NVM_LED_0_2_CFG:  		ret_val = igb_read_invm_word_i210(hw, (u8)offset, data); -		if (ret_val != E1000_SUCCESS) { +		if (ret_val) {  			*data = NVM_LED_0_2_CFG_DEFAULT_I211; -			ret_val = E1000_SUCCESS; +			ret_val = 0;  		}  		break;  	case NVM_ID_LED_SETTINGS:  		ret_val = igb_read_invm_word_i210(hw, (u8)offset, data); -		if (ret_val != E1000_SUCCESS) { +		if (ret_val) {  			*data = ID_LED_RESERVED_FFFF; -			ret_val = E1000_SUCCESS; +			ret_val = 0;  		} +		break;  	case NVM_SUB_DEV_ID:  		*data = hw->subsystem_device_id;  		break; @@ -487,14 +486,14 @@ s32 igb_read_invm_version(struct e1000_hw *hw,  		/* Check if we have first version location used */  		if ((i == 1) && ((*record & E1000_INVM_VER_FIELD_ONE) == 0)) {  			version = 0; -			status = E1000_SUCCESS; +			status = 0;  			break;  		}  		/* Check if we have second version location used */  		else if ((i == 1) &&  			 ((*record & E1000_INVM_VER_FIELD_TWO) == 0)) {  			version = (*record & E1000_INVM_VER_FIELD_ONE) >> 3; -			status = E1000_SUCCESS; +			status = 0;  			break;  		}  		/* Check if we have odd version location @@ -505,7 +504,7 @@ s32 igb_read_invm_version(struct e1000_hw *hw,  			 (i != 1))) {  			version = (*next_record & E1000_INVM_VER_FIELD_TWO)  				  >> 13; -			status = E1000_SUCCESS; +			status = 0;  			break;  		}  		/* Check if we have even version location @@ -514,12 +513,12 @@ s32 igb_read_invm_version(struct e1000_hw *hw,  		else if (((*record & E1000_INVM_VER_FIELD_TWO) == 0) &&  			 ((*record & 0x3) == 0)) {  			version = (*record & E1000_INVM_VER_FIELD_ONE) >> 3; -			status = E1000_SUCCESS; +			status = 0;  			break;  		}  	} -	if (status == E1000_SUCCESS) { +	if (!status) {  		invm_ver->invm_major = (version & E1000_INVM_MAJOR_MASK)  					>> E1000_INVM_MAJOR_SHIFT;  		invm_ver->invm_minor = version & E1000_INVM_MINOR_MASK; @@ -532,7 +531,7 @@ s32 igb_read_invm_version(struct e1000_hw *hw,  		/* Check if we have image type in first location used */  		if ((i == 1) && ((*record & E1000_INVM_IMGTYPE_FIELD) == 0)) {  			invm_ver->invm_img_type = 0; -			status = E1000_SUCCESS; +			status = 0;  			break;  		}  		/* Check if we have image type in first location used */ @@ -541,7 +540,7 @@ s32 igb_read_invm_version(struct e1000_hw *hw,  			 ((((*record & 0x3) != 0) && (i != 1)))) {  			invm_ver->invm_img_type =  				(*next_record & E1000_INVM_IMGTYPE_FIELD) >> 23; -			status = E1000_SUCCESS; +			status = 0;  			break;  		}  	} @@ -555,12 +554,12 @@ s32 igb_read_invm_version(struct e1000_hw *hw,   *  Calculates the EEPROM checksum by reading/adding each word of the EEPROM   *  and then verifies that the sum of the EEPROM is equal to 0xBABA.   **/ -s32 igb_validate_nvm_checksum_i210(struct e1000_hw *hw) +static s32 igb_validate_nvm_checksum_i210(struct e1000_hw *hw)  { -	s32 status = E1000_SUCCESS; +	s32 status = 0;  	s32 (*read_op_ptr)(struct e1000_hw *, u16, u16, u16 *); -	if (hw->nvm.ops.acquire(hw) == E1000_SUCCESS) { +	if (!(hw->nvm.ops.acquire(hw))) {  		/* Replace the read function with semaphore grabbing with  		 * the one that skips this for a while. @@ -590,9 +589,9 @@ s32 igb_validate_nvm_checksum_i210(struct e1000_hw *hw)   *  up to the checksum.  Then calculates the EEPROM checksum and writes the   *  value to the EEPROM. Next commit EEPROM data onto the Flash.   **/ -s32 igb_update_nvm_checksum_i210(struct e1000_hw *hw) +static s32 igb_update_nvm_checksum_i210(struct e1000_hw *hw)  { -	s32 ret_val = E1000_SUCCESS; +	s32 ret_val = 0;  	u16 checksum = 0;  	u16 i, nvm_data; @@ -601,12 +600,12 @@ s32 igb_update_nvm_checksum_i210(struct e1000_hw *hw)  	 * EEPROM read fails  	 */  	ret_val = igb_read_nvm_eerd(hw, 0, 1, &nvm_data); -	if (ret_val != E1000_SUCCESS) { +	if (ret_val) {  		hw_dbg("EEPROM read failed\n");  		goto out;  	} -	if (hw->nvm.ops.acquire(hw) == E1000_SUCCESS) { +	if (!(hw->nvm.ops.acquire(hw))) {  		/* Do not use hw->nvm.ops.write, hw->nvm.ops.read  		 * because we do not want to take the synchronization  		 * semaphores twice here. @@ -624,7 +623,7 @@ s32 igb_update_nvm_checksum_i210(struct e1000_hw *hw)  		checksum = (u16) NVM_SUM - checksum;  		ret_val = igb_write_nvm_srwr(hw, NVM_CHECKSUM_REG, 1,  						&checksum); -		if (ret_val != E1000_SUCCESS) { +		if (ret_val) {  			hw->nvm.ops.release(hw);  			hw_dbg("NVM Write Error while updating checksum.\n");  			goto out; @@ -653,7 +652,7 @@ static s32 igb_pool_flash_update_done_i210(struct e1000_hw *hw)  	for (i = 0; i < E1000_FLUDONE_ATTEMPTS; i++) {  		reg = rd32(E1000_EECD);  		if (reg & E1000_EECD_FLUDONE_I210) { -			ret_val = E1000_SUCCESS; +			ret_val = 0;  			break;  		}  		udelay(5); @@ -684,9 +683,9 @@ bool igb_get_flash_presence_i210(struct e1000_hw *hw)   *  @hw: pointer to the HW structure   *   **/ -s32 igb_update_flash_i210(struct e1000_hw *hw) +static s32 igb_update_flash_i210(struct e1000_hw *hw)  { -	s32 ret_val = E1000_SUCCESS; +	s32 ret_val = 0;  	u32 flup;  	ret_val = igb_pool_flash_update_done_i210(hw); @@ -699,7 +698,7 @@ s32 igb_update_flash_i210(struct e1000_hw *hw)  	wr32(E1000_EECD, flup);  	ret_val = igb_pool_flash_update_done_i210(hw); -	if (ret_val == E1000_SUCCESS) +	if (ret_val)  		hw_dbg("Flash update complete\n");  	else  		hw_dbg("Flash update time out\n"); @@ -752,7 +751,7 @@ out:  static s32 __igb_access_xmdio_reg(struct e1000_hw *hw, u16 address,  				  u8 dev_addr, u16 *data, bool read)  { -	s32 ret_val = E1000_SUCCESS; +	s32 ret_val = 0;  	ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAC, dev_addr);  	if (ret_val) @@ -835,3 +834,69 @@ s32 igb_init_nvm_params_i210(struct e1000_hw *hw)  	}  	return ret_val;  } + +/** + * igb_pll_workaround_i210 + * @hw: pointer to the HW structure + * + * Works around an errata in the PLL circuit where it occasionally + * provides the wrong clock frequency after power up. + **/ +s32 igb_pll_workaround_i210(struct e1000_hw *hw) +{ +	s32 ret_val; +	u32 wuc, mdicnfg, ctrl, ctrl_ext, reg_val; +	u16 nvm_word, phy_word, pci_word, tmp_nvm; +	int i; + +	/* Get and set needed register values */ +	wuc = rd32(E1000_WUC); +	mdicnfg = rd32(E1000_MDICNFG); +	reg_val = mdicnfg & ~E1000_MDICNFG_EXT_MDIO; +	wr32(E1000_MDICNFG, reg_val); + +	/* Get data from NVM, or set default */ +	ret_val = igb_read_invm_word_i210(hw, E1000_INVM_AUTOLOAD, +					  &nvm_word); +	if (ret_val) +		nvm_word = E1000_INVM_DEFAULT_AL; +	tmp_nvm = nvm_word | E1000_INVM_PLL_WO_VAL; +	for (i = 0; i < E1000_MAX_PLL_TRIES; i++) { +		/* check current state directly from internal PHY */ +		igb_read_phy_reg_gs40g(hw, (E1000_PHY_PLL_FREQ_PAGE | +					 E1000_PHY_PLL_FREQ_REG), &phy_word); +		if ((phy_word & E1000_PHY_PLL_UNCONF) +		    != E1000_PHY_PLL_UNCONF) { +			ret_val = 0; +			break; +		} else { +			ret_val = -E1000_ERR_PHY; +		} +		/* directly reset the internal PHY */ +		ctrl = rd32(E1000_CTRL); +		wr32(E1000_CTRL, ctrl|E1000_CTRL_PHY_RST); + +		ctrl_ext = rd32(E1000_CTRL_EXT); +		ctrl_ext |= (E1000_CTRL_EXT_PHYPDEN | E1000_CTRL_EXT_SDLPE); +		wr32(E1000_CTRL_EXT, ctrl_ext); + +		wr32(E1000_WUC, 0); +		reg_val = (E1000_INVM_AUTOLOAD << 4) | (tmp_nvm << 16); +		wr32(E1000_EEARBC_I210, reg_val); + +		igb_read_pci_cfg(hw, E1000_PCI_PMCSR, &pci_word); +		pci_word |= E1000_PCI_PMCSR_D3; +		igb_write_pci_cfg(hw, E1000_PCI_PMCSR, &pci_word); +		usleep_range(1000, 2000); +		pci_word &= ~E1000_PCI_PMCSR_D3; +		igb_write_pci_cfg(hw, E1000_PCI_PMCSR, &pci_word); +		reg_val = (E1000_INVM_AUTOLOAD << 4) | (nvm_word << 16); +		wr32(E1000_EEARBC_I210, reg_val); + +		/* restore WUC register */ +		wr32(E1000_WUC, wuc); +	} +	/* restore MDICNFG setting */ +	wr32(E1000_MDICNFG, mdicnfg); +	return ret_val; +} diff --git a/drivers/net/ethernet/intel/igb/e1000_i210.h b/drivers/net/ethernet/intel/igb/e1000_i210.h index dde3c4b7ea9..3442b6357d0 100644 --- a/drivers/net/ethernet/intel/igb/e1000_i210.h +++ b/drivers/net/ethernet/intel/igb/e1000_i210.h @@ -1,53 +1,39 @@ -/******************************************************************************* - -  Intel(R) Gigabit Ethernet Linux driver -  Copyright(c) 2007-2013 Intel Corporation. - -  This program is free software; you can redistribute it and/or modify it -  under the terms and conditions of the GNU General Public License, -  version 2, as published by the Free Software Foundation. - -  This program is distributed in the hope it will be useful, but WITHOUT -  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for -  more details. - -  You should have received a copy of the GNU General Public License along with -  this program; if not, write to the Free Software Foundation, Inc., -  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. - -  The full GNU General Public License is included in this distribution in -  the file called "COPYING". - -  Contact Information: -  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> -  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 - -*******************************************************************************/ +/* Intel(R) Gigabit Ethernet Linux driver + * Copyright(c) 2007-2014 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, see <http://www.gnu.org/licenses/>. + * + * The full GNU General Public License is included in this distribution in + * the file called "COPYING". + * + * Contact Information: + * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> + * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 + */  #ifndef _E1000_I210_H_  #define _E1000_I210_H_ -extern s32 igb_update_flash_i210(struct e1000_hw *hw); -extern s32 igb_update_nvm_checksum_i210(struct e1000_hw *hw); -extern s32 igb_validate_nvm_checksum_i210(struct e1000_hw *hw); -extern s32 igb_write_nvm_srwr_i210(struct e1000_hw *hw, u16 offset, -			      u16 words, u16 *data); -extern s32 igb_read_nvm_srrd_i210(struct e1000_hw *hw, u16 offset, -			     u16 words, u16 *data); -extern s32 igb_acquire_swfw_sync_i210(struct e1000_hw *hw, u16 mask); -extern void igb_release_swfw_sync_i210(struct e1000_hw *hw, u16 mask); -extern s32 igb_acquire_nvm_i210(struct e1000_hw *hw); -extern void igb_release_nvm_i210(struct e1000_hw *hw); -extern s32 igb_valid_led_default_i210(struct e1000_hw *hw, u16 *data); -extern s32 igb_read_invm_version(struct e1000_hw *hw, -				 struct e1000_fw_version *invm_ver); -extern s32 igb_read_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr, -			      u16 *data); -extern s32 igb_write_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr, -			       u16 data); -extern s32 igb_init_nvm_params_i210(struct e1000_hw *hw); -extern bool igb_get_flash_presence_i210(struct e1000_hw *hw); +s32 igb_acquire_swfw_sync_i210(struct e1000_hw *hw, u16 mask); +void igb_release_swfw_sync_i210(struct e1000_hw *hw, u16 mask); +s32 igb_valid_led_default_i210(struct e1000_hw *hw, u16 *data); +s32 igb_read_invm_version(struct e1000_hw *hw, +			  struct e1000_fw_version *invm_ver); +s32 igb_read_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr, u16 *data); +s32 igb_write_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr, u16 data); +s32 igb_init_nvm_params_i210(struct e1000_hw *hw); +bool igb_get_flash_presence_i210(struct e1000_hw *hw); +s32 igb_pll_workaround_i210(struct e1000_hw *hw);  #define E1000_STM_OPCODE		0xDB00  #define E1000_EEPROM_FLASH_SIZE_WORD	0x11 @@ -93,4 +79,15 @@ enum E1000_INVM_STRUCTURE_TYPE {  #define NVM_LED_1_CFG_DEFAULT_I211	0x0184  #define NVM_LED_0_2_CFG_DEFAULT_I211	0x200C +/* PLL Defines */ +#define E1000_PCI_PMCSR			0x44 +#define E1000_PCI_PMCSR_D3		0x03 +#define E1000_MAX_PLL_TRIES		5 +#define E1000_PHY_PLL_UNCONF		0xFF +#define E1000_PHY_PLL_FREQ_PAGE		0xFC0000 +#define E1000_PHY_PLL_FREQ_REG		0x000E +#define E1000_INVM_DEFAULT_AL		0x202F +#define E1000_INVM_AUTOLOAD		0x0A +#define E1000_INVM_PLL_WO_VAL		0x0010 +  #endif diff --git a/drivers/net/ethernet/intel/igb/e1000_mac.c b/drivers/net/ethernet/intel/igb/e1000_mac.c index 298f0ed5067..2a88595f956 100644 --- a/drivers/net/ethernet/intel/igb/e1000_mac.c +++ b/drivers/net/ethernet/intel/igb/e1000_mac.c @@ -1,29 +1,25 @@ -/******************************************************************************* - -  Intel(R) Gigabit Ethernet Linux driver -  Copyright(c) 2007-2013 Intel Corporation. - -  This program is free software; you can redistribute it and/or modify it -  under the terms and conditions of the GNU General Public License, -  version 2, as published by the Free Software Foundation. - -  This program is distributed in the hope it will be useful, but WITHOUT -  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for -  more details. - -  You should have received a copy of the GNU General Public License along with -  this program; if not, write to the Free Software Foundation, Inc., -  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. - -  The full GNU General Public License is included in this distribution in -  the file called "COPYING". - -  Contact Information: -  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> -  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 - -*******************************************************************************/ +/* Intel(R) Gigabit Ethernet Linux driver + * Copyright(c) 2007-2014 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, see <http://www.gnu.org/licenses/>. + * + * The full GNU General Public License is included in this distribution in + * the file called "COPYING". + * + * Contact Information: + * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> + * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 + */  #include <linux/if_ether.h>  #include <linux/delay.h> @@ -443,7 +439,7 @@ static u32 igb_hash_mc_addr(struct e1000_hw *hw, u8 *mc_addr)   *  The caller must have a packed mc_addr_list of multicast addresses.   **/  void igb_update_mc_addr_list(struct e1000_hw *hw, -                             u8 *mc_addr_list, u32 mc_addr_count) +			     u8 *mc_addr_list, u32 mc_addr_count)  {  	u32 hash_value, hash_bit, hash_reg;  	int i; @@ -867,8 +863,7 @@ s32 igb_config_fc_after_link_up(struct e1000_hw *hw)  			goto out;  		if (!(mii_status_reg & MII_SR_AUTONEG_COMPLETE)) { -			hw_dbg("Copper PHY and Auto Neg " -				 "has not completed.\n"); +			hw_dbg("Copper PHY and Auto Neg has not completed.\n");  			goto out;  		} @@ -930,11 +925,10 @@ s32 igb_config_fc_after_link_up(struct e1000_hw *hw)  			 */  			if (hw->fc.requested_mode == e1000_fc_full) {  				hw->fc.current_mode = e1000_fc_full; -				hw_dbg("Flow Control = FULL.\r\n"); +				hw_dbg("Flow Control = FULL.\n");  			} else {  				hw->fc.current_mode = e1000_fc_rx_pause; -				hw_dbg("Flow Control = " -				       "RX PAUSE frames only.\r\n"); +				hw_dbg("Flow Control = RX PAUSE frames only.\n");  			}  		}  		/* For receiving PAUSE frames ONLY. @@ -949,7 +943,7 @@ s32 igb_config_fc_after_link_up(struct e1000_hw *hw)  			  (mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) &&  			  (mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) {  			hw->fc.current_mode = e1000_fc_tx_pause; -			hw_dbg("Flow Control = TX PAUSE frames only.\r\n"); +			hw_dbg("Flow Control = TX PAUSE frames only.\n");  		}  		/* For transmitting PAUSE frames ONLY.  		 * @@ -963,7 +957,7 @@ s32 igb_config_fc_after_link_up(struct e1000_hw *hw)  			 !(mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) &&  			 (mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) {  			hw->fc.current_mode = e1000_fc_rx_pause; -			hw_dbg("Flow Control = RX PAUSE frames only.\r\n"); +			hw_dbg("Flow Control = RX PAUSE frames only.\n");  		}  		/* Per the IEEE spec, at this point flow control should be  		 * disabled.  However, we want to consider that we could @@ -989,10 +983,10 @@ s32 igb_config_fc_after_link_up(struct e1000_hw *hw)  			 (hw->fc.requested_mode == e1000_fc_tx_pause) ||  			 (hw->fc.strict_ieee)) {  			hw->fc.current_mode = e1000_fc_none; -			hw_dbg("Flow Control = NONE.\r\n"); +			hw_dbg("Flow Control = NONE.\n");  		} else {  			hw->fc.current_mode = e1000_fc_rx_pause; -			hw_dbg("Flow Control = RX PAUSE frames only.\r\n"); +			hw_dbg("Flow Control = RX PAUSE frames only.\n");  		}  		/* Now we need to do one last check...  If we auto- @@ -1267,7 +1261,7 @@ s32 igb_get_auto_rd_done(struct e1000_hw *hw)  	while (i < AUTO_READ_DONE_TIMEOUT) {  		if (rd32(E1000_EECD) & E1000_EECD_AUTO_RD)  			break; -		msleep(1); +		usleep_range(1000, 2000);  		i++;  	} @@ -1300,7 +1294,7 @@ static s32 igb_valid_led_default(struct e1000_hw *hw, u16 *data)  	}  	if (*data == ID_LED_RESERVED_0000 || *data == ID_LED_RESERVED_FFFF) { -		switch(hw->phy.media_type) { +		switch (hw->phy.media_type) {  		case e1000_media_type_internal_serdes:  			*data = ID_LED_DEFAULT_82575_SERDES;  			break; diff --git a/drivers/net/ethernet/intel/igb/e1000_mac.h b/drivers/net/ethernet/intel/igb/e1000_mac.h index 5e13e83cc60..ea24961b0d7 100644 --- a/drivers/net/ethernet/intel/igb/e1000_mac.h +++ b/drivers/net/ethernet/intel/igb/e1000_mac.h @@ -1,29 +1,25 @@ -/******************************************************************************* - -  Intel(R) Gigabit Ethernet Linux driver -  Copyright(c) 2007-2013 Intel Corporation. - -  This program is free software; you can redistribute it and/or modify it -  under the terms and conditions of the GNU General Public License, -  version 2, as published by the Free Software Foundation. - -  This program is distributed in the hope it will be useful, but WITHOUT -  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for -  more details. - -  You should have received a copy of the GNU General Public License along with -  this program; if not, write to the Free Software Foundation, Inc., -  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. - -  The full GNU General Public License is included in this distribution in -  the file called "COPYING". - -  Contact Information: -  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> -  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 - -*******************************************************************************/ +/* Intel(R) Gigabit Ethernet Linux driver + * Copyright(c) 2007-2014 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, see <http://www.gnu.org/licenses/>. + * + * The full GNU General Public License is included in this distribution in + * the file called "COPYING". + * + * Contact Information: + * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> + * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 + */  #ifndef _E1000_MAC_H_  #define _E1000_MAC_H_ @@ -86,6 +82,6 @@ enum e1000_mng_mode {  #define E1000_MNG_DHCP_COOKIE_STATUS_VLAN	0x2 -extern void e1000_init_function_pointers_82575(struct e1000_hw *hw); +void e1000_init_function_pointers_82575(struct e1000_hw *hw);  #endif diff --git a/drivers/net/ethernet/intel/igb/e1000_mbx.c b/drivers/net/ethernet/intel/igb/e1000_mbx.c index dac1447fabf..162cc49345d 100644 --- a/drivers/net/ethernet/intel/igb/e1000_mbx.c +++ b/drivers/net/ethernet/intel/igb/e1000_mbx.c @@ -1,29 +1,25 @@ -/******************************************************************************* - -  Intel(R) Gigabit Ethernet Linux driver -  Copyright(c) 2007-2013 Intel Corporation. - -  This program is free software; you can redistribute it and/or modify it -  under the terms and conditions of the GNU General Public License, -  version 2, as published by the Free Software Foundation. - -  This program is distributed in the hope it will be useful, but WITHOUT -  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for -  more details. - -  You should have received a copy of the GNU General Public License along with -  this program; if not, write to the Free Software Foundation, Inc., -  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. - -  The full GNU General Public License is included in this distribution in -  the file called "COPYING". - -  Contact Information: -  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> -  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 - -*******************************************************************************/ +/* Intel(R) Gigabit Ethernet Linux driver + * Copyright(c) 2007-2014 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, see <http://www.gnu.org/licenses/>. + * + * The full GNU General Public License is included in this distribution in + * the file called "COPYING". + * + * Contact Information: + * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> + * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 + */  #include "e1000_mbx.h" diff --git a/drivers/net/ethernet/intel/igb/e1000_mbx.h b/drivers/net/ethernet/intel/igb/e1000_mbx.h index de9bba41acf..d20af6b2f58 100644 --- a/drivers/net/ethernet/intel/igb/e1000_mbx.h +++ b/drivers/net/ethernet/intel/igb/e1000_mbx.h @@ -1,29 +1,25 @@ -/******************************************************************************* - -  Intel(R) Gigabit Ethernet Linux driver -  Copyright(c) 2007-2013 Intel Corporation. - -  This program is free software; you can redistribute it and/or modify it -  under the terms and conditions of the GNU General Public License, -  version 2, as published by the Free Software Foundation. - -  This program is distributed in the hope it will be useful, but WITHOUT -  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for -  more details. - -  You should have received a copy of the GNU General Public License along with -  this program; if not, write to the Free Software Foundation, Inc., -  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. - -  The full GNU General Public License is included in this distribution in -  the file called "COPYING". - -  Contact Information: -  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> -  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 - -*******************************************************************************/ +/* Intel(R) Gigabit Ethernet Linux driver + * Copyright(c) 2007-2014 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, see <http://www.gnu.org/licenses/>. + * + * The full GNU General Public License is included in this distribution in + * the file called "COPYING". + * + * Contact Information: + * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> + * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 + */  #ifndef _E1000_MBX_H_  #define _E1000_MBX_H_ diff --git a/drivers/net/ethernet/intel/igb/e1000_nvm.c b/drivers/net/ethernet/intel/igb/e1000_nvm.c index a7db7f3db91..e8280d0d7f0 100644 --- a/drivers/net/ethernet/intel/igb/e1000_nvm.c +++ b/drivers/net/ethernet/intel/igb/e1000_nvm.c @@ -1,29 +1,24 @@ -/******************************************************************************* - -  Intel(R) Gigabit Ethernet Linux driver -  Copyright(c) 2007-2013 Intel Corporation. - -  This program is free software; you can redistribute it and/or modify it -  under the terms and conditions of the GNU General Public License, -  version 2, as published by the Free Software Foundation. - -  This program is distributed in the hope it will be useful, but WITHOUT -  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for -  more details. - -  You should have received a copy of the GNU General Public License along with -  this program; if not, write to the Free Software Foundation, Inc., -  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. - -  The full GNU General Public License is included in this distribution in -  the file called "COPYING". - -  Contact Information: -  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> -  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 - -*******************************************************************************/ +/* Intel(R) Gigabit Ethernet Linux driver + * Copyright(c) 2007-2014 Intel Corporation. + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, see <http://www.gnu.org/licenses/>. + * + * The full GNU General Public License is included in this distribution in + * the file called "COPYING". + * + * Contact Information: + * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> + * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 + */  #include <linux/if_ether.h>  #include <linux/delay.h> @@ -481,6 +476,7 @@ s32 igb_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)  		/* Loop to allow for up to whole page write of eeprom */  		while (widx < words) {  			u16 word_out = data[widx]; +  			word_out = (word_out >> 8) | (word_out << 8);  			igb_shift_out_eec_bits(hw, word_out, 16);  			widx++; @@ -802,5 +798,4 @@ etrack_id:  		fw_vers->etrack_id = (eeprom_verh << NVM_ETRACK_SHIFT)  			| eeprom_verl;  	} -	return;  } diff --git a/drivers/net/ethernet/intel/igb/e1000_nvm.h b/drivers/net/ethernet/intel/igb/e1000_nvm.h index 433b7419cb9..febc9cdb739 100644 --- a/drivers/net/ethernet/intel/igb/e1000_nvm.h +++ b/drivers/net/ethernet/intel/igb/e1000_nvm.h @@ -1,29 +1,25 @@ -/******************************************************************************* - -  Intel(R) Gigabit Ethernet Linux driver -  Copyright(c) 2013 Intel Corporation. - -  This program is free software; you can redistribute it and/or modify it -  under the terms and conditions of the GNU General Public License, -  version 2, as published by the Free Software Foundation. - -  This program is distributed in the hope it will be useful, but WITHOUT -  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for -  more details. - -  You should have received a copy of the GNU General Public License along with -  this program; if not, write to the Free Software Foundation, Inc., -  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. - -  The full GNU General Public License is included in this distribution in -  the file called "COPYING". - -  Contact Information: -  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> -  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 - -*******************************************************************************/ +/* Intel(R) Gigabit Ethernet Linux driver + * Copyright(c) 2007-2014 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, see <http://www.gnu.org/licenses/>. + * + * The full GNU General Public License is included in this distribution in + * the file called "COPYING". + * + * Contact Information: + * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> + * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 + */  #ifndef _E1000_NVM_H_  #define _E1000_NVM_H_ @@ -33,7 +29,7 @@ void igb_release_nvm(struct e1000_hw *hw);  s32  igb_read_mac_addr(struct e1000_hw *hw);  s32  igb_read_part_num(struct e1000_hw *hw, u32 *part_num);  s32  igb_read_part_string(struct e1000_hw *hw, u8 *part_num, -                          u32 part_num_size); +			  u32 part_num_size);  s32  igb_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);  s32  igb_read_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);  s32  igb_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data); diff --git a/drivers/net/ethernet/intel/igb/e1000_phy.c b/drivers/net/ethernet/intel/igb/e1000_phy.c index e7266759a10..c1bb64d8366 100644 --- a/drivers/net/ethernet/intel/igb/e1000_phy.c +++ b/drivers/net/ethernet/intel/igb/e1000_phy.c @@ -1,29 +1,25 @@ -/******************************************************************************* - -  Intel(R) Gigabit Ethernet Linux driver -  Copyright(c) 2007-2013 Intel Corporation. - -  This program is free software; you can redistribute it and/or modify it -  under the terms and conditions of the GNU General Public License, -  version 2, as published by the Free Software Foundation. - -  This program is distributed in the hope it will be useful, but WITHOUT -  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for -  more details. - -  You should have received a copy of the GNU General Public License along with -  this program; if not, write to the Free Software Foundation, Inc., -  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. - -  The full GNU General Public License is included in this distribution in -  the file called "COPYING". - -  Contact Information: -  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> -  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 - -*******************************************************************************/ +/* Intel(R) Gigabit Ethernet Linux driver + * Copyright(c) 2007-2014 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, see <http://www.gnu.org/licenses/>. + * + * The full GNU General Public License is included in this distribution in + * the file called "COPYING". + * + * Contact Information: + * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> + * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 + */  #include <linux/if_ether.h>  #include <linux/delay.h> @@ -394,77 +390,6 @@ s32 igb_read_sfp_data_byte(struct e1000_hw *hw, u16 offset, u8 *data)  }  /** - *  e1000_write_sfp_data_byte - Writes SFP module data. - *  @hw: pointer to the HW structure - *  @offset: byte location offset to write to - *  @data: data to write - * - *  Writes one byte to SFP module data stored - *  in SFP resided EEPROM memory or SFP diagnostic area. - *  Function should be called with - *  E1000_I2CCMD_SFP_DATA_ADDR(<byte offset>) for SFP module database access - *  E1000_I2CCMD_SFP_DIAG_ADDR(<byte offset>) for SFP diagnostics parameters - *  access - **/ -s32 e1000_write_sfp_data_byte(struct e1000_hw *hw, u16 offset, u8 data) -{ -	u32 i = 0; -	u32 i2ccmd = 0; -	u32 data_local = 0; - -	if (offset > E1000_I2CCMD_SFP_DIAG_ADDR(255)) { -		hw_dbg("I2CCMD command address exceeds upper limit\n"); -		return -E1000_ERR_PHY; -	} -	/* The programming interface is 16 bits wide -	 * so we need to read the whole word first -	 * then update appropriate byte lane and write -	 * the updated word back. -	 */ -	/* Set up Op-code, EEPROM Address,in the I2CCMD -	 * register. The MAC will take care of interfacing -	 * with an EEPROM to write the data given. -	 */ -	i2ccmd = ((offset << E1000_I2CCMD_REG_ADDR_SHIFT) | -		  E1000_I2CCMD_OPCODE_READ); -	/* Set a command to read single word */ -	wr32(E1000_I2CCMD, i2ccmd); -	for (i = 0; i < E1000_I2CCMD_PHY_TIMEOUT; i++) { -		udelay(50); -		/* Poll the ready bit to see if lastly -		 * launched I2C operation completed -		 */ -		i2ccmd = rd32(E1000_I2CCMD); -		if (i2ccmd & E1000_I2CCMD_READY) { -			/* Check if this is READ or WRITE phase */ -			if ((i2ccmd & E1000_I2CCMD_OPCODE_READ) == -			    E1000_I2CCMD_OPCODE_READ) { -				/* Write the selected byte -				 * lane and update whole word -				 */ -				data_local = i2ccmd & 0xFF00; -				data_local |= data; -				i2ccmd = ((offset << -					E1000_I2CCMD_REG_ADDR_SHIFT) | -					E1000_I2CCMD_OPCODE_WRITE | data_local); -				wr32(E1000_I2CCMD, i2ccmd); -			} else { -				break; -			} -		} -	} -	if (!(i2ccmd & E1000_I2CCMD_READY)) { -		hw_dbg("I2CCMD Write did not complete\n"); -		return -E1000_ERR_PHY; -	} -	if (i2ccmd & E1000_I2CCMD_ERROR) { -		hw_dbg("I2CCMD Error bit set\n"); -		return -E1000_ERR_PHY; -	} -	return 0; -} - -/**   *  igb_read_phy_reg_igp - Read igp PHY register   *  @hw: pointer to the HW structure   *  @offset: register offset to be read @@ -708,11 +633,6 @@ s32 igb_copper_link_setup_m88(struct e1000_hw *hw)  		hw_dbg("Error committing the PHY changes\n");  		goto out;  	} -	if (phy->type == e1000_phy_i210) { -		ret_val = igb_set_master_slave_mode(hw); -		if (ret_val) -			return ret_val; -	}  out:  	return ret_val; @@ -806,6 +726,9 @@ s32 igb_copper_link_setup_m88_gen2(struct e1000_hw *hw)  		hw_dbg("Error committing the PHY changes\n");  		return ret_val;  	} +	ret_val = igb_set_master_slave_mode(hw); +	if (ret_val) +		return ret_val;  	return 0;  } @@ -998,8 +921,7 @@ static s32 igb_copper_link_autoneg(struct e1000_hw *hw)  	if (phy->autoneg_wait_to_complete) {  		ret_val = igb_wait_autoneg(hw);  		if (ret_val) { -			hw_dbg("Error while waiting for " -			       "autoneg to complete\n"); +			hw_dbg("Error while waiting for autoneg to complete\n");  			goto out;  		}  	} @@ -1730,7 +1652,10 @@ s32 igb_phy_has_link(struct e1000_hw *hw, u32 iterations,  			 * ownership of the resources, wait and try again to  			 * see if they have relinquished the resources yet.  			 */ -			udelay(usec_interval); +			if (usec_interval >= 1000) +				mdelay(usec_interval/1000); +			else +				udelay(usec_interval);  		}  		ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status);  		if (ret_val) @@ -2279,16 +2204,10 @@ s32 igb_phy_init_script_igp3(struct e1000_hw *hw)  void igb_power_up_phy_copper(struct e1000_hw *hw)  {  	u16 mii_reg = 0; -	u16 power_reg = 0;  	/* The PHY will retain its settings across a power down/up cycle */  	hw->phy.ops.read_reg(hw, PHY_CONTROL, &mii_reg);  	mii_reg &= ~MII_CR_POWER_DOWN; -	if (hw->phy.type == e1000_phy_i210) { -		hw->phy.ops.read_reg(hw, GS40G_COPPER_SPEC, &power_reg); -		power_reg &= ~GS40G_CS_POWER_DOWN; -		hw->phy.ops.write_reg(hw, GS40G_COPPER_SPEC, power_reg); -	}  	hw->phy.ops.write_reg(hw, PHY_CONTROL, mii_reg);  } @@ -2302,20 +2221,12 @@ void igb_power_up_phy_copper(struct e1000_hw *hw)  void igb_power_down_phy_copper(struct e1000_hw *hw)  {  	u16 mii_reg = 0; -	u16 power_reg = 0;  	/* The PHY will retain its settings across a power down/up cycle */  	hw->phy.ops.read_reg(hw, PHY_CONTROL, &mii_reg);  	mii_reg |= MII_CR_POWER_DOWN; - -	/* i210 Phy requires an additional bit for power up/down */ -	if (hw->phy.type == e1000_phy_i210) { -		hw->phy.ops.read_reg(hw, GS40G_COPPER_SPEC, &power_reg); -		power_reg |= GS40G_CS_POWER_DOWN; -		hw->phy.ops.write_reg(hw, GS40G_COPPER_SPEC, power_reg); -	}  	hw->phy.ops.write_reg(hw, PHY_CONTROL, mii_reg); -	msleep(1); +	usleep_range(1000, 2000);  }  /** diff --git a/drivers/net/ethernet/intel/igb/e1000_phy.h b/drivers/net/ethernet/intel/igb/e1000_phy.h index 6a0873f2095..7af4ffab028 100644 --- a/drivers/net/ethernet/intel/igb/e1000_phy.h +++ b/drivers/net/ethernet/intel/igb/e1000_phy.h @@ -1,29 +1,25 @@ -/******************************************************************************* - -  Intel(R) Gigabit Ethernet Linux driver -  Copyright(c) 2007-2013 Intel Corporation. - -  This program is free software; you can redistribute it and/or modify it -  under the terms and conditions of the GNU General Public License, -  version 2, as published by the Free Software Foundation. - -  This program is distributed in the hope it will be useful, but WITHOUT -  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for -  more details. - -  You should have received a copy of the GNU General Public License along with -  this program; if not, write to the Free Software Foundation, Inc., -  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. - -  The full GNU General Public License is included in this distribution in -  the file called "COPYING". - -  Contact Information: -  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> -  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 - -*******************************************************************************/ +/* Intel(R) Gigabit Ethernet Linux driver + * Copyright(c) 2007-2014 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, see <http://www.gnu.org/licenses/>. + * + * The full GNU General Public License is included in this distribution in + * the file called "COPYING". + * + * Contact Information: + * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> + * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 + */  #ifndef _E1000_PHY_H_  #define _E1000_PHY_H_ @@ -70,7 +66,6 @@ s32  igb_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data);  s32  igb_read_phy_reg_i2c(struct e1000_hw *hw, u32 offset, u16 *data);  s32  igb_write_phy_reg_i2c(struct e1000_hw *hw, u32 offset, u16 data);  s32  igb_read_sfp_data_byte(struct e1000_hw *hw, u16 offset, u8 *data); -s32  e1000_write_sfp_data_byte(struct e1000_hw *hw, u16 offset, u8 data);  s32  igb_copper_link_setup_82580(struct e1000_hw *hw);  s32  igb_get_phy_info_82580(struct e1000_hw *hw);  s32  igb_phy_force_speed_duplex_82580(struct e1000_hw *hw); @@ -156,7 +151,6 @@ s32  igb_check_polarity_m88(struct e1000_hw *hw);  #define GS40G_MAC_LB			0x4140  #define GS40G_MAC_SPEED_1G		0X0006  #define GS40G_COPPER_SPEC		0x0010 -#define GS40G_CS_POWER_DOWN		0x0002  #define GS40G_LINE_LB			0x4000  /* SFP modules ID memory locations */ diff --git a/drivers/net/ethernet/intel/igb/e1000_regs.h b/drivers/net/ethernet/intel/igb/e1000_regs.h index 82632c6c53a..f5ba4e4eafb 100644 --- a/drivers/net/ethernet/intel/igb/e1000_regs.h +++ b/drivers/net/ethernet/intel/igb/e1000_regs.h @@ -1,29 +1,25 @@ -/******************************************************************************* - -  Intel(R) Gigabit Ethernet Linux driver -  Copyright(c) 2007-2013 Intel Corporation. - -  This program is free software; you can redistribute it and/or modify it -  under the terms and conditions of the GNU General Public License, -  version 2, as published by the Free Software Foundation. - -  This program is distributed in the hope it will be useful, but WITHOUT -  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for -  more details. - -  You should have received a copy of the GNU General Public License along with -  this program; if not, write to the Free Software Foundation, Inc., -  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. - -  The full GNU General Public License is included in this distribution in -  the file called "COPYING". - -  Contact Information: -  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> -  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 - -*******************************************************************************/ +/* Intel(R) Gigabit Ethernet Linux driver + * Copyright(c) 2007-2014 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, see <http://www.gnu.org/licenses/>. + * + * The full GNU General Public License is included in this distribution in + * the file called "COPYING". + * + * Contact Information: + * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> + * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 + */  #ifndef _E1000_REGS_H_  #define _E1000_REGS_H_ @@ -41,6 +37,7 @@  #define E1000_FCT      0x00030  /* Flow Control Type - RW */  #define E1000_CONNSW   0x00034  /* Copper/Fiber switch control - RW */  #define E1000_VET      0x00038  /* VLAN Ether Type - RW */ +#define E1000_TSSDP    0x0003C  /* Time Sync SDP Configuration Register - RW */  #define E1000_ICR      0x000C0  /* Interrupt Cause Read - R/clr */  #define E1000_ITR      0x000C4  /* Interrupt Throttling Rate - RW */  #define E1000_ICS      0x000C8  /* Interrupt Cause Set - WO */ @@ -69,6 +66,7 @@  #define E1000_PBA      0x01000  /* Packet Buffer Allocation - RW */  #define E1000_PBS      0x01008  /* Packet Buffer Size */  #define E1000_EEMNGCTL 0x01010  /* MNG EEprom Control */ +#define E1000_EEARBC_I210 0x12024  /* EEPROM Auto Read Bus Control */  #define E1000_EEWR     0x0102C  /* EEPROM Write Register - RW */  #define E1000_I2CCMD   0x01028  /* SFPI2C Command Register - RW */  #define E1000_FRTIMER  0x01048  /* Free Running Timer - RW */ @@ -102,6 +100,14 @@  #define E1000_SYSTIMH    0x0B604 /* System time register High - RO */  #define E1000_TIMINCA    0x0B608 /* Increment attributes register - RW */  #define E1000_TSAUXC     0x0B640 /* Timesync Auxiliary Control register */ +#define E1000_TRGTTIML0  0x0B644 /* Target Time Register 0 Low  - RW */ +#define E1000_TRGTTIMH0  0x0B648 /* Target Time Register 0 High - RW */ +#define E1000_TRGTTIML1  0x0B64C /* Target Time Register 1 Low  - RW */ +#define E1000_TRGTTIMH1  0x0B650 /* Target Time Register 1 High - RW */ +#define E1000_AUXSTMPL0  0x0B65C /* Auxiliary Time Stamp 0 Register Low  - RO */ +#define E1000_AUXSTMPH0  0x0B660 /* Auxiliary Time Stamp 0 Register High - RO */ +#define E1000_AUXSTMPL1  0x0B664 /* Auxiliary Time Stamp 1 Register Low  - RO */ +#define E1000_AUXSTMPH1  0x0B668 /* Auxiliary Time Stamp 1 Register High - RO */  #define E1000_SYSTIMR    0x0B6F8 /* System time register Residue */  #define E1000_TSICR      0x0B66C /* Interrupt Cause Register */  #define E1000_TSIM       0x0B674 /* Interrupt Mask Register */ @@ -187,6 +193,10 @@  				    : (0x0E038 + ((_n) * 0x40)))  #define E1000_TDWBAH(_n)  ((_n) < 4 ? (0x0383C + ((_n) * 0x100)) \  				    : (0x0E03C + ((_n) * 0x40))) + +#define E1000_RXPBS	0x02404  /* Rx Packet Buffer Size - RW */ +#define E1000_TXPBS	0x03404  /* Tx Packet Buffer Size - RW */ +  #define E1000_TDFH     0x03410  /* TX Data FIFO Head - RW */  #define E1000_TDFT     0x03418  /* TX Data FIFO Tail - RW */  #define E1000_TDFHS    0x03420  /* TX Data FIFO Head Saved - RW */ @@ -293,9 +303,9 @@  #define E1000_RA2      0x054E0  /* 2nd half of Rx address array - RW Array */  #define E1000_PSRTYPE(_i)       (0x05480 + ((_i) * 4))  #define E1000_RAL(_i)  (((_i) <= 15) ? (0x05400 + ((_i) * 8)) : \ -                                       (0x054E0 + ((_i - 16) * 8))) +					(0x054E0 + ((_i - 16) * 8)))  #define E1000_RAH(_i)  (((_i) <= 15) ? (0x05404 + ((_i) * 8)) : \ -                                       (0x054E4 + ((_i - 16) * 8))) +					(0x054E4 + ((_i - 16) * 8)))  #define E1000_IP4AT_REG(_i)     (0x05840 + ((_i) * 8))  #define E1000_IP6AT_REG(_i)     (0x05880 + ((_i) * 4))  #define E1000_WUPM_REG(_i)      (0x05A00 + ((_i) * 4)) @@ -349,16 +359,29 @@  #define E1000_P2VMAILBOX(_n)   (0x00C00 + (4 * (_n)))  #define E1000_VMBMEM(_n)       (0x00800 + (64 * (_n)))  #define E1000_VMOLR(_n)        (0x05AD0 + (4 * (_n))) -#define E1000_VLVF(_n)         (0x05D00 + (4 * (_n))) /* VLAN Virtual Machine -                                                       * Filter - RW */ +#define E1000_DVMOLR(_n)       (0x0C038 + (64 * (_n))) +#define E1000_VLVF(_n)         (0x05D00 + (4 * (_n))) /* VLAN VM Filter */  #define E1000_VMVIR(_n)        (0x03700 + (4 * (_n))) -#define wr32(reg, value) (writel(value, hw->hw_addr + reg)) -#define rd32(reg) (readl(hw->hw_addr + reg)) +struct e1000_hw; + +u32 igb_rd32(struct e1000_hw *hw, u32 reg); + +/* write operations, indexed using DWORDS */ +#define wr32(reg, val) \ +do { \ +	u8 __iomem *hw_addr = ACCESS_ONCE((hw)->hw_addr); \ +	if (!E1000_REMOVED(hw_addr)) \ +		writel((val), &hw_addr[(reg)]); \ +} while (0) + +#define rd32(reg) (igb_rd32(hw, reg)) +  #define wrfl() ((void)rd32(E1000_STATUS))  #define array_wr32(reg, offset, value) \ -	(writel(value, hw->hw_addr + reg + ((offset) << 2))) +	wr32((reg) + ((offset) << 2), (value)) +  #define array_rd32(reg, offset) \  	(readl(hw->hw_addr + reg + ((offset) << 2))) @@ -397,4 +420,6 @@  #define E1000_INVM_DATA_REG(_n)	(0x12120 + 4*(_n))  #define E1000_INVM_SIZE		64 /* Number of INVM Data Registers */ +#define E1000_REMOVED(h) unlikely(!(h)) +  #endif diff --git a/drivers/net/ethernet/intel/igb/igb.h b/drivers/net/ethernet/intel/igb/igb.h index 6807b098eda..06102d1f7c0 100644 --- a/drivers/net/ethernet/intel/igb/igb.h +++ b/drivers/net/ethernet/intel/igb/igb.h @@ -1,30 +1,25 @@ -/******************************************************************************* - -  Intel(R) Gigabit Ethernet Linux driver -  Copyright(c) 2007-2013 Intel Corporation. - -  This program is free software; you can redistribute it and/or modify it -  under the terms and conditions of the GNU General Public License, -  version 2, as published by the Free Software Foundation. - -  This program is distributed in the hope it will be useful, but WITHOUT -  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for -  more details. - -  You should have received a copy of the GNU General Public License along with -  this program; if not, write to the Free Software Foundation, Inc., -  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. - -  The full GNU General Public License is included in this distribution in -  the file called "COPYING". - -  Contact Information: -  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> -  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 - -*******************************************************************************/ - +/* Intel(R) Gigabit Ethernet Linux driver + * Copyright(c) 2007-2014 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, see <http://www.gnu.org/licenses/>. + * + * The full GNU General Public License is included in this distribution in + * the file called "COPYING". + * + * Contact Information: + * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> + * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 + */  /* Linux PRO/1000 Ethernet Driver main header file */ @@ -41,6 +36,8 @@  #include <linux/if_vlan.h>  #include <linux/i2c.h>  #include <linux/i2c-algo-bit.h> +#include <linux/pci.h> +#include <linux/mdio.h>  struct igb_adapter; @@ -67,6 +64,7 @@ struct igb_adapter;  #define IGB_MIN_ITR_USECS	10  #define NON_Q_VECTORS		1  #define MAX_Q_VECTORS		8 +#define MAX_MSIX_ENTRIES	10  /* Transmit and receive queues */  #define IGB_MAX_RX_QUEUES	8 @@ -127,9 +125,9 @@ struct vf_data_storage {  #define IGB_TX_PTHRESH	((hw->mac.type == e1000_i354) ? 20 : 8)  #define IGB_TX_HTHRESH	1  #define IGB_RX_WTHRESH	((hw->mac.type == e1000_82576 && \ -			  adapter->msix_entries) ? 1 : 4) +			  (adapter->flags & IGB_FLAG_HAS_MSIX)) ? 1 : 4)  #define IGB_TX_WTHRESH	((hw->mac.type == e1000_82576 && \ -			  adapter->msix_entries) ? 1 : 16) +			  (adapter->flags & IGB_FLAG_HAS_MSIX)) ? 1 : 16)  /* this is the size past which hardware will drop packets when setting LPE=0 */  #define MAXIMUM_ETHERNET_VLAN_SIZE 1522 @@ -196,6 +194,7 @@ struct igb_tx_buffer {  	unsigned int bytecount;  	u16 gso_segs;  	__be16 protocol; +  	DEFINE_DMA_UNMAP_ADDR(dma);  	DEFINE_DMA_UNMAP_LEN(len);  	u32 tx_flags; @@ -239,7 +238,6 @@ struct igb_ring {  		struct igb_tx_buffer *tx_buffer_info;  		struct igb_rx_buffer *rx_buffer_info;  	}; -	unsigned long last_rx_timestamp;  	void *desc;			/* descriptor ring memory */  	unsigned long flags;		/* ring specific flags */  	void __iomem *tail;		/* pointer to ring tail register */ @@ -337,8 +335,10 @@ struct hwmon_attr {  	};  struct hwmon_buff { -	struct device *device; -	struct hwmon_attr *hwmon_list; +	struct attribute_group group; +	const struct attribute_group *groups[2]; +	struct attribute *attrs[E1000_MAX_SENSORS * 4 + 1]; +	struct hwmon_attr hwmon_list[E1000_MAX_SENSORS * 4];  	unsigned int n_hwmon;  	};  #endif @@ -355,7 +355,7 @@ struct igb_adapter {  	unsigned int flags;  	unsigned int num_q_vectors; -	struct msix_entry *msix_entries; +	struct msix_entry msix_entries[MAX_MSIX_ENTRIES];  	/* Interrupt Throttle Rate */  	u32 rx_itr_setting; @@ -430,8 +430,10 @@ struct igb_adapter {  	struct delayed_work ptp_overflow_work;  	struct work_struct ptp_tx_work;  	struct sk_buff *ptp_tx_skb; +	struct hwtstamp_config tstamp_config;  	unsigned long ptp_tx_start;  	unsigned long last_rx_ptp_check; +	unsigned long last_rx_timestamp;  	spinlock_t tmreg_lock;  	struct cyclecounter cc;  	struct timecounter tc; @@ -440,7 +442,7 @@ struct igb_adapter {  	char fw_version[32];  #ifdef CONFIG_IGB_HWMON -	struct hwmon_buff igb_hwmon_buff; +	struct hwmon_buff *igb_hwmon_buff;  	bool ets;  #endif  	struct i2c_algo_bit_data i2c_algo; @@ -450,6 +452,9 @@ struct igb_adapter {  	u8 rss_indir_tbl[IGB_RETA_SIZE];  	unsigned long link_check_timeout; +	int copper_tries; +	struct e1000_info ei; +	u16 eee_advert;  };  #define IGB_FLAG_HAS_MSI		(1 << 0) @@ -462,6 +467,17 @@ struct igb_adapter {  #define IGB_FLAG_RSS_FIELD_IPV6_UDP	(1 << 7)  #define IGB_FLAG_WOL_SUPPORTED		(1 << 8)  #define IGB_FLAG_NEED_LINK_UPDATE	(1 << 9) +#define IGB_FLAG_MEDIA_RESET		(1 << 10) +#define IGB_FLAG_MAS_CAPABLE		(1 << 11) +#define IGB_FLAG_MAS_ENABLE		(1 << 12) +#define IGB_FLAG_HAS_MSIX		(1 << 13) +#define IGB_FLAG_EEE			(1 << 14) + +/* Media Auto Sense */ +#define IGB_MAS_ENABLE_0		0X0001 +#define IGB_MAS_ENABLE_1		0X0002 +#define IGB_MAS_ENABLE_2		0X0004 +#define IGB_MAS_ENABLE_3		0X0008  /* DMA Coalescing defines */  #define IGB_MIN_TXPBSIZE	20408 @@ -473,7 +489,8 @@ struct igb_adapter {  enum e1000_state_t {  	__IGB_TESTING,  	__IGB_RESETTING, -	__IGB_DOWN +	__IGB_DOWN, +	__IGB_PTP_TX_IN_PROGRESS,  };  enum igb_boards { @@ -483,59 +500,41 @@ enum igb_boards {  extern char igb_driver_name[];  extern char igb_driver_version[]; -extern int igb_up(struct igb_adapter *); -extern void igb_down(struct igb_adapter *); -extern void igb_reinit_locked(struct igb_adapter *); -extern void igb_reset(struct igb_adapter *); -extern void igb_write_rss_indir_tbl(struct igb_adapter *); -extern int igb_set_spd_dplx(struct igb_adapter *, u32, u8); -extern int igb_setup_tx_resources(struct igb_ring *); -extern int igb_setup_rx_resources(struct igb_ring *); -extern void igb_free_tx_resources(struct igb_ring *); -extern void igb_free_rx_resources(struct igb_ring *); -extern void igb_configure_tx_ring(struct igb_adapter *, struct igb_ring *); -extern void igb_configure_rx_ring(struct igb_adapter *, struct igb_ring *); -extern void igb_setup_tctl(struct igb_adapter *); -extern void igb_setup_rctl(struct igb_adapter *); -extern netdev_tx_t igb_xmit_frame_ring(struct sk_buff *, struct igb_ring *); -extern void igb_unmap_and_free_tx_resource(struct igb_ring *, -					   struct igb_tx_buffer *); -extern void igb_alloc_rx_buffers(struct igb_ring *, u16); -extern void igb_update_stats(struct igb_adapter *, struct rtnl_link_stats64 *); -extern bool igb_has_link(struct igb_adapter *adapter); -extern void igb_set_ethtool_ops(struct net_device *); -extern void igb_power_up_link(struct igb_adapter *); -extern void igb_set_fw_version(struct igb_adapter *); -extern void igb_ptp_init(struct igb_adapter *adapter); -extern void igb_ptp_stop(struct igb_adapter *adapter); -extern void igb_ptp_reset(struct igb_adapter *adapter); -extern void igb_ptp_tx_work(struct work_struct *work); -extern void igb_ptp_rx_hang(struct igb_adapter *adapter); -extern void igb_ptp_tx_hwtstamp(struct igb_adapter *adapter); -extern void igb_ptp_rx_rgtstamp(struct igb_q_vector *q_vector, -				struct sk_buff *skb); -extern void igb_ptp_rx_pktstamp(struct igb_q_vector *q_vector, -				unsigned char *va, -				struct sk_buff *skb); -static inline void igb_ptp_rx_hwtstamp(struct igb_ring *rx_ring, -				       union e1000_adv_rx_desc *rx_desc, -				       struct sk_buff *skb) -{ -	if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TS) && -	    !igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) -		igb_ptp_rx_rgtstamp(rx_ring->q_vector, skb); - -	/* Update the last_rx_timestamp timer in order to enable watchdog check -	 * for error case of latched timestamp on a dropped packet. -	 */ -	rx_ring->last_rx_timestamp = jiffies; -} - -extern int igb_ptp_hwtstamp_ioctl(struct net_device *netdev, -				  struct ifreq *ifr, int cmd); +int igb_up(struct igb_adapter *); +void igb_down(struct igb_adapter *); +void igb_reinit_locked(struct igb_adapter *); +void igb_reset(struct igb_adapter *); +int igb_reinit_queues(struct igb_adapter *); +void igb_write_rss_indir_tbl(struct igb_adapter *); +int igb_set_spd_dplx(struct igb_adapter *, u32, u8); +int igb_setup_tx_resources(struct igb_ring *); +int igb_setup_rx_resources(struct igb_ring *); +void igb_free_tx_resources(struct igb_ring *); +void igb_free_rx_resources(struct igb_ring *); +void igb_configure_tx_ring(struct igb_adapter *, struct igb_ring *); +void igb_configure_rx_ring(struct igb_adapter *, struct igb_ring *); +void igb_setup_tctl(struct igb_adapter *); +void igb_setup_rctl(struct igb_adapter *); +netdev_tx_t igb_xmit_frame_ring(struct sk_buff *, struct igb_ring *); +void igb_unmap_and_free_tx_resource(struct igb_ring *, struct igb_tx_buffer *); +void igb_alloc_rx_buffers(struct igb_ring *, u16); +void igb_update_stats(struct igb_adapter *, struct rtnl_link_stats64 *); +bool igb_has_link(struct igb_adapter *adapter); +void igb_set_ethtool_ops(struct net_device *); +void igb_power_up_link(struct igb_adapter *); +void igb_set_fw_version(struct igb_adapter *); +void igb_ptp_init(struct igb_adapter *adapter); +void igb_ptp_stop(struct igb_adapter *adapter); +void igb_ptp_reset(struct igb_adapter *adapter); +void igb_ptp_rx_hang(struct igb_adapter *adapter); +void igb_ptp_rx_rgtstamp(struct igb_q_vector *q_vector, struct sk_buff *skb); +void igb_ptp_rx_pktstamp(struct igb_q_vector *q_vector, unsigned char *va, +			 struct sk_buff *skb); +int igb_ptp_set_ts_config(struct net_device *netdev, struct ifreq *ifr); +int igb_ptp_get_ts_config(struct net_device *netdev, struct ifreq *ifr);  #ifdef CONFIG_IGB_HWMON -extern void igb_sysfs_exit(struct igb_adapter *adapter); -extern int igb_sysfs_init(struct igb_adapter *adapter); +void igb_sysfs_exit(struct igb_adapter *adapter); +int igb_sysfs_init(struct igb_adapter *adapter);  #endif  static inline s32 igb_reset_phy(struct e1000_hw *hw)  { diff --git a/drivers/net/ethernet/intel/igb/igb_ethtool.c b/drivers/net/ethernet/intel/igb/igb_ethtool.c index 151e00cad11..c737d1f4083 100644 --- a/drivers/net/ethernet/intel/igb/igb_ethtool.c +++ b/drivers/net/ethernet/intel/igb/igb_ethtool.c @@ -1,29 +1,25 @@ -/******************************************************************************* - -  Intel(R) Gigabit Ethernet Linux driver -  Copyright(c) 2007-2013 Intel Corporation. - -  This program is free software; you can redistribute it and/or modify it -  under the terms and conditions of the GNU General Public License, -  version 2, as published by the Free Software Foundation. - -  This program is distributed in the hope it will be useful, but WITHOUT -  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for -  more details. - -  You should have received a copy of the GNU General Public License along with -  this program; if not, write to the Free Software Foundation, Inc., -  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. - -  The full GNU General Public License is included in this distribution in -  the file called "COPYING". - -  Contact Information: -  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> -  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 - -*******************************************************************************/ +/* Intel(R) Gigabit Ethernet Linux driver + * Copyright(c) 2007-2014 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, see <http://www.gnu.org/licenses/>. + * + * The full GNU General Public License is included in this distribution in + * the file called "COPYING". + * + * Contact Information: + * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> + * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 + */  /* ethtool support for igb */ @@ -145,7 +141,9 @@ static int igb_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)  	struct e1000_dev_spec_82575 *dev_spec = &hw->dev_spec._82575;  	struct e1000_sfp_flags *eth_flags = &dev_spec->eth_flags;  	u32 status; +	u32 speed; +	status = rd32(E1000_STATUS);  	if (hw->phy.media_type == e1000_media_type_copper) {  		ecmd->supported = (SUPPORTED_10baseT_Half | @@ -169,13 +167,22 @@ static int igb_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)  		ecmd->transceiver = XCVR_INTERNAL;  	} else {  		ecmd->supported = (SUPPORTED_FIBRE | +				   SUPPORTED_1000baseKX_Full |  				   SUPPORTED_Autoneg |  				   SUPPORTED_Pause); -		ecmd->advertising = ADVERTISED_FIBRE; - -		if ((eth_flags->e1000_base_lx) || (eth_flags->e1000_base_sx)) { -			ecmd->supported |= SUPPORTED_1000baseT_Full; -			ecmd->advertising |= ADVERTISED_1000baseT_Full; +		ecmd->advertising = (ADVERTISED_FIBRE | +				     ADVERTISED_1000baseKX_Full); +		if (hw->mac.type == e1000_i354) { +			if ((hw->device_id == +			     E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) && +			    !(status & E1000_STATUS_2P5_SKU_OVER)) { +				ecmd->supported |= SUPPORTED_2500baseX_Full; +				ecmd->supported &= +					~SUPPORTED_1000baseKX_Full; +				ecmd->advertising |= ADVERTISED_2500baseX_Full; +				ecmd->advertising &= +					~ADVERTISED_1000baseKX_Full; +			}  		}  		if (eth_flags->e100_base_fx) {  			ecmd->supported |= SUPPORTED_100baseT_Full; @@ -187,41 +194,35 @@ static int igb_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)  		ecmd->port = PORT_FIBRE;  		ecmd->transceiver = XCVR_EXTERNAL;  	} -  	if (hw->mac.autoneg != 1)  		ecmd->advertising &= ~(ADVERTISED_Pause |  				       ADVERTISED_Asym_Pause); -	if (hw->fc.requested_mode == e1000_fc_full) +	switch (hw->fc.requested_mode) { +	case e1000_fc_full:  		ecmd->advertising |= ADVERTISED_Pause; -	else if (hw->fc.requested_mode == e1000_fc_rx_pause) +		break; +	case e1000_fc_rx_pause:  		ecmd->advertising |= (ADVERTISED_Pause |  				      ADVERTISED_Asym_Pause); -	else if (hw->fc.requested_mode == e1000_fc_tx_pause) +		break; +	case e1000_fc_tx_pause:  		ecmd->advertising |=  ADVERTISED_Asym_Pause; -	else +		break; +	default:  		ecmd->advertising &= ~(ADVERTISED_Pause |  				       ADVERTISED_Asym_Pause); - -	status = rd32(E1000_STATUS); - +	}  	if (status & E1000_STATUS_LU) { -		if (hw->mac.type == e1000_i354) { -			if ((status & E1000_STATUS_2P5_SKU) && -			    !(status & E1000_STATUS_2P5_SKU_OVER)) { -				ecmd->supported = SUPPORTED_2500baseX_Full; -				ecmd->advertising = ADVERTISED_2500baseX_Full; -				ecmd->speed = SPEED_2500; -			} else { -				ecmd->supported = SUPPORTED_1000baseT_Full; -				ecmd->advertising = ADVERTISED_1000baseT_Full; -			} +		if ((status & E1000_STATUS_2P5_SKU) && +		    !(status & E1000_STATUS_2P5_SKU_OVER)) { +			speed = SPEED_2500;  		} else if (status & E1000_STATUS_SPEED_1000) { -			ecmd->speed = SPEED_1000; +			speed = SPEED_1000;  		} else if (status & E1000_STATUS_SPEED_100) { -			ecmd->speed = SPEED_100; +			speed = SPEED_100;  		} else { -			ecmd->speed = SPEED_10; +			speed = SPEED_10;  		}  		if ((status & E1000_STATUS_FD) ||  		    hw->phy.media_type != e1000_media_type_copper) @@ -229,10 +230,10 @@ static int igb_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)  		else  			ecmd->duplex = DUPLEX_HALF;  	} else { -		ecmd->speed = -1; -		ecmd->duplex = -1; +		speed = SPEED_UNKNOWN; +		ecmd->duplex = DUPLEX_UNKNOWN;  	} - +	ethtool_cmd_speed_set(ecmd, speed);  	if ((hw->phy.media_type == e1000_media_type_fiber) ||  	    hw->mac.autoneg)  		ecmd->autoneg = AUTONEG_ENABLE; @@ -284,7 +285,7 @@ static int igb_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)  	}  	while (test_and_set_bit(__IGB_RESETTING, &adapter->state)) -		msleep(1); +		usleep_range(1000, 2000);  	if (ecmd->autoneg == AUTONEG_ENABLE) {  		hw->mac.autoneg = 1; @@ -397,7 +398,7 @@ static int igb_set_pauseparam(struct net_device *netdev,  	adapter->fc_autoneg = pause->autoneg;  	while (test_and_set_bit(__IGB_RESETTING, &adapter->state)) -		msleep(1); +		usleep_range(1000, 2000);  	if (adapter->fc_autoneg == AUTONEG_ENABLE) {  		hw->fc.requested_mode = e1000_fc_default; @@ -771,8 +772,10 @@ static int igb_set_eeprom(struct net_device *netdev,  	if (eeprom->len == 0)  		return -EOPNOTSUPP; -	if (hw->mac.type == e1000_i211) +	if ((hw->mac.type >= e1000_i210) && +	    !igb_get_flash_presence_i210(hw)) {  		return -EOPNOTSUPP; +	}  	if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))  		return -EFAULT; @@ -882,7 +885,7 @@ static int igb_set_ringparam(struct net_device *netdev,  	}  	while (test_and_set_bit(__IGB_RESETTING, &adapter->state)) -		msleep(1); +		usleep_range(1000, 2000);  	if (!netif_running(adapter->netdev)) {  		for (i = 0; i < adapter->num_tx_queues; i++) @@ -1056,8 +1059,8 @@ static struct igb_reg_test reg_test_i350[] = {  	{ E1000_TDT(0),	   0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },  	{ E1000_TDT(4),	   0x40,  4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },  	{ E1000_RCTL,	   0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 }, -	{ E1000_RCTL, 	   0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB }, -	{ E1000_RCTL, 	   0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF }, +	{ E1000_RCTL,	   0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB }, +	{ E1000_RCTL,	   0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },  	{ E1000_TCTL,	   0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },  	{ E1000_RA,	   0, 16, TABLE64_TEST_LO,  						0xFFFFFFFF, 0xFFFFFFFF }, @@ -1099,8 +1102,8 @@ static struct igb_reg_test reg_test_82580[] = {  	{ E1000_TDT(0),	   0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },  	{ E1000_TDT(4),	   0x40,  4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },  	{ E1000_RCTL,	   0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 }, -	{ E1000_RCTL, 	   0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB }, -	{ E1000_RCTL, 	   0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF }, +	{ E1000_RCTL,	   0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB }, +	{ E1000_RCTL,	   0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },  	{ E1000_TCTL,	   0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },  	{ E1000_RA,	   0, 16, TABLE64_TEST_LO,  						0xFFFFFFFF, 0xFFFFFFFF }, @@ -1128,8 +1131,10 @@ static struct igb_reg_test reg_test_82576[] = {  	{ E1000_RDBAH(4),  0x40, 12, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },  	{ E1000_RDLEN(4),  0x40, 12, PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },  	/* Enable all RX queues before testing. */ -	{ E1000_RXDCTL(0), 0x100, 4,  WRITE_NO_TEST, 0, E1000_RXDCTL_QUEUE_ENABLE }, -	{ E1000_RXDCTL(4), 0x40, 12,  WRITE_NO_TEST, 0, E1000_RXDCTL_QUEUE_ENABLE }, +	{ E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST, 0, +	  E1000_RXDCTL_QUEUE_ENABLE }, +	{ E1000_RXDCTL(4), 0x40, 12, WRITE_NO_TEST, 0, +	  E1000_RXDCTL_QUEUE_ENABLE },  	/* RDH is read-only for 82576, only test RDT. */  	{ E1000_RDT(0),	   0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },  	{ E1000_RDT(4),	   0x40, 12,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF }, @@ -1145,14 +1150,14 @@ static struct igb_reg_test reg_test_82576[] = {  	{ E1000_TDBAH(4),  0x40, 12,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },  	{ E1000_TDLEN(4),  0x40, 12,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },  	{ E1000_RCTL,	   0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 }, -	{ E1000_RCTL, 	   0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB }, -	{ E1000_RCTL, 	   0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF }, +	{ E1000_RCTL,	   0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB }, +	{ E1000_RCTL,	   0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },  	{ E1000_TCTL,	   0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },  	{ E1000_RA,	   0, 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },  	{ E1000_RA,	   0, 16, TABLE64_TEST_HI, 0x83FFFFFF, 0xFFFFFFFF },  	{ E1000_RA2,	   0, 8, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },  	{ E1000_RA2,	   0, 8, TABLE64_TEST_HI, 0x83FFFFFF, 0xFFFFFFFF }, -	{ E1000_MTA,	   0, 128,TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, +	{ E1000_MTA,	   0, 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },  	{ 0, 0, 0, 0 }  }; @@ -1166,7 +1171,8 @@ static struct igb_reg_test reg_test_82575[] = {  	{ E1000_RDBAH(0),  0x100, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },  	{ E1000_RDLEN(0),  0x100, 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },  	/* Enable all four RX queues before testing. */ -	{ E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST, 0, E1000_RXDCTL_QUEUE_ENABLE }, +	{ E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST, 0, +	  E1000_RXDCTL_QUEUE_ENABLE },  	/* RDH is read-only for 82575, only test RDT. */  	{ E1000_RDT(0),    0x100, 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },  	{ E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST, 0, 0 }, @@ -1192,8 +1198,8 @@ static bool reg_pattern_test(struct igb_adapter *adapter, u64 *data,  {  	struct e1000_hw *hw = &adapter->hw;  	u32 pat, val; -	static const u32 _test[] = -		{0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF}; +	static const u32 _test[] = { +		0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};  	for (pat = 0; pat < ARRAY_SIZE(_test); pat++) {  		wr32(reg, (_test[pat] & write));  		val = rd32(reg) & mask; @@ -1202,11 +1208,11 @@ static bool reg_pattern_test(struct igb_adapter *adapter, u64 *data,  				"pattern test reg %04X failed: got 0x%08X expected 0x%08X\n",  				reg, val, (_test[pat] & write & mask));  			*data = reg; -			return 1; +			return true;  		}  	} -	return 0; +	return false;  }  static bool reg_set_and_check(struct igb_adapter *adapter, u64 *data, @@ -1214,17 +1220,18 @@ static bool reg_set_and_check(struct igb_adapter *adapter, u64 *data,  {  	struct e1000_hw *hw = &adapter->hw;  	u32 val; +  	wr32(reg, write & mask);  	val = rd32(reg);  	if ((write & mask) != (val & mask)) {  		dev_err(&adapter->pdev->dev, -			"set/check reg %04X test failed: got 0x%08X expected 0x%08X\n", reg, -			(val & mask), (write & mask)); +			"set/check reg %04X test failed: got 0x%08X expected 0x%08X\n", +			reg, (val & mask), (write & mask));  		*data = reg; -		return 1; +		return true;  	} -	return 0; +	return false;  }  #define REG_PATTERN_TEST(reg, mask, write) \ @@ -1381,16 +1388,16 @@ static int igb_intr_test(struct igb_adapter *adapter, u64 *data)  	*data = 0;  	/* Hook up test interrupt handler just for this test */ -	if (adapter->msix_entries) { +	if (adapter->flags & IGB_FLAG_HAS_MSIX) {  		if (request_irq(adapter->msix_entries[0].vector, -		                igb_test_intr, 0, netdev->name, adapter)) { +				igb_test_intr, 0, netdev->name, adapter)) {  			*data = 1;  			return -1;  		}  	} else if (adapter->flags & IGB_FLAG_HAS_MSI) {  		shared_int = false;  		if (request_irq(irq, -		                igb_test_intr, 0, netdev->name, adapter)) { +				igb_test_intr, 0, netdev->name, adapter)) {  			*data = 1;  			return -1;  		} @@ -1408,7 +1415,7 @@ static int igb_intr_test(struct igb_adapter *adapter, u64 *data)  	/* Disable all the interrupts */  	wr32(E1000_IMC, ~0);  	wrfl(); -	msleep(10); +	usleep_range(10000, 11000);  	/* Define all writable bits for ICS */  	switch (hw->mac.type) { @@ -1455,7 +1462,7 @@ static int igb_intr_test(struct igb_adapter *adapter, u64 *data)  			wr32(E1000_IMC, mask);  			wr32(E1000_ICS, mask);  			wrfl(); -			msleep(10); +			usleep_range(10000, 11000);  			if (adapter->test_icr & mask) {  				*data = 3; @@ -1477,7 +1484,7 @@ static int igb_intr_test(struct igb_adapter *adapter, u64 *data)  		wr32(E1000_IMS, mask);  		wr32(E1000_ICS, mask);  		wrfl(); -		msleep(10); +		usleep_range(10000, 11000);  		if (!(adapter->test_icr & mask)) {  			*data = 4; @@ -1499,7 +1506,7 @@ static int igb_intr_test(struct igb_adapter *adapter, u64 *data)  			wr32(E1000_IMC, ~mask);  			wr32(E1000_ICS, ~mask);  			wrfl(); -			msleep(10); +			usleep_range(10000, 11000);  			if (adapter->test_icr & mask) {  				*data = 5; @@ -1511,10 +1518,10 @@ static int igb_intr_test(struct igb_adapter *adapter, u64 *data)  	/* Disable all the interrupts */  	wr32(E1000_IMC, ~0);  	wrfl(); -	msleep(10); +	usleep_range(10000, 11000);  	/* Unhook test interrupt handler */ -	if (adapter->msix_entries) +	if (adapter->flags & IGB_FLAG_HAS_MSIX)  		free_irq(adapter->msix_entries[0].vector, adapter);  	else  		free_irq(irq, adapter); @@ -1659,8 +1666,9 @@ static int igb_setup_loopback_test(struct igb_adapter *adapter)  		if ((hw->device_id == E1000_DEV_ID_DH89XXCC_SGMII) ||  		(hw->device_id == E1000_DEV_ID_DH89XXCC_SERDES) ||  		(hw->device_id == E1000_DEV_ID_DH89XXCC_BACKPLANE) || -		(hw->device_id == E1000_DEV_ID_DH89XXCC_SFP)) { - +		(hw->device_id == E1000_DEV_ID_DH89XXCC_SFP) || +		(hw->device_id == E1000_DEV_ID_I354_SGMII) || +		(hw->device_id == E1000_DEV_ID_I354_BACKPLANE_2_5GBPS)) {  			/* Enable DH89xxCC MPHY for near end loopback */  			reg = rd32(E1000_MPHY_ADDR_CTL);  			reg = (reg & E1000_MPHY_ADDR_CTL_OFFSET_MASK) | @@ -1725,7 +1733,8 @@ static void igb_loopback_cleanup(struct igb_adapter *adapter)  	if ((hw->device_id == E1000_DEV_ID_DH89XXCC_SGMII) ||  	(hw->device_id == E1000_DEV_ID_DH89XXCC_SERDES) ||  	(hw->device_id == E1000_DEV_ID_DH89XXCC_BACKPLANE) || -	(hw->device_id == E1000_DEV_ID_DH89XXCC_SFP)) { +	(hw->device_id == E1000_DEV_ID_DH89XXCC_SFP) || +	(hw->device_id == E1000_DEV_ID_I354_SGMII)) {  		u32 reg;  		/* Disable near end loopback on DH89xxCC */ @@ -1943,6 +1952,7 @@ static int igb_link_test(struct igb_adapter *adapter, u64 *data)  	*data = 0;  	if (hw->phy.media_type == e1000_media_type_internal_serdes) {  		int i = 0; +  		hw->mac.serdes_has_link = false;  		/* On some blade server designs, link establishment @@ -1976,6 +1986,10 @@ static void igb_diag_test(struct net_device *netdev,  	bool if_running = netif_running(netdev);  	set_bit(__IGB_TESTING, &adapter->state); + +	/* can't do offline tests on media switching devices */ +	if (adapter->hw.dev_spec._82575.mas_capable) +		eth_test->flags &= ~ETH_TEST_FL_OFFLINE;  	if (eth_test->flags == ETH_TEST_FL_OFFLINE) {  		/* Offline tests */ @@ -2055,14 +2069,15 @@ static void igb_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)  {  	struct igb_adapter *adapter = netdev_priv(netdev); -	wol->supported = WAKE_UCAST | WAKE_MCAST | -			 WAKE_BCAST | WAKE_MAGIC | -			 WAKE_PHY;  	wol->wolopts = 0;  	if (!(adapter->flags & IGB_FLAG_WOL_SUPPORTED))  		return; +	wol->supported = WAKE_UCAST | WAKE_MCAST | +			 WAKE_BCAST | WAKE_MAGIC | +			 WAKE_PHY; +  	/* apply any specific unsupported masks here */  	switch (adapter->hw.device_id) {  	default: @@ -2262,15 +2277,15 @@ static void igb_get_ethtool_stats(struct net_device *netdev,  		ring = adapter->tx_ring[j];  		do { -			start = u64_stats_fetch_begin_bh(&ring->tx_syncp); +			start = u64_stats_fetch_begin_irq(&ring->tx_syncp);  			data[i]   = ring->tx_stats.packets;  			data[i+1] = ring->tx_stats.bytes;  			data[i+2] = ring->tx_stats.restart_queue; -		} while (u64_stats_fetch_retry_bh(&ring->tx_syncp, start)); +		} while (u64_stats_fetch_retry_irq(&ring->tx_syncp, start));  		do { -			start = u64_stats_fetch_begin_bh(&ring->tx_syncp2); +			start = u64_stats_fetch_begin_irq(&ring->tx_syncp2);  			restart2  = ring->tx_stats.restart_queue2; -		} while (u64_stats_fetch_retry_bh(&ring->tx_syncp2, start)); +		} while (u64_stats_fetch_retry_irq(&ring->tx_syncp2, start));  		data[i+2] += restart2;  		i += IGB_TX_QUEUE_STATS_LEN; @@ -2278,13 +2293,13 @@ static void igb_get_ethtool_stats(struct net_device *netdev,  	for (j = 0; j < adapter->num_rx_queues; j++) {  		ring = adapter->rx_ring[j];  		do { -			start = u64_stats_fetch_begin_bh(&ring->rx_syncp); +			start = u64_stats_fetch_begin_irq(&ring->rx_syncp);  			data[i]   = ring->rx_stats.packets;  			data[i+1] = ring->rx_stats.bytes;  			data[i+2] = ring->rx_stats.drops;  			data[i+3] = ring->rx_stats.csum_err;  			data[i+4] = ring->rx_stats.alloc_failed; -		} while (u64_stats_fetch_retry_bh(&ring->rx_syncp, start)); +		} while (u64_stats_fetch_retry_irq(&ring->rx_syncp, start));  		i += IGB_RX_QUEUE_STATS_LEN;  	}  	spin_unlock(&adapter->stats64_lock); @@ -2342,6 +2357,11 @@ static int igb_get_ts_info(struct net_device *dev,  {  	struct igb_adapter *adapter = netdev_priv(dev); +	if (adapter->ptp_clock) +		info->phc_index = ptp_clock_index(adapter->ptp_clock); +	else +		info->phc_index = -1; +  	switch (adapter->hw.mac.type) {  	case e1000_82575:  		info->so_timestamping = @@ -2363,11 +2383,6 @@ static int igb_get_ts_info(struct net_device *dev,  			SOF_TIMESTAMPING_RX_HARDWARE |  			SOF_TIMESTAMPING_RAW_HARDWARE; -		if (adapter->ptp_clock) -			info->phc_index = ptp_clock_index(adapter->ptp_clock); -		else -			info->phc_index = -1; -  		info->tx_types =  			(1 << HWTSTAMP_TX_OFF) |  			(1 << HWTSTAMP_TX_ON); @@ -2402,9 +2417,11 @@ static int igb_get_rss_hash_opts(struct igb_adapter *adapter,  	switch (cmd->flow_type) {  	case TCP_V4_FLOW:  		cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; +		/* Fall through */  	case UDP_V4_FLOW:  		if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)  			cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; +		/* Fall through */  	case SCTP_V4_FLOW:  	case AH_ESP_V4_FLOW:  	case AH_V4_FLOW: @@ -2414,9 +2431,11 @@ static int igb_get_rss_hash_opts(struct igb_adapter *adapter,  		break;  	case TCP_V6_FLOW:  		cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; +		/* Fall through */  	case UDP_V6_FLOW:  		if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)  			cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; +		/* Fall through */  	case SCTP_V6_FLOW:  	case AH_ESP_V6_FLOW:  	case AH_V6_FLOW: @@ -2576,7 +2595,7 @@ static int igb_get_eee(struct net_device *netdev, struct ethtool_eee *edata)  {  	struct igb_adapter *adapter = netdev_priv(netdev);  	struct e1000_hw *hw = &adapter->hw; -	u32 ipcnfg, eeer, ret_val; +	u32 ret_val;  	u16 phy_data;  	if ((hw->mac.type < e1000_i350) || @@ -2585,16 +2604,25 @@ static int igb_get_eee(struct net_device *netdev, struct ethtool_eee *edata)  	edata->supported = (SUPPORTED_1000baseT_Full |  			    SUPPORTED_100baseT_Full); +	if (!hw->dev_spec._82575.eee_disable) +		edata->advertised = +			mmd_eee_adv_to_ethtool_adv_t(adapter->eee_advert); + +	/* The IPCNFG and EEER registers are not supported on I354. */ +	if (hw->mac.type == e1000_i354) { +		igb_get_eee_status_i354(hw, (bool *)&edata->eee_active); +	} else { +		u32 eeer; -	ipcnfg = rd32(E1000_IPCNFG); -	eeer = rd32(E1000_EEER); +		eeer = rd32(E1000_EEER); -	/* EEE status on negotiated link */ -	if (ipcnfg & E1000_IPCNFG_EEE_1G_AN) -		edata->advertised = ADVERTISED_1000baseT_Full; +		/* EEE status on negotiated link */ +		if (eeer & E1000_EEER_EEE_NEG) +			edata->eee_active = true; -	if (ipcnfg & E1000_IPCNFG_EEE_100M_AN) -		edata->advertised |= ADVERTISED_100baseT_Full; +		if (eeer & E1000_EEER_TX_LPI_EN) +			edata->tx_lpi_enabled = true; +	}  	/* EEE Link Partner Advertised */  	switch (hw->mac.type) { @@ -2605,8 +2633,8 @@ static int igb_get_eee(struct net_device *netdev, struct ethtool_eee *edata)  			return -ENODATA;  		edata->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(phy_data); -  		break; +	case e1000_i354:  	case e1000_i210:  	case e1000_i211:  		ret_val = igb_read_xmdio_reg(hw, E1000_EEE_LP_ADV_ADDR_I210, @@ -2622,12 +2650,10 @@ static int igb_get_eee(struct net_device *netdev, struct ethtool_eee *edata)  		break;  	} -	if (eeer & E1000_EEER_EEE_NEG) -		edata->eee_active = true; -  	edata->eee_enabled = !hw->dev_spec._82575.eee_disable; -	if (eeer & E1000_EEER_TX_LPI_EN) +	if ((hw->mac.type == e1000_i354) && +	    (edata->eee_enabled))  		edata->tx_lpi_enabled = true;  	/* Report correct negotiated EEE status for devices that @@ -2675,9 +2701,10 @@ static int igb_set_eee(struct net_device *netdev,  			return -EINVAL;  		} -		if (eee_curr.advertised != edata->advertised) { +		if (edata->advertised & +		    ~(ADVERTISE_100_FULL | ADVERTISE_1000_FULL)) {  			dev_err(&adapter->pdev->dev, -				"Setting EEE Advertisement is not supported\n"); +				"EEE Advertisement supports only 100Tx and or 100T full duplex\n");  			return -EINVAL;  		} @@ -2687,9 +2714,14 @@ static int igb_set_eee(struct net_device *netdev,  			return -EINVAL;  		} +	adapter->eee_advert = ethtool_adv_to_mmd_eee_adv_t(edata->advertised);  	if (hw->dev_spec._82575.eee_disable != !edata->eee_enabled) {  		hw->dev_spec._82575.eee_disable = !edata->eee_enabled; -		igb_set_eee_i350(hw); +		adapter->flags |= IGB_FLAG_EEE; +		if (hw->mac.type == e1000_i350) +			igb_set_eee_i350(hw); +		else +			igb_set_eee_i354(hw);  		/* reset link */  		if (netif_running(netdev)) @@ -2706,7 +2738,7 @@ static int igb_get_module_info(struct net_device *netdev,  {  	struct igb_adapter *adapter = netdev_priv(netdev);  	struct e1000_hw *hw = &adapter->hw; -	u32 status = E1000_SUCCESS; +	u32 status = 0;  	u16 sff8472_rev, addr_mode;  	bool page_swap = false; @@ -2716,12 +2748,12 @@ static int igb_get_module_info(struct net_device *netdev,  	/* Check whether we support SFF-8472 or not */  	status = igb_read_phy_reg_i2c(hw, IGB_SFF_8472_COMP, &sff8472_rev); -	if (status != E1000_SUCCESS) +	if (status)  		return -EIO;  	/* addressing mode is not supported */  	status = igb_read_phy_reg_i2c(hw, IGB_SFF_8472_SWAP, &addr_mode); -	if (status != E1000_SUCCESS) +	if (status)  		return -EIO;  	/* addressing mode is not supported */ @@ -2748,7 +2780,7 @@ static int igb_get_module_eeprom(struct net_device *netdev,  {  	struct igb_adapter *adapter = netdev_priv(netdev);  	struct e1000_hw *hw = &adapter->hw; -	u32 status = E1000_SUCCESS; +	u32 status = 0;  	u16 *dataword;  	u16 first_word, last_word;  	int i = 0; @@ -2767,9 +2799,11 @@ static int igb_get_module_eeprom(struct net_device *netdev,  	/* Read EEPROM block, SFF-8079/SFF-8472, word at a time */  	for (i = 0; i < last_word - first_word + 1; i++) {  		status = igb_read_phy_reg_i2c(hw, first_word + i, &dataword[i]); -		if (status != E1000_SUCCESS) +		if (status) {  			/* Error occurred while reading module */ +			kfree(dataword);  			return -EIO; +		}  		be16_to_cpus(&dataword[i]);  	} @@ -2798,7 +2832,7 @@ static u32 igb_get_rxfh_indir_size(struct net_device *netdev)  	return IGB_RETA_SIZE;  } -static int igb_get_rxfh_indir(struct net_device *netdev, u32 *indir) +static int igb_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key)  {  	struct igb_adapter *adapter = netdev_priv(netdev);  	int i; @@ -2844,7 +2878,8 @@ void igb_write_rss_indir_tbl(struct igb_adapter *adapter)  	}  } -static int igb_set_rxfh_indir(struct net_device *netdev, const u32 *indir) +static int igb_set_rxfh(struct net_device *netdev, const u32 *indir, +			const u8 *key)  {  	struct igb_adapter *adapter = netdev_priv(netdev);  	struct e1000_hw *hw = &adapter->hw; @@ -2877,6 +2912,88 @@ static int igb_set_rxfh_indir(struct net_device *netdev, const u32 *indir)  	return 0;  } +static unsigned int igb_max_channels(struct igb_adapter *adapter) +{ +	struct e1000_hw *hw = &adapter->hw; +	unsigned int max_combined = 0; + +	switch (hw->mac.type) { +	case e1000_i211: +		max_combined = IGB_MAX_RX_QUEUES_I211; +		break; +	case e1000_82575: +	case e1000_i210: +		max_combined = IGB_MAX_RX_QUEUES_82575; +		break; +	case e1000_i350: +		if (!!adapter->vfs_allocated_count) { +			max_combined = 1; +			break; +		} +		/* fall through */ +	case e1000_82576: +		if (!!adapter->vfs_allocated_count) { +			max_combined = 2; +			break; +		} +		/* fall through */ +	case e1000_82580: +	case e1000_i354: +	default: +		max_combined = IGB_MAX_RX_QUEUES; +		break; +	} + +	return max_combined; +} + +static void igb_get_channels(struct net_device *netdev, +			     struct ethtool_channels *ch) +{ +	struct igb_adapter *adapter = netdev_priv(netdev); + +	/* Report maximum channels */ +	ch->max_combined = igb_max_channels(adapter); + +	/* Report info for other vector */ +	if (adapter->flags & IGB_FLAG_HAS_MSIX) { +		ch->max_other = NON_Q_VECTORS; +		ch->other_count = NON_Q_VECTORS; +	} + +	ch->combined_count = adapter->rss_queues; +} + +static int igb_set_channels(struct net_device *netdev, +			    struct ethtool_channels *ch) +{ +	struct igb_adapter *adapter = netdev_priv(netdev); +	unsigned int count = ch->combined_count; + +	/* Verify they are not requesting separate vectors */ +	if (!count || ch->rx_count || ch->tx_count) +		return -EINVAL; + +	/* Verify other_count is valid and has not been changed */ +	if (ch->other_count != NON_Q_VECTORS) +		return -EINVAL; + +	/* Verify the number of channels doesn't exceed hw limits */ +	if (count > igb_max_channels(adapter)) +		return -EINVAL; + +	if (count != adapter->rss_queues) { +		adapter->rss_queues = count; + +		/* Hardware has to reinitialize queues and interrupts to +		 * match the new configuration. +		 */ +		return igb_reinit_queues(adapter); +	} + +	return 0; +} +  static const struct ethtool_ops igb_ethtool_ops = {  	.get_settings		= igb_get_settings,  	.set_settings		= igb_set_settings, @@ -2911,13 +3028,15 @@ static const struct ethtool_ops igb_ethtool_ops = {  	.get_module_info	= igb_get_module_info,  	.get_module_eeprom	= igb_get_module_eeprom,  	.get_rxfh_indir_size	= igb_get_rxfh_indir_size, -	.get_rxfh_indir		= igb_get_rxfh_indir, -	.set_rxfh_indir		= igb_set_rxfh_indir, +	.get_rxfh		= igb_get_rxfh, +	.set_rxfh		= igb_set_rxfh, +	.get_channels		= igb_get_channels, +	.set_channels		= igb_set_channels,  	.begin			= igb_ethtool_begin,  	.complete		= igb_ethtool_complete,  };  void igb_set_ethtool_ops(struct net_device *netdev)  { -	SET_ETHTOOL_OPS(netdev, &igb_ethtool_ops); +	netdev->ethtool_ops = &igb_ethtool_ops;  } diff --git a/drivers/net/ethernet/intel/igb/igb_hwmon.c b/drivers/net/ethernet/intel/igb/igb_hwmon.c index 58f1ce967ae..44b6a68f1af 100644 --- a/drivers/net/ethernet/intel/igb/igb_hwmon.c +++ b/drivers/net/ethernet/intel/igb/igb_hwmon.c @@ -1,29 +1,25 @@ -/******************************************************************************* - -  Intel(R) Gigabit Ethernet Linux driver -  Copyright(c) 2007-2013 Intel Corporation. - -  This program is free software; you can redistribute it and/or modify it -  under the terms and conditions of the GNU General Public License, -  version 2, as published by the Free Software Foundation. - -  This program is distributed in the hope it will be useful, but WITHOUT -  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for -  more details. - -  You should have received a copy of the GNU General Public License along with -  this program; if not, write to the Free Software Foundation, Inc., -  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. - -  The full GNU General Public License is included in this distribution in -  the file called "COPYING". - -  Contact Information: -  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> -  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 - -*******************************************************************************/ +/* Intel(R) Gigabit Ethernet Linux driver + * Copyright(c) 2007-2014 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, see <http://www.gnu.org/licenses/>. + * + * The full GNU General Public License is included in this distribution in + * the file called "COPYING". + * + * Contact Information: + * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> + * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 + */  #include "igb.h"  #include "e1000_82575.h" @@ -117,29 +113,29 @@ static int igb_add_hwmon_attr(struct igb_adapter *adapter,  	unsigned int n_attr;  	struct hwmon_attr *igb_attr; -	n_attr = adapter->igb_hwmon_buff.n_hwmon; -	igb_attr = &adapter->igb_hwmon_buff.hwmon_list[n_attr]; +	n_attr = adapter->igb_hwmon_buff->n_hwmon; +	igb_attr = &adapter->igb_hwmon_buff->hwmon_list[n_attr];  	switch (type) {  	case IGB_HWMON_TYPE_LOC:  		igb_attr->dev_attr.show = igb_hwmon_show_location;  		snprintf(igb_attr->name, sizeof(igb_attr->name), -			 "temp%u_label", offset); +			 "temp%u_label", offset + 1);  		break;  	case IGB_HWMON_TYPE_TEMP:  		igb_attr->dev_attr.show = igb_hwmon_show_temp;  		snprintf(igb_attr->name, sizeof(igb_attr->name), -			 "temp%u_input", offset); +			 "temp%u_input", offset + 1);  		break;  	case IGB_HWMON_TYPE_CAUTION:  		igb_attr->dev_attr.show = igb_hwmon_show_cautionthresh;  		snprintf(igb_attr->name, sizeof(igb_attr->name), -			 "temp%u_max", offset); +			 "temp%u_max", offset + 1);  		break;  	case IGB_HWMON_TYPE_MAX:  		igb_attr->dev_attr.show = igb_hwmon_show_maxopthresh;  		snprintf(igb_attr->name, sizeof(igb_attr->name), -			 "temp%u_crit", offset); +			 "temp%u_crit", offset + 1);  		break;  	default:  		rc = -EPERM; @@ -154,30 +150,16 @@ static int igb_add_hwmon_attr(struct igb_adapter *adapter,  	igb_attr->dev_attr.attr.mode = S_IRUGO;  	igb_attr->dev_attr.attr.name = igb_attr->name;  	sysfs_attr_init(&igb_attr->dev_attr.attr); -	rc = device_create_file(&adapter->pdev->dev, -				&igb_attr->dev_attr); -	if (rc == 0) -		++adapter->igb_hwmon_buff.n_hwmon; -	return rc; +	adapter->igb_hwmon_buff->attrs[n_attr] = &igb_attr->dev_attr.attr; + +	++adapter->igb_hwmon_buff->n_hwmon; + +	return 0;  }  static void igb_sysfs_del_adapter(struct igb_adapter *adapter)  { -	int i; - -	if (adapter == NULL) -		return; - -	for (i = 0; i < adapter->igb_hwmon_buff.n_hwmon; i++) { -		device_remove_file(&adapter->pdev->dev, -			   &adapter->igb_hwmon_buff.hwmon_list[i].dev_attr); -	} - -	kfree(adapter->igb_hwmon_buff.hwmon_list); - -	if (adapter->igb_hwmon_buff.device) -		hwmon_device_unregister(adapter->igb_hwmon_buff.device);  }  /* called from igb_main.c */ @@ -189,11 +171,11 @@ void igb_sysfs_exit(struct igb_adapter *adapter)  /* called from igb_main.c */  int igb_sysfs_init(struct igb_adapter *adapter)  { -	struct hwmon_buff *igb_hwmon = &adapter->igb_hwmon_buff; +	struct hwmon_buff *igb_hwmon; +	struct i2c_client *client; +	struct device *hwmon_dev;  	unsigned int i; -	int n_attrs;  	int rc = 0; -	struct i2c_client *client = NULL;  	/* If this method isn't defined we don't support thermals */  	if (adapter->hw.mac.ops.init_thermal_sensor_thresh == NULL) @@ -201,34 +183,16 @@ int igb_sysfs_init(struct igb_adapter *adapter)  	/* Don't create thermal hwmon interface if no sensors present */  	rc = (adapter->hw.mac.ops.init_thermal_sensor_thresh(&adapter->hw)); -		if (rc) -			goto exit; - -	/* init i2c_client */ -	client = i2c_new_device(&adapter->i2c_adap, &i350_sensor_info); -	if (client == NULL) { -		dev_info(&adapter->pdev->dev, -			"Failed to create new i2c device..\n"); +	if (rc)  		goto exit; -	} -	adapter->i2c_client = client; -	/* Allocation space for max attributes -	 * max num sensors * values (loc, temp, max, caution) -	 */ -	n_attrs = E1000_MAX_SENSORS * 4; -	igb_hwmon->hwmon_list = kcalloc(n_attrs, sizeof(struct hwmon_attr), -					GFP_KERNEL); -	if (!igb_hwmon->hwmon_list) { +	igb_hwmon = devm_kzalloc(&adapter->pdev->dev, sizeof(*igb_hwmon), +				 GFP_KERNEL); +	if (!igb_hwmon) {  		rc = -ENOMEM; -		goto err; -	} - -	igb_hwmon->device = hwmon_device_register(&adapter->pdev->dev); -	if (IS_ERR(igb_hwmon->device)) { -		rc = PTR_ERR(igb_hwmon->device); -		goto err; +		goto exit;  	} +	adapter->igb_hwmon_buff = igb_hwmon;  	for (i = 0; i < E1000_MAX_SENSORS; i++) { @@ -240,11 +204,39 @@ int igb_sysfs_init(struct igb_adapter *adapter)  		/* Bail if any hwmon attr struct fails to initialize */  		rc = igb_add_hwmon_attr(adapter, i, IGB_HWMON_TYPE_CAUTION); -		rc |= igb_add_hwmon_attr(adapter, i, IGB_HWMON_TYPE_LOC); -		rc |= igb_add_hwmon_attr(adapter, i, IGB_HWMON_TYPE_TEMP); -		rc |= igb_add_hwmon_attr(adapter, i, IGB_HWMON_TYPE_MAX);  		if (rc) -			goto err; +			goto exit; +		rc = igb_add_hwmon_attr(adapter, i, IGB_HWMON_TYPE_LOC); +		if (rc) +			goto exit; +		rc = igb_add_hwmon_attr(adapter, i, IGB_HWMON_TYPE_TEMP); +		if (rc) +			goto exit; +		rc = igb_add_hwmon_attr(adapter, i, IGB_HWMON_TYPE_MAX); +		if (rc) +			goto exit; +	} + +	/* init i2c_client */ +	client = i2c_new_device(&adapter->i2c_adap, &i350_sensor_info); +	if (client == NULL) { +		dev_info(&adapter->pdev->dev, +			 "Failed to create new i2c device.\n"); +		rc = -ENODEV; +		goto exit; +	} +	adapter->i2c_client = client; + +	igb_hwmon->groups[0] = &igb_hwmon->group; +	igb_hwmon->group.attrs = igb_hwmon->attrs; + +	hwmon_dev = devm_hwmon_device_register_with_groups(&adapter->pdev->dev, +							   client->name, +							   igb_hwmon, +							   igb_hwmon->groups); +	if (IS_ERR(hwmon_dev)) { +		rc = PTR_ERR(hwmon_dev); +		goto err;  	}  	goto exit; diff --git a/drivers/net/ethernet/intel/igb/igb_main.c b/drivers/net/ethernet/intel/igb/igb_main.c index 8cf44f2a8cc..a9537ba7a5a 100644 --- a/drivers/net/ethernet/intel/igb/igb_main.c +++ b/drivers/net/ethernet/intel/igb/igb_main.c @@ -1,29 +1,25 @@ -/******************************************************************************* - -  Intel(R) Gigabit Ethernet Linux driver -  Copyright(c) 2007-2013 Intel Corporation. - -  This program is free software; you can redistribute it and/or modify it -  under the terms and conditions of the GNU General Public License, -  version 2, as published by the Free Software Foundation. - -  This program is distributed in the hope it will be useful, but WITHOUT -  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for -  more details. - -  You should have received a copy of the GNU General Public License along with -  this program; if not, write to the Free Software Foundation, Inc., -  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. - -  The full GNU General Public License is included in this distribution in -  the file called "COPYING". - -  Contact Information: -  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> -  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 - -*******************************************************************************/ +/* Intel(R) Gigabit Ethernet Linux driver + * Copyright(c) 2007-2014 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, see <http://www.gnu.org/licenses/>. + * + * The full GNU General Public License is included in this distribution in + * the file called "COPYING". + * + * Contact Information: + * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> + * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 + */  #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt @@ -70,13 +66,13 @@ char igb_driver_version[] = DRV_VERSION;  static const char igb_driver_string[] =  				"Intel(R) Gigabit Ethernet Network Driver";  static const char igb_copyright[] = -				"Copyright (c) 2007-2013 Intel Corporation."; +				"Copyright (c) 2007-2014 Intel Corporation.";  static const struct e1000_info *igb_info_tbl[] = {  	[board_82575] = &e1000_82575_info,  }; -static DEFINE_PCI_DEVICE_TABLE(igb_pci_tbl) = { +static const struct pci_device_id igb_pci_tbl[] = {  	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_1GBPS) },  	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_SGMII) },  	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) }, @@ -118,7 +114,6 @@ static DEFINE_PCI_DEVICE_TABLE(igb_pci_tbl) = {  MODULE_DEVICE_TABLE(pci, igb_pci_tbl); -void igb_reset(struct igb_adapter *);  static int igb_setup_all_tx_resources(struct igb_adapter *);  static int igb_setup_all_rx_resources(struct igb_adapter *);  static void igb_free_all_tx_resources(struct igb_adapter *); @@ -142,7 +137,7 @@ static void igb_watchdog(unsigned long);  static void igb_watchdog_task(struct work_struct *);  static netdev_tx_t igb_xmit_frame(struct sk_buff *skb, struct net_device *);  static struct rtnl_link_stats64 *igb_get_stats64(struct net_device *dev, -						 struct rtnl_link_stats64 *stats); +					  struct rtnl_link_stats64 *stats);  static int igb_change_mtu(struct net_device *, int);  static int igb_set_mac(struct net_device *, void *);  static void igb_set_uta(struct igb_adapter *adapter); @@ -160,7 +155,8 @@ static bool igb_clean_rx_irq(struct igb_q_vector *, int);  static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);  static void igb_tx_timeout(struct net_device *);  static void igb_reset_task(struct work_struct *); -static void igb_vlan_mode(struct net_device *netdev, netdev_features_t features); +static void igb_vlan_mode(struct net_device *netdev, +			  netdev_features_t features);  static int igb_vlan_rx_add_vid(struct net_device *, __be16, u16);  static int igb_vlan_rx_kill_vid(struct net_device *, __be16, u16);  static void igb_restore_vlan(struct igb_adapter *); @@ -173,7 +169,7 @@ static void igb_restore_vf_multicasts(struct igb_adapter *adapter);  static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac);  static int igb_ndo_set_vf_vlan(struct net_device *netdev,  			       int vf, u16 vlan, u8 qos); -static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate); +static int igb_ndo_set_vf_bw(struct net_device *, int, int, int);  static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,  				   bool setting);  static int igb_ndo_get_vf_config(struct net_device *netdev, int vf, @@ -182,6 +178,7 @@ static void igb_check_vf_rate_limit(struct igb_adapter *);  #ifdef CONFIG_PCI_IOV  static int igb_vf_configure(struct igb_adapter *adapter, int vf); +static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs);  #endif  #ifdef CONFIG_PM @@ -215,10 +212,9 @@ static struct notifier_block dca_notifier = {  static void igb_netpoll(struct net_device *);  #endif  #ifdef CONFIG_PCI_IOV -static unsigned int max_vfs = 0; +static unsigned int max_vfs;  module_param(max_vfs, uint, 0); -MODULE_PARM_DESC(max_vfs, "Maximum number of virtual functions to allocate " -                 "per physical function"); +MODULE_PARM_DESC(max_vfs, "Maximum number of virtual functions to allocate per physical function");  #endif /* CONFIG_PCI_IOV */  static pci_ers_result_t igb_io_error_detected(struct pci_dev *, @@ -384,8 +380,7 @@ static void igb_dump(struct igb_adapter *adapter)  	/* Print netdevice Info */  	if (netdev) {  		dev_info(&adapter->pdev->dev, "Net device Info\n"); -		pr_info("Device Name     state            trans_start      " -			"last_rx\n"); +		pr_info("Device Name     state            trans_start      last_rx\n");  		pr_info("%-15s %016lX %016lX %016lX\n", netdev->name,  			netdev->state, netdev->trans_start, netdev->last_rx);  	} @@ -438,9 +433,7 @@ static void igb_dump(struct igb_adapter *adapter)  		pr_info("------------------------------------\n");  		pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);  		pr_info("------------------------------------\n"); -		pr_info("T [desc]     [address 63:0  ] [PlPOCIStDDM Ln] " -			"[bi->dma       ] leng  ntw timestamp        " -			"bi->skb\n"); +		pr_info("T [desc]     [address 63:0  ] [PlPOCIStDDM Ln] [bi->dma       ] leng  ntw timestamp        bi->skb\n");  		for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {  			const char *next_desc; @@ -458,9 +451,8 @@ static void igb_dump(struct igb_adapter *adapter)  			else  				next_desc = ""; -			pr_info("T [0x%03X]    %016llX %016llX %016llX" -				" %04X  %p %016llX %p%s\n", i, -				le64_to_cpu(u0->a), +			pr_info("T [0x%03X]    %016llX %016llX %016llX %04X  %p %016llX %p%s\n", +				i, le64_to_cpu(u0->a),  				le64_to_cpu(u0->b),  				(u64)dma_unmap_addr(buffer_info, dma),  				dma_unmap_len(buffer_info, len), @@ -519,10 +511,8 @@ rx_ring_summary:  		pr_info("------------------------------------\n");  		pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);  		pr_info("------------------------------------\n"); -		pr_info("R  [desc]      [ PktBuf     A0] [  HeadBuf   DD] " -			"[bi->dma       ] [bi->skb] <-- Adv Rx Read format\n"); -		pr_info("RWB[desc]      [PcsmIpSHl PtRs] [vl er S cks ln] -----" -			"----------- [bi->skb] <-- Adv Rx Write-Back format\n"); +		pr_info("R  [desc]      [ PktBuf     A0] [  HeadBuf   DD] [bi->dma       ] [bi->skb] <-- Adv Rx Read format\n"); +		pr_info("RWB[desc]      [PcsmIpSHl PtRs] [vl er S cks ln] ---------------- [bi->skb] <-- Adv Rx Write-Back format\n");  		for (i = 0; i < rx_ring->count; i++) {  			const char *next_desc; @@ -584,7 +574,7 @@ static int igb_get_i2c_data(void *data)  	struct e1000_hw *hw = &adapter->hw;  	s32 i2cctl = rd32(E1000_I2CPARAMS); -	return ((i2cctl & E1000_I2C_DATA_IN) != 0); +	return !!(i2cctl & E1000_I2C_DATA_IN);  }  /** @@ -648,7 +638,7 @@ static int igb_get_i2c_clk(void *data)  	struct e1000_hw *hw = &adapter->hw;  	s32 i2cctl = rd32(E1000_I2CPARAMS); -	return ((i2cctl & E1000_I2C_CLK_IN) != 0); +	return !!(i2cctl & E1000_I2C_CLK_IN);  }  static const struct i2c_algo_bit_data igb_i2c_algo = { @@ -681,9 +671,9 @@ struct net_device *igb_get_hw_dev(struct e1000_hw *hw)  static int __init igb_init_module(void)  {  	int ret; +  	pr_info("%s - version %s\n",  	       igb_driver_string, igb_driver_version); -  	pr_info("%s\n", igb_copyright);  #ifdef CONFIG_IGB_DCA @@ -736,12 +726,14 @@ static void igb_cache_ring_register(struct igb_adapter *adapter)  				adapter->rx_ring[i]->reg_idx = rbase_offset +  							       Q_IDX_82576(i);  		} +		/* Fall through */  	case e1000_82575:  	case e1000_82580:  	case e1000_i350:  	case e1000_i354:  	case e1000_i210:  	case e1000_i211: +		/* Fall through */  	default:  		for (; i < adapter->num_rx_queues; i++)  			adapter->rx_ring[i]->reg_idx = rbase_offset + i; @@ -751,6 +743,28 @@ static void igb_cache_ring_register(struct igb_adapter *adapter)  	}  } +u32 igb_rd32(struct e1000_hw *hw, u32 reg) +{ +	struct igb_adapter *igb = container_of(hw, struct igb_adapter, hw); +	u8 __iomem *hw_addr = ACCESS_ONCE(hw->hw_addr); +	u32 value = 0; + +	if (E1000_REMOVED(hw_addr)) +		return ~value; + +	value = readl(&hw_addr[reg]); + +	/* reads should not return all F's */ +	if (!(~value) && (!reg || !(~readl(hw_addr)))) { +		struct net_device *netdev = igb->netdev; +		hw->hw_addr = NULL; +		netif_device_detach(netdev); +		netdev_err(netdev, "PCIe link lost, device now detached\n"); +	} + +	return value; +} +  /**   *  igb_write_ivar - configure ivar for given MSI-X vector   *  @hw: pointer to the HW structure @@ -802,7 +816,7 @@ static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)  			msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;  		if (tx_queue > IGB_N0_QUEUE)  			msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue; -		if (!adapter->msix_entries && msix_vector == 0) +		if (!(adapter->flags & IGB_FLAG_HAS_MSIX) && msix_vector == 0)  			msixbm |= E1000_EIMS_OTHER;  		array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);  		q_vector->eims_value = msixbm; @@ -982,43 +996,64 @@ err_out:  	return err;  } -static void igb_reset_interrupt_capability(struct igb_adapter *adapter) -{ -	if (adapter->msix_entries) { -		pci_disable_msix(adapter->pdev); -		kfree(adapter->msix_entries); -		adapter->msix_entries = NULL; -	} else if (adapter->flags & IGB_FLAG_HAS_MSI) { -		pci_disable_msi(adapter->pdev); -	} -} -  /**   *  igb_free_q_vector - Free memory allocated for specific interrupt vector   *  @adapter: board private structure to initialize   *  @v_idx: Index of vector to be freed   * - *  This function frees the memory allocated to the q_vector.  In addition if - *  NAPI is enabled it will delete any references to the NAPI struct prior - *  to freeing the q_vector. + *  This function frees the memory allocated to the q_vector.   **/  static void igb_free_q_vector(struct igb_adapter *adapter, int v_idx)  {  	struct igb_q_vector *q_vector = adapter->q_vector[v_idx]; +	adapter->q_vector[v_idx] = NULL; + +	/* igb_get_stats64() might access the rings on this vector, +	 * we must wait a grace period before freeing it. +	 */ +	kfree_rcu(q_vector, rcu); +} + +/** + *  igb_reset_q_vector - Reset config for interrupt vector + *  @adapter: board private structure to initialize + *  @v_idx: Index of vector to be reset + * + *  If NAPI is enabled it will delete any references to the + *  NAPI struct. This is preparation for igb_free_q_vector. + **/ +static void igb_reset_q_vector(struct igb_adapter *adapter, int v_idx) +{ +	struct igb_q_vector *q_vector = adapter->q_vector[v_idx]; + +	/* Coming from igb_set_interrupt_capability, the vectors are not yet +	 * allocated. So, q_vector is NULL so we should stop here. +	 */ +	if (!q_vector) +		return; +  	if (q_vector->tx.ring)  		adapter->tx_ring[q_vector->tx.ring->queue_index] = NULL;  	if (q_vector->rx.ring)  		adapter->tx_ring[q_vector->rx.ring->queue_index] = NULL; -	adapter->q_vector[v_idx] = NULL;  	netif_napi_del(&q_vector->napi); -	/* igb_get_stats64() might access the rings on this vector, -	 * we must wait a grace period before freeing it. -	 */ -	kfree_rcu(q_vector, rcu); +} + +static void igb_reset_interrupt_capability(struct igb_adapter *adapter) +{ +	int v_idx = adapter->num_q_vectors; + +	if (adapter->flags & IGB_FLAG_HAS_MSIX) +		pci_disable_msix(adapter->pdev); +	else if (adapter->flags & IGB_FLAG_HAS_MSI) +		pci_disable_msi(adapter->pdev); + +	while (v_idx--) +		igb_reset_q_vector(adapter, v_idx);  }  /** @@ -1037,8 +1072,10 @@ static void igb_free_q_vectors(struct igb_adapter *adapter)  	adapter->num_rx_queues = 0;  	adapter->num_q_vectors = 0; -	while (v_idx--) +	while (v_idx--) { +		igb_reset_q_vector(adapter, v_idx);  		igb_free_q_vector(adapter, v_idx); +	}  }  /** @@ -1069,6 +1106,7 @@ static void igb_set_interrupt_capability(struct igb_adapter *adapter, bool msix)  	if (!msix)  		goto msi_only; +	adapter->flags |= IGB_FLAG_HAS_MSIX;  	/* Number of supported queues. */  	adapter->num_rx_queues = adapter->rss_queues; @@ -1089,25 +1127,21 @@ static void igb_set_interrupt_capability(struct igb_adapter *adapter, bool msix)  	/* add 1 vector for link status interrupts */  	numvecs++; -	adapter->msix_entries = kcalloc(numvecs, sizeof(struct msix_entry), -					GFP_KERNEL); - -	if (!adapter->msix_entries) -		goto msi_only; -  	for (i = 0; i < numvecs; i++)  		adapter->msix_entries[i].entry = i; -	err = pci_enable_msix(adapter->pdev, -			      adapter->msix_entries, -			      numvecs); -	if (err == 0) +	err = pci_enable_msix_range(adapter->pdev, +				    adapter->msix_entries, +				    numvecs, +				    numvecs); +	if (err > 0)  		return;  	igb_reset_interrupt_capability(adapter);  	/* If we can't do MSI-X, try MSI */  msi_only: +	adapter->flags &= ~IGB_FLAG_HAS_MSIX;  #ifdef CONFIG_PCI_IOV  	/* disable SR-IOV for non MSI-X configurations */  	if (adapter->vf_data) { @@ -1171,7 +1205,9 @@ static int igb_alloc_q_vector(struct igb_adapter *adapter,  	       (sizeof(struct igb_ring) * ring_count);  	/* allocate q_vector and rings */ -	q_vector = kzalloc(size, GFP_KERNEL); +	q_vector = adapter->q_vector[v_idx]; +	if (!q_vector) +		q_vector = kzalloc(size, GFP_KERNEL);  	if (!q_vector)  		return -ENOMEM; @@ -1223,6 +1259,9 @@ static int igb_alloc_q_vector(struct igb_adapter *adapter,  		ring->count = adapter->tx_ring_count;  		ring->queue_index = txr_idx; +		u64_stats_init(&ring->tx_syncp); +		u64_stats_init(&ring->tx_syncp2); +  		/* assign ring to adapter */  		adapter->tx_ring[txr_idx] = ring; @@ -1245,8 +1284,7 @@ static int igb_alloc_q_vector(struct igb_adapter *adapter,  		if (adapter->hw.mac.type >= e1000_82576)  			set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags); -		/* -		 * On i350, i354, i210, and i211, loopback VLAN packets +		/* On i350, i354, i210, and i211, loopback VLAN packets  		 * have the tag byte-swapped.  		 */  		if (adapter->hw.mac.type >= e1000_i350) @@ -1256,6 +1294,8 @@ static int igb_alloc_q_vector(struct igb_adapter *adapter,  		ring->count = adapter->rx_ring_count;  		ring->queue_index = rxr_idx; +		u64_stats_init(&ring->rx_syncp); +  		/* assign ring to adapter */  		adapter->rx_ring[rxr_idx] = ring;  	} @@ -1296,6 +1336,7 @@ static int igb_alloc_q_vectors(struct igb_adapter *adapter)  	for (; v_idx < q_vectors; v_idx++) {  		int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);  		int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx); +  		err = igb_alloc_q_vector(adapter, q_vectors, v_idx,  					 tqpv, txr_idx, rqpv, rxr_idx); @@ -1364,7 +1405,7 @@ static int igb_request_irq(struct igb_adapter *adapter)  	struct pci_dev *pdev = adapter->pdev;  	int err = 0; -	if (adapter->msix_entries) { +	if (adapter->flags & IGB_FLAG_HAS_MSIX) {  		err = igb_request_msix(adapter);  		if (!err)  			goto request_done; @@ -1408,7 +1449,7 @@ request_done:  static void igb_free_irq(struct igb_adapter *adapter)  { -	if (adapter->msix_entries) { +	if (adapter->flags & IGB_FLAG_HAS_MSIX) {  		int vector = 0, i;  		free_irq(adapter->msix_entries[vector++].vector, adapter); @@ -1433,8 +1474,9 @@ static void igb_irq_disable(struct igb_adapter *adapter)  	 * mapped into these registers and so clearing the bits can cause  	 * issues on the VF drivers so we only need to clear what we set  	 */ -	if (adapter->msix_entries) { +	if (adapter->flags & IGB_FLAG_HAS_MSIX) {  		u32 regval = rd32(E1000_EIAM); +  		wr32(E1000_EIAM, regval & ~adapter->eims_enable_mask);  		wr32(E1000_EIMC, adapter->eims_enable_mask);  		regval = rd32(E1000_EIAC); @@ -1444,8 +1486,9 @@ static void igb_irq_disable(struct igb_adapter *adapter)  	wr32(E1000_IAM, 0);  	wr32(E1000_IMC, ~0);  	wrfl(); -	if (adapter->msix_entries) { +	if (adapter->flags & IGB_FLAG_HAS_MSIX) {  		int i; +  		for (i = 0; i < adapter->num_q_vectors; i++)  			synchronize_irq(adapter->msix_entries[i].vector);  	} else { @@ -1461,9 +1504,10 @@ static void igb_irq_enable(struct igb_adapter *adapter)  {  	struct e1000_hw *hw = &adapter->hw; -	if (adapter->msix_entries) { +	if (adapter->flags & IGB_FLAG_HAS_MSIX) {  		u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_DRSTA;  		u32 regval = rd32(E1000_EIAC); +  		wr32(E1000_EIAC, regval | adapter->eims_enable_mask);  		regval = rd32(E1000_EIAM);  		wr32(E1000_EIAM, regval | adapter->eims_enable_mask); @@ -1601,6 +1645,73 @@ static void igb_power_down_link(struct igb_adapter *adapter)  }  /** + * Detect and switch function for Media Auto Sense + * @adapter: address of the board private structure + **/ +static void igb_check_swap_media(struct igb_adapter *adapter) +{ +	struct e1000_hw *hw = &adapter->hw; +	u32 ctrl_ext, connsw; +	bool swap_now = false; + +	ctrl_ext = rd32(E1000_CTRL_EXT); +	connsw = rd32(E1000_CONNSW); + +	/* need to live swap if current media is copper and we have fiber/serdes +	 * to go to. +	 */ + +	if ((hw->phy.media_type == e1000_media_type_copper) && +	    (!(connsw & E1000_CONNSW_AUTOSENSE_EN))) { +		swap_now = true; +	} else if (!(connsw & E1000_CONNSW_SERDESD)) { +		/* copper signal takes time to appear */ +		if (adapter->copper_tries < 4) { +			adapter->copper_tries++; +			connsw |= E1000_CONNSW_AUTOSENSE_CONF; +			wr32(E1000_CONNSW, connsw); +			return; +		} else { +			adapter->copper_tries = 0; +			if ((connsw & E1000_CONNSW_PHYSD) && +			    (!(connsw & E1000_CONNSW_PHY_PDN))) { +				swap_now = true; +				connsw &= ~E1000_CONNSW_AUTOSENSE_CONF; +				wr32(E1000_CONNSW, connsw); +			} +		} +	} + +	if (!swap_now) +		return; + +	switch (hw->phy.media_type) { +	case e1000_media_type_copper: +		netdev_info(adapter->netdev, +			"MAS: changing media to fiber/serdes\n"); +		ctrl_ext |= +			E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES; +		adapter->flags |= IGB_FLAG_MEDIA_RESET; +		adapter->copper_tries = 0; +		break; +	case e1000_media_type_internal_serdes: +	case e1000_media_type_fiber: +		netdev_info(adapter->netdev, +			"MAS: changing media to copper\n"); +		ctrl_ext &= +			~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES; +		adapter->flags |= IGB_FLAG_MEDIA_RESET; +		break; +	default: +		/* shouldn't get here during regular operation */ +		netdev_err(adapter->netdev, +			"AMS: Invalid media type found, returning\n"); +		break; +	} +	wr32(E1000_CTRL_EXT, ctrl_ext); +} + +/**   *  igb_up - Open the interface and prepare it to handle traffic   *  @adapter: board private structure   **/ @@ -1617,7 +1728,7 @@ int igb_up(struct igb_adapter *adapter)  	for (i = 0; i < adapter->num_q_vectors; i++)  		napi_enable(&(adapter->q_vector[i]->napi)); -	if (adapter->msix_entries) +	if (adapter->flags & IGB_FLAG_HAS_MSIX)  		igb_configure_msix(adapter);  	else  		igb_assign_vector(adapter->q_vector[0], 0); @@ -1629,6 +1740,7 @@ int igb_up(struct igb_adapter *adapter)  	/* notify VFs that reset has been completed */  	if (adapter->vfs_allocated_count) {  		u32 reg_data = rd32(E1000_CTRL_EXT); +  		reg_data |= E1000_CTRL_EXT_PFRSTD;  		wr32(E1000_CTRL_EXT, reg_data);  	} @@ -1639,6 +1751,10 @@ int igb_up(struct igb_adapter *adapter)  	hw->mac.get_link_status = 1;  	schedule_work(&adapter->watchdog_task); +	if ((adapter->flags & IGB_FLAG_EEE) && +	    (!hw->dev_spec._82575.eee_disable)) +		adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T; +  	return 0;  } @@ -1667,7 +1783,7 @@ void igb_down(struct igb_adapter *adapter)  	wr32(E1000_TCTL, tctl);  	/* flush both disables and wait for them to finish */  	wrfl(); -	msleep(10); +	usleep_range(10000, 11000);  	igb_irq_disable(adapter); @@ -1707,12 +1823,43 @@ void igb_reinit_locked(struct igb_adapter *adapter)  {  	WARN_ON(in_interrupt());  	while (test_and_set_bit(__IGB_RESETTING, &adapter->state)) -		msleep(1); +		usleep_range(1000, 2000);  	igb_down(adapter);  	igb_up(adapter);  	clear_bit(__IGB_RESETTING, &adapter->state);  } +/** igb_enable_mas - Media Autosense re-enable after swap + * + * @adapter: adapter struct + **/ +static s32 igb_enable_mas(struct igb_adapter *adapter) +{ +	struct e1000_hw *hw = &adapter->hw; +	u32 connsw; +	s32 ret_val = 0; + +	connsw = rd32(E1000_CONNSW); +	if (!(hw->phy.media_type == e1000_media_type_copper)) +		return ret_val; + +	/* configure for SerDes media detect */ +	if (!(connsw & E1000_CONNSW_SERDESD)) { +		connsw |= E1000_CONNSW_ENRGSRC; +		connsw |= E1000_CONNSW_AUTOSENSE_EN; +		wr32(E1000_CONNSW, connsw); +		wrfl(); +	} else if (connsw & E1000_CONNSW_SERDESD) { +		/* already SerDes, no need to enable anything */ +		return ret_val; +	} else { +		netdev_info(adapter->netdev, +			"MAS: Unable to configure feature, disabling..\n"); +		adapter->flags &= ~IGB_FLAG_MAS_ENABLE; +	} +	return ret_val; +} +  void igb_reset(struct igb_adapter *adapter)  {  	struct pci_dev *pdev = adapter->pdev; @@ -1809,6 +1956,7 @@ void igb_reset(struct igb_adapter *adapter)  	/* disable receive for all VFs and wait one second */  	if (adapter->vfs_allocated_count) {  		int i; +  		for (i = 0 ; i < adapter->vfs_allocated_count; i++)  			adapter->vf_data[i].flags &= IGB_VF_FLAG_PF_SET_MAC; @@ -1824,6 +1972,16 @@ void igb_reset(struct igb_adapter *adapter)  	hw->mac.ops.reset_hw(hw);  	wr32(E1000_WUC, 0); +	if (adapter->flags & IGB_FLAG_MEDIA_RESET) { +		/* need to resetup here after media swap */ +		adapter->ei.get_invariants(hw); +		adapter->flags &= ~IGB_FLAG_MEDIA_RESET; +	} +	if (adapter->flags & IGB_FLAG_MAS_ENABLE) { +		if (igb_enable_mas(adapter)) +			dev_err(&pdev->dev, +				"Error enabling Media Auto Sense\n"); +	}  	if (hw->mac.ops.init_hw(hw))  		dev_err(&pdev->dev, "Hardware Error\n"); @@ -1846,6 +2004,21 @@ void igb_reset(struct igb_adapter *adapter)  		}  	}  #endif +	/* Re-establish EEE setting */ +	if (hw->phy.media_type == e1000_media_type_copper) { +		switch (mac->type) { +		case e1000_i350: +		case e1000_i210: +		case e1000_i211: +			igb_set_eee_i350(hw); +			break; +		case e1000_i354: +			igb_set_eee_i354(hw); +			break; +		default: +			break; +		} +	}  	if (!netif_running(adapter->netdev))  		igb_power_down_link(adapter); @@ -1911,7 +2084,7 @@ static const struct net_device_ops igb_netdev_ops = {  	.ndo_vlan_rx_kill_vid	= igb_vlan_rx_kill_vid,  	.ndo_set_vf_mac		= igb_ndo_set_vf_mac,  	.ndo_set_vf_vlan	= igb_ndo_set_vf_vlan, -	.ndo_set_vf_tx_rate	= igb_ndo_set_vf_bw, +	.ndo_set_vf_rate	= igb_ndo_set_vf_bw,  	.ndo_set_vf_spoofchk	= igb_ndo_set_vf_spoofchk,  	.ndo_get_vf_config	= igb_ndo_get_vf_config,  #ifdef CONFIG_NET_POLL_CONTROLLER @@ -1966,7 +2139,58 @@ void igb_set_fw_version(struct igb_adapter *adapter)  		}  		break;  	} -	return; +} + +/** + * igb_init_mas - init Media Autosense feature if enabled in the NVM + * + * @adapter: adapter struct + **/ +static void igb_init_mas(struct igb_adapter *adapter) +{ +	struct e1000_hw *hw = &adapter->hw; +	u16 eeprom_data; + +	hw->nvm.ops.read(hw, NVM_COMPAT, 1, &eeprom_data); +	switch (hw->bus.func) { +	case E1000_FUNC_0: +		if (eeprom_data & IGB_MAS_ENABLE_0) { +			adapter->flags |= IGB_FLAG_MAS_ENABLE; +			netdev_info(adapter->netdev, +				"MAS: Enabling Media Autosense for port %d\n", +				hw->bus.func); +		} +		break; +	case E1000_FUNC_1: +		if (eeprom_data & IGB_MAS_ENABLE_1) { +			adapter->flags |= IGB_FLAG_MAS_ENABLE; +			netdev_info(adapter->netdev, +				"MAS: Enabling Media Autosense for port %d\n", +				hw->bus.func); +		} +		break; +	case E1000_FUNC_2: +		if (eeprom_data & IGB_MAS_ENABLE_2) { +			adapter->flags |= IGB_FLAG_MAS_ENABLE; +			netdev_info(adapter->netdev, +				"MAS: Enabling Media Autosense for port %d\n", +				hw->bus.func); +		} +		break; +	case E1000_FUNC_3: +		if (eeprom_data & IGB_MAS_ENABLE_3) { +			adapter->flags |= IGB_FLAG_MAS_ENABLE; +			netdev_info(adapter->netdev, +				"MAS: Enabling Media Autosense for port %d\n", +				hw->bus.func); +		} +		break; +	default: +		/* Shouldn't get here */ +		netdev_err(adapter->netdev, +			"MAS: Invalid port configuration, returning\n"); +		break; +	}  }  /** @@ -1975,11 +2199,11 @@ void igb_set_fw_version(struct igb_adapter *adapter)   **/  static s32 igb_init_i2c(struct igb_adapter *adapter)  { -	s32 status = E1000_SUCCESS; +	s32 status = 0;  	/* I2C interface supported on i350 devices */  	if (adapter->hw.mac.type != e1000_i350) -		return E1000_SUCCESS; +		return 0;  	/* Initialize the i2c bus which is controlled by the registers.  	 * This bus will use the i2c_algo_bit structue that implements @@ -2016,7 +2240,6 @@ static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)  	s32 ret_val;  	static int global_quad_port_a; /* global quad port a indication */  	const struct e1000_info *ei = igb_info_tbl[ent->driver_data]; -	unsigned long mmio_start, mmio_len;  	int err, pci_using_dac;  	u8 part_str[E1000_PBANUM_LENGTH]; @@ -2034,21 +2257,15 @@ static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)  		return err;  	pci_using_dac = 0; -	err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)); +	err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));  	if (!err) { -		err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64)); -		if (!err) -			pci_using_dac = 1; +		pci_using_dac = 1;  	} else { -		err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); +		err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));  		if (err) { -			err = dma_set_coherent_mask(&pdev->dev, -						    DMA_BIT_MASK(32)); -			if (err) { -				dev_err(&pdev->dev, -					"No usable DMA configuration, aborting\n"); -				goto err_dma; -			} +			dev_err(&pdev->dev, +				"No usable DMA configuration, aborting\n"); +			goto err_dma;  		}  	} @@ -2079,11 +2296,8 @@ static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)  	hw->back = adapter;  	adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE); -	mmio_start = pci_resource_start(pdev, 0); -	mmio_len = pci_resource_len(pdev, 0); -  	err = -EIO; -	hw->hw_addr = ioremap(mmio_start, mmio_len); +	hw->hw_addr = pci_iomap(pdev, 0, 0);  	if (!hw->hw_addr)  		goto err_ioremap; @@ -2093,8 +2307,8 @@ static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)  	strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1); -	netdev->mem_start = mmio_start; -	netdev->mem_end = mmio_start + mmio_len; +	netdev->mem_start = pci_resource_start(pdev, 0); +	netdev->mem_end = pci_resource_end(pdev, 0);  	/* PCI config space info */  	hw->vendor_id = pdev->vendor; @@ -2219,6 +2433,12 @@ static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)  	/* get firmware version for ethtool -i */  	igb_set_fw_version(adapter); +	/* configure RXPBSIZE and TXPBSIZE */ +	if (hw->mac.type == e1000_i210) { +		wr32(E1000_RXPBS, I210_RXPBSIZE_DEFAULT); +		wr32(E1000_TXPBS, I210_TXPBSIZE_DEFAULT); +	} +  	setup_timer(&adapter->watchdog_timer, igb_watchdog,  		    (unsigned long) adapter);  	setup_timer(&adapter->phy_info_timer, igb_update_phy_info, @@ -2311,7 +2531,8 @@ static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)  	}  	/* let the f/w know that the h/w is now under the control of the -	 * driver. */ +	 * driver. +	 */  	igb_get_hw_control(adapter);  	strcpy(netdev->name, "eth%d"); @@ -2350,6 +2571,11 @@ static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)  		adapter->ets = false;  	}  #endif +	/* Check if Media Autosense is enabled */ +	adapter->ei = *ei; +	if (hw->dev_spec._82575.mas_capable) +		igb_init_mas(adapter); +  	/* do hw tstamp init after resetting */  	igb_ptp_init(adapter); @@ -2382,26 +2608,39 @@ static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)  	dev_info(&pdev->dev, "%s: PBA No: %s\n", netdev->name, part_str);  	dev_info(&pdev->dev,  		"Using %s interrupts. %d rx queue(s), %d tx queue(s)\n", -		adapter->msix_entries ? "MSI-X" : +		(adapter->flags & IGB_FLAG_HAS_MSIX) ? "MSI-X" :  		(adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",  		adapter->num_rx_queues, adapter->num_tx_queues); -	switch (hw->mac.type) { -	case e1000_i350: -	case e1000_i210: -	case e1000_i211: -		igb_set_eee_i350(hw); -		break; -	case e1000_i354: -		if (hw->phy.media_type == e1000_media_type_copper) { +	if (hw->phy.media_type == e1000_media_type_copper) { +		switch (hw->mac.type) { +		case e1000_i350: +		case e1000_i210: +		case e1000_i211: +			/* Enable EEE for internal copper PHY devices */ +			err = igb_set_eee_i350(hw); +			if ((!err) && +			    (!hw->dev_spec._82575.eee_disable)) { +				adapter->eee_advert = +					MDIO_EEE_100TX | MDIO_EEE_1000T; +				adapter->flags |= IGB_FLAG_EEE; +			} +			break; +		case e1000_i354:  			if ((rd32(E1000_CTRL_EXT) & -			    E1000_CTRL_EXT_LINK_MODE_SGMII)) -				igb_set_eee_i354(hw); +			    E1000_CTRL_EXT_LINK_MODE_SGMII)) { +				err = igb_set_eee_i354(hw); +				if ((!err) && +					(!hw->dev_spec._82575.eee_disable)) { +					adapter->eee_advert = +					   MDIO_EEE_100TX | MDIO_EEE_1000T; +					adapter->flags |= IGB_FLAG_EEE; +				} +			} +			break; +		default: +			break;  		} -		break; -	default: -		break;  	} -  	pm_runtime_put_noidle(&pdev->dev);  	return 0; @@ -2416,7 +2655,7 @@ err_eeprom:  		iounmap(hw->flash_address);  err_sw_init:  	igb_clear_interrupt_scheme(adapter); -	iounmap(hw->hw_addr); +	pci_iounmap(pdev, hw->hw_addr);  err_ioremap:  	free_netdev(netdev);  err_alloc_etherdev: @@ -2429,7 +2668,7 @@ err_dma:  }  #ifdef CONFIG_PCI_IOV -static int  igb_disable_sriov(struct pci_dev *pdev) +static int igb_disable_sriov(struct pci_dev *pdev)  {  	struct net_device *netdev = pci_get_drvdata(pdev);  	struct igb_adapter *adapter = netdev_priv(netdev); @@ -2470,27 +2709,19 @@ static int igb_enable_sriov(struct pci_dev *pdev, int num_vfs)  	int err = 0;  	int i; -	if (!adapter->msix_entries) { +	if (!(adapter->flags & IGB_FLAG_HAS_MSIX) || num_vfs > 7) {  		err = -EPERM;  		goto out;  	} -  	if (!num_vfs)  		goto out; -	else if (old_vfs && old_vfs == num_vfs) -		goto out; -	else if (old_vfs && old_vfs != num_vfs) -		err = igb_disable_sriov(pdev); -	if (err) -		goto out; - -	if (num_vfs > 7) { -		err = -EPERM; -		goto out; -	} - -	adapter->vfs_allocated_count = num_vfs; +	if (old_vfs) { +		dev_info(&pdev->dev, "%d pre-allocated VFs found - override max_vfs setting of %d\n", +			 old_vfs, max_vfs); +		adapter->vfs_allocated_count = old_vfs; +	} else +		adapter->vfs_allocated_count = num_vfs;  	adapter->vf_data = kcalloc(adapter->vfs_allocated_count,  				sizeof(struct vf_data_storage), GFP_KERNEL); @@ -2504,10 +2735,12 @@ static int igb_enable_sriov(struct pci_dev *pdev, int num_vfs)  		goto out;  	} -	err = pci_enable_sriov(pdev, adapter->vfs_allocated_count); -	if (err) -		goto err_out; - +	/* only call pci_enable_sriov() if no VFs are allocated already */ +	if (!old_vfs) { +		err = pci_enable_sriov(pdev, adapter->vfs_allocated_count); +		if (err) +			goto err_out; +	}  	dev_info(&pdev->dev, "%d VFs allocated\n",  		 adapter->vfs_allocated_count);  	for (i = 0; i < adapter->vfs_allocated_count; i++) @@ -2589,7 +2822,7 @@ static void igb_remove(struct pci_dev *pdev)  	igb_disable_sriov(pdev);  #endif -	iounmap(hw->hw_addr); +	pci_iounmap(pdev, hw->hw_addr);  	if (hw->flash_address)  		iounmap(hw->flash_address);  	pci_release_selected_regions(pdev, @@ -2623,7 +2856,7 @@ static void igb_probe_vfs(struct igb_adapter *adapter)  		return;  	pci_sriov_set_totalvfs(pdev, 7); -	igb_enable_sriov(pdev, max_vfs); +	igb_pci_enable_sriov(pdev, max_vfs);  #endif /* CONFIG_PCI_IOV */  } @@ -2847,6 +3080,7 @@ static int __igb_open(struct net_device *netdev, bool resuming)  	/* notify VFs that reset has been completed */  	if (adapter->vfs_allocated_count) {  		u32 reg_data = rd32(E1000_CTRL_EXT); +  		reg_data |= E1000_CTRL_EXT_PFRSTD;  		wr32(E1000_CTRL_EXT, reg_data);  	} @@ -3018,7 +3252,7 @@ void igb_setup_tctl(struct igb_adapter *adapter)   *  Configure a transmit ring after a reset.   **/  void igb_configure_tx_ring(struct igb_adapter *adapter, -                           struct igb_ring *ring) +			   struct igb_ring *ring)  {  	struct e1000_hw *hw = &adapter->hw;  	u32 txdctl = 0; @@ -3159,7 +3393,8 @@ static void igb_setup_mrqc(struct igb_adapter *adapter)  	if (adapter->rss_indir_tbl_init != num_rx_queues) {  		for (j = 0; j < IGB_RETA_SIZE; j++) -			adapter->rss_indir_tbl[j] = (j * num_rx_queues) / IGB_RETA_SIZE; +			adapter->rss_indir_tbl[j] = +			(j * num_rx_queues) / IGB_RETA_SIZE;  		adapter->rss_indir_tbl_init = num_rx_queues;  	}  	igb_write_rss_indir_tbl(adapter); @@ -3200,6 +3435,7 @@ static void igb_setup_mrqc(struct igb_adapter *adapter)  		if (hw->mac.type > e1000_82575) {  			/* Set the default pool for the PF's first queue */  			u32 vtctl = rd32(E1000_VT_CTL); +  			vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |  				   E1000_VT_CTL_DISABLE_DEF_POOL);  			vtctl |= adapter->vfs_allocated_count << @@ -3281,7 +3517,7 @@ void igb_setup_rctl(struct igb_adapter *adapter)  }  static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size, -                                   int vfn) +				   int vfn)  {  	struct e1000_hw *hw = &adapter->hw;  	u32 vmolr; @@ -3341,6 +3577,13 @@ static inline void igb_set_vmolr(struct igb_adapter *adapter,  	vmolr = rd32(E1000_VMOLR(vfn));  	vmolr |= E1000_VMOLR_STRVLAN; /* Strip vlan tags */ +	if (hw->mac.type == e1000_i350) { +		u32 dvmolr; + +		dvmolr = rd32(E1000_DVMOLR(vfn)); +		dvmolr |= E1000_DVMOLR_STRVLAN; +		wr32(E1000_DVMOLR(vfn), dvmolr); +	}  	if (aupe)  		vmolr |= E1000_VMOLR_AUPE; /* Accept untagged packets */  	else @@ -3821,7 +4064,8 @@ static void igb_check_wvbr(struct igb_adapter *adapter)  	switch (hw->mac.type) {  	case e1000_82576:  	case e1000_i350: -		if (!(wvbr = rd32(E1000_WVBR))) +		wvbr = rd32(E1000_WVBR); +		if (!wvbr)  			return;  		break;  	default: @@ -3840,7 +4084,7 @@ static void igb_spoof_check(struct igb_adapter *adapter)  	if (!adapter->wvbr)  		return; -	for(j = 0; j < adapter->vfs_allocated_count; j++) { +	for (j = 0; j < adapter->vfs_allocated_count; j++) {  		if (adapter->wvbr & (1 << j) ||  		    adapter->wvbr & (1 << (j + IGB_STAGGERED_QUEUE_OFFSET))) {  			dev_warn(&adapter->pdev->dev, @@ -3941,6 +4185,7 @@ static void igb_watchdog_task(struct work_struct *work)  	struct net_device *netdev = adapter->netdev;  	u32 link;  	int i; +	u32 connsw;  	link = igb_has_link(adapter); @@ -3951,20 +4196,35 @@ static void igb_watchdog_task(struct work_struct *work)  			link = false;  	} +	/* Force link down if we have fiber to swap to */ +	if (adapter->flags & IGB_FLAG_MAS_ENABLE) { +		if (hw->phy.media_type == e1000_media_type_copper) { +			connsw = rd32(E1000_CONNSW); +			if (!(connsw & E1000_CONNSW_AUTOSENSE_EN)) +				link = 0; +		} +	}  	if (link) { +		/* Perform a reset if the media type changed. */ +		if (hw->dev_spec._82575.media_changed) { +			hw->dev_spec._82575.media_changed = false; +			adapter->flags |= IGB_FLAG_MEDIA_RESET; +			igb_reset(adapter); +		}  		/* Cancel scheduled suspend requests. */  		pm_runtime_resume(netdev->dev.parent);  		if (!netif_carrier_ok(netdev)) {  			u32 ctrl; +  			hw->mac.ops.get_speed_and_duplex(hw,  							 &adapter->link_speed,  							 &adapter->link_duplex);  			ctrl = rd32(E1000_CTRL);  			/* Links status message must follow this format */ -			printk(KERN_INFO "igb: %s NIC Link is Up %d Mbps %s " -			       "Duplex, Flow Control: %s\n", +			netdev_info(netdev, +			       "igb: %s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",  			       netdev->name,  			       adapter->link_speed,  			       adapter->link_duplex == FULL_DUPLEX ? @@ -3974,6 +4234,15 @@ static void igb_watchdog_task(struct work_struct *work)  			       (ctrl & E1000_CTRL_RFCE) ?  "RX" :  			       (ctrl & E1000_CTRL_TFCE) ?  "TX" : "None"); +			/* disable EEE if enabled */ +			if ((adapter->flags & IGB_FLAG_EEE) && +				(adapter->link_duplex == HALF_DUPLEX)) { +				dev_info(&adapter->pdev->dev, +				"EEE Disabled: unsupported at half duplex. Re-enable using ethtool when at full duplex.\n"); +				adapter->hw.dev_spec._82575.eee_disable = true; +				adapter->flags &= ~IGB_FLAG_EEE; +			} +  			/* check if SmartSpeed worked */  			igb_check_downshift(hw);  			if (phy->speed_downgraded) @@ -3981,11 +4250,8 @@ static void igb_watchdog_task(struct work_struct *work)  			/* check for thermal sensor event */  			if (igb_thermal_sensor_event(hw, -			    E1000_THSTAT_LINK_THROTTLE)) { -				netdev_info(netdev, "The network adapter link " -					    "speed was downshifted because it " -					    "overheated\n"); -			} +			    E1000_THSTAT_LINK_THROTTLE)) +				netdev_info(netdev, "The network adapter link speed was downshifted because it overheated\n");  			/* adjust timeout factor according to speed/duplex */  			adapter->tx_timeout_factor = 1; @@ -4016,12 +4282,11 @@ static void igb_watchdog_task(struct work_struct *work)  			/* check for thermal sensor event */  			if (igb_thermal_sensor_event(hw,  			    E1000_THSTAT_PWR_DOWN)) { -				netdev_err(netdev, "The network adapter was " -					   "stopped because it overheated\n"); +				netdev_err(netdev, "The network adapter was stopped because it overheated\n");  			}  			/* Links status message must follow this format */ -			printk(KERN_INFO "igb: %s NIC Link is Down\n", +			netdev_info(netdev, "igb: %s NIC Link is Down\n",  			       netdev->name);  			netif_carrier_off(netdev); @@ -4032,8 +4297,27 @@ static void igb_watchdog_task(struct work_struct *work)  				mod_timer(&adapter->phy_info_timer,  					  round_jiffies(jiffies + 2 * HZ)); +			/* link is down, time to check for alternate media */ +			if (adapter->flags & IGB_FLAG_MAS_ENABLE) { +				igb_check_swap_media(adapter); +				if (adapter->flags & IGB_FLAG_MEDIA_RESET) { +					schedule_work(&adapter->reset_task); +					/* return immediately */ +					return; +				} +			}  			pm_schedule_suspend(netdev->dev.parent,  					    MSEC_PER_SEC * 5); + +		/* also check for alternate media here */ +		} else if (!netif_carrier_ok(netdev) && +			   (adapter->flags & IGB_FLAG_MAS_ENABLE)) { +			igb_check_swap_media(adapter); +			if (adapter->flags & IGB_FLAG_MEDIA_RESET) { +				schedule_work(&adapter->reset_task); +				/* return immediately */ +				return; +			}  		}  	} @@ -4062,8 +4346,9 @@ static void igb_watchdog_task(struct work_struct *work)  	}  	/* Cause software interrupt to ensure Rx ring is cleaned */ -	if (adapter->msix_entries) { +	if (adapter->flags & IGB_FLAG_HAS_MSIX) {  		u32 eics = 0; +  		for (i = 0; i < adapter->num_q_vectors; i++)  			eics |= adapter->q_vector[i]->eims_value;  		wr32(E1000_EICS, eics); @@ -4103,8 +4388,7 @@ enum latency_range {   *  were determined based on theoretical maximum wire speed and testing   *  data, in order to minimize response time while increasing bulk   *  throughput. - *  This functionality is controlled by the InterruptThrottleRate module - *  parameter (see igb_param.c) + *  This functionality is controlled by ethtool's coalescing settings.   *  NOTE:  This function is called only when operating in a multiqueue   *         receive environment.   **/ @@ -4178,8 +4462,7 @@ clear_counts:   *  based on theoretical maximum wire speed and thresholds were set based   *  on testing data as well as attempting to minimize response time   *  while increasing bulk throughput. - *  this functionality is controlled by the InterruptThrottleRate module - *  parameter (see igb_param.c) + *  This functionality is controlled by ethtool's coalescing settings.   *  NOTE:  These calculations are only valid when operating in a single-   *         queue environment.   **/ @@ -4205,13 +4488,12 @@ static void igb_update_itr(struct igb_q_vector *q_vector,  	case low_latency:  /* 50 usec aka 20000 ints/s */  		if (bytes > 10000) {  			/* this if handles the TSO accounting */ -			if (bytes/packets > 8000) { +			if (bytes/packets > 8000)  				itrval = bulk_latency; -			} else if ((packets < 10) || ((bytes/packets) > 1200)) { +			else if ((packets < 10) || ((bytes/packets) > 1200))  				itrval = bulk_latency; -			} else if ((packets > 35)) { +			else if ((packets > 35))  				itrval = lowest_latency; -			}  		} else if (bytes/packets > 2000) {  			itrval = bulk_latency;  		} else if (packets <= 2 && bytes < 512) { @@ -4327,6 +4609,7 @@ static int igb_tso(struct igb_ring *tx_ring,  	struct sk_buff *skb = first->skb;  	u32 vlan_macip_lens, type_tucmd;  	u32 mss_l4len_idx, l4len; +	int err;  	if (skb->ip_summed != CHECKSUM_PARTIAL)  		return 0; @@ -4334,16 +4617,14 @@ static int igb_tso(struct igb_ring *tx_ring,  	if (!skb_is_gso(skb))  		return 0; -	if (skb_header_cloned(skb)) { -		int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC); -		if (err) -			return err; -	} +	err = skb_cow_head(skb, 0); +	if (err < 0) +		return err;  	/* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */  	type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP; -	if (first->protocol == __constant_htons(ETH_P_IP)) { +	if (first->protocol == htons(ETH_P_IP)) {  		struct iphdr *iph = ip_hdr(skb);  		iph->tot_len = 0;  		iph->check = 0; @@ -4398,13 +4679,14 @@ static void igb_tx_csum(struct igb_ring *tx_ring, struct igb_tx_buffer *first)  			return;  	} else {  		u8 l4_hdr = 0; +  		switch (first->protocol) { -		case __constant_htons(ETH_P_IP): +		case htons(ETH_P_IP):  			vlan_macip_lens |= skb_network_header_len(skb);  			type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;  			l4_hdr = ip_hdr(skb)->protocol;  			break; -		case __constant_htons(ETH_P_IPV6): +		case htons(ETH_P_IPV6):  			vlan_macip_lens |= skb_network_header_len(skb);  			l4_hdr = ipv6_hdr(skb)->nexthdr;  			break; @@ -4685,6 +4967,7 @@ netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,  	 */  	if (NETDEV_FRAG_PAGE_MAX_SIZE > IGB_MAX_DATA_PER_TXD) {  		unsigned short f; +  		for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)  			count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);  	} else { @@ -4702,12 +4985,11 @@ netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,  	first->bytecount = skb->len;  	first->gso_segs = 1; -	skb_tx_timestamp(skb); -  	if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {  		struct igb_adapter *adapter = netdev_priv(tx_ring->netdev); -		if (!(adapter->ptp_tx_skb)) { +		if (!test_and_set_bit_lock(__IGB_PTP_TX_IN_PROGRESS, +					   &adapter->state)) {  			skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;  			tx_flags |= IGB_TX_FLAGS_TSTAMP; @@ -4718,6 +5000,8 @@ netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,  		}  	} +	skb_tx_timestamp(skb); +  	if (vlan_tx_tag_present(skb)) {  		tx_flags |= IGB_TX_FLAGS_VLAN;  		tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT); @@ -4862,7 +5146,7 @@ static int igb_change_mtu(struct net_device *netdev, int new_mtu)  		max_frame = ETH_FRAME_LEN + ETH_FCS_LEN;  	while (test_and_set_bit(__IGB_RESETTING, &adapter->state)) -		msleep(1); +		usleep_range(1000, 2000);  	/* igb_down has a dependency on max_frame_size */  	adapter->max_frame_size = max_frame; @@ -4915,8 +5199,10 @@ void igb_update_stats(struct igb_adapter *adapter,  	rcu_read_lock();  	for (i = 0; i < adapter->num_rx_queues; i++) { -		u32 rqdpc = rd32(E1000_RQDPC(i));  		struct igb_ring *ring = adapter->rx_ring[i]; +		u32 rqdpc = rd32(E1000_RQDPC(i)); +		if (hw->mac.type >= e1000_i210) +			wr32(E1000_RQDPC(i), 0);  		if (rqdpc) {  			ring->rx_stats.drops += rqdpc; @@ -4924,10 +5210,10 @@ void igb_update_stats(struct igb_adapter *adapter,  		}  		do { -			start = u64_stats_fetch_begin_bh(&ring->rx_syncp); +			start = u64_stats_fetch_begin_irq(&ring->rx_syncp);  			_bytes = ring->rx_stats.bytes;  			_packets = ring->rx_stats.packets; -		} while (u64_stats_fetch_retry_bh(&ring->rx_syncp, start)); +		} while (u64_stats_fetch_retry_irq(&ring->rx_syncp, start));  		bytes += _bytes;  		packets += _packets;  	} @@ -4940,10 +5226,10 @@ void igb_update_stats(struct igb_adapter *adapter,  	for (i = 0; i < adapter->num_tx_queues; i++) {  		struct igb_ring *ring = adapter->tx_ring[i];  		do { -			start = u64_stats_fetch_begin_bh(&ring->tx_syncp); +			start = u64_stats_fetch_begin_irq(&ring->tx_syncp);  			_bytes = ring->tx_stats.bytes;  			_packets = ring->tx_stats.packets; -		} while (u64_stats_fetch_retry_bh(&ring->tx_syncp, start)); +		} while (u64_stats_fetch_retry_irq(&ring->tx_syncp, start));  		bytes += _bytes;  		packets += _packets;  	} @@ -5341,6 +5627,7 @@ static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)  			vmolr |= E1000_VMOLR_MPME;  		} else if (vf_data->num_vf_mc_hashes) {  			int j; +  			vmolr |= E1000_VMOLR_ROMPE;  			for (j = 0; j < vf_data->num_vf_mc_hashes; j++)  				igb_mta_set(hw, vf_data->vf_mc_hashes[j]); @@ -5392,6 +5679,7 @@ static void igb_restore_vf_multicasts(struct igb_adapter *adapter)  	for (i = 0; i < adapter->vfs_allocated_count; i++) {  		u32 vmolr = rd32(E1000_VMOLR(i)); +  		vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);  		vf_data = &adapter->vf_data[i]; @@ -5490,6 +5778,7 @@ static s32 igb_vlvf_set(struct igb_adapter *adapter, u32 vid, bool add, u32 vf)  			if (!adapter->vf_data[vf].vlans_enabled) {  				u32 size; +  				reg = rd32(E1000_VMOLR(vf));  				size = reg & E1000_VMOLR_RLPML_MASK;  				size += 4; @@ -5518,6 +5807,7 @@ static s32 igb_vlvf_set(struct igb_adapter *adapter, u32 vid, bool add, u32 vf)  			adapter->vf_data[vf].vlans_enabled--;  			if (!adapter->vf_data[vf].vlans_enabled) {  				u32 size; +  				reg = rd32(E1000_VMOLR(vf));  				size = reg & E1000_VMOLR_RLPML_MASK;  				size -= 4; @@ -5622,8 +5912,8 @@ static int igb_set_vf_vlan(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)  	 */  	if (!add && (adapter->netdev->flags & IFF_PROMISC)) {  		u32 vlvf, bits; -  		int regndx = igb_find_vlvf_entry(adapter, vid); +  		if (regndx < 0)  			goto out;  		/* See if any other pools are set for this VLAN filter @@ -5708,7 +5998,7 @@ static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)  	/* reply to reset with ack and vf mac address */  	msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK; -	memcpy(addr, vf_mac, 6); +	memcpy(addr, vf_mac, ETH_ALEN);  	igb_write_mbx(hw, msgbuf, 3, vf);  } @@ -5983,7 +6273,7 @@ static void igb_ring_irq_enable(struct igb_q_vector *q_vector)  	}  	if (!test_bit(__IGB_DOWN, &adapter->state)) { -		if (adapter->msix_entries) +		if (adapter->flags & IGB_FLAG_HAS_MSIX)  			wr32(E1000_EIMS, q_vector->eims_value);  		else  			igb_irq_enable(adapter); @@ -6214,7 +6504,7 @@ static void igb_reuse_rx_page(struct igb_ring *rx_ring,  	rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;  	/* transfer page from old buffer to new buffer */ -	memcpy(new_buff, old_buff, sizeof(struct igb_rx_buffer)); +	*new_buff = *old_buff;  	/* sync the buffer for use by the device */  	dma_sync_single_range_for_device(rx_ring->dev, old_buff->dma, @@ -6417,7 +6707,9 @@ static inline void igb_rx_hash(struct igb_ring *ring,  			       struct sk_buff *skb)  {  	if (ring->netdev->features & NETIF_F_RXHASH) -		skb->rxhash = le32_to_cpu(rx_desc->wb.lower.hi_dword.rss); +		skb_set_hash(skb, +			     le32_to_cpu(rx_desc->wb.lower.hi_dword.rss), +			     PKT_HASH_TYPE_L3);  }  /** @@ -6487,7 +6779,7 @@ static unsigned int igb_get_headlen(unsigned char *data,  	hdr.network += ETH_HLEN;  	/* handle any vlan tag if present */ -	if (protocol == __constant_htons(ETH_P_8021Q)) { +	if (protocol == htons(ETH_P_8021Q)) {  		if ((hdr.network - data) > (max_len - VLAN_HLEN))  			return max_len; @@ -6496,7 +6788,7 @@ static unsigned int igb_get_headlen(unsigned char *data,  	}  	/* handle L3 protocols */ -	if (protocol == __constant_htons(ETH_P_IP)) { +	if (protocol == htons(ETH_P_IP)) {  		if ((hdr.network - data) > (max_len - sizeof(struct iphdr)))  			return max_len; @@ -6510,7 +6802,7 @@ static unsigned int igb_get_headlen(unsigned char *data,  		/* record next protocol if header is present */  		if (!(hdr.ipv4->frag_off & htons(IP_OFFSET)))  			nexthdr = hdr.ipv4->protocol; -	} else if (protocol == __constant_htons(ETH_P_IPV6)) { +	} else if (protocol == htons(ETH_P_IPV6)) {  		if ((hdr.network - data) > (max_len - sizeof(struct ipv6hdr)))  			return max_len; @@ -6674,11 +6966,14 @@ static void igb_process_skb_fields(struct igb_ring *rx_ring,  	igb_rx_checksum(rx_ring, rx_desc, skb); -	igb_ptp_rx_hwtstamp(rx_ring, rx_desc, skb); +	if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TS) && +	    !igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) +		igb_ptp_rx_rgtstamp(rx_ring->q_vector, skb);  	if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&  	    igb_test_staterr(rx_desc, E1000_RXD_STAT_VP)) {  		u16 vid; +  		if (igb_test_staterr(rx_desc, E1000_RXDEXT_STATERR_LB) &&  		    test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &rx_ring->flags))  			vid = be16_to_cpu(rx_desc->wb.upper.vlan); @@ -6700,7 +6995,7 @@ static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, const int budget)  	unsigned int total_bytes = 0, total_packets = 0;  	u16 cleaned_count = igb_desc_unused(rx_ring); -	do { +	while (likely(total_packets < budget)) {  		union e1000_adv_rx_desc *rx_desc;  		/* return some buffers to hardware, one at a time is too slow */ @@ -6752,7 +7047,7 @@ static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, const int budget)  		/* update budget accounting */  		total_packets++; -	} while (likely(total_packets < budget)); +	}  	/* place incomplete frames back on ring for completion */  	rx_ring->skb = skb; @@ -6767,7 +7062,7 @@ static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, const int budget)  	if (cleaned_count)  		igb_alloc_rx_buffers(rx_ring, cleaned_count); -	return (total_packets < budget); +	return total_packets < budget;  }  static bool igb_alloc_mapped_page(struct igb_ring *rx_ring, @@ -6888,7 +7183,7 @@ static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)  		break;  	case SIOCGMIIREG:  		if (igb_read_phy_reg(&adapter->hw, data->reg_num & 0x1F, -		                     &data->val_out)) +				     &data->val_out))  			return -EIO;  		break;  	case SIOCSMIIREG: @@ -6911,13 +7206,29 @@ static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)  	case SIOCGMIIREG:  	case SIOCSMIIREG:  		return igb_mii_ioctl(netdev, ifr, cmd); +	case SIOCGHWTSTAMP: +		return igb_ptp_get_ts_config(netdev, ifr);  	case SIOCSHWTSTAMP: -		return igb_ptp_hwtstamp_ioctl(netdev, ifr, cmd); +		return igb_ptp_set_ts_config(netdev, ifr);  	default:  		return -EOPNOTSUPP;  	}  } +void igb_read_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value) +{ +	struct igb_adapter *adapter = hw->back; + +	pci_read_config_word(adapter->pdev, reg, value); +} + +void igb_write_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value) +{ +	struct igb_adapter *adapter = hw->back; + +	pci_write_config_word(adapter->pdev, reg, *value); +} +  s32 igb_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)  {  	struct igb_adapter *adapter = hw->back; @@ -7281,6 +7592,8 @@ static int igb_sriov_reinit(struct pci_dev *dev)  	if (netif_running(netdev))  		igb_close(netdev); +	else +		igb_reset(adapter);  	igb_clear_interrupt_scheme(adapter); @@ -7350,7 +7663,7 @@ static void igb_netpoll(struct net_device *netdev)  	for (i = 0; i < adapter->num_q_vectors; i++) {  		q_vector = adapter->q_vector[i]; -		if (adapter->msix_entries) +		if (adapter->flags & IGB_FLAG_HAS_MSIX)  			wr32(E1000_EIMC, q_vector->eims_value);  		else  			igb_irq_disable(adapter); @@ -7587,7 +7900,8 @@ static void igb_check_vf_rate_limit(struct igb_adapter *adapter)  	}  } -static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate) +static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, +			     int min_tx_rate, int max_tx_rate)  {  	struct igb_adapter *adapter = netdev_priv(netdev);  	struct e1000_hw *hw = &adapter->hw; @@ -7596,15 +7910,19 @@ static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate)  	if (hw->mac.type != e1000_82576)  		return -EOPNOTSUPP; +	if (min_tx_rate) +		return -EINVAL; +  	actual_link_speed = igb_link_mbps(adapter->link_speed);  	if ((vf >= adapter->vfs_allocated_count) ||  	    (!(rd32(E1000_STATUS) & E1000_STATUS_LU)) || -	    (tx_rate < 0) || (tx_rate > actual_link_speed)) +	    (max_tx_rate < 0) || +	    (max_tx_rate > actual_link_speed))  		return -EINVAL;  	adapter->vf_rate_link_speed = actual_link_speed; -	adapter->vf_data[vf].tx_rate = (u16)tx_rate; -	igb_set_vf_rate_limit(hw, vf, tx_rate, actual_link_speed); +	adapter->vf_data[vf].tx_rate = (u16)max_tx_rate; +	igb_set_vf_rate_limit(hw, vf, max_tx_rate, actual_link_speed);  	return 0;  } @@ -7633,7 +7951,7 @@ static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,  	wr32(reg_offset, reg_val);  	adapter->vf_data[vf].spoofchk_enabled = setting; -	return E1000_SUCCESS; +	return 0;  }  static int igb_ndo_get_vf_config(struct net_device *netdev, @@ -7644,7 +7962,8 @@ static int igb_ndo_get_vf_config(struct net_device *netdev,  		return -EINVAL;  	ivi->vf = vf;  	memcpy(&ivi->mac, adapter->vf_data[vf].vf_mac_addresses, ETH_ALEN); -	ivi->tx_rate = adapter->vf_data[vf].tx_rate; +	ivi->max_tx_rate = adapter->vf_data[vf].tx_rate; +	ivi->min_tx_rate = 0;  	ivi->vlan = adapter->vf_data[vf].pf_vlan;  	ivi->qos = adapter->vf_data[vf].pf_qos;  	ivi->spoofchk = adapter->vf_data[vf].spoofchk_enabled; @@ -7669,11 +7988,13 @@ static void igb_vmm_control(struct igb_adapter *adapter)  		reg = rd32(E1000_DTXCTL);  		reg |= E1000_DTXCTL_VLAN_ADDED;  		wr32(E1000_DTXCTL, reg); +		/* Fall through */  	case e1000_82580:  		/* enable replication vlan tag stripping */  		reg = rd32(E1000_RPLOLR);  		reg |= E1000_RPLOLR_STRVLAN;  		wr32(E1000_RPLOLR, reg); +		/* Fall through */  	case e1000_i350:  		/* none of the above registers are supported by i350 */  		break; @@ -7763,6 +8084,7 @@ static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)  		} /* endif adapter->dmac is not disabled */  	} else if (hw->mac.type == e1000_82580) {  		u32 reg = rd32(E1000_PCIEMISC); +  		wr32(E1000_PCIEMISC, reg & ~E1000_PCIEMISC_LX_DECISION);  		wr32(E1000_DMACR, 0);  	} @@ -7791,8 +8113,7 @@ s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset,  	swfw_mask = E1000_SWFW_PHY0_SM; -	if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask) -	    != E1000_SUCCESS) +	if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))  		return E1000_ERR_SWFW_SYNC;  	status = i2c_smbus_read_byte_data(this_client, byte_offset); @@ -7802,7 +8123,7 @@ s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset,  		return E1000_ERR_I2C;  	else {  		*data = status; -		return E1000_SUCCESS; +		return 0;  	}  } @@ -7827,7 +8148,7 @@ s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset,  	if (!this_client)  		return E1000_ERR_I2C; -	if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask) != E1000_SUCCESS) +	if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))  		return E1000_ERR_SWFW_SYNC;  	status = i2c_smbus_write_byte_data(this_client, byte_offset, data);  	hw->mac.ops.release_swfw_sync(hw, swfw_mask); @@ -7835,7 +8156,29 @@ s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset,  	if (status)  		return E1000_ERR_I2C;  	else -		return E1000_SUCCESS; +		return 0; + +} + +int igb_reinit_queues(struct igb_adapter *adapter) +{ +	struct net_device *netdev = adapter->netdev; +	struct pci_dev *pdev = adapter->pdev; +	int err = 0; + +	if (netif_running(netdev)) +		igb_close(netdev); + +	igb_reset_interrupt_capability(adapter); +	if (igb_init_interrupt_scheme(adapter, true)) { +		dev_err(&pdev->dev, "Unable to allocate memory for queues\n"); +		return -ENOMEM; +	} + +	if (netif_running(netdev)) +		err = igb_open(netdev); + +	return err;  }  /* igb_main.c */ diff --git a/drivers/net/ethernet/intel/igb/igb_ptp.c b/drivers/net/ethernet/intel/igb/igb_ptp.c index 5a54e3dc535..794c139f0cc 100644 --- a/drivers/net/ethernet/intel/igb/igb_ptp.c +++ b/drivers/net/ethernet/intel/igb/igb_ptp.c @@ -12,9 +12,8 @@   * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the   * GNU General Public License for more details.   * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * You should have received a copy of the GNU General Public License along with + * this program; if not, see <http://www.gnu.org/licenses/>.   */  #include <linux/module.h>  #include <linux/device.h> @@ -75,6 +74,8 @@  #define INCVALUE_82576			(16 << IGB_82576_TSYNC_SHIFT)  #define IGB_NBITS_82580			40 +static void igb_ptp_tx_hwtstamp(struct igb_adapter *adapter); +  /* SYSTIM read access for the 82576 */  static cycle_t igb_ptp_read_82576(const struct cyclecounter *cc)  { @@ -359,8 +360,8 @@ static int igb_ptp_settime_i210(struct ptp_clock_info *ptp,  	return 0;  } -static int igb_ptp_enable(struct ptp_clock_info *ptp, -			  struct ptp_clock_request *rq, int on) +static int igb_ptp_feature_enable(struct ptp_clock_info *ptp, +				  struct ptp_clock_request *rq, int on)  {  	return -EOPNOTSUPP;  } @@ -372,7 +373,7 @@ static int igb_ptp_enable(struct ptp_clock_info *ptp,   * This work function polls the TSYNCTXCTL valid bit to determine when a   * timestamp has been taken for the current stored skb.   **/ -void igb_ptp_tx_work(struct work_struct *work) +static void igb_ptp_tx_work(struct work_struct *work)  {  	struct igb_adapter *adapter = container_of(work, struct igb_adapter,  						   ptp_tx_work); @@ -386,8 +387,9 @@ void igb_ptp_tx_work(struct work_struct *work)  				   IGB_PTP_TX_TIMEOUT)) {  		dev_kfree_skb_any(adapter->ptp_tx_skb);  		adapter->ptp_tx_skb = NULL; +		clear_bit_unlock(__IGB_PTP_TX_IN_PROGRESS, &adapter->state);  		adapter->tx_hwtstamp_timeouts++; -		dev_warn(&adapter->pdev->dev, "clearing Tx timestamp hang"); +		dev_warn(&adapter->pdev->dev, "clearing Tx timestamp hang\n");  		return;  	} @@ -425,10 +427,8 @@ static void igb_ptp_overflow_check(struct work_struct *work)  void igb_ptp_rx_hang(struct igb_adapter *adapter)  {  	struct e1000_hw *hw = &adapter->hw; -	struct igb_ring *rx_ring;  	u32 tsyncrxctl = rd32(E1000_TSYNCRXCTL);  	unsigned long rx_event; -	int n;  	if (hw->mac.type != e1000_82576)  		return; @@ -443,18 +443,15 @@ void igb_ptp_rx_hang(struct igb_adapter *adapter)  	/* Determine the most recent watchdog or rx_timestamp event */  	rx_event = adapter->last_rx_ptp_check; -	for (n = 0; n < adapter->num_rx_queues; n++) { -		rx_ring = adapter->rx_ring[n]; -		if (time_after(rx_ring->last_rx_timestamp, rx_event)) -			rx_event = rx_ring->last_rx_timestamp; -	} +	if (time_after(adapter->last_rx_timestamp, rx_event)) +		rx_event = adapter->last_rx_timestamp;  	/* Only need to read the high RXSTMP register to clear the lock */  	if (time_is_before_jiffies(rx_event + 5 * HZ)) {  		rd32(E1000_RXSTMPH);  		adapter->last_rx_ptp_check = jiffies;  		adapter->rx_hwtstamp_cleared++; -		dev_warn(&adapter->pdev->dev, "clearing Rx timestamp hang"); +		dev_warn(&adapter->pdev->dev, "clearing Rx timestamp hang\n");  	}  } @@ -466,7 +463,7 @@ void igb_ptp_rx_hang(struct igb_adapter *adapter)   * available, then it must have been for this skb here because we only   * allow only one such packet into the queue.   **/ -void igb_ptp_tx_hwtstamp(struct igb_adapter *adapter) +static void igb_ptp_tx_hwtstamp(struct igb_adapter *adapter)  {  	struct e1000_hw *hw = &adapter->hw;  	struct skb_shared_hwtstamps shhwtstamps; @@ -479,6 +476,7 @@ void igb_ptp_tx_hwtstamp(struct igb_adapter *adapter)  	skb_tstamp_tx(adapter->ptp_tx_skb, &shhwtstamps);  	dev_kfree_skb_any(adapter->ptp_tx_skb);  	adapter->ptp_tx_skb = NULL; +	clear_bit_unlock(__IGB_PTP_TX_IN_PROGRESS, &adapter->state);  }  /** @@ -537,13 +535,35 @@ void igb_ptp_rx_rgtstamp(struct igb_q_vector *q_vector,  	regval |= (u64)rd32(E1000_RXSTMPH) << 32;  	igb_ptp_systim_to_hwtstamp(adapter, skb_hwtstamps(skb), regval); + +	/* Update the last_rx_timestamp timer in order to enable watchdog check +	 * for error case of latched timestamp on a dropped packet. +	 */ +	adapter->last_rx_timestamp = jiffies;  }  /** - * igb_ptp_hwtstamp_ioctl - control hardware time stamping + * igb_ptp_get_ts_config - get hardware time stamping config   * @netdev:   * @ifreq: - * @cmd: + * + * Get the hwtstamp_config settings to return to the user. Rather than attempt + * to deconstruct the settings from the registers, just return a shadow copy + * of the last known settings. + **/ +int igb_ptp_get_ts_config(struct net_device *netdev, struct ifreq *ifr) +{ +	struct igb_adapter *adapter = netdev_priv(netdev); +	struct hwtstamp_config *config = &adapter->tstamp_config; + +	return copy_to_user(ifr->ifr_data, config, sizeof(*config)) ? +		-EFAULT : 0; +} + +/** + * igb_ptp_set_timestamp_mode - setup hardware for timestamping + * @adapter: networking device structure + * @config: hwtstamp configuration   *   * Outgoing time stamping can be enabled and disabled. Play nice and   * disable it when requested, although it shouldn't case any overhead @@ -556,13 +576,11 @@ void igb_ptp_rx_rgtstamp(struct igb_q_vector *q_vector,   * type has to be specified. Matching the kind of event packet is   * not supported, with the exception of "all V2 events regardless of   * level 2 or 4". - **/ -int igb_ptp_hwtstamp_ioctl(struct net_device *netdev, -			   struct ifreq *ifr, int cmd) + */ +static int igb_ptp_set_timestamp_mode(struct igb_adapter *adapter, +				      struct hwtstamp_config *config)  { -	struct igb_adapter *adapter = netdev_priv(netdev);  	struct e1000_hw *hw = &adapter->hw; -	struct hwtstamp_config config;  	u32 tsync_tx_ctl = E1000_TSYNCTXCTL_ENABLED;  	u32 tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED;  	u32 tsync_rx_cfg = 0; @@ -570,14 +588,11 @@ int igb_ptp_hwtstamp_ioctl(struct net_device *netdev,  	bool is_l2 = false;  	u32 regval; -	if (copy_from_user(&config, ifr->ifr_data, sizeof(config))) -		return -EFAULT; -  	/* reserved for future extensions */ -	if (config.flags) +	if (config->flags)  		return -EINVAL; -	switch (config.tx_type) { +	switch (config->tx_type) {  	case HWTSTAMP_TX_OFF:  		tsync_tx_ctl = 0;  	case HWTSTAMP_TX_ON: @@ -586,7 +601,7 @@ int igb_ptp_hwtstamp_ioctl(struct net_device *netdev,  		return -ERANGE;  	} -	switch (config.rx_filter) { +	switch (config->rx_filter) {  	case HWTSTAMP_FILTER_NONE:  		tsync_rx_ctl = 0;  		break; @@ -610,7 +625,7 @@ int igb_ptp_hwtstamp_ioctl(struct net_device *netdev,  	case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:  	case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:  		tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_EVENT_V2; -		config.rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT; +		config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;  		is_l2 = true;  		is_l4 = true;  		break; @@ -621,12 +636,12 @@ int igb_ptp_hwtstamp_ioctl(struct net_device *netdev,  		 */  		if (hw->mac.type != e1000_82576) {  			tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL; -			config.rx_filter = HWTSTAMP_FILTER_ALL; +			config->rx_filter = HWTSTAMP_FILTER_ALL;  			break;  		}  		/* fall through */  	default: -		config.rx_filter = HWTSTAMP_FILTER_NONE; +		config->rx_filter = HWTSTAMP_FILTER_NONE;  		return -ERANGE;  	} @@ -643,7 +658,7 @@ int igb_ptp_hwtstamp_ioctl(struct net_device *netdev,  	if ((hw->mac.type >= e1000_82580) && tsync_rx_ctl) {  		tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED;  		tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL; -		config.rx_filter = HWTSTAMP_FILTER_ALL; +		config->rx_filter = HWTSTAMP_FILTER_ALL;  		is_l2 = true;  		is_l4 = true; @@ -707,6 +722,32 @@ int igb_ptp_hwtstamp_ioctl(struct net_device *netdev,  	regval = rd32(E1000_RXSTMPL);  	regval = rd32(E1000_RXSTMPH); +	return 0; +} + +/** + * igb_ptp_set_ts_config - set hardware time stamping config + * @netdev: + * @ifreq: + * + **/ +int igb_ptp_set_ts_config(struct net_device *netdev, struct ifreq *ifr) +{ +	struct igb_adapter *adapter = netdev_priv(netdev); +	struct hwtstamp_config config; +	int err; + +	if (copy_from_user(&config, ifr->ifr_data, sizeof(config))) +		return -EFAULT; + +	err = igb_ptp_set_timestamp_mode(adapter, &config); +	if (err) +		return err; + +	/* save these settings for future reference */ +	memcpy(&adapter->tstamp_config, &config, +	       sizeof(adapter->tstamp_config)); +  	return copy_to_user(ifr->ifr_data, &config, sizeof(config)) ?  		-EFAULT : 0;  } @@ -727,7 +768,7 @@ void igb_ptp_init(struct igb_adapter *adapter)  		adapter->ptp_caps.adjtime = igb_ptp_adjtime_82576;  		adapter->ptp_caps.gettime = igb_ptp_gettime_82576;  		adapter->ptp_caps.settime = igb_ptp_settime_82576; -		adapter->ptp_caps.enable = igb_ptp_enable; +		adapter->ptp_caps.enable = igb_ptp_feature_enable;  		adapter->cc.read = igb_ptp_read_82576;  		adapter->cc.mask = CLOCKSOURCE_MASK(64);  		adapter->cc.mult = 1; @@ -747,7 +788,7 @@ void igb_ptp_init(struct igb_adapter *adapter)  		adapter->ptp_caps.adjtime = igb_ptp_adjtime_82576;  		adapter->ptp_caps.gettime = igb_ptp_gettime_82576;  		adapter->ptp_caps.settime = igb_ptp_settime_82576; -		adapter->ptp_caps.enable = igb_ptp_enable; +		adapter->ptp_caps.enable = igb_ptp_feature_enable;  		adapter->cc.read = igb_ptp_read_82580;  		adapter->cc.mask = CLOCKSOURCE_MASK(IGB_NBITS_82580);  		adapter->cc.mult = 1; @@ -766,7 +807,7 @@ void igb_ptp_init(struct igb_adapter *adapter)  		adapter->ptp_caps.adjtime = igb_ptp_adjtime_i210;  		adapter->ptp_caps.gettime = igb_ptp_gettime_i210;  		adapter->ptp_caps.settime = igb_ptp_settime_i210; -		adapter->ptp_caps.enable = igb_ptp_enable; +		adapter->ptp_caps.enable = igb_ptp_feature_enable;  		/* Enable the timer functions by clearing bit 31. */  		wr32(E1000_TSAUXC, 0x0);  		break; @@ -798,10 +839,13 @@ void igb_ptp_init(struct igb_adapter *adapter)  	/* Initialize the time sync interrupts for devices that support it. */  	if (hw->mac.type >= e1000_82580) { -		wr32(E1000_TSIM, E1000_TSIM_TXTS); +		wr32(E1000_TSIM, TSYNC_INTERRUPTS);  		wr32(E1000_IMS, E1000_IMS_TS);  	} +	adapter->tstamp_config.rx_filter = HWTSTAMP_FILTER_NONE; +	adapter->tstamp_config.tx_type = HWTSTAMP_TX_OFF; +  	adapter->ptp_clock = ptp_clock_register(&adapter->ptp_caps,  						&adapter->pdev->dev);  	if (IS_ERR(adapter->ptp_clock)) { @@ -841,6 +885,7 @@ void igb_ptp_stop(struct igb_adapter *adapter)  	if (adapter->ptp_tx_skb) {  		dev_kfree_skb_any(adapter->ptp_tx_skb);  		adapter->ptp_tx_skb = NULL; +		clear_bit_unlock(__IGB_PTP_TX_IN_PROGRESS, &adapter->state);  	}  	if (adapter->ptp_clock) { @@ -864,6 +909,9 @@ void igb_ptp_reset(struct igb_adapter *adapter)  	if (!(adapter->flags & IGB_FLAG_PTP))  		return; +	/* reset the tstamp_config */ +	igb_ptp_set_timestamp_mode(adapter, &adapter->tstamp_config); +  	switch (adapter->hw.mac.type) {  	case e1000_82576:  		/* Dial the nominal frequency. */ @@ -876,7 +924,7 @@ void igb_ptp_reset(struct igb_adapter *adapter)  	case e1000_i211:  		/* Enable the timer functions and interrupts. */  		wr32(E1000_TSAUXC, 0x0); -		wr32(E1000_TSIM, E1000_TSIM_TXTS); +		wr32(E1000_TSIM, TSYNC_INTERRUPTS);  		wr32(E1000_IMS, E1000_IMS_TS);  		break;  	default:  | 
