diff options
Diffstat (limited to 'drivers/net/ethernet/intel/igb/e1000_mac.c')
| -rw-r--r-- | drivers/net/ethernet/intel/igb/e1000_mac.c | 80 | 
1 files changed, 41 insertions, 39 deletions
diff --git a/drivers/net/ethernet/intel/igb/e1000_mac.c b/drivers/net/ethernet/intel/igb/e1000_mac.c index f0dfd41dd4b..2a88595f956 100644 --- a/drivers/net/ethernet/intel/igb/e1000_mac.c +++ b/drivers/net/ethernet/intel/igb/e1000_mac.c @@ -1,29 +1,25 @@ -/******************************************************************************* - -  Intel(R) Gigabit Ethernet Linux driver -  Copyright(c) 2007-2013 Intel Corporation. - -  This program is free software; you can redistribute it and/or modify it -  under the terms and conditions of the GNU General Public License, -  version 2, as published by the Free Software Foundation. - -  This program is distributed in the hope it will be useful, but WITHOUT -  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for -  more details. - -  You should have received a copy of the GNU General Public License along with -  this program; if not, write to the Free Software Foundation, Inc., -  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. - -  The full GNU General Public License is included in this distribution in -  the file called "COPYING". - -  Contact Information: -  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> -  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 - -*******************************************************************************/ +/* Intel(R) Gigabit Ethernet Linux driver + * Copyright(c) 2007-2014 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, see <http://www.gnu.org/licenses/>. + * + * The full GNU General Public License is included in this distribution in + * the file called "COPYING". + * + * Contact Information: + * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> + * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 + */  #include <linux/if_ether.h>  #include <linux/delay.h> @@ -443,7 +439,7 @@ static u32 igb_hash_mc_addr(struct e1000_hw *hw, u8 *mc_addr)   *  The caller must have a packed mc_addr_list of multicast addresses.   **/  void igb_update_mc_addr_list(struct e1000_hw *hw, -                             u8 *mc_addr_list, u32 mc_addr_count) +			     u8 *mc_addr_list, u32 mc_addr_count)  {  	u32 hash_value, hash_bit, hash_reg;  	int i; @@ -712,6 +708,7 @@ static s32 igb_set_fc_watermarks(struct e1000_hw *hw)  static s32 igb_set_default_fc(struct e1000_hw *hw)  {  	s32 ret_val = 0; +	u16 lan_offset;  	u16 nvm_data;  	/* Read and store word 0x0F of the EEPROM. This word contains bits @@ -722,7 +719,14 @@ static s32 igb_set_default_fc(struct e1000_hw *hw)  	 * control setting, then the variable hw->fc will  	 * be initialized based on a value in the EEPROM.  	 */ -	ret_val = hw->nvm.ops.read(hw, NVM_INIT_CONTROL2_REG, 1, &nvm_data); +	if (hw->mac.type == e1000_i350) { +		lan_offset = NVM_82580_LAN_FUNC_OFFSET(hw->bus.func); +		ret_val = hw->nvm.ops.read(hw, NVM_INIT_CONTROL2_REG +					   + lan_offset, 1, &nvm_data); +	 } else { +		ret_val = hw->nvm.ops.read(hw, NVM_INIT_CONTROL2_REG, +					   1, &nvm_data); +	 }  	if (ret_val) {  		hw_dbg("NVM Read Error\n"); @@ -859,8 +863,7 @@ s32 igb_config_fc_after_link_up(struct e1000_hw *hw)  			goto out;  		if (!(mii_status_reg & MII_SR_AUTONEG_COMPLETE)) { -			hw_dbg("Copper PHY and Auto Neg " -				 "has not completed.\n"); +			hw_dbg("Copper PHY and Auto Neg has not completed.\n");  			goto out;  		} @@ -922,11 +925,10 @@ s32 igb_config_fc_after_link_up(struct e1000_hw *hw)  			 */  			if (hw->fc.requested_mode == e1000_fc_full) {  				hw->fc.current_mode = e1000_fc_full; -				hw_dbg("Flow Control = FULL.\r\n"); +				hw_dbg("Flow Control = FULL.\n");  			} else {  				hw->fc.current_mode = e1000_fc_rx_pause; -				hw_dbg("Flow Control = " -				       "RX PAUSE frames only.\r\n"); +				hw_dbg("Flow Control = RX PAUSE frames only.\n");  			}  		}  		/* For receiving PAUSE frames ONLY. @@ -941,7 +943,7 @@ s32 igb_config_fc_after_link_up(struct e1000_hw *hw)  			  (mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) &&  			  (mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) {  			hw->fc.current_mode = e1000_fc_tx_pause; -			hw_dbg("Flow Control = TX PAUSE frames only.\r\n"); +			hw_dbg("Flow Control = TX PAUSE frames only.\n");  		}  		/* For transmitting PAUSE frames ONLY.  		 * @@ -955,7 +957,7 @@ s32 igb_config_fc_after_link_up(struct e1000_hw *hw)  			 !(mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) &&  			 (mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) {  			hw->fc.current_mode = e1000_fc_rx_pause; -			hw_dbg("Flow Control = RX PAUSE frames only.\r\n"); +			hw_dbg("Flow Control = RX PAUSE frames only.\n");  		}  		/* Per the IEEE spec, at this point flow control should be  		 * disabled.  However, we want to consider that we could @@ -981,10 +983,10 @@ s32 igb_config_fc_after_link_up(struct e1000_hw *hw)  			 (hw->fc.requested_mode == e1000_fc_tx_pause) ||  			 (hw->fc.strict_ieee)) {  			hw->fc.current_mode = e1000_fc_none; -			hw_dbg("Flow Control = NONE.\r\n"); +			hw_dbg("Flow Control = NONE.\n");  		} else {  			hw->fc.current_mode = e1000_fc_rx_pause; -			hw_dbg("Flow Control = RX PAUSE frames only.\r\n"); +			hw_dbg("Flow Control = RX PAUSE frames only.\n");  		}  		/* Now we need to do one last check...  If we auto- @@ -1259,7 +1261,7 @@ s32 igb_get_auto_rd_done(struct e1000_hw *hw)  	while (i < AUTO_READ_DONE_TIMEOUT) {  		if (rd32(E1000_EECD) & E1000_EECD_AUTO_RD)  			break; -		msleep(1); +		usleep_range(1000, 2000);  		i++;  	} @@ -1292,7 +1294,7 @@ static s32 igb_valid_led_default(struct e1000_hw *hw, u16 *data)  	}  	if (*data == ID_LED_RESERVED_0000 || *data == ID_LED_RESERVED_FFFF) { -		switch(hw->phy.media_type) { +		switch (hw->phy.media_type) {  		case e1000_media_type_internal_serdes:  			*data = ID_LED_DEFAULT_82575_SERDES;  			break;  | 
