diff options
Diffstat (limited to 'drivers/media/rc/nuvoton-cir.h')
| -rw-r--r-- | drivers/media/rc/nuvoton-cir.h | 32 |
1 files changed, 21 insertions, 11 deletions
diff --git a/drivers/media/rc/nuvoton-cir.h b/drivers/media/rc/nuvoton-cir.h index 1df82351cb0..e1cf23c3875 100644 --- a/drivers/media/rc/nuvoton-cir.h +++ b/drivers/media/rc/nuvoton-cir.h @@ -67,10 +67,8 @@ static int debug; struct nvt_dev { struct pnp_dev *pdev; struct rc_dev *rdev; - struct ir_raw_event rawir; spinlock_t nvt_lock; - bool in_use; /* for rx */ u8 buf[RX_BUF_LEN]; @@ -86,8 +84,8 @@ struct nvt_dev { } tx; /* EFER Config register index/data pair */ - u8 cr_efir; - u8 cr_efdr; + u32 cr_efir; + u32 cr_efdr; /* hardware I/O settings */ unsigned long cir_addr; @@ -105,7 +103,6 @@ struct nvt_dev { /* rx settings */ bool learning_enabled; - bool carrier_detect_enabled; /* track cir wake state */ u8 wake_state; @@ -305,8 +302,11 @@ struct nvt_dev { #define CIR_WAKE_IRFIFOSTS_RX_EMPTY 0x20 #define CIR_WAKE_IRFIFOSTS_RX_FULL 0x10 -/* CIR Wake FIFO buffer is 67 bytes long */ -#define CIR_WAKE_FIFO_LEN 67 +/* + * The CIR Wake FIFO buffer is 67 bytes long, but the stock remote wakes + * the system comparing only 65 bytes (fails with this set to 67) + */ +#define CIR_WAKE_FIFO_CMP_BYTES 65 /* CIR Wake byte comparison tolerance */ #define CIR_WAKE_CMP_TOLERANCE 5 @@ -327,9 +327,13 @@ struct nvt_dev { #define EFER_EFM_DISABLE 0xaa /* Chip IDs found in CR_CHIP_ID_{HI,LO} */ -#define CHIP_ID_HIGH 0xb4 -#define CHIP_ID_LOW 0x72 -#define CHIP_ID_LOW2 0x73 +#define CHIP_ID_HIGH_667 0xa5 +#define CHIP_ID_HIGH_677B 0xb4 +#define CHIP_ID_HIGH_677C 0xc3 +#define CHIP_ID_LOW_667 0x13 +#define CHIP_ID_LOW_677B2 0x72 +#define CHIP_ID_LOW_677B3 0x73 +#define CHIP_ID_LOW_677C 0x33 /* Config regs we need to care about */ #define CR_SOFTWARE_RESET 0x02 @@ -338,6 +342,7 @@ struct nvt_dev { #define CR_CHIP_ID_LO 0x21 #define CR_DEV_POWER_DOWN 0x22 /* bit 2 is CIR power, default power on */ #define CR_OUTPUT_PIN_SEL 0x27 +#define CR_MULTIFUNC_PIN_SEL 0x2c #define CR_LOGICAL_DEV_EN 0x30 /* valid for all logical devices */ /* next three regs valid for both the CIR and CIR_WAKE logical devices */ #define CR_CIR_BASE_ADDR_HI 0x60 @@ -358,13 +363,18 @@ struct nvt_dev { #define LOGICAL_DEV_ENABLE 0x01 #define CIR_WAKE_ENABLE_BIT 0x08 -#define CIR_INTR_MOUSE_IRQ_BIT 0x80 #define PME_INTR_CIR_PASS_BIT 0x08 +/* w83677hg CIR pin config */ #define OUTPUT_PIN_SEL_MASK 0xbc #define OUTPUT_ENABLE_CIR 0x01 /* Pin95=CIRRX, Pin96=CIRTX1 */ #define OUTPUT_ENABLE_CIRWB 0x40 /* enable wide-band sensor */ +/* w83667hg CIR pin config */ +#define MULTIFUNC_PIN_SEL_MASK 0x1f +#define MULTIFUNC_ENABLE_CIR 0x80 /* Pin75=CIRRX, Pin76=CIRTX1 */ +#define MULTIFUNC_ENABLE_CIRWB 0x20 /* enable wide-band sensor */ + /* MCE CIR signal length, related on sample period */ /* MCE CIR controller signal length: about 43ms |