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path: root/drivers/isdn/hardware/mISDN/hfc_multi.h
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Diffstat (limited to 'drivers/isdn/hardware/mISDN/hfc_multi.h')
-rw-r--r--drivers/isdn/hardware/mISDN/hfc_multi.h107
1 files changed, 68 insertions, 39 deletions
diff --git a/drivers/isdn/hardware/mISDN/hfc_multi.h b/drivers/isdn/hardware/mISDN/hfc_multi.h
index 663b77f578b..c601f880141 100644
--- a/drivers/isdn/hardware/mISDN/hfc_multi.h
+++ b/drivers/isdn/hardware/mISDN/hfc_multi.h
@@ -17,19 +17,29 @@
#define PCI_ENA_REGIO 0x01
#define PCI_ENA_MEMIO 0x02
+#define XHFC_IRQ 4 /* SIU_IRQ2 */
+#define XHFC_MEMBASE 0xFE000000
+#define XHFC_MEMSIZE 0x00001000
+#define XHFC_OFFSET 0x00001000
+#define PA_XHFC_A0 0x0020 /* PA10 */
+#define PB_XHFC_IRQ1 0x00000100 /* PB23 */
+#define PB_XHFC_IRQ2 0x00000200 /* PB22 */
+#define PB_XHFC_IRQ3 0x00000400 /* PB21 */
+#define PB_XHFC_IRQ4 0x00000800 /* PB20 */
+
/*
* NOTE: some registers are assigned multiple times due to different modes
* also registers are assigned differen for HFC-4s/8s and HFC-E1
*/
/*
-#define MAX_FRAME_SIZE 2048
+ #define MAX_FRAME_SIZE 2048
*/
struct hfc_chan {
struct dchannel *dch; /* link if channel is a D-channel */
struct bchannel *bch; /* link if channel is a B-channel */
- int port; /* the interface port this */
+ int port; /* the interface port this */
/* channel is associated with */
int nt_timer; /* -1 if off, 0 if elapsed, >0 if running */
int los, ais, slip_tx, slip_rx, rdi; /* current alarms */
@@ -44,6 +54,7 @@ struct hfc_chan {
int conf; /* conference setting of TX slot */
int txpending; /* if there is currently data in */
/* the FIFO 0=no, 1=yes, 2=splloop */
+ int Zfill; /* rx-fifo level on last hfcmulti_tx */
int rx_off; /* set to turn fifo receive off */
int coeff_count; /* curren coeff block */
s32 *coeff; /* memory pointer to 8 coeff blocks */
@@ -62,6 +73,7 @@ struct hfcm_hw {
u_char r_sci_msk;
u_char r_tx0, r_tx1;
u_char a_st_ctrl0[8];
+ u_char r_bert_wd_md;
timer_t timer;
};
@@ -77,7 +89,12 @@ struct hfcm_hw {
#define HFC_CFG_REPORT_RDI 8 /* the card should report remote alarm */
#define HFC_CFG_DTMF 9 /* enable DTMF-detection */
#define HFC_CFG_CRC4 10 /* disable CRC-4 Multiframe mode, */
- /* use double frame instead. */
+/* use double frame instead. */
+
+#define HFC_TYPE_E1 1 /* controller is HFC-E1 */
+#define HFC_TYPE_4S 4 /* controller is HFC-4S */
+#define HFC_TYPE_8S 8 /* controller is HFC-8S */
+#define HFC_TYPE_XHFC 5 /* controller is XHFC */
#define HFC_CHIP_EXRAM_128 0 /* external ram 128k */
#define HFC_CHIP_EXRAM_512 1 /* external ram 256k */
@@ -86,19 +103,22 @@ struct hfcm_hw {
#define HFC_CHIP_PCM_MASTER 4 /* PCM is master */
#define HFC_CHIP_RX_SYNC 5 /* disable pll sync for pcm */
#define HFC_CHIP_DTMF 6 /* DTMF decoding is enabled */
-#define HFC_CHIP_ULAW 7 /* ULAW mode */
-#define HFC_CHIP_CLOCK2 8 /* double clock mode */
-#define HFC_CHIP_E1CLOCK_GET 9 /* always get clock from E1 interface */
-#define HFC_CHIP_E1CLOCK_PUT 10 /* always put clock from E1 interface */
-#define HFC_CHIP_WATCHDOG 11 /* whether we should send signals */
- /* to the watchdog */
-#define HFC_CHIP_B410P 12 /* whether we have a b410p with echocan in */
- /* hw */
-#define HFC_CHIP_PLXSD 13 /* whether we have a Speech-Design PLX */
+#define HFC_CHIP_CONF 7 /* conference handling is enabled */
+#define HFC_CHIP_ULAW 8 /* ULAW mode */
+#define HFC_CHIP_CLOCK2 9 /* double clock mode */
+#define HFC_CHIP_E1CLOCK_GET 10 /* always get clock from E1 interface */
+#define HFC_CHIP_E1CLOCK_PUT 11 /* always put clock from E1 interface */
+#define HFC_CHIP_WATCHDOG 12 /* whether we should send signals */
+/* to the watchdog */
+#define HFC_CHIP_B410P 13 /* whether we have a b410p with echocan in */
+/* hw */
+#define HFC_CHIP_PLXSD 14 /* whether we have a Speech-Design PLX */
+#define HFC_CHIP_EMBSD 15 /* whether we have a SD Embedded board */
#define HFC_IO_MODE_PCIMEM 0x00 /* normal memory mapped IO */
#define HFC_IO_MODE_REGIO 0x01 /* PCI io access */
#define HFC_IO_MODE_PLXSD 0x02 /* access HFC via PLX9030 */
+#define HFC_IO_MODE_EMBSD 0x03 /* direct access */
/* table entry in the PCI devices list */
struct hm_map {
@@ -111,6 +131,7 @@ struct hm_map {
int opticalsupport;
int dip_type;
int io_mode;
+ int irq;
};
struct hfc_multi {
@@ -118,7 +139,7 @@ struct hfc_multi {
struct hm_map *mtyp;
int id;
int pcm; /* id of pcm bus */
- int type;
+ int ctype; /* controller type */
int ports;
u_int irq; /* irq used by card */
@@ -127,26 +148,26 @@ struct hfc_multi {
int io_mode; /* selects mode */
#ifdef HFC_REGISTER_DEBUG
void (*HFC_outb)(struct hfc_multi *hc, u_char reg,
- u_char val, const char *function, int line);
+ u_char val, const char *function, int line);
void (*HFC_outb_nodebug)(struct hfc_multi *hc, u_char reg,
- u_char val, const char *function, int line);
+ u_char val, const char *function, int line);
u_char (*HFC_inb)(struct hfc_multi *hc, u_char reg,
- const char *function, int line);
+ const char *function, int line);
u_char (*HFC_inb_nodebug)(struct hfc_multi *hc, u_char reg,
- const char *function, int line);
+ const char *function, int line);
u_short (*HFC_inw)(struct hfc_multi *hc, u_char reg,
- const char *function, int line);
+ const char *function, int line);
u_short (*HFC_inw_nodebug)(struct hfc_multi *hc, u_char reg,
- const char *function, int line);
+ const char *function, int line);
void (*HFC_wait)(struct hfc_multi *hc,
- const char *function, int line);
+ const char *function, int line);
void (*HFC_wait_nodebug)(struct hfc_multi *hc,
- const char *function, int line);
+ const char *function, int line);
#else
void (*HFC_outb)(struct hfc_multi *hc, u_char reg,
- u_char val);
+ u_char val);
void (*HFC_outb_nodebug)(struct hfc_multi *hc, u_char reg,
- u_char val);
+ u_char val);
u_char (*HFC_inb)(struct hfc_multi *hc, u_char reg);
u_char (*HFC_inb_nodebug)(struct hfc_multi *hc, u_char reg);
u_short (*HFC_inw)(struct hfc_multi *hc, u_char reg);
@@ -155,13 +176,19 @@ struct hfc_multi {
void (*HFC_wait_nodebug)(struct hfc_multi *hc);
#endif
void (*read_fifo)(struct hfc_multi *hc, u_char *data,
- int len);
+ int len);
void (*write_fifo)(struct hfc_multi *hc, u_char *data,
- int len);
- u_long pci_origmembase, plx_origmembase, dsp_origmembase;
+ int len);
+ u_long pci_origmembase, plx_origmembase;
void __iomem *pci_membase; /* PCI memory */
void __iomem *plx_membase; /* PLX memory */
- u_char *dsp_membase; /* DSP on PLX */
+ u_long xhfc_origmembase;
+ u_char *xhfc_membase;
+ u_long *xhfc_memaddr, *xhfc_memdata;
+#ifdef CONFIG_MISDN_HFCMULTI_8xx
+ struct immap *immap;
+#endif
+ u_long pb_irqmsk; /* Portbit mask to check the IRQ line */
u_long pci_iobase; /* PCI IO */
struct hfcm_hw hw; /* remember data of write-only-registers */
@@ -178,18 +205,22 @@ struct hfc_multi {
u_int slots; /* number of PCM slots */
u_int leds; /* type of leds */
- u_int ledcount; /* used to animate leds */
u_long ledstate; /* save last state of leds */
int opticalsupport; /* has the e1 board */
/* an optical Interface */
- int dslot; /* channel # of d-channel (E1) default 16 */
- u_long wdcount; /* every 500 ms we need to */
+ u_int bmask[32]; /* bitmask of bchannels for port */
+ u_char dnum[32]; /* array of used dchannel numbers for port */
+ u_char created[32]; /* what port is created */
+ u_int activity_tx; /* if there is data TX / RX */
+ u_int activity_rx; /* bitmask according to port number */
+ /* (will be cleared after */
+ /* showing led-states) */
+ u_int flash[8]; /* counter for flashing 8 leds on activity */
+
+ u_long wdcount; /* every 500 ms we need to */
/* send the watchdog a signal */
u_char wdbyte; /* watchdog toggle byte */
- u_int activity[8]; /* if there is any action on this */
- /* port (will be cleared after */
- /* showing led-states) */
int e1_state; /* keep track of last state */
int e1_getclock; /* if sync is retrieved from interface */
int syncronized; /* keep track of existing sync interface */
@@ -206,7 +237,6 @@ struct hfc_multi {
* the bch->channel is equvalent to the hfc-channel
*/
struct hfc_chan chan[32];
- u_char created[8]; /* what port is created */
signed char slot_owner[256]; /* owner channel of slot */
};
@@ -241,7 +271,7 @@ struct hfc_multi {
#define PLX_DSP_RES_N PLX_GPIO8
/* GPIO4..8 Enable & Set to OUT, SLAVE_EN_N = 1 */
#define PLX_GPIOC_INIT (PLX_GPIO4_DIR | PLX_GPIO5_DIR | PLX_GPIO6_DIR \
- | PLX_GPIO7_DIR | PLX_GPIO8_DIR | PLX_SLAVE_EN_N)
+ | PLX_GPIO7_DIR | PLX_GPIO8_DIR | PLX_SLAVE_EN_N)
/* PLX Interrupt Control/STATUS */
#define PLX_INTCSR_LINTI1_ENABLE 0x01
@@ -263,7 +293,7 @@ struct hfc_multi {
/* write only registers */
#define R_CIRM 0x00
#define R_CTRL 0x01
-#define R_BRG_PCM_CFG 0x02
+#define R_BRG_PCM_CFG 0x02
#define R_RAM_ADDR0 0x08
#define R_RAM_ADDR1 0x09
#define R_RAM_ADDR2 0x0A
@@ -660,8 +690,8 @@ struct hfc_multi {
#define V_NEG_CLK 0x08
#define V_HCLK 0x10
/*
-#define V_JATT_AUTO_DEL 0x20
-#define V_JATT_AUTO 0x40
+ #define V_JATT_AUTO_DEL 0x20
+ #define V_JATT_AUTO 0x40
*/
#define V_JATT_OFF 0x80
/* R_STATE */
@@ -1203,4 +1233,3 @@ struct hfc_register_names {
{"R_IRQ_FIFO_BL7", 0xCF},
};
#endif /* HFC_REGISTER_DEBUG */
-
generated by cgit v1.2.3-70-g09d2 (git 2.46.0) at 2025-12-11 12:40:33 +0000