diff options
Diffstat (limited to 'drivers/input/serio/i8042.c')
| -rw-r--r-- | drivers/input/serio/i8042.c | 1411 |
1 files changed, 899 insertions, 512 deletions
diff --git a/drivers/input/serio/i8042.c b/drivers/input/serio/i8042.c index 708a1d3beab..3807c3e971c 100644 --- a/drivers/input/serio/i8042.c +++ b/drivers/input/serio/i8042.c @@ -10,16 +10,20 @@ * the Free Software Foundation. */ +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include <linux/types.h> #include <linux/delay.h> #include <linux/module.h> -#include <linux/moduleparam.h> #include <linux/interrupt.h> #include <linux/ioport.h> -#include <linux/config.h> #include <linux/init.h> #include <linux/serio.h> #include <linux/err.h> #include <linux/rcupdate.h> +#include <linux/platform_device.h> +#include <linux/i8042.h> +#include <linux/slab.h> #include <asm/io.h> @@ -27,106 +31,162 @@ MODULE_AUTHOR("Vojtech Pavlik <vojtech@suse.cz>"); MODULE_DESCRIPTION("i8042 keyboard and mouse controller driver"); MODULE_LICENSE("GPL"); -static unsigned int i8042_noaux; +static bool i8042_nokbd; +module_param_named(nokbd, i8042_nokbd, bool, 0); +MODULE_PARM_DESC(nokbd, "Do not probe or use KBD port."); + +static bool i8042_noaux; module_param_named(noaux, i8042_noaux, bool, 0); MODULE_PARM_DESC(noaux, "Do not probe or use AUX (mouse) port."); -static unsigned int i8042_nomux; +static bool i8042_nomux; module_param_named(nomux, i8042_nomux, bool, 0); -MODULE_PARM_DESC(nomux, "Do not check whether an active multiplexing conrtoller is present."); +MODULE_PARM_DESC(nomux, "Do not check whether an active multiplexing controller is present."); -static unsigned int i8042_unlock; +static bool i8042_unlock; module_param_named(unlock, i8042_unlock, bool, 0); MODULE_PARM_DESC(unlock, "Ignore keyboard lock."); -static unsigned int i8042_reset; +static bool i8042_reset; module_param_named(reset, i8042_reset, bool, 0); MODULE_PARM_DESC(reset, "Reset controller during init and cleanup."); -static unsigned int i8042_direct; +static bool i8042_direct; module_param_named(direct, i8042_direct, bool, 0); MODULE_PARM_DESC(direct, "Put keyboard port into non-translated mode."); -static unsigned int i8042_dumbkbd; +static bool i8042_dumbkbd; module_param_named(dumbkbd, i8042_dumbkbd, bool, 0); MODULE_PARM_DESC(dumbkbd, "Pretend that controller can only read data from keyboard"); -static unsigned int i8042_noloop; +static bool i8042_noloop; module_param_named(noloop, i8042_noloop, bool, 0); MODULE_PARM_DESC(noloop, "Disable the AUX Loopback command while probing for the AUX port"); -static unsigned int i8042_blink_frequency = 500; -module_param_named(panicblink, i8042_blink_frequency, uint, 0600); -MODULE_PARM_DESC(panicblink, "Frequency with which keyboard LEDs should blink when kernel panics"); +static bool i8042_notimeout; +module_param_named(notimeout, i8042_notimeout, bool, 0); +MODULE_PARM_DESC(notimeout, "Ignore timeouts signalled by i8042"); + +#ifdef CONFIG_X86 +static bool i8042_dritek; +module_param_named(dritek, i8042_dritek, bool, 0); +MODULE_PARM_DESC(dritek, "Force enable the Dritek keyboard extension"); +#endif #ifdef CONFIG_PNP -static int i8042_nopnp; +static bool i8042_nopnp; module_param_named(nopnp, i8042_nopnp, bool, 0); MODULE_PARM_DESC(nopnp, "Do not use PNP to detect controller settings"); #endif #define DEBUG #ifdef DEBUG -static int i8042_debug; +static bool i8042_debug; module_param_named(debug, i8042_debug, bool, 0600); MODULE_PARM_DESC(debug, "Turn i8042 debugging mode on and off"); #endif -__obsolete_setup("i8042_noaux"); -__obsolete_setup("i8042_nomux"); -__obsolete_setup("i8042_unlock"); -__obsolete_setup("i8042_reset"); -__obsolete_setup("i8042_direct"); -__obsolete_setup("i8042_dumbkbd"); +static bool i8042_bypass_aux_irq_test; +static char i8042_kbd_firmware_id[128]; +static char i8042_aux_firmware_id[128]; #include "i8042.h" +/* + * i8042_lock protects serialization between i8042_command and + * the interrupt handler. + */ static DEFINE_SPINLOCK(i8042_lock); +/* + * Writers to AUX and KBD ports as well as users issuing i8042_command + * directly should acquire i8042_mutex (by means of calling + * i8042_lock_chip() and i8042_unlock_ship() helpers) to ensure that + * they do not disturb each other (unfortunately in many i8042 + * implementations write to one of the ports will immediately abort + * command that is being processed by another port). + */ +static DEFINE_MUTEX(i8042_mutex); + struct i8042_port { struct serio *serio; int irq; - unsigned char disable; - unsigned char irqen; - unsigned char exists; + bool exists; signed char mux; - char name[8]; }; #define I8042_KBD_PORT_NO 0 #define I8042_AUX_PORT_NO 1 #define I8042_MUX_PORT_NO 2 #define I8042_NUM_PORTS (I8042_NUM_MUX_PORTS + 2) -static struct i8042_port i8042_ports[I8042_NUM_PORTS] = { - { - .disable = I8042_CTR_KBDDIS, - .irqen = I8042_CTR_KBDINT, - .mux = -1, - .name = "KBD", - }, - { - .disable = I8042_CTR_AUXDIS, - .irqen = I8042_CTR_AUXINT, - .mux = -1, - .name = "AUX", - } -}; + +static struct i8042_port i8042_ports[I8042_NUM_PORTS]; static unsigned char i8042_initial_ctr; static unsigned char i8042_ctr; -static unsigned char i8042_mux_open; -static unsigned char i8042_mux_present; -static struct timer_list i8042_timer; +static bool i8042_mux_present; +static bool i8042_kbd_irq_registered; +static bool i8042_aux_irq_registered; +static unsigned char i8042_suppress_kbd_ack; static struct platform_device *i8042_platform_device; +static irqreturn_t i8042_interrupt(int irq, void *dev_id); +static bool (*i8042_platform_filter)(unsigned char data, unsigned char str, + struct serio *serio); -/* - * Shared IRQ's require a device pointer, but this driver doesn't support - * multiple devices - */ -#define i8042_request_irq_cookie (&i8042_timer) +void i8042_lock_chip(void) +{ + mutex_lock(&i8042_mutex); +} +EXPORT_SYMBOL(i8042_lock_chip); + +void i8042_unlock_chip(void) +{ + mutex_unlock(&i8042_mutex); +} +EXPORT_SYMBOL(i8042_unlock_chip); + +int i8042_install_filter(bool (*filter)(unsigned char data, unsigned char str, + struct serio *serio)) +{ + unsigned long flags; + int ret = 0; + + spin_lock_irqsave(&i8042_lock, flags); + + if (i8042_platform_filter) { + ret = -EBUSY; + goto out; + } + + i8042_platform_filter = filter; + +out: + spin_unlock_irqrestore(&i8042_lock, flags); + return ret; +} +EXPORT_SYMBOL(i8042_install_filter); + +int i8042_remove_filter(bool (*filter)(unsigned char data, unsigned char str, + struct serio *port)) +{ + unsigned long flags; + int ret = 0; + + spin_lock_irqsave(&i8042_lock, flags); + + if (i8042_platform_filter != filter) { + ret = -EINVAL; + goto out; + } + + i8042_platform_filter = NULL; -static irqreturn_t i8042_interrupt(int irq, void *dev_id, struct pt_regs *regs); +out: + spin_unlock_irqrestore(&i8042_lock, flags); + return ret; +} +EXPORT_SYMBOL(i8042_remove_filter); /* * The i8042_wait_read() and i8042_wait_write functions wait for the i8042 to @@ -137,6 +197,7 @@ static irqreturn_t i8042_interrupt(int irq, void *dev_id, struct pt_regs *regs); static int i8042_wait_read(void) { int i = 0; + while ((~i8042_read_status() & I8042_STR_OBF) && (i < I8042_CTL_TIMEOUT)) { udelay(50); i++; @@ -147,6 +208,7 @@ static int i8042_wait_read(void) static int i8042_wait_write(void) { int i = 0; + while ((i8042_read_status() & I8042_STR_IBF) && (i < I8042_CTL_TIMEOUT)) { udelay(50); i++; @@ -163,21 +225,26 @@ static int i8042_flush(void) { unsigned long flags; unsigned char data, str; - int i = 0; + int count = 0; + int retval = 0; spin_lock_irqsave(&i8042_lock, flags); - while (((str = i8042_read_status()) & I8042_STR_OBF) && (i < I8042_BUFFER_SIZE)) { - udelay(50); - data = i8042_read_data(); - i++; - dbg("%02x <- i8042 (flush, %s)", data, - str & I8042_STR_AUXDATA ? "aux" : "kbd"); + while ((str = i8042_read_status()) & I8042_STR_OBF) { + if (count++ < I8042_BUFFER_SIZE) { + udelay(50); + data = i8042_read_data(); + dbg("%02x <- i8042 (flush, %s)\n", + data, str & I8042_STR_AUXDATA ? "aux" : "kbd"); + } else { + retval = -EIO; + break; + } } spin_unlock_irqrestore(&i8042_lock, flags); - return i; + return retval; } /* @@ -188,50 +255,60 @@ static int i8042_flush(void) * encoded in bits 8-11 of the command number. */ -static int i8042_command(unsigned char *param, int command) +static int __i8042_command(unsigned char *param, int command) { - unsigned long flags; - int i, retval, auxerr = 0; + int i, error; if (i8042_noloop && command == I8042_CMD_AUX_LOOP) return -1; - spin_lock_irqsave(&i8042_lock, flags); - - if ((retval = i8042_wait_write())) - goto out; + error = i8042_wait_write(); + if (error) + return error; - dbg("%02x -> i8042 (command)", command & 0xff); + dbg("%02x -> i8042 (command)\n", command & 0xff); i8042_write_command(command & 0xff); for (i = 0; i < ((command >> 12) & 0xf); i++) { - if ((retval = i8042_wait_write())) - goto out; - dbg("%02x -> i8042 (parameter)", param[i]); + error = i8042_wait_write(); + if (error) + return error; + dbg("%02x -> i8042 (parameter)\n", param[i]); i8042_write_data(param[i]); } for (i = 0; i < ((command >> 8) & 0xf); i++) { - if ((retval = i8042_wait_read())) - goto out; + error = i8042_wait_read(); + if (error) { + dbg(" -- i8042 (timeout)\n"); + return error; + } if (command == I8042_CMD_AUX_LOOP && !(i8042_read_status() & I8042_STR_AUXDATA)) { - retval = auxerr = -1; - goto out; + dbg(" -- i8042 (auxerr)\n"); + return -1; } param[i] = i8042_read_data(); - dbg("%02x <- i8042 (return)", param[i]); + dbg("%02x <- i8042 (return)\n", param[i]); } - if (retval) - dbg(" -- i8042 (%s)", auxerr ? "auxerr" : "timeout"); + return 0; +} - out: +int i8042_command(unsigned char *param, int command) +{ + unsigned long flags; + int retval; + + spin_lock_irqsave(&i8042_lock, flags); + retval = __i8042_command(param, command); spin_unlock_irqrestore(&i8042_lock, flags); + return retval; } +EXPORT_SYMBOL(i8042_command); /* * i8042_kbd_write() sends a byte out through the keyboard interface. @@ -244,8 +321,8 @@ static int i8042_kbd_write(struct serio *port, unsigned char c) spin_lock_irqsave(&i8042_lock, flags); - if(!(retval = i8042_wait_write())) { - dbg("%02x -> i8042 (kbd-data)", c); + if (!(retval = i8042_wait_write())) { + dbg("%02x -> i8042 (kbd-data)\n", c); i8042_write_data(c); } @@ -261,119 +338,50 @@ static int i8042_kbd_write(struct serio *port, unsigned char c) static int i8042_aux_write(struct serio *serio, unsigned char c) { struct i8042_port *port = serio->port_data; - int retval; - -/* - * Send the byte out. - */ - - if (port->mux == -1) - retval = i8042_command(&c, I8042_CMD_AUX_SEND); - else - retval = i8042_command(&c, I8042_CMD_MUX_SEND + port->mux); - -/* - * Make sure the interrupt happens and the character is received even - * in the case the IRQ isn't wired, so that we can receive further - * characters later. - */ - i8042_interrupt(0, NULL, NULL); - return retval; -} - -/* - * i8042_activate_port() enables port on a chip. - */ - -static int i8042_activate_port(struct i8042_port *port) -{ - if (!port->serio) - return -1; - - i8042_flush(); - - /* - * Enable port again here because it is disabled if we are - * resuming (normally it is enabled already). - */ - i8042_ctr &= ~port->disable; - - i8042_ctr |= port->irqen; - - if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { - i8042_ctr &= ~port->irqen; - return -1; - } - - return 0; + return i8042_command(&c, port->mux == -1 ? + I8042_CMD_AUX_SEND : + I8042_CMD_MUX_SEND + port->mux); } /* - * i8042_open() is called when a port is open by the higher layer. - * It allocates the interrupt and calls i8042_enable_port. + * i8042_aux_close attempts to clear AUX or KBD port state by disabling + * and then re-enabling it. */ -static int i8042_open(struct serio *serio) +static void i8042_port_close(struct serio *serio) { - struct i8042_port *port = serio->port_data; - - if (port->mux != -1) - if (i8042_mux_open++) - return 0; - - if (request_irq(port->irq, i8042_interrupt, - SA_SHIRQ, "i8042", i8042_request_irq_cookie)) { - printk(KERN_ERR "i8042.c: Can't get irq %d for %s, unregistering the port.\n", port->irq, port->name); - goto irq_fail; - } - - if (i8042_activate_port(port)) { - printk(KERN_ERR "i8042.c: Can't activate %s, unregistering the port\n", port->name); - goto activate_fail; + int irq_bit; + int disable_bit; + const char *port_name; + + if (serio == i8042_ports[I8042_AUX_PORT_NO].serio) { + irq_bit = I8042_CTR_AUXINT; + disable_bit = I8042_CTR_AUXDIS; + port_name = "AUX"; + } else { + irq_bit = I8042_CTR_KBDINT; + disable_bit = I8042_CTR_KBDDIS; + port_name = "KBD"; } - i8042_interrupt(0, NULL, NULL); - - return 0; - -activate_fail: - free_irq(port->irq, i8042_request_irq_cookie); - -irq_fail: - serio_unregister_port_delayed(serio); - - return -1; -} - -/* - * i8042_close() frees the interrupt, so that it can possibly be used - * by another driver. We never know - if the user doesn't have a mouse, - * the BIOS could have used the AUX interrupt for PCI. - */ - -static void i8042_close(struct serio *serio) -{ - struct i8042_port *port = serio->port_data; - - if (port->mux != -1) - if (--i8042_mux_open) - return; + i8042_ctr &= ~irq_bit; + if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) + pr_warn("Can't write CTR while closing %s port\n", port_name); - i8042_ctr &= ~port->irqen; + udelay(50); - if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { - printk(KERN_WARNING "i8042.c: Can't write CTR while closing %s.\n", port->name); -/* - * We still want to continue and free IRQ so if more data keeps coming in - * kernel will just ignore the irq. - */ - } - - free_irq(port->irq, i8042_request_irq_cookie); + i8042_ctr &= ~disable_bit; + i8042_ctr |= irq_bit; + if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) + pr_err("Can't reactivate %s port\n", port_name); - i8042_flush(); + /* + * See if there is any data appeared while we were messing with + * port state. + */ + i8042_interrupt(0, NULL); } /* @@ -385,7 +393,7 @@ static int i8042_start(struct serio *serio) { struct i8042_port *port = serio->port_data; - port->exists = 1; + port->exists = true; mb(); return 0; } @@ -399,38 +407,72 @@ static void i8042_stop(struct serio *serio) { struct i8042_port *port = serio->port_data; - port->exists = 0; - synchronize_sched(); + port->exists = false; + + /* + * We synchronize with both AUX and KBD IRQs because there is + * a (very unlikely) chance that AUX IRQ is raised for KBD port + * and vice versa. + */ + synchronize_irq(I8042_AUX_IRQ); + synchronize_irq(I8042_KBD_IRQ); port->serio = NULL; } /* + * i8042_filter() filters out unwanted bytes from the input data stream. + * It is called from i8042_interrupt and thus is running with interrupts + * off and i8042_lock held. + */ +static bool i8042_filter(unsigned char data, unsigned char str, + struct serio *serio) +{ + if (unlikely(i8042_suppress_kbd_ack)) { + if ((~str & I8042_STR_AUXDATA) && + (data == 0xfa || data == 0xfe)) { + i8042_suppress_kbd_ack--; + dbg("Extra keyboard ACK - filtered out\n"); + return true; + } + } + + if (i8042_platform_filter && i8042_platform_filter(data, str, serio)) { + dbg("Filtered out by platform filter\n"); + return true; + } + + return false; +} + +/* * i8042_interrupt() is the most important function in this driver - * it handles the interrupts from the i8042, and sends incoming bytes * to the upper layers. */ -static irqreturn_t i8042_interrupt(int irq, void *dev_id, struct pt_regs *regs) +static irqreturn_t i8042_interrupt(int irq, void *dev_id) { struct i8042_port *port; + struct serio *serio; unsigned long flags; unsigned char str, data; unsigned int dfl; unsigned int port_no; - int ret; - - mod_timer(&i8042_timer, jiffies + I8042_POLL_PERIOD); + bool filtered; + int ret = 1; spin_lock_irqsave(&i8042_lock, flags); + str = i8042_read_status(); if (unlikely(~str & I8042_STR_OBF)) { spin_unlock_irqrestore(&i8042_lock, flags); - if (irq) dbg("Interrupt %d, without any data", irq); + if (irq) + dbg("Interrupt %d, without any data\n", irq); ret = 0; goto out; } + data = i8042_read_data(); - spin_unlock_irqrestore(&i8042_lock, flags); if (i8042_mux_present && (str & I8042_STR_AUXDATA)) { static unsigned long last_transmit; @@ -438,24 +480,29 @@ static irqreturn_t i8042_interrupt(int irq, void *dev_id, struct pt_regs *regs) dfl = 0; if (str & I8042_STR_MUXERR) { - dbg("MUX error, status is %02x, data is %02x", str, data); - switch (data) { - default: + dbg("MUX error, status is %02x, data is %02x\n", + str, data); /* * When MUXERR condition is signalled the data register can only contain * 0xfd, 0xfe or 0xff if implementation follows the spec. Unfortunately - * it is not always the case. Some KBC just get confused which port the - * data came from and signal error leaving the data intact. They _do not_ - * revert to legacy mode (actually I've never seen KBC reverting to legacy - * mode yet, when we see one we'll add proper handling). - * Anyway, we will assume that the data came from the same serio last byte + * it is not always the case. Some KBCs also report 0xfc when there is + * nothing connected to the port while others sometimes get confused which + * port the data came from and signal error leaving the data intact. They + * _do not_ revert to legacy mode (actually I've never seen KBC reverting + * to legacy mode yet, when we see one we'll add proper handling). + * Anyway, we process 0xfc, 0xfd, 0xfe and 0xff as timeouts, and for the + * rest assume that the data came from the same serio last byte * was transmitted (if transmission happened not too long ago). */ + + switch (data) { + default: if (time_before(jiffies, last_transmit + HZ/10)) { str = last_str; break; } /* fall through - report timeout */ + case 0xfc: case 0xfd: case 0xfe: dfl = SERIO_TIMEOUT; data = 0xfe; break; case 0xff: dfl = SERIO_PARITY; data = 0xfe; break; @@ -468,36 +515,97 @@ static irqreturn_t i8042_interrupt(int irq, void *dev_id, struct pt_regs *regs) } else { dfl = ((str & I8042_STR_PARITY) ? SERIO_PARITY : 0) | - ((str & I8042_STR_TIMEOUT) ? SERIO_TIMEOUT : 0); + ((str & I8042_STR_TIMEOUT && !i8042_notimeout) ? SERIO_TIMEOUT : 0); port_no = (str & I8042_STR_AUXDATA) ? I8042_AUX_PORT_NO : I8042_KBD_PORT_NO; } port = &i8042_ports[port_no]; + serio = port->exists ? port->serio : NULL; - dbg("%02x <- i8042 (interrupt, %s, %d%s%s)", - data, port->name, irq, + dbg("%02x <- i8042 (interrupt, %d, %d%s%s)\n", + data, port_no, irq, dfl & SERIO_PARITY ? ", bad parity" : "", dfl & SERIO_TIMEOUT ? ", timeout" : ""); - if (likely(port->exists)) - serio_interrupt(port->serio, data, dfl, regs); + filtered = i8042_filter(data, str, serio); - ret = 1; -out: + spin_unlock_irqrestore(&i8042_lock, flags); + + if (likely(port->exists && !filtered)) + serio_interrupt(serio, data, dfl); + + out: return IRQ_RETVAL(ret); } /* - * i8042_set_mux_mode checks whether the controller has an active - * multiplexor and puts the chip into Multiplexed (1) or Legacy (0) mode. + * i8042_enable_kbd_port enables keyboard port on chip */ -static int i8042_set_mux_mode(unsigned int mode, unsigned char *mux_version) +static int i8042_enable_kbd_port(void) { + i8042_ctr &= ~I8042_CTR_KBDDIS; + i8042_ctr |= I8042_CTR_KBDINT; + + if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { + i8042_ctr &= ~I8042_CTR_KBDINT; + i8042_ctr |= I8042_CTR_KBDDIS; + pr_err("Failed to enable KBD port\n"); + return -EIO; + } + return 0; +} + +/* + * i8042_enable_aux_port enables AUX (mouse) port on chip + */ + +static int i8042_enable_aux_port(void) +{ + i8042_ctr &= ~I8042_CTR_AUXDIS; + i8042_ctr |= I8042_CTR_AUXINT; + + if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { + i8042_ctr &= ~I8042_CTR_AUXINT; + i8042_ctr |= I8042_CTR_AUXDIS; + pr_err("Failed to enable AUX port\n"); + return -EIO; + } + + return 0; +} + +/* + * i8042_enable_mux_ports enables 4 individual AUX ports after + * the controller has been switched into Multiplexed mode + */ + +static int i8042_enable_mux_ports(void) +{ unsigned char param; + int i; + + for (i = 0; i < I8042_NUM_MUX_PORTS; i++) { + i8042_command(¶m, I8042_CMD_MUX_PFX + i); + i8042_command(¶m, I8042_CMD_AUX_ENABLE); + } + + return i8042_enable_aux_port(); +} + +/* + * i8042_set_mux_mode checks whether the controller has an + * active multiplexor and puts the chip into Multiplexed (true) + * or Legacy (false) mode. + */ + +static int i8042_set_mux_mode(bool multiplex, unsigned char *mux_version) +{ + + unsigned char param, val; /* * Get rid of bytes in the queue. */ @@ -506,18 +614,24 @@ static int i8042_set_mux_mode(unsigned int mode, unsigned char *mux_version) /* * Internal loopback test - send three bytes, they should come back from the - * mouse interface, the last should be version. Note that we negate mouseport - * command responses for the i8042_check_aux() routine. + * mouse interface, the last should be version. */ - param = 0xf0; - if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != 0xf0) + param = val = 0xf0; + if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != val) + return -1; + param = val = multiplex ? 0x56 : 0xf6; + if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != val) return -1; - param = mode ? 0x56 : 0xf6; - if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != (mode ? 0x56 : 0xf6)) + param = val = multiplex ? 0xa4 : 0xa5; + if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param == val) return -1; - param = mode ? 0xa4 : 0xa5; - if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param == (mode ? 0xa4 : 0xa5)) + +/* + * Workaround for interference with USB Legacy emulation + * that causes a v10.12 MUX to be found. + */ + if (param == 0xac) return -1; if (mux_version) @@ -526,70 +640,94 @@ static int i8042_set_mux_mode(unsigned int mode, unsigned char *mux_version) return 0; } - /* - * i8042_enable_mux_ports enables 4 individual AUX ports after - * the controller has been switched into Multiplexed mode + * i8042_check_mux() checks whether the controller supports the PS/2 Active + * Multiplexing specification by Synaptics, Phoenix, Insyde and + * LCS/Telegraphics. */ -static int i8042_enable_mux_ports(void) +static int __init i8042_check_mux(void) { - unsigned char param; - int i; + unsigned char mux_version; + + if (i8042_set_mux_mode(true, &mux_version)) + return -1; + + pr_info("Detected active multiplexing controller, rev %d.%d\n", + (mux_version >> 4) & 0xf, mux_version & 0xf); + /* * Disable all muxed ports by disabling AUX. */ - i8042_ctr |= I8042_CTR_AUXDIS; i8042_ctr &= ~I8042_CTR_AUXINT; if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { - printk(KERN_ERR "i8042.c: Failed to disable AUX port, can't use MUX.\n"); - return -1; + pr_err("Failed to disable AUX port, can't use MUX\n"); + return -EIO; } + i8042_mux_present = true; + + return 0; +} + /* - * Enable all muxed ports. + * The following is used to test AUX IRQ delivery. */ +static struct completion i8042_aux_irq_delivered __initdata; +static bool i8042_irq_being_tested __initdata; - for (i = 0; i < 4; i++) { - i8042_command(¶m, I8042_CMD_MUX_PFX + i); - i8042_command(¶m, I8042_CMD_AUX_ENABLE); +static irqreturn_t __init i8042_aux_test_irq(int irq, void *dev_id) +{ + unsigned long flags; + unsigned char str, data; + int ret = 0; + + spin_lock_irqsave(&i8042_lock, flags); + str = i8042_read_status(); + if (str & I8042_STR_OBF) { + data = i8042_read_data(); + dbg("%02x <- i8042 (aux_test_irq, %s)\n", + data, str & I8042_STR_AUXDATA ? "aux" : "kbd"); + if (i8042_irq_being_tested && + data == 0xa5 && (str & I8042_STR_AUXDATA)) + complete(&i8042_aux_irq_delivered); + ret = 1; } + spin_unlock_irqrestore(&i8042_lock, flags); - return 0; + return IRQ_RETVAL(ret); } - /* - * i8042_check_mux() checks whether the controller supports the PS/2 Active - * Multiplexing specification by Synaptics, Phoenix, Insyde and - * LCS/Telegraphics. + * i8042_toggle_aux - enables or disables AUX port on i8042 via command and + * verifies success by readinng CTR. Used when testing for presence of AUX + * port. */ - -static int __init i8042_check_mux(void) +static int __init i8042_toggle_aux(bool on) { - unsigned char mux_version; + unsigned char param; + int i; - if (i8042_set_mux_mode(1, &mux_version)) + if (i8042_command(¶m, + on ? I8042_CMD_AUX_ENABLE : I8042_CMD_AUX_DISABLE)) return -1; - /* Workaround for interference with USB Legacy emulation */ - /* that causes a v10.12 MUX to be found. */ - if (mux_version == 0xAC) - return -1; + /* some chips need some time to set the I8042_CTR_AUXDIS bit */ + for (i = 0; i < 100; i++) { + udelay(50); - printk(KERN_INFO "i8042.c: Detected active multiplexing controller, rev %d.%d.\n", - (mux_version >> 4) & 0xf, mux_version & 0xf); + if (i8042_command(¶m, I8042_CMD_CTL_RCTR)) + return -1; - if (i8042_enable_mux_ports()) - return -1; + if (!(param & I8042_CTR_AUXDIS) == on) + return 0; + } - i8042_mux_present = 1; - return 0; + return -1; } - /* * i8042_check_aux() applies as much paranoia as it can at detecting * the presence of an AUX interface. @@ -597,18 +735,11 @@ static int __init i8042_check_mux(void) static int __init i8042_check_aux(void) { + int retval = -1; + bool irq_registered = false; + bool aux_loop_broken = false; + unsigned long flags; unsigned char param; - static int i8042_check_aux_cookie; - -/* - * Check if AUX irq is available. If it isn't, then there is no point - * in trying to detect AUX presence. - */ - - if (request_irq(i8042_ports[I8042_AUX_PORT_NO].irq, i8042_interrupt, - SA_SHIRQ, "i8042", &i8042_check_aux_cookie)) - return -1; - free_irq(i8042_ports[I8042_AUX_PORT_NO].irq, &i8042_check_aux_cookie); /* * Get rid of bytes in the queue. @@ -623,7 +754,8 @@ static int __init i8042_check_aux(void) */ param = 0x5a; - if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != 0x5a) { + retval = i8042_command(¶m, I8042_CMD_AUX_LOOP); + if (retval || param != 0x5a) { /* * External connection test - filters out AT-soldered PS/2 i8042's @@ -633,94 +765,142 @@ static int __init i8042_check_aux(void) * AUX ports, we test for this only when the LOOP command failed. */ - if (i8042_command(¶m, I8042_CMD_AUX_TEST) - || (param && param != 0xfa && param != 0xff)) - return -1; + if (i8042_command(¶m, I8042_CMD_AUX_TEST) || + (param && param != 0xfa && param != 0xff)) + return -1; + +/* + * If AUX_LOOP completed without error but returned unexpected data + * mark it as broken + */ + if (!retval) + aux_loop_broken = true; } /* * Bit assignment test - filters out PS/2 i8042's in AT mode */ - if (i8042_command(¶m, I8042_CMD_AUX_DISABLE)) - return -1; - if (i8042_command(¶m, I8042_CMD_CTL_RCTR) || (~param & I8042_CTR_AUXDIS)) { - printk(KERN_WARNING "Failed to disable AUX port, but continuing anyway... Is this a SiS?\n"); - printk(KERN_WARNING "If AUX port is really absent please use the 'i8042.noaux' option.\n"); + if (i8042_toggle_aux(false)) { + pr_warn("Failed to disable AUX port, but continuing anyway... Is this a SiS?\n"); + pr_warn("If AUX port is really absent please use the 'i8042.noaux' option\n"); } - if (i8042_command(¶m, I8042_CMD_AUX_ENABLE)) - return -1; - if (i8042_command(¶m, I8042_CMD_CTL_RCTR) || (param & I8042_CTR_AUXDIS)) + if (i8042_toggle_aux(true)) return -1; /* - * Disable the interface. + * Test AUX IRQ delivery to make sure BIOS did not grab the IRQ and + * used it for a PCI card or somethig else. */ - i8042_ctr |= I8042_CTR_AUXDIS; - i8042_ctr &= ~I8042_CTR_AUXINT; + if (i8042_noloop || i8042_bypass_aux_irq_test || aux_loop_broken) { +/* + * Without LOOP command we can't test AUX IRQ delivery. Assume the port + * is working and hope we are right. + */ + retval = 0; + goto out; + } - if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) - return -1; + if (request_irq(I8042_AUX_IRQ, i8042_aux_test_irq, IRQF_SHARED, + "i8042", i8042_platform_device)) + goto out; - return 0; -} + irq_registered = true; + + if (i8042_enable_aux_port()) + goto out; + + spin_lock_irqsave(&i8042_lock, flags); + + init_completion(&i8042_aux_irq_delivered); + i8042_irq_being_tested = true; + + param = 0xa5; + retval = __i8042_command(¶m, I8042_CMD_AUX_LOOP & 0xf0ff); + spin_unlock_irqrestore(&i8042_lock, flags); + + if (retval) + goto out; + if (wait_for_completion_timeout(&i8042_aux_irq_delivered, + msecs_to_jiffies(250)) == 0) { /* - * i8042_port_register() marks the device as existing, - * registers it, and reports to the user. + * AUX IRQ was never delivered so we need to flush the controller to + * get rid of the byte we put there; otherwise keyboard may not work. */ + dbg(" -- i8042 (aux irq test timeout)\n"); + i8042_flush(); + retval = -1; + } -static int __init i8042_port_register(struct i8042_port *port) -{ - i8042_ctr &= ~port->disable; + out: - if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { - printk(KERN_WARNING "i8042.c: Can't write CTR while registering.\n"); - kfree(port->serio); - port->serio = NULL; - i8042_ctr |= port->disable; - return -1; - } +/* + * Disable the interface. + */ + + i8042_ctr |= I8042_CTR_AUXDIS; + i8042_ctr &= ~I8042_CTR_AUXINT; - printk(KERN_INFO "serio: i8042 %s port at %#lx,%#lx irq %d\n", - port->name, - (unsigned long) I8042_DATA_REG, - (unsigned long) I8042_COMMAND_REG, - port->irq); + if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) + retval = -1; - serio_register_port(port->serio); + if (irq_registered) + free_irq(I8042_AUX_IRQ, i8042_platform_device); - return 0; + return retval; } - -static void i8042_timer_func(unsigned long data) +static int i8042_controller_check(void) { - i8042_interrupt(0, NULL, NULL); + if (i8042_flush()) { + pr_err("No controller found\n"); + return -ENODEV; + } + + return 0; } -static int i8042_ctl_test(void) +static int i8042_controller_selftest(void) { unsigned char param; + int i = 0; - if (!i8042_reset) - return 0; + /* + * We try this 5 times; on some really fragile systems this does not + * take the first time... + */ + do { - if (i8042_command(¶m, I8042_CMD_CTL_TEST)) { - printk(KERN_ERR "i8042.c: i8042 controller self test timeout.\n"); - return -1; - } + if (i8042_command(¶m, I8042_CMD_CTL_TEST)) { + pr_err("i8042 controller selftest timeout\n"); + return -ENODEV; + } - if (param != I8042_RET_CTL_TEST) { - printk(KERN_ERR "i8042.c: i8042 controller selftest failed. (%#x != %#x)\n", - param, I8042_RET_CTL_TEST); - return -1; - } + if (param == I8042_RET_CTL_TEST) + return 0; + + dbg("i8042 controller selftest: %#x != %#x\n", + param, I8042_RET_CTL_TEST); + msleep(50); + } while (i++ < 5); +#ifdef CONFIG_X86 + /* + * On x86, we don't fail entire i8042 initialization if controller + * reset fails in hopes that keyboard port will still be functional + * and user will still get a working keyboard. This is especially + * important on netbooks. On other arches we trust hardware more. + */ + pr_info("giving up on controller selftest, continuing anyway...\n"); return 0; +#else + pr_err("i8042 controller selftest failed\n"); + return -EIO; +#endif } /* @@ -732,30 +912,30 @@ static int i8042_ctl_test(void) static int i8042_controller_init(void) { unsigned long flags; + int n = 0; + unsigned char ctr[2]; /* - * Test the i8042. We need to know if it thinks it's working correctly - * before doing anything else. + * Save the CTR for restore on unload / reboot. */ - if (i8042_flush() == I8042_BUFFER_SIZE) { - printk(KERN_ERR "i8042.c: No controller found.\n"); - return -1; - } + do { + if (n >= 10) { + pr_err("Unable to get stable CTR read\n"); + return -EIO; + } - if (i8042_ctl_test()) - return -1; + if (n != 0) + udelay(50); -/* - * Save the CTR for restoral on unload / reboot. - */ + if (i8042_command(&ctr[n++ % 2], I8042_CMD_CTL_RCTR)) { + pr_err("Can't read CTR while initializing i8042\n"); + return -EIO; + } - if (i8042_command(&i8042_ctr, I8042_CMD_CTL_RCTR)) { - printk(KERN_ERR "i8042.c: Can't read CTR while initializing i8042.\n"); - return -1; - } + } while (n < 2 || ctr[0] != ctr[1]); - i8042_initial_ctr = i8042_ctr; + i8042_initial_ctr = i8042_ctr = ctr[0]; /* * Disable the keyboard interface and interrupt. @@ -772,8 +952,8 @@ static int i8042_controller_init(void) if (~i8042_read_status() & I8042_STR_KEYLOCK) { if (i8042_unlock) i8042_ctr |= I8042_CTR_IGNKEYLOCK; - else - printk(KERN_WARNING "i8042.c: Warning: Keylock active.\n"); + else + pr_warn("Warning: Keylock active\n"); } spin_unlock_irqrestore(&i8042_lock, flags); @@ -783,7 +963,7 @@ static int i8042_controller_init(void) */ if (~i8042_ctr & I8042_CTR_XLATE) - i8042_direct = 1; + i8042_direct = true; /* * Set nontranslated mode for the kbd interface if requested by an option. @@ -800,70 +980,65 @@ static int i8042_controller_init(void) */ if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { - printk(KERN_ERR "i8042.c: Can't write CTR while initializing i8042.\n"); - return -1; + pr_err("Can't write CTR while initializing i8042\n"); + return -EIO; } +/* + * Flush whatever accumulated while we were disabling keyboard port. + */ + + i8042_flush(); + return 0; } /* - * Reset the controller. + * Reset the controller and reset CRT to the original value set by BIOS. */ -static void i8042_controller_reset(void) + +static void i8042_controller_reset(bool force_reset) { + i8042_flush(); + /* - * Reset the controller if requested. + * Disable both KBD and AUX interfaces so they don't get in the way */ - i8042_ctl_test(); + i8042_ctr |= I8042_CTR_KBDDIS | I8042_CTR_AUXDIS; + i8042_ctr &= ~(I8042_CTR_KBDINT | I8042_CTR_AUXINT); + + if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) + pr_warn("Can't write CTR while resetting\n"); /* * Disable MUX mode if present. */ if (i8042_mux_present) - i8042_set_mux_mode(0, NULL); + i8042_set_mux_mode(false, NULL); /* - * Restore the original control register setting. + * Reset the controller if requested. */ - i8042_ctr = i8042_initial_ctr; - - if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) - printk(KERN_WARNING "i8042.c: Can't restore CTR.\n"); -} - + if (i8042_reset || force_reset) + i8042_controller_selftest(); /* - * Here we try to reset everything back to a state in which the BIOS will be - * able to talk to the hardware when rebooting. - */ - -static void i8042_controller_cleanup(void) -{ - int i; - - i8042_flush(); - -/* - * Reset anything that is connected to the ports. + * Restore the original control register setting. */ - for (i = 0; i < I8042_NUM_PORTS; i++) - if (i8042_ports[i].exists) - serio_cleanup(i8042_ports[i].serio); - - i8042_controller_reset(); + if (i8042_command(&i8042_initial_ctr, I8042_CMD_CTL_WCTR)) + pr_warn("Can't restore CTR\n"); } /* - * i8042_panic_blink() will flash the keyboard LEDs and is called when - * kernel panics. Flashing LEDs is useful for users running X who may - * not see the console and will help distingushing panics from "real" + * i8042_panic_blink() will turn the keyboard LEDs on or off and is called + * when kernel panics. Flashing LEDs is useful for users running X who may + * not see the console and will help distinguishing panics from "real" * lockups. * * Note that DELAY has a limit of 10ms so we will not get stuck here @@ -872,251 +1047,463 @@ static void i8042_controller_cleanup(void) #define DELAY do { mdelay(1); if (++delay > 10) return delay; } while(0) -static long i8042_panic_blink(long count) +static long i8042_panic_blink(int state) { long delay = 0; - static long last_blink; - static char led; - - /* - * We expect frequency to be about 1/2s. KDB uses about 1s. - * Make sure they are different. - */ - if (!i8042_blink_frequency) - return 0; - if (count - last_blink < i8042_blink_frequency) - return 0; + char led; - led ^= 0x01 | 0x04; + led = (state) ? 0x01 | 0x04 : 0; while (i8042_read_status() & I8042_STR_IBF) DELAY; + dbg("%02x -> i8042 (panic blink)\n", 0xed); + i8042_suppress_kbd_ack = 2; i8042_write_data(0xed); /* set leds */ DELAY; while (i8042_read_status() & I8042_STR_IBF) DELAY; DELAY; + dbg("%02x -> i8042 (panic blink)\n", led); i8042_write_data(led); DELAY; - last_blink = count; return delay; } #undef DELAY -/* - * Here we try to restore the original BIOS settings - */ - -static int i8042_suspend(struct device *dev, pm_message_t state, u32 level) +#ifdef CONFIG_X86 +static void i8042_dritek_enable(void) { - if (level == SUSPEND_DISABLE) { - del_timer_sync(&i8042_timer); - i8042_controller_reset(); - } + unsigned char param = 0x90; + int error; - return 0; + error = i8042_command(¶m, 0x1059); + if (error) + pr_warn("Failed to enable DRITEK extension: %d\n", error); } +#endif +#ifdef CONFIG_PM /* - * Here we try to reset everything back to a state in which suspended + * Here we try to reset everything back to a state we had + * before suspending. */ -static int i8042_resume(struct device *dev, u32 level) +static int i8042_controller_resume(bool force_reset) { - int i; + int error; - if (level != RESUME_ENABLE) - return 0; + error = i8042_controller_check(); + if (error) + return error; - if (i8042_ctl_test()) - return -1; + if (i8042_reset || force_reset) { + error = i8042_controller_selftest(); + if (error) + return error; + } + +/* + * Restore original CTR value and disable all ports + */ + i8042_ctr = i8042_initial_ctr; + if (i8042_direct) + i8042_ctr &= ~I8042_CTR_XLATE; + i8042_ctr |= I8042_CTR_AUXDIS | I8042_CTR_KBDDIS; + i8042_ctr &= ~(I8042_CTR_AUXINT | I8042_CTR_KBDINT); if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { - printk(KERN_ERR "i8042: Can't write CTR\n"); - return -1; + pr_warn("Can't write CTR to resume, retrying...\n"); + msleep(50); + if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { + pr_err("CTR write retry failed\n"); + return -EIO; + } } - if (i8042_mux_present) - if (i8042_set_mux_mode(1, NULL) || i8042_enable_mux_ports()) - printk(KERN_WARNING "i8042: failed to resume active multiplexor, mouse won't work.\n"); -/* - * Activate all ports. - */ +#ifdef CONFIG_X86 + if (i8042_dritek) + i8042_dritek_enable(); +#endif - for (i = 0; i < I8042_NUM_PORTS; i++) - i8042_activate_port(&i8042_ports[i]); + if (i8042_mux_present) { + if (i8042_set_mux_mode(true, NULL) || i8042_enable_mux_ports()) + pr_warn("failed to resume active multiplexor, mouse won't work\n"); + } else if (i8042_ports[I8042_AUX_PORT_NO].serio) + i8042_enable_aux_port(); + + if (i8042_ports[I8042_KBD_PORT_NO].serio) + i8042_enable_kbd_port(); + + i8042_interrupt(0, NULL); + + return 0; +} /* - * Restart timer (for polling "stuck" data) + * Here we try to restore the original BIOS settings to avoid + * upsetting it. */ - mod_timer(&i8042_timer, jiffies + I8042_POLL_PERIOD); - panic_blink = i8042_panic_blink; +static int i8042_pm_suspend(struct device *dev) +{ + i8042_controller_reset(true); + + return 0; +} + +static int i8042_pm_resume(struct device *dev) +{ + /* + * On resume from S2R we always try to reset the controller + * to bring it in a sane state. (In case of S2D we expect + * BIOS to reset the controller for us.) + */ + return i8042_controller_resume(true); +} + +static int i8042_pm_thaw(struct device *dev) +{ + i8042_interrupt(0, NULL); return 0; +} + +static int i8042_pm_reset(struct device *dev) +{ + i8042_controller_reset(false); + + return 0; +} +static int i8042_pm_restore(struct device *dev) +{ + return i8042_controller_resume(false); } +static const struct dev_pm_ops i8042_pm_ops = { + .suspend = i8042_pm_suspend, + .resume = i8042_pm_resume, + .thaw = i8042_pm_thaw, + .poweroff = i8042_pm_reset, + .restore = i8042_pm_restore, +}; + +#endif /* CONFIG_PM */ + /* * We need to reset the 8042 back to original mode on system shutdown, * because otherwise BIOSes will be confused. */ -static void i8042_shutdown(struct device *dev) +static void i8042_shutdown(struct platform_device *dev) { - i8042_controller_cleanup(); + i8042_controller_reset(false); } -static struct device_driver i8042_driver = { - .name = "i8042", - .bus = &platform_bus_type, - .suspend = i8042_suspend, - .resume = i8042_resume, - .shutdown = i8042_shutdown, -}; - -static void __init i8042_create_kbd_port(void) +static int __init i8042_create_kbd_port(void) { struct serio *serio; struct i8042_port *port = &i8042_ports[I8042_KBD_PORT_NO]; - serio = kmalloc(sizeof(struct serio), GFP_KERNEL); - if (serio) { - memset(serio, 0, sizeof(struct serio)); - serio->id.type = i8042_direct ? SERIO_8042 : SERIO_8042_XL; - serio->write = i8042_dumbkbd ? NULL : i8042_kbd_write; - serio->open = i8042_open; - serio->close = i8042_close; - serio->start = i8042_start; - serio->stop = i8042_stop; - serio->port_data = port; - serio->dev.parent = &i8042_platform_device->dev; - strlcpy(serio->name, "i8042 Kbd Port", sizeof(serio->name)); - strlcpy(serio->phys, I8042_KBD_PHYS_DESC, sizeof(serio->phys)); - - port->serio = serio; - i8042_port_register(port); - } + serio = kzalloc(sizeof(struct serio), GFP_KERNEL); + if (!serio) + return -ENOMEM; + + serio->id.type = i8042_direct ? SERIO_8042 : SERIO_8042_XL; + serio->write = i8042_dumbkbd ? NULL : i8042_kbd_write; + serio->start = i8042_start; + serio->stop = i8042_stop; + serio->close = i8042_port_close; + serio->port_data = port; + serio->dev.parent = &i8042_platform_device->dev; + strlcpy(serio->name, "i8042 KBD port", sizeof(serio->name)); + strlcpy(serio->phys, I8042_KBD_PHYS_DESC, sizeof(serio->phys)); + strlcpy(serio->firmware_id, i8042_kbd_firmware_id, + sizeof(serio->firmware_id)); + + port->serio = serio; + port->irq = I8042_KBD_IRQ; + + return 0; } -static void __init i8042_create_aux_port(void) +static int __init i8042_create_aux_port(int idx) { struct serio *serio; - struct i8042_port *port = &i8042_ports[I8042_AUX_PORT_NO]; - - serio = kmalloc(sizeof(struct serio), GFP_KERNEL); - if (serio) { - memset(serio, 0, sizeof(struct serio)); - serio->id.type = SERIO_8042; - serio->write = i8042_aux_write; - serio->open = i8042_open; - serio->close = i8042_close; - serio->start = i8042_start; - serio->stop = i8042_stop; - serio->port_data = port; - serio->dev.parent = &i8042_platform_device->dev; - strlcpy(serio->name, "i8042 Aux Port", sizeof(serio->name)); + int port_no = idx < 0 ? I8042_AUX_PORT_NO : I8042_MUX_PORT_NO + idx; + struct i8042_port *port = &i8042_ports[port_no]; + + serio = kzalloc(sizeof(struct serio), GFP_KERNEL); + if (!serio) + return -ENOMEM; + + serio->id.type = SERIO_8042; + serio->write = i8042_aux_write; + serio->start = i8042_start; + serio->stop = i8042_stop; + serio->port_data = port; + serio->dev.parent = &i8042_platform_device->dev; + if (idx < 0) { + strlcpy(serio->name, "i8042 AUX port", sizeof(serio->name)); strlcpy(serio->phys, I8042_AUX_PHYS_DESC, sizeof(serio->phys)); + strlcpy(serio->firmware_id, i8042_aux_firmware_id, + sizeof(serio->firmware_id)); + serio->close = i8042_port_close; + } else { + snprintf(serio->name, sizeof(serio->name), "i8042 AUX%d port", idx); + snprintf(serio->phys, sizeof(serio->phys), I8042_MUX_PHYS_DESC, idx + 1); + } + + port->serio = serio; + port->mux = idx; + port->irq = I8042_AUX_IRQ; + + return 0; +} + +static void __init i8042_free_kbd_port(void) +{ + kfree(i8042_ports[I8042_KBD_PORT_NO].serio); + i8042_ports[I8042_KBD_PORT_NO].serio = NULL; +} + +static void __init i8042_free_aux_ports(void) +{ + int i; - port->serio = serio; - i8042_port_register(port); + for (i = I8042_AUX_PORT_NO; i < I8042_NUM_PORTS; i++) { + kfree(i8042_ports[i].serio); + i8042_ports[i].serio = NULL; } } -static void __init i8042_create_mux_port(int index) +static void __init i8042_register_ports(void) { - struct serio *serio; - struct i8042_port *port = &i8042_ports[I8042_MUX_PORT_NO + index]; - - serio = kmalloc(sizeof(struct serio), GFP_KERNEL); - if (serio) { - memset(serio, 0, sizeof(struct serio)); - serio->id.type = SERIO_8042; - serio->write = i8042_aux_write; - serio->open = i8042_open; - serio->close = i8042_close; - serio->start = i8042_start; - serio->stop = i8042_stop; - serio->port_data = port; - serio->dev.parent = &i8042_platform_device->dev; - snprintf(serio->name, sizeof(serio->name), "i8042 Aux-%d Port", index); - snprintf(serio->phys, sizeof(serio->phys), I8042_MUX_PHYS_DESC, index + 1); - - *port = i8042_ports[I8042_AUX_PORT_NO]; - port->exists = 0; - snprintf(port->name, sizeof(port->name), "AUX%d", index); - port->mux = index; - port->serio = serio; - i8042_port_register(port); + int i; + + for (i = 0; i < I8042_NUM_PORTS; i++) { + if (i8042_ports[i].serio) { + printk(KERN_INFO "serio: %s at %#lx,%#lx irq %d\n", + i8042_ports[i].serio->name, + (unsigned long) I8042_DATA_REG, + (unsigned long) I8042_COMMAND_REG, + i8042_ports[i].irq); + serio_register_port(i8042_ports[i].serio); + } } } -static int __init i8042_init(void) +static void i8042_unregister_ports(void) { int i; - int err; - dbg_init(); + for (i = 0; i < I8042_NUM_PORTS; i++) { + if (i8042_ports[i].serio) { + serio_unregister_port(i8042_ports[i].serio); + i8042_ports[i].serio = NULL; + } + } +} + +/* + * Checks whether port belongs to i8042 controller. + */ +bool i8042_check_port_owner(const struct serio *port) +{ + int i; + + for (i = 0; i < I8042_NUM_PORTS; i++) + if (i8042_ports[i].serio == port) + return true; + + return false; +} +EXPORT_SYMBOL(i8042_check_port_owner); - init_timer(&i8042_timer); - i8042_timer.function = i8042_timer_func; +static void i8042_free_irqs(void) +{ + if (i8042_aux_irq_registered) + free_irq(I8042_AUX_IRQ, i8042_platform_device); + if (i8042_kbd_irq_registered) + free_irq(I8042_KBD_IRQ, i8042_platform_device); - if (i8042_platform_init()) - return -EBUSY; + i8042_aux_irq_registered = i8042_kbd_irq_registered = false; +} - i8042_ports[I8042_AUX_PORT_NO].irq = I8042_AUX_IRQ; - i8042_ports[I8042_KBD_PORT_NO].irq = I8042_KBD_IRQ; +static int __init i8042_setup_aux(void) +{ + int (*aux_enable)(void); + int error; + int i; - if (i8042_controller_init()) { - i8042_platform_exit(); + if (i8042_check_aux()) return -ENODEV; + + if (i8042_nomux || i8042_check_mux()) { + error = i8042_create_aux_port(-1); + if (error) + goto err_free_ports; + aux_enable = i8042_enable_aux_port; + } else { + for (i = 0; i < I8042_NUM_MUX_PORTS; i++) { + error = i8042_create_aux_port(i); + if (error) + goto err_free_ports; + } + aux_enable = i8042_enable_mux_ports; } - err = driver_register(&i8042_driver); - if (err) { - i8042_platform_exit(); - return err; + error = request_irq(I8042_AUX_IRQ, i8042_interrupt, IRQF_SHARED, + "i8042", i8042_platform_device); + if (error) + goto err_free_ports; + + if (aux_enable()) + goto err_free_irq; + + i8042_aux_irq_registered = true; + return 0; + + err_free_irq: + free_irq(I8042_AUX_IRQ, i8042_platform_device); + err_free_ports: + i8042_free_aux_ports(); + return error; +} + +static int __init i8042_setup_kbd(void) +{ + int error; + + error = i8042_create_kbd_port(); + if (error) + return error; + + error = request_irq(I8042_KBD_IRQ, i8042_interrupt, IRQF_SHARED, + "i8042", i8042_platform_device); + if (error) + goto err_free_port; + + error = i8042_enable_kbd_port(); + if (error) + goto err_free_irq; + + i8042_kbd_irq_registered = true; + return 0; + + err_free_irq: + free_irq(I8042_KBD_IRQ, i8042_platform_device); + err_free_port: + i8042_free_kbd_port(); + return error; +} + +static int __init i8042_probe(struct platform_device *dev) +{ + int error; + + i8042_platform_device = dev; + + if (i8042_reset) { + error = i8042_controller_selftest(); + if (error) + return error; } - i8042_platform_device = platform_device_register_simple("i8042", -1, NULL, 0); - if (IS_ERR(i8042_platform_device)) { - driver_unregister(&i8042_driver); - i8042_platform_exit(); - return PTR_ERR(i8042_platform_device); + error = i8042_controller_init(); + if (error) + return error; + +#ifdef CONFIG_X86 + if (i8042_dritek) + i8042_dritek_enable(); +#endif + + if (!i8042_noaux) { + error = i8042_setup_aux(); + if (error && error != -ENODEV && error != -EBUSY) + goto out_fail; } - if (!i8042_noaux && !i8042_check_aux()) { - if (!i8042_nomux && !i8042_check_mux()) - for (i = 0; i < I8042_NUM_MUX_PORTS; i++) - i8042_create_mux_port(i); - else - i8042_create_aux_port(); + if (!i8042_nokbd) { + error = i8042_setup_kbd(); + if (error) + goto out_fail; } +/* + * Ok, everything is ready, let's register all serio ports + */ + i8042_register_ports(); + + return 0; + + out_fail: + i8042_free_aux_ports(); /* in case KBD failed but AUX not */ + i8042_free_irqs(); + i8042_controller_reset(false); + i8042_platform_device = NULL; - i8042_create_kbd_port(); + return error; +} - mod_timer(&i8042_timer, jiffies + I8042_POLL_PERIOD); +static int i8042_remove(struct platform_device *dev) +{ + i8042_unregister_ports(); + i8042_free_irqs(); + i8042_controller_reset(false); + i8042_platform_device = NULL; return 0; } -static void __exit i8042_exit(void) +static struct platform_driver i8042_driver = { + .driver = { + .name = "i8042", + .owner = THIS_MODULE, +#ifdef CONFIG_PM + .pm = &i8042_pm_ops, +#endif + }, + .remove = i8042_remove, + .shutdown = i8042_shutdown, +}; + +static int __init i8042_init(void) { - int i; + struct platform_device *pdev; + int err; - i8042_controller_cleanup(); + dbg_init(); - for (i = 0; i < I8042_NUM_PORTS; i++) - if (i8042_ports[i].exists) - serio_unregister_port(i8042_ports[i].serio); + err = i8042_platform_init(); + if (err) + return err; - del_timer_sync(&i8042_timer); + err = i8042_controller_check(); + if (err) + goto err_platform_exit; - platform_device_unregister(i8042_platform_device); - driver_unregister(&i8042_driver); + pdev = platform_create_bundle(&i8042_driver, i8042_probe, NULL, 0, NULL, 0); + if (IS_ERR(pdev)) { + err = PTR_ERR(pdev); + goto err_platform_exit; + } + + panic_blink = i8042_panic_blink; + return 0; + + err_platform_exit: + i8042_platform_exit(); + return err; +} + +static void __exit i8042_exit(void) +{ + platform_device_unregister(i8042_platform_device); + platform_driver_unregister(&i8042_driver); i8042_platform_exit(); panic_blink = NULL; |