diff options
Diffstat (limited to 'drivers/gpu/drm/i915/i915_irq.c')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_irq.c | 38 |
1 files changed, 0 insertions, 38 deletions
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index f5a74b70f5e..72e26e2be30 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -1084,43 +1084,6 @@ static void notify_ring(struct drm_device *dev, i915_queue_hangcheck(dev); } -void gen6_set_pm_mask(struct drm_i915_private *dev_priv, - u32 pm_iir, int new_delay) -{ - if (pm_iir & GEN6_PM_RP_UP_THRESHOLD) { - if (new_delay >= dev_priv->rps.max_freq_softlimit) { - /* Mask UP THRESHOLD Interrupts */ - I915_WRITE(GEN6_PMINTRMSK, - I915_READ(GEN6_PMINTRMSK) | - GEN6_PM_RP_UP_THRESHOLD); - dev_priv->rps.rp_up_masked = true; - } - if (dev_priv->rps.rp_down_masked) { - /* UnMask DOWN THRESHOLD Interrupts */ - I915_WRITE(GEN6_PMINTRMSK, - I915_READ(GEN6_PMINTRMSK) & - ~GEN6_PM_RP_DOWN_THRESHOLD); - dev_priv->rps.rp_down_masked = false; - } - } else if (pm_iir & GEN6_PM_RP_DOWN_THRESHOLD) { - if (new_delay <= dev_priv->rps.min_freq_softlimit) { - /* Mask DOWN THRESHOLD Interrupts */ - I915_WRITE(GEN6_PMINTRMSK, - I915_READ(GEN6_PMINTRMSK) | - GEN6_PM_RP_DOWN_THRESHOLD); - dev_priv->rps.rp_down_masked = true; - } - - if (dev_priv->rps.rp_up_masked) { - /* UnMask UP THRESHOLD Interrupts */ - I915_WRITE(GEN6_PMINTRMSK, - I915_READ(GEN6_PMINTRMSK) & - ~GEN6_PM_RP_UP_THRESHOLD); - dev_priv->rps.rp_up_masked = false; - } - } -} - static void gen6_pm_rps_work(struct work_struct *work) { drm_i915_private_t *dev_priv = container_of(work, drm_i915_private_t, @@ -1180,7 +1143,6 @@ static void gen6_pm_rps_work(struct work_struct *work) dev_priv->rps.min_freq_softlimit, dev_priv->rps.max_freq_softlimit); - gen6_set_pm_mask(dev_priv, pm_iir, new_delay); dev_priv->rps.last_adj = new_delay - dev_priv->rps.cur_freq; if (IS_VALLEYVIEW(dev_priv->dev)) |