diff options
Diffstat (limited to 'arch/xtensa/lib')
| -rw-r--r-- | arch/xtensa/lib/Makefile | 2 | ||||
| -rw-r--r-- | arch/xtensa/lib/checksum.S | 18 | ||||
| -rw-r--r-- | arch/xtensa/lib/memcopy.S | 317 | ||||
| -rw-r--r-- | arch/xtensa/lib/memset.S | 2 | ||||
| -rw-r--r-- | arch/xtensa/lib/pci-auto.c | 11 | ||||
| -rw-r--r-- | arch/xtensa/lib/strcasecmp.c | 32 | ||||
| -rw-r--r-- | arch/xtensa/lib/strncpy_user.S | 39 | ||||
| -rw-r--r-- | arch/xtensa/lib/strnlen_user.S | 36 | ||||
| -rw-r--r-- | arch/xtensa/lib/usercopy.S | 7 |
9 files changed, 345 insertions, 119 deletions
diff --git a/arch/xtensa/lib/Makefile b/arch/xtensa/lib/Makefile index ed935b58e8a..6c4fdd86acd 100644 --- a/arch/xtensa/lib/Makefile +++ b/arch/xtensa/lib/Makefile @@ -2,6 +2,6 @@ # Makefile for Xtensa-specific library files. # -lib-y += memcopy.o memset.o checksum.o strcasecmp.o \ +lib-y += memcopy.o memset.o checksum.o \ usercopy.o strncpy_user.o strnlen_user.o lib-$(CONFIG_PCI) += pci-auto.o diff --git a/arch/xtensa/lib/checksum.S b/arch/xtensa/lib/checksum.S index e2d64dfd530..4eb573d2720 100644 --- a/arch/xtensa/lib/checksum.S +++ b/arch/xtensa/lib/checksum.S @@ -16,8 +16,7 @@ #include <asm/errno.h> #include <linux/linkage.h> -#define _ASMLANGUAGE -#include <xtensa/config/core.h> +#include <variant/core.h> /* * computes a partial checksum, e.g. for TCP/UDP fragments @@ -42,10 +41,11 @@ .text ENTRY(csum_partial) - /* - * Experiments with Ethernet and SLIP connections show that buf - * is aligned on either a 2-byte or 4-byte boundary. - */ + + /* + * Experiments with Ethernet and SLIP connections show that buf + * is aligned on either a 2-byte or 4-byte boundary. + */ entry sp, 32 extui a5, a2, 0, 2 bnez a5, 8f /* branch if 2-byte aligned */ @@ -171,7 +171,7 @@ ENTRY(csum_partial) 3: j 5b /* branch to handle the remaining byte */ - +ENDPROC(csum_partial) /* * Copy from ds while checksumming, otherwise like csum_partial @@ -212,6 +212,7 @@ unsigned int csum_partial_copy_generic (const char *src, char *dst, int len, */ ENTRY(csum_partial_copy_generic) + entry sp, 32 mov a12, a3 mov a11, a4 @@ -368,6 +369,8 @@ DST( s8i a8, a3, 1 ) 6: j 4b /* process the possible trailing odd byte */ +ENDPROC(csum_partial_copy_generic) + # Exception handler: .section .fixup, "ax" @@ -407,4 +410,3 @@ DST( s8i a8, a3, 1 ) retw .previous - diff --git a/arch/xtensa/lib/memcopy.S b/arch/xtensa/lib/memcopy.S index e8f6d7eb722..b1c219acabe 100644 --- a/arch/xtensa/lib/memcopy.S +++ b/arch/xtensa/lib/memcopy.S @@ -6,10 +6,10 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 2002 - 2005 Tensilica Inc. + * Copyright (C) 2002 - 2012 Tensilica Inc. */ -#include <xtensa/coreasm.h> +#include <variant/core.h> .macro src_b r, w0, w1 #ifdef __XTENSA_EB__ @@ -27,14 +27,11 @@ #endif .endm - /* * void *memcpy(void *dst, const void *src, size_t len); - * void *memmove(void *dst, const void *src, size_t len); - * void *bcopy(const void *src, void *dst, size_t len); * * This function is intended to do the same thing as the standard - * library function memcpy() (or bcopy()) for most cases. + * library function memcpy() for most cases. * However, where the source and/or destination references * an instruction RAM or ROM or a data RAM or ROM, that * source and/or destination will always be accessed with @@ -45,9 +42,6 @@ * !!!!!!! Handling of IRAM/IROM has not yet * !!!!!!! been implemented. * - * The bcopy version is provided here to avoid the overhead - * of an extra call, for callers that require this convention. - * * The (general case) algorithm is as follows: * If destination is unaligned, align it by conditionally * copying 1 and 2 bytes. @@ -76,17 +70,6 @@ */ .text - .align 4 - .global bcopy - .type bcopy,@function -bcopy: - entry sp, 16 # minimal stack frame - # a2=src, a3=dst, a4=len - mov a5, a3 # copy dst so that a2 is return value - mov a3, a2 - mov a2, a5 - j .Lcommon # go to common code for memcpy+bcopy - /* * Byte by byte copy @@ -107,7 +90,7 @@ bcopy: s8i a6, a5, 0 addi a5, a5, 1 #if !XCHAL_HAVE_LOOPS - blt a3, a7, .Lnextbyte + bne a3, a7, .Lnextbyte # continue loop if $a3:src != $a7:src_end #endif /* !XCHAL_HAVE_LOOPS */ .Lbytecopydone: retw @@ -144,9 +127,6 @@ bcopy: .global memcpy .type memcpy,@function memcpy: - .global memmove - .type memmove,@function -memmove: entry sp, 16 # minimal stack frame # a2/ dst, a3/ src, a4/ len @@ -182,7 +162,7 @@ memmove: s32i a7, a5, 12 addi a5, a5, 16 #if !XCHAL_HAVE_LOOPS - blt a3, a8, .Loop1 + bne a3, a8, .Loop1 # continue loop if a3:src != a8:src_end #endif /* !XCHAL_HAVE_LOOPS */ .Loop1done: bbci.l a4, 3, .L2 @@ -230,8 +210,10 @@ memmove: _beqz a4, .Ldone # avoid loading anything for zero-length copies # copy 16 bytes per iteration for word-aligned dst and unaligned src ssa8 a3 # set shift amount from byte offset -#define SIM_CHECKS_ALIGNMENT 1 /* set to 1 when running on ISS (simulator) with the - lint or ferret client, or 0 to save a few cycles */ + +/* set to 1 when running on ISS (simulator) with the + lint or ferret client, or 0 to save a few cycles */ +#define SIM_CHECKS_ALIGNMENT 1 #if XCHAL_UNALIGNED_LOAD_EXCEPTION || SIM_CHECKS_ALIGNMENT and a11, a3, a8 # save unalignment offset for below sub a3, a3, a11 # align a3 @@ -260,7 +242,7 @@ memmove: s32i a9, a5, 12 addi a5, a5, 16 #if !XCHAL_HAVE_LOOPS - blt a3, a10, .Loop2 + bne a3, a10, .Loop2 # continue loop if a3:src != a10:src_end #endif /* !XCHAL_HAVE_LOOPS */ .Loop2done: bbci.l a4, 3, .L12 @@ -305,6 +287,285 @@ memmove: l8ui a6, a3, 0 s8i a6, a5, 0 retw + + +/* + * void bcopy(const void *src, void *dest, size_t n); + */ + .align 4 + .global bcopy + .type bcopy,@function +bcopy: + entry sp, 16 # minimal stack frame + # a2=src, a3=dst, a4=len + mov a5, a3 + mov a3, a2 + mov a2, a5 + j .Lmovecommon # go to common code for memmove+bcopy + +/* + * void *memmove(void *dst, const void *src, size_t len); + * + * This function is intended to do the same thing as the standard + * library function memmove() for most cases. + * However, where the source and/or destination references + * an instruction RAM or ROM or a data RAM or ROM, that + * source and/or destination will always be accessed with + * 32-bit load and store instructions (as required for these + * types of devices). + * + * !!!!!!! XTFIXME: + * !!!!!!! Handling of IRAM/IROM has not yet + * !!!!!!! been implemented. + * + * The (general case) algorithm is as follows: + * If end of source doesn't overlap destination then use memcpy. + * Otherwise do memcpy backwards. + * + * Register use: + * a0/ return address + * a1/ stack pointer + * a2/ return value + * a3/ src + * a4/ length + * a5/ dst + * a6/ tmp + * a7/ tmp + * a8/ tmp + * a9/ tmp + * a10/ tmp + * a11/ tmp + */ + +/* + * Byte by byte copy + */ + .align 4 + .byte 0 # 1 mod 4 alignment for LOOPNEZ + # (0 mod 4 alignment for LBEG) +.Lbackbytecopy: +#if XCHAL_HAVE_LOOPS + loopnez a4, .Lbackbytecopydone +#else /* !XCHAL_HAVE_LOOPS */ + beqz a4, .Lbackbytecopydone + sub a7, a3, a4 # a7 = start address for source +#endif /* !XCHAL_HAVE_LOOPS */ +.Lbacknextbyte: + addi a3, a3, -1 + l8ui a6, a3, 0 + addi a5, a5, -1 + s8i a6, a5, 0 +#if !XCHAL_HAVE_LOOPS + bne a3, a7, .Lbacknextbyte # continue loop if + # $a3:src != $a7:src_start +#endif /* !XCHAL_HAVE_LOOPS */ +.Lbackbytecopydone: + retw + +/* + * Destination is unaligned + */ + + .align 4 +.Lbackdst1mod2: # dst is only byte aligned + _bltui a4, 7, .Lbackbytecopy # do short copies byte by byte + + # copy 1 byte + addi a3, a3, -1 + l8ui a6, a3, 0 + addi a5, a5, -1 + s8i a6, a5, 0 + addi a4, a4, -1 + _bbci.l a5, 1, .Lbackdstaligned # if dst is now aligned, then + # return to main algorithm +.Lbackdst2mod4: # dst 16-bit aligned + # copy 2 bytes + _bltui a4, 6, .Lbackbytecopy # do short copies byte by byte + addi a3, a3, -2 + l8ui a6, a3, 0 + l8ui a7, a3, 1 + addi a5, a5, -2 + s8i a6, a5, 0 + s8i a7, a5, 1 + addi a4, a4, -2 + j .Lbackdstaligned # dst is now aligned, + # return to main algorithm + + .align 4 + .global memmove + .type memmove,@function +memmove: + + entry sp, 16 # minimal stack frame + # a2/ dst, a3/ src, a4/ len + mov a5, a2 # copy dst so that a2 is return value +.Lmovecommon: + sub a6, a5, a3 + bgeu a6, a4, .Lcommon + + add a5, a5, a4 + add a3, a3, a4 + + _bbsi.l a5, 0, .Lbackdst1mod2 # if dst is 1 mod 2 + _bbsi.l a5, 1, .Lbackdst2mod4 # if dst is 2 mod 4 +.Lbackdstaligned: # return here from .Lbackdst?mod? once dst is aligned + srli a7, a4, 4 # number of loop iterations with 16B + # per iteration + movi a8, 3 # if source is not aligned, + _bany a3, a8, .Lbacksrcunaligned # then use shifting copy + /* + * Destination and source are word-aligned, use word copy. + */ + # copy 16 bytes per iteration for word-aligned dst and word-aligned src +#if XCHAL_HAVE_LOOPS + loopnez a7, .backLoop1done +#else /* !XCHAL_HAVE_LOOPS */ + beqz a7, .backLoop1done + slli a8, a7, 4 + sub a8, a3, a8 # a8 = start of first 16B source chunk +#endif /* !XCHAL_HAVE_LOOPS */ +.backLoop1: + addi a3, a3, -16 + l32i a7, a3, 12 + l32i a6, a3, 8 + addi a5, a5, -16 + s32i a7, a5, 12 + l32i a7, a3, 4 + s32i a6, a5, 8 + l32i a6, a3, 0 + s32i a7, a5, 4 + s32i a6, a5, 0 +#if !XCHAL_HAVE_LOOPS + bne a3, a8, .backLoop1 # continue loop if a3:src != a8:src_start +#endif /* !XCHAL_HAVE_LOOPS */ +.backLoop1done: + bbci.l a4, 3, .Lback2 + # copy 8 bytes + addi a3, a3, -8 + l32i a6, a3, 0 + l32i a7, a3, 4 + addi a5, a5, -8 + s32i a6, a5, 0 + s32i a7, a5, 4 +.Lback2: + bbsi.l a4, 2, .Lback3 + bbsi.l a4, 1, .Lback4 + bbsi.l a4, 0, .Lback5 + retw +.Lback3: + # copy 4 bytes + addi a3, a3, -4 + l32i a6, a3, 0 + addi a5, a5, -4 + s32i a6, a5, 0 + bbsi.l a4, 1, .Lback4 + bbsi.l a4, 0, .Lback5 + retw +.Lback4: + # copy 2 bytes + addi a3, a3, -2 + l16ui a6, a3, 0 + addi a5, a5, -2 + s16i a6, a5, 0 + bbsi.l a4, 0, .Lback5 + retw +.Lback5: + # copy 1 byte + addi a3, a3, -1 + l8ui a6, a3, 0 + addi a5, a5, -1 + s8i a6, a5, 0 + retw + +/* + * Destination is aligned, Source is unaligned + */ + + .align 4 +.Lbacksrcunaligned: + _beqz a4, .Lbackdone # avoid loading anything for zero-length copies + # copy 16 bytes per iteration for word-aligned dst and unaligned src + ssa8 a3 # set shift amount from byte offset +#define SIM_CHECKS_ALIGNMENT 1 /* set to 1 when running on ISS with + * the lint or ferret client, or 0 + * to save a few cycles */ +#if XCHAL_UNALIGNED_LOAD_EXCEPTION || SIM_CHECKS_ALIGNMENT + and a11, a3, a8 # save unalignment offset for below + sub a3, a3, a11 # align a3 +#endif + l32i a6, a3, 0 # load first word +#if XCHAL_HAVE_LOOPS + loopnez a7, .backLoop2done +#else /* !XCHAL_HAVE_LOOPS */ + beqz a7, .backLoop2done + slli a10, a7, 4 + sub a10, a3, a10 # a10 = start of first 16B source chunk +#endif /* !XCHAL_HAVE_LOOPS */ +.backLoop2: + addi a3, a3, -16 + l32i a7, a3, 12 + l32i a8, a3, 8 + addi a5, a5, -16 + src_b a6, a7, a6 + s32i a6, a5, 12 + l32i a9, a3, 4 + src_b a7, a8, a7 + s32i a7, a5, 8 + l32i a6, a3, 0 + src_b a8, a9, a8 + s32i a8, a5, 4 + src_b a9, a6, a9 + s32i a9, a5, 0 +#if !XCHAL_HAVE_LOOPS + bne a3, a10, .backLoop2 # continue loop if a3:src != a10:src_start +#endif /* !XCHAL_HAVE_LOOPS */ +.backLoop2done: + bbci.l a4, 3, .Lback12 + # copy 8 bytes + addi a3, a3, -8 + l32i a7, a3, 4 + l32i a8, a3, 0 + addi a5, a5, -8 + src_b a6, a7, a6 + s32i a6, a5, 4 + src_b a7, a8, a7 + s32i a7, a5, 0 + mov a6, a8 +.Lback12: + bbci.l a4, 2, .Lback13 + # copy 4 bytes + addi a3, a3, -4 + l32i a7, a3, 0 + addi a5, a5, -4 + src_b a6, a7, a6 + s32i a6, a5, 0 + mov a6, a7 +.Lback13: +#if XCHAL_UNALIGNED_LOAD_EXCEPTION || SIM_CHECKS_ALIGNMENT + add a3, a3, a11 # readjust a3 with correct misalignment +#endif + bbsi.l a4, 1, .Lback14 + bbsi.l a4, 0, .Lback15 +.Lbackdone: + retw +.Lback14: + # copy 2 bytes + addi a3, a3, -2 + l8ui a6, a3, 0 + l8ui a7, a3, 1 + addi a5, a5, -2 + s8i a6, a5, 0 + s8i a7, a5, 1 + bbsi.l a4, 0, .Lback15 + retw +.Lback15: + # copy 1 byte + addi a3, a3, -1 + addi a5, a5, -1 + l8ui a6, a3, 0 + s8i a6, a5, 0 + retw + /* * Local Variables: diff --git a/arch/xtensa/lib/memset.S b/arch/xtensa/lib/memset.S index 4de25134bc6..10b8c400f17 100644 --- a/arch/xtensa/lib/memset.S +++ b/arch/xtensa/lib/memset.S @@ -11,7 +11,7 @@ * Copyright (C) 2002 Tensilica Inc. */ -#include <xtensa/coreasm.h> +#include <variant/core.h> /* * void *memset(void *dst, int c, size_t length) diff --git a/arch/xtensa/lib/pci-auto.c b/arch/xtensa/lib/pci-auto.c index 90c790f6123..34d05abbd92 100644 --- a/arch/xtensa/lib/pci-auto.c +++ b/arch/xtensa/lib/pci-auto.c @@ -1,5 +1,5 @@ /* - * arch/xtensa/kernel/pci-auto.c + * arch/xtensa/lib/pci-auto.c * * PCI autoconfiguration library * @@ -241,8 +241,8 @@ int __init pciauto_bus_scan(struct pci_controller *pci_ctrl, int current_bus) unsigned char header_type; struct pci_dev *dev = &pciauto_dev; - pciauto_dev.bus = &pciauto_bus; - pciauto_dev.sysdata = pci_ctrl; + pciauto_dev.bus = &pciauto_bus; + pciauto_dev.sysdata = pci_ctrl; pciauto_bus.ops = pci_ctrl->ops; /* @@ -345,8 +345,3 @@ int __init pciauto_bus_scan(struct pci_controller *pci_ctrl, int current_bus) } return sub_bus; } - - - - - diff --git a/arch/xtensa/lib/strcasecmp.c b/arch/xtensa/lib/strcasecmp.c deleted file mode 100644 index 165b2d6effa..00000000000 --- a/arch/xtensa/lib/strcasecmp.c +++ /dev/null @@ -1,32 +0,0 @@ -/* - * linux/arch/xtensa/lib/strcasecmp.c - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file "COPYING" in the main directory of - * this archive for more details. - * - * Copyright (C) 2002 Tensilica Inc. - */ - -#include <linux/string.h> - - -/* We handle nothing here except the C locale. Since this is used in - only one place, on strings known to contain only 7 bit ASCII, this - is ok. */ - -int strcasecmp(const char *a, const char *b) -{ - int ca, cb; - - do { - ca = *a++ & 0xff; - cb = *b++ & 0xff; - if (ca >= 'A' && ca <= 'Z') - ca += 'a' - 'A'; - if (cb >= 'A' && cb <= 'Z') - cb += 'a' - 'A'; - } while (ca == cb && ca != '\0'); - - return ca - cb; -} diff --git a/arch/xtensa/lib/strncpy_user.S b/arch/xtensa/lib/strncpy_user.S index 71d55df4389..1ad0ecf4536 100644 --- a/arch/xtensa/lib/strncpy_user.S +++ b/arch/xtensa/lib/strncpy_user.S @@ -11,7 +11,7 @@ * Copyright (C) 2002 Tensilica Inc. */ -#include <xtensa/coreasm.h> +#include <variant/core.h> #include <linux/errno.h> /* Load or store instructions that may cause exceptions use the EX macro. */ @@ -25,18 +25,18 @@ /* * char *__strncpy_user(char *dst, const char *src, size_t len) */ -.text -.begin literal -.align 4 -.Lmask0: - .byte 0xff, 0x00, 0x00, 0x00 -.Lmask1: - .byte 0x00, 0xff, 0x00, 0x00 -.Lmask2: - .byte 0x00, 0x00, 0xff, 0x00 -.Lmask3: - .byte 0x00, 0x00, 0x00, 0xff -.end literal + +#ifdef __XTENSA_EB__ +# define MASK0 0xff000000 +# define MASK1 0x00ff0000 +# define MASK2 0x0000ff00 +# define MASK3 0x000000ff +#else +# define MASK0 0x000000ff +# define MASK1 0x0000ff00 +# define MASK2 0x00ff0000 +# define MASK3 0xff000000 +#endif # Register use # a0/ return address @@ -53,6 +53,7 @@ # a11/ dst # a12/ tmp +.text .align 4 .global __strncpy_user .type __strncpy_user,@function @@ -61,10 +62,10 @@ __strncpy_user: # a2/ dst, a3/ src, a4/ len mov a11, a2 # leave dst in return value register beqz a4, .Lret # if len is zero - l32r a5, .Lmask0 # mask for byte 0 - l32r a6, .Lmask1 # mask for byte 1 - l32r a7, .Lmask2 # mask for byte 2 - l32r a8, .Lmask3 # mask for byte 3 + movi a5, MASK0 # mask for byte 0 + movi a6, MASK1 # mask for byte 1 + movi a7, MASK2 # mask for byte 2 + movi a8, MASK3 # mask for byte 3 bbsi.l a3, 0, .Lsrc1mod2 # if only 8-bit aligned bbsi.l a3, 1, .Lsrc2mod4 # if only 16-bit aligned .Lsrcaligned: # return here when src is word-aligned @@ -165,7 +166,7 @@ __strncpy_user: retw .Lz1: # byte 1 is zero #ifdef __XTENSA_EB__ - extui a9, a9, 16, 16 + extui a9, a9, 16, 16 #endif /* __XTENSA_EB__ */ EX(s16i, a9, a11, 0, fixup_s) addi a11, a11, 1 # advance dst pointer @@ -173,7 +174,7 @@ __strncpy_user: retw .Lz2: # byte 2 is zero #ifdef __XTENSA_EB__ - extui a9, a9, 16, 16 + extui a9, a9, 16, 16 #endif /* __XTENSA_EB__ */ EX(s16i, a9, a11, 0, fixup_s) movi a9, 0 diff --git a/arch/xtensa/lib/strnlen_user.S b/arch/xtensa/lib/strnlen_user.S index cdff4d670f3..4c03b1e581e 100644 --- a/arch/xtensa/lib/strnlen_user.S +++ b/arch/xtensa/lib/strnlen_user.S @@ -11,7 +11,7 @@ * Copyright (C) 2002 Tensilica Inc. */ -#include <xtensa/coreasm.h> +#include <variant/core.h> /* Load or store instructions that may cause exceptions use the EX macro. */ @@ -24,18 +24,18 @@ /* * size_t __strnlen_user(const char *s, size_t len) */ -.text -.begin literal -.align 4 -.Lmask0: - .byte 0xff, 0x00, 0x00, 0x00 -.Lmask1: - .byte 0x00, 0xff, 0x00, 0x00 -.Lmask2: - .byte 0x00, 0x00, 0xff, 0x00 -.Lmask3: - .byte 0x00, 0x00, 0x00, 0xff -.end literal + +#ifdef __XTENSA_EB__ +# define MASK0 0xff000000 +# define MASK1 0x00ff0000 +# define MASK2 0x0000ff00 +# define MASK3 0x000000ff +#else +# define MASK0 0x000000ff +# define MASK1 0x0000ff00 +# define MASK2 0x00ff0000 +# define MASK3 0xff000000 +#endif # Register use: # a2/ src @@ -48,6 +48,7 @@ # a9/ tmp # a10/ tmp +.text .align 4 .global __strnlen_user .type __strnlen_user,@function @@ -56,10 +57,10 @@ __strnlen_user: # a2/ s, a3/ len addi a4, a2, -4 # because we overincrement at the end; # we compensate with load offsets of 4 - l32r a5, .Lmask0 # mask for byte 0 - l32r a6, .Lmask1 # mask for byte 1 - l32r a7, .Lmask2 # mask for byte 2 - l32r a8, .Lmask3 # mask for byte 3 + movi a5, MASK0 # mask for byte 0 + movi a6, MASK1 # mask for byte 1 + movi a7, MASK2 # mask for byte 2 + movi a8, MASK3 # mask for byte 3 bbsi.l a2, 0, .L1mod2 # if only 8-bit aligned bbsi.l a2, 1, .L2mod4 # if only 16-bit aligned @@ -144,4 +145,3 @@ __strnlen_user: lenfixup: movi a2, 0 retw - diff --git a/arch/xtensa/lib/usercopy.S b/arch/xtensa/lib/usercopy.S index 265db2693cb..ace1892a875 100644 --- a/arch/xtensa/lib/usercopy.S +++ b/arch/xtensa/lib/usercopy.S @@ -5,10 +5,10 @@ * * DO NOT COMBINE this function with <arch/xtensa/lib/hal/memcopy.S>. * It needs to remain separate and distinct. The hal files are part - * of the the Xtensa link-time HAL, and those files may differ per + * of the Xtensa link-time HAL, and those files may differ per * processor configuration. Patching the kernel for another * processor configuration includes replacing the hal files, and we - * could loose the special functionality for accessing user-space + * could lose the special functionality for accessing user-space * memory during such a patch. We sacrifice a little code space here * in favor to simplify code maintenance. * @@ -53,7 +53,7 @@ * a11/ original length */ -#include <xtensa/coreasm.h> +#include <variant/core.h> #ifdef __XTENSA_EB__ #define ALIGN(R, W0, W1) src R, W0, W1 @@ -318,4 +318,3 @@ l_fixup: /* Ignore memset return value in a6. */ /* a2 still contains bytes not copied. */ retw - |