diff options
Diffstat (limited to 'arch/x86/include/asm/uv/uv_hub.h')
| -rw-r--r-- | arch/x86/include/asm/uv/uv_hub.h | 69 | 
1 files changed, 56 insertions, 13 deletions
diff --git a/arch/x86/include/asm/uv/uv_hub.h b/arch/x86/include/asm/uv/uv_hub.h index 2c32df95bb7..c63e925fd6b 100644 --- a/arch/x86/include/asm/uv/uv_hub.h +++ b/arch/x86/include/asm/uv/uv_hub.h @@ -5,7 +5,7 @@   *   * SGI UV architectural definitions   * - * Copyright (C) 2007-2013 Silicon Graphics, Inc. All rights reserved. + * Copyright (C) 2007-2014 Silicon Graphics, Inc. All rights reserved.   */  #ifndef _ASM_X86_UV_UV_HUB_H @@ -204,16 +204,6 @@ static inline int is_uvx_hub(void)  	return uv_hub_info->hub_revision >= UV2_HUB_REVISION_BASE;  } -static inline int is_uv2_1_hub(void) -{ -	return uv_hub_info->hub_revision == UV2_HUB_REVISION_BASE; -} - -static inline int is_uv2_2_hub(void) -{ -	return uv_hub_info->hub_revision == UV2_HUB_REVISION_BASE + 1; -} -  union uvh_apicid {      unsigned long       v;      struct uvh_apicid_s { @@ -502,8 +492,8 @@ struct uv_blade_info {  	unsigned short	nr_online_cpus;  	unsigned short	pnode;  	short		memory_nid; -	spinlock_t	nmi_lock; -	unsigned long	nmi_count; +	spinlock_t	nmi_lock;	/* obsolete, see uv_hub_nmi */ +	unsigned long	nmi_count;	/* obsolete, see uv_hub_nmi */  };  extern struct uv_blade_info *uv_blade_info;  extern short *uv_node_to_blade; @@ -576,6 +566,59 @@ static inline int uv_num_possible_blades(void)  	return uv_possible_blades;  } +/* Per Hub NMI support */ +extern void uv_nmi_setup(void); + +/* BMC sets a bit this MMR non-zero before sending an NMI */ +#define UVH_NMI_MMR		UVH_SCRATCH5 +#define UVH_NMI_MMR_CLEAR	UVH_SCRATCH5_ALIAS +#define UVH_NMI_MMR_SHIFT	63 +#define	UVH_NMI_MMR_TYPE	"SCRATCH5" + +/* Newer SMM NMI handler, not present in all systems */ +#define UVH_NMI_MMRX		UVH_EVENT_OCCURRED0 +#define UVH_NMI_MMRX_CLEAR	UVH_EVENT_OCCURRED0_ALIAS +#define UVH_NMI_MMRX_SHIFT	(is_uv1_hub() ? \ +					UV1H_EVENT_OCCURRED0_EXTIO_INT0_SHFT :\ +					UVXH_EVENT_OCCURRED0_EXTIO_INT0_SHFT) +#define	UVH_NMI_MMRX_TYPE	"EXTIO_INT0" + +/* Non-zero indicates newer SMM NMI handler present */ +#define UVH_NMI_MMRX_SUPPORTED	UVH_EXTIO_INT0_BROADCAST + +/* Indicates to BIOS that we want to use the newer SMM NMI handler */ +#define UVH_NMI_MMRX_REQ	UVH_SCRATCH5_ALIAS_2 +#define UVH_NMI_MMRX_REQ_SHIFT	62 + +struct uv_hub_nmi_s { +	raw_spinlock_t	nmi_lock; +	atomic_t	in_nmi;		/* flag this node in UV NMI IRQ */ +	atomic_t	cpu_owner;	/* last locker of this struct */ +	atomic_t	read_mmr_count;	/* count of MMR reads */ +	atomic_t	nmi_count;	/* count of true UV NMIs */ +	unsigned long	nmi_value;	/* last value read from NMI MMR */ +}; + +struct uv_cpu_nmi_s { +	struct uv_hub_nmi_s	*hub; +	atomic_t		state; +	atomic_t		pinging; +	int			queries; +	int			pings; +}; + +DECLARE_PER_CPU(struct uv_cpu_nmi_s, __uv_cpu_nmi); +#define uv_cpu_nmi			(__get_cpu_var(__uv_cpu_nmi)) +#define uv_hub_nmi			(uv_cpu_nmi.hub) +#define uv_cpu_nmi_per(cpu)		(per_cpu(__uv_cpu_nmi, cpu)) +#define uv_hub_nmi_per(cpu)		(uv_cpu_nmi_per(cpu).hub) + +/* uv_cpu_nmi_states */ +#define	UV_NMI_STATE_OUT		0 +#define	UV_NMI_STATE_IN			1 +#define	UV_NMI_STATE_DUMP		2 +#define	UV_NMI_STATE_DUMP_DONE		3 +  /* Update SCIR state */  static inline void uv_set_scir_bits(unsigned char value)  {  | 
