diff options
Diffstat (limited to 'arch/sparc/include/uapi/asm/psr.h')
| -rw-r--r-- | arch/sparc/include/uapi/asm/psr.h | 47 | 
1 files changed, 47 insertions, 0 deletions
diff --git a/arch/sparc/include/uapi/asm/psr.h b/arch/sparc/include/uapi/asm/psr.h new file mode 100644 index 00000000000..2f0ed856530 --- /dev/null +++ b/arch/sparc/include/uapi/asm/psr.h @@ -0,0 +1,47 @@ +/* + * psr.h: This file holds the macros for masking off various parts of + *        the processor status register on the Sparc. This is valid + *        for Version 8. On the V9 this is renamed to the PSTATE + *        register and its members are accessed as fields like + *        PSTATE.PRIV for the current CPU privilege level. + * + * Copyright (C) 1994 David S. Miller (davem@caip.rutgers.edu) + */ + +#ifndef _UAPI__LINUX_SPARC_PSR_H +#define _UAPI__LINUX_SPARC_PSR_H + +/* The Sparc PSR fields are laid out as the following: + * + *  ------------------------------------------------------------------------ + *  | impl  | vers  | icc   | resv  | EC | EF | PIL  | S | PS | ET |  CWP  | + *  | 31-28 | 27-24 | 23-20 | 19-14 | 13 | 12 | 11-8 | 7 | 6  | 5  |  4-0  | + *  ------------------------------------------------------------------------ + */ +#define PSR_CWP     0x0000001f         /* current window pointer     */ +#define PSR_ET      0x00000020         /* enable traps field         */ +#define PSR_PS      0x00000040         /* previous privilege level   */ +#define PSR_S       0x00000080         /* current privilege level    */ +#define PSR_PIL     0x00000f00         /* processor interrupt level  */ +#define PSR_EF      0x00001000         /* enable floating point      */ +#define PSR_EC      0x00002000         /* enable co-processor        */ +#define PSR_SYSCALL 0x00004000         /* inside of a syscall        */ +#define PSR_LE      0x00008000         /* SuperSparcII little-endian */ +#define PSR_ICC     0x00f00000         /* integer condition codes    */ +#define PSR_C       0x00100000         /* carry bit                  */ +#define PSR_V       0x00200000         /* overflow bit               */ +#define PSR_Z       0x00400000         /* zero bit                   */ +#define PSR_N       0x00800000         /* negative bit               */ +#define PSR_VERS    0x0f000000         /* cpu-version field          */ +#define PSR_IMPL    0xf0000000         /* cpu-implementation field   */ + +#define PSR_VERS_SHIFT		24 +#define PSR_IMPL_SHIFT		28 +#define PSR_VERS_SHIFTED_MASK	0xf +#define PSR_IMPL_SHIFTED_MASK	0xf + +#define PSR_IMPL_TI		0x4 +#define PSR_IMPL_LEON		0xf + + +#endif /* _UAPI__LINUX_SPARC_PSR_H */  | 
