diff options
Diffstat (limited to 'arch/sh/kernel/cpu/sh4a/setup-sh7724.c')
| -rw-r--r-- | arch/sh/kernel/cpu/sh4a/setup-sh7724.c | 404 |
1 files changed, 146 insertions, 258 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c index 828c9657eb5..b9e84b1d3aa 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c @@ -20,6 +20,7 @@ #include <linux/uio_driver.h> #include <linux/sh_dma.h> #include <linux/sh_timer.h> +#include <linux/sh_intc.h> #include <linux/io.h> #include <linux/notifier.h> @@ -93,6 +94,46 @@ static const struct sh_dmae_slave_config sh7724_dmae_slaves[] = { .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT), .mid_rid = 0x36, }, { + .slave_id = SHDMA_SLAVE_USB0D0_TX, + .addr = 0xA4D80100, + .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_32BIT), + .mid_rid = 0x73, + }, { + .slave_id = SHDMA_SLAVE_USB0D0_RX, + .addr = 0xA4D80100, + .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_32BIT), + .mid_rid = 0x73, + }, { + .slave_id = SHDMA_SLAVE_USB0D1_TX, + .addr = 0xA4D80120, + .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_32BIT), + .mid_rid = 0x77, + }, { + .slave_id = SHDMA_SLAVE_USB0D1_RX, + .addr = 0xA4D80120, + .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_32BIT), + .mid_rid = 0x77, + }, { + .slave_id = SHDMA_SLAVE_USB1D0_TX, + .addr = 0xA4D90100, + .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_32BIT), + .mid_rid = 0xab, + }, { + .slave_id = SHDMA_SLAVE_USB1D0_RX, + .addr = 0xA4D90100, + .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_32BIT), + .mid_rid = 0xab, + }, { + .slave_id = SHDMA_SLAVE_USB1D1_TX, + .addr = 0xA4D90120, + .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_32BIT), + .mid_rid = 0xaf, + }, { + .slave_id = SHDMA_SLAVE_USB1D1_RX, + .addr = 0xA4D90120, + .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_32BIT), + .mid_rid = 0xaf, + }, { .slave_id = SHDMA_SLAVE_SDHI0_TX, .addr = 0x04ce0030, .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_16BIT), @@ -174,21 +215,21 @@ static struct resource sh7724_dmae0_resources[] = { .flags = IORESOURCE_MEM, }, { - /* DMA error IRQ */ - .start = 78, - .end = 78, + .name = "error_irq", + .start = evt2irq(0xbc0), + .end = evt2irq(0xbc0), .flags = IORESOURCE_IRQ, }, { /* IRQ for channels 0-3 */ - .start = 48, - .end = 51, + .start = evt2irq(0x800), + .end = evt2irq(0x860), .flags = IORESOURCE_IRQ, }, { /* IRQ for channels 4-5 */ - .start = 76, - .end = 77, + .start = evt2irq(0xb80), + .end = evt2irq(0xba0), .flags = IORESOURCE_IRQ, }, }; @@ -208,21 +249,21 @@ static struct resource sh7724_dmae1_resources[] = { .flags = IORESOURCE_MEM, }, { - /* DMA error IRQ */ - .start = 74, - .end = 74, + .name = "error_irq", + .start = evt2irq(0xb40), + .end = evt2irq(0xb40), .flags = IORESOURCE_IRQ, }, { /* IRQ for channels 0-3 */ - .start = 40, - .end = 43, + .start = evt2irq(0x700), + .end = evt2irq(0x760), .flags = IORESOURCE_IRQ, }, { /* IRQ for channels 4-5 */ - .start = 72, - .end = 73, + .start = evt2irq(0xb00), + .end = evt2irq(0xb20), .flags = IORESOURCE_IRQ, }, }; @@ -235,9 +276,6 @@ static struct platform_device dma0_device = { .dev = { .platform_data = &dma_platform_data, }, - .archdata = { - .hwblk_id = HWBLK_DMAC0, - }, }; static struct platform_device dma1_device = { @@ -248,97 +286,142 @@ static struct platform_device dma1_device = { .dev = { .platform_data = &dma_platform_data, }, - .archdata = { - .hwblk_id = HWBLK_DMAC1, - }, }; /* Serial */ static struct plat_sci_port scif0_platform_data = { - .mapbase = 0xffe00000, + .port_reg = SCIx_NOT_SUPPORTED, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIF, - .irqs = { 80, 80, 80, 80 }, + .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE, +}; + +static struct resource scif0_resources[] = { + DEFINE_RES_MEM(0xffe00000, 0x100), + DEFINE_RES_IRQ(evt2irq(0xc00)), }; static struct platform_device scif0_device = { .name = "sh-sci", .id = 0, + .resource = scif0_resources, + .num_resources = ARRAY_SIZE(scif0_resources), .dev = { .platform_data = &scif0_platform_data, }, }; static struct plat_sci_port scif1_platform_data = { - .mapbase = 0xffe10000, + .port_reg = SCIx_NOT_SUPPORTED, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIF, - .irqs = { 81, 81, 81, 81 }, + .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE, +}; + +static struct resource scif1_resources[] = { + DEFINE_RES_MEM(0xffe10000, 0x100), + DEFINE_RES_IRQ(evt2irq(0xc20)), }; static struct platform_device scif1_device = { .name = "sh-sci", .id = 1, + .resource = scif1_resources, + .num_resources = ARRAY_SIZE(scif1_resources), .dev = { .platform_data = &scif1_platform_data, }, }; static struct plat_sci_port scif2_platform_data = { - .mapbase = 0xffe20000, + .port_reg = SCIx_NOT_SUPPORTED, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIF, - .irqs = { 82, 82, 82, 82 }, + .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE, +}; + +static struct resource scif2_resources[] = { + DEFINE_RES_MEM(0xffe20000, 0x100), + DEFINE_RES_IRQ(evt2irq(0xc40)), }; static struct platform_device scif2_device = { .name = "sh-sci", .id = 2, + .resource = scif2_resources, + .num_resources = ARRAY_SIZE(scif2_resources), .dev = { .platform_data = &scif2_platform_data, }, }; static struct plat_sci_port scif3_platform_data = { - .mapbase = 0xa4e30000, + .port_reg = SCIx_NOT_SUPPORTED, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE, + .sampling_rate = 8, .type = PORT_SCIFA, - .irqs = { 56, 56, 56, 56 }, +}; + +static struct resource scif3_resources[] = { + DEFINE_RES_MEM(0xa4e30000, 0x100), + DEFINE_RES_IRQ(evt2irq(0x900)), }; static struct platform_device scif3_device = { .name = "sh-sci", .id = 3, + .resource = scif3_resources, + .num_resources = ARRAY_SIZE(scif3_resources), .dev = { .platform_data = &scif3_platform_data, }, }; static struct plat_sci_port scif4_platform_data = { - .mapbase = 0xa4e40000, + .port_reg = SCIx_NOT_SUPPORTED, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE, + .sampling_rate = 8, .type = PORT_SCIFA, - .irqs = { 88, 88, 88, 88 }, +}; + +static struct resource scif4_resources[] = { + DEFINE_RES_MEM(0xa4e40000, 0x100), + DEFINE_RES_IRQ(evt2irq(0xd00)), }; static struct platform_device scif4_device = { .name = "sh-sci", .id = 4, + .resource = scif4_resources, + .num_resources = ARRAY_SIZE(scif4_resources), .dev = { .platform_data = &scif4_platform_data, }, }; static struct plat_sci_port scif5_platform_data = { - .mapbase = 0xa4e50000, + .port_reg = SCIx_NOT_SUPPORTED, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE, + .sampling_rate = 8, .type = PORT_SCIFA, - .irqs = { 109, 109, 109, 109 }, +}; + +static struct resource scif5_resources[] = { + DEFINE_RES_MEM(0xa4e50000, 0x100), + DEFINE_RES_IRQ(evt2irq(0xfa0)), }; static struct platform_device scif5_device = { .name = "sh-sci", .id = 5, + .resource = scif5_resources, + .num_resources = ARRAY_SIZE(scif5_resources), .dev = { .platform_data = &scif5_platform_data, }, @@ -353,17 +436,17 @@ static struct resource rtc_resources[] = { }, [1] = { /* Period IRQ */ - .start = 69, + .start = evt2irq(0xaa0), .flags = IORESOURCE_IRQ, }, [2] = { /* Carry IRQ */ - .start = 70, + .start = evt2irq(0xac0), .flags = IORESOURCE_IRQ, }, [3] = { /* Alarm IRQ */ - .start = 68, + .start = evt2irq(0xa80), .flags = IORESOURCE_IRQ, }, }; @@ -373,9 +456,6 @@ static struct platform_device rtc_device = { .id = -1, .num_resources = ARRAY_SIZE(rtc_resources), .resource = rtc_resources, - .archdata = { - .hwblk_id = HWBLK_RTC, - }, }; /* I2C0 */ @@ -387,8 +467,8 @@ static struct resource iic0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = 96, - .end = 99, + .start = evt2irq(0xe00), + .end = evt2irq(0xe60), .flags = IORESOURCE_IRQ, }, }; @@ -398,9 +478,6 @@ static struct platform_device iic0_device = { .id = 0, /* "i2c0" clock */ .num_resources = ARRAY_SIZE(iic0_resources), .resource = iic0_resources, - .archdata = { - .hwblk_id = HWBLK_IIC0, - }, }; /* I2C1 */ @@ -412,8 +489,8 @@ static struct resource iic1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = 92, - .end = 95, + .start = evt2irq(0xd80), + .end = evt2irq(0xde0), .flags = IORESOURCE_IRQ, }, }; @@ -423,16 +500,13 @@ static struct platform_device iic1_device = { .id = 1, /* "i2c1" clock */ .num_resources = ARRAY_SIZE(iic1_resources), .resource = iic1_resources, - .archdata = { - .hwblk_id = HWBLK_IIC1, - }, }; /* VPU */ static struct uio_info vpu_platform_data = { .name = "VPU5F", .version = "0", - .irq = 60, + .irq = evt2irq(0x980), }; static struct resource vpu_resources[] = { @@ -455,16 +529,13 @@ static struct platform_device vpu_device = { }, .resource = vpu_resources, .num_resources = ARRAY_SIZE(vpu_resources), - .archdata = { - .hwblk_id = HWBLK_VPU, - }, }; /* VEU0 */ static struct uio_info veu0_platform_data = { .name = "VEU3F0", .version = "0", - .irq = 83, + .irq = evt2irq(0xc60), }; static struct resource veu0_resources[] = { @@ -487,16 +558,13 @@ static struct platform_device veu0_device = { }, .resource = veu0_resources, .num_resources = ARRAY_SIZE(veu0_resources), - .archdata = { - .hwblk_id = HWBLK_VEU0, - }, }; /* VEU1 */ static struct uio_info veu1_platform_data = { .name = "VEU3F1", .version = "0", - .irq = 54, + .irq = evt2irq(0x8c0), }; static struct resource veu1_resources[] = { @@ -519,9 +587,6 @@ static struct platform_device veu1_device = { }, .resource = veu1_resources, .num_resources = ARRAY_SIZE(veu1_resources), - .archdata = { - .hwblk_id = HWBLK_VEU1, - }, }; /* BEU0 */ @@ -551,9 +616,6 @@ static struct platform_device beu0_device = { }, .resource = beu0_resources, .num_resources = ARRAY_SIZE(beu0_resources), - .archdata = { - .hwblk_id = HWBLK_BEU0, - }, }; /* BEU1 */ @@ -583,231 +645,74 @@ static struct platform_device beu1_device = { }, .resource = beu1_resources, .num_resources = ARRAY_SIZE(beu1_resources), - .archdata = { - .hwblk_id = HWBLK_BEU1, - }, }; static struct sh_timer_config cmt_platform_data = { - .channel_offset = 0x60, - .timer_bit = 5, - .clockevent_rating = 125, - .clocksource_rating = 200, + .channels_mask = 0x20, }; static struct resource cmt_resources[] = { - [0] = { - .start = 0x044a0060, - .end = 0x044a006b, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = 104, - .flags = IORESOURCE_IRQ, - }, + DEFINE_RES_MEM(0x044a0000, 0x70), + DEFINE_RES_IRQ(evt2irq(0xf00)), }; static struct platform_device cmt_device = { - .name = "sh_cmt", + .name = "sh-cmt-32", .id = 0, .dev = { .platform_data = &cmt_platform_data, }, .resource = cmt_resources, .num_resources = ARRAY_SIZE(cmt_resources), - .archdata = { - .hwblk_id = HWBLK_CMT, - }, }; static struct sh_timer_config tmu0_platform_data = { - .channel_offset = 0x04, - .timer_bit = 0, - .clockevent_rating = 200, + .channels_mask = 7, }; static struct resource tmu0_resources[] = { - [0] = { - .start = 0xffd80008, - .end = 0xffd80013, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = 16, - .flags = IORESOURCE_IRQ, - }, + DEFINE_RES_MEM(0xffd80000, 0x2c), + DEFINE_RES_IRQ(evt2irq(0x400)), + DEFINE_RES_IRQ(evt2irq(0x420)), + DEFINE_RES_IRQ(evt2irq(0x440)), }; static struct platform_device tmu0_device = { - .name = "sh_tmu", + .name = "sh-tmu", .id = 0, .dev = { .platform_data = &tmu0_platform_data, }, .resource = tmu0_resources, .num_resources = ARRAY_SIZE(tmu0_resources), - .archdata = { - .hwblk_id = HWBLK_TMU0, - }, }; static struct sh_timer_config tmu1_platform_data = { - .channel_offset = 0x10, - .timer_bit = 1, - .clocksource_rating = 200, + .channels_mask = 7, }; static struct resource tmu1_resources[] = { - [0] = { - .start = 0xffd80014, - .end = 0xffd8001f, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = 17, - .flags = IORESOURCE_IRQ, - }, + DEFINE_RES_MEM(0xffd90000, 0x2c), + DEFINE_RES_IRQ(evt2irq(0x920)), + DEFINE_RES_IRQ(evt2irq(0x940)), + DEFINE_RES_IRQ(evt2irq(0x960)), }; static struct platform_device tmu1_device = { - .name = "sh_tmu", + .name = "sh-tmu", .id = 1, .dev = { .platform_data = &tmu1_platform_data, }, .resource = tmu1_resources, .num_resources = ARRAY_SIZE(tmu1_resources), - .archdata = { - .hwblk_id = HWBLK_TMU0, - }, -}; - -static struct sh_timer_config tmu2_platform_data = { - .channel_offset = 0x1c, - .timer_bit = 2, -}; - -static struct resource tmu2_resources[] = { - [0] = { - .start = 0xffd80020, - .end = 0xffd8002b, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = 18, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device tmu2_device = { - .name = "sh_tmu", - .id = 2, - .dev = { - .platform_data = &tmu2_platform_data, - }, - .resource = tmu2_resources, - .num_resources = ARRAY_SIZE(tmu2_resources), - .archdata = { - .hwblk_id = HWBLK_TMU0, - }, -}; - - -static struct sh_timer_config tmu3_platform_data = { - .channel_offset = 0x04, - .timer_bit = 0, -}; - -static struct resource tmu3_resources[] = { - [0] = { - .start = 0xffd90008, - .end = 0xffd90013, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = 57, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device tmu3_device = { - .name = "sh_tmu", - .id = 3, - .dev = { - .platform_data = &tmu3_platform_data, - }, - .resource = tmu3_resources, - .num_resources = ARRAY_SIZE(tmu3_resources), - .archdata = { - .hwblk_id = HWBLK_TMU1, - }, -}; - -static struct sh_timer_config tmu4_platform_data = { - .channel_offset = 0x10, - .timer_bit = 1, -}; - -static struct resource tmu4_resources[] = { - [0] = { - .start = 0xffd90014, - .end = 0xffd9001f, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = 58, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device tmu4_device = { - .name = "sh_tmu", - .id = 4, - .dev = { - .platform_data = &tmu4_platform_data, - }, - .resource = tmu4_resources, - .num_resources = ARRAY_SIZE(tmu4_resources), - .archdata = { - .hwblk_id = HWBLK_TMU1, - }, -}; - -static struct sh_timer_config tmu5_platform_data = { - .channel_offset = 0x1c, - .timer_bit = 2, -}; - -static struct resource tmu5_resources[] = { - [0] = { - .start = 0xffd90020, - .end = 0xffd9002b, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = 57, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device tmu5_device = { - .name = "sh_tmu", - .id = 5, - .dev = { - .platform_data = &tmu5_platform_data, - }, - .resource = tmu5_resources, - .num_resources = ARRAY_SIZE(tmu5_resources), - .archdata = { - .hwblk_id = HWBLK_TMU1, - }, }; /* JPU */ static struct uio_info jpu_platform_data = { .name = "JPU", .version = "0", - .irq = 27, + .irq = evt2irq(0x560), }; static struct resource jpu_resources[] = { @@ -830,16 +735,13 @@ static struct platform_device jpu_device = { }, .resource = jpu_resources, .num_resources = ARRAY_SIZE(jpu_resources), - .archdata = { - .hwblk_id = HWBLK_JPU, - }, }; /* SPU2DSP0 */ static struct uio_info spu0_platform_data = { .name = "SPU2DSP0", .version = "0", - .irq = 86, + .irq = evt2irq(0xcc0), }; static struct resource spu0_resources[] = { @@ -862,16 +764,13 @@ static struct platform_device spu0_device = { }, .resource = spu0_resources, .num_resources = ARRAY_SIZE(spu0_resources), - .archdata = { - .hwblk_id = HWBLK_SPU, - }, }; /* SPU2DSP1 */ static struct uio_info spu1_platform_data = { .name = "SPU2DSP1", .version = "0", - .irq = 87, + .irq = evt2irq(0xce0), }; static struct resource spu1_resources[] = { @@ -894,9 +793,6 @@ static struct platform_device spu1_device = { }, .resource = spu1_resources, .num_resources = ARRAY_SIZE(spu1_resources), - .archdata = { - .hwblk_id = HWBLK_SPU, - }, }; static struct platform_device *sh7724_devices[] __initdata = { @@ -909,10 +805,6 @@ static struct platform_device *sh7724_devices[] __initdata = { &cmt_device, &tmu0_device, &tmu1_device, - &tmu2_device, - &tmu3_device, - &tmu4_device, - &tmu5_device, &dma0_device, &dma1_device, &rtc_device, @@ -952,10 +844,6 @@ static struct platform_device *sh7724_early_devices[] __initdata = { &cmt_device, &tmu0_device, &tmu1_device, - &tmu2_device, - &tmu3_device, - &tmu4_device, - &tmu5_device, }; void __init plat_early_device_setup(void) @@ -1144,7 +1032,7 @@ static struct intc_group groups[] __initdata = { static struct intc_mask_reg mask_registers[] __initdata = { { 0xa4080080, 0xa40800c0, 8, /* IMR0 / IMCR0 */ { 0, TMU1_TUNI2, TMU1_TUNI1, TMU1_TUNI0, - 0, DISABLED, ENABLED, ENABLED } }, + 0, ENABLED, ENABLED, ENABLED } }, { 0xa4080084, 0xa40800c4, 8, /* IMR1 / IMCR1 */ { VIO_VOU, VIO_VEU1, VIO_BEU0, VIO_CEU0, DMAC0A_DEI3, DMAC0A_DEI2, DMAC0A_DEI1, DMAC0A_DEI0 } }, @@ -1166,7 +1054,7 @@ static struct intc_mask_reg mask_registers[] __initdata = { { I2C0_DTEI, I2C0_WAITI, I2C0_TACKI, I2C0_ALI, I2C1_DTEI, I2C1_WAITI, I2C1_TACKI, I2C1_ALI } }, { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */ - { DISABLED, DISABLED, ENABLED, ENABLED, + { DISABLED, ENABLED, ENABLED, ENABLED, 0, 0, SCIFA5, FSI } }, { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */ { 0, 0, 0, CMT, 0, USB1, USB0, 0 } }, |
