diff options
Diffstat (limited to 'arch/sh/kernel/cpu/sh3')
| -rw-r--r-- | arch/sh/kernel/cpu/sh3/Makefile | 22 | ||||
| -rw-r--r-- | arch/sh/kernel/cpu/sh3/clock-sh3.c | 32 | ||||
| -rw-r--r-- | arch/sh/kernel/cpu/sh3/clock-sh7705.c | 32 | ||||
| -rw-r--r-- | arch/sh/kernel/cpu/sh3/clock-sh7706.c | 32 | ||||
| -rw-r--r-- | arch/sh/kernel/cpu/sh3/clock-sh7709.c | 43 | ||||
| -rw-r--r-- | arch/sh/kernel/cpu/sh3/clock-sh7710.c | 32 | ||||
| -rw-r--r-- | arch/sh/kernel/cpu/sh3/clock-sh7712.c | 24 | ||||
| -rw-r--r-- | arch/sh/kernel/cpu/sh3/entry.S | 483 | ||||
| -rw-r--r-- | arch/sh/kernel/cpu/sh3/ex.S | 6 | ||||
| -rw-r--r-- | arch/sh/kernel/cpu/sh3/pinmux-sh7720.c | 1232 | ||||
| -rw-r--r-- | arch/sh/kernel/cpu/sh3/probe.c | 30 | ||||
| -rw-r--r-- | arch/sh/kernel/cpu/sh3/serial-sh770x.c | 33 | ||||
| -rw-r--r-- | arch/sh/kernel/cpu/sh3/serial-sh7710.c | 20 | ||||
| -rw-r--r-- | arch/sh/kernel/cpu/sh3/serial-sh7720.c | 37 | ||||
| -rw-r--r-- | arch/sh/kernel/cpu/sh3/setup-sh3.c | 2 | ||||
| -rw-r--r-- | arch/sh/kernel/cpu/sh3/setup-sh7705.c | 162 | ||||
| -rw-r--r-- | arch/sh/kernel/cpu/sh3/setup-sh770x.c | 207 | ||||
| -rw-r--r-- | arch/sh/kernel/cpu/sh3/setup-sh7710.c | 161 | ||||
| -rw-r--r-- | arch/sh/kernel/cpu/sh3/setup-sh7720.c | 205 | ||||
| -rw-r--r-- | arch/sh/kernel/cpu/sh3/swsusp.S | 147 |
20 files changed, 1045 insertions, 1897 deletions
diff --git a/arch/sh/kernel/cpu/sh3/Makefile b/arch/sh/kernel/cpu/sh3/Makefile index e07c69e16d9..d3634ae7b71 100644 --- a/arch/sh/kernel/cpu/sh3/Makefile +++ b/arch/sh/kernel/cpu/sh3/Makefile @@ -4,16 +4,18 @@ obj-y := ex.o probe.o entry.o setup-sh3.o +obj-$(CONFIG_HIBERNATION) += swsusp.o + # CPU subtype setup -obj-$(CONFIG_CPU_SUBTYPE_SH7705) += setup-sh7705.o -obj-$(CONFIG_CPU_SUBTYPE_SH7706) += setup-sh770x.o -obj-$(CONFIG_CPU_SUBTYPE_SH7707) += setup-sh770x.o -obj-$(CONFIG_CPU_SUBTYPE_SH7708) += setup-sh770x.o -obj-$(CONFIG_CPU_SUBTYPE_SH7709) += setup-sh770x.o -obj-$(CONFIG_CPU_SUBTYPE_SH7710) += setup-sh7710.o -obj-$(CONFIG_CPU_SUBTYPE_SH7712) += setup-sh7710.o -obj-$(CONFIG_CPU_SUBTYPE_SH7720) += setup-sh7720.o -obj-$(CONFIG_CPU_SUBTYPE_SH7721) += setup-sh7720.o +obj-$(CONFIG_CPU_SUBTYPE_SH7705) += setup-sh7705.o serial-sh770x.o +obj-$(CONFIG_CPU_SUBTYPE_SH7706) += setup-sh770x.o serial-sh770x.o +obj-$(CONFIG_CPU_SUBTYPE_SH7707) += setup-sh770x.o serial-sh770x.o +obj-$(CONFIG_CPU_SUBTYPE_SH7708) += setup-sh770x.o serial-sh770x.o +obj-$(CONFIG_CPU_SUBTYPE_SH7709) += setup-sh770x.o serial-sh770x.o +obj-$(CONFIG_CPU_SUBTYPE_SH7710) += setup-sh7710.o serial-sh7710.o +obj-$(CONFIG_CPU_SUBTYPE_SH7712) += setup-sh7710.o serial-sh7710.o +obj-$(CONFIG_CPU_SUBTYPE_SH7720) += setup-sh7720.o serial-sh7720.o +obj-$(CONFIG_CPU_SUBTYPE_SH7721) += setup-sh7720.o serial-sh7720.o # Primary on-chip clocks (common) clock-$(CONFIG_CPU_SH3) := clock-sh3.o @@ -28,4 +30,4 @@ clock-$(CONFIG_CPU_SUBTYPE_SH7712) := clock-sh7712.o pinmux-$(CONFIG_CPU_SUBTYPE_SH7720) := pinmux-sh7720.o obj-y += $(clock-y) -obj-$(CONFIG_GENERIC_GPIO) += $(pinmux-y) +obj-$(CONFIG_GPIOLIB) += $(pinmux-y) diff --git a/arch/sh/kernel/cpu/sh3/clock-sh3.c b/arch/sh/kernel/cpu/sh3/clock-sh3.c index c3c945958ba..90faa44ca94 100644 --- a/arch/sh/kernel/cpu/sh3/clock-sh3.c +++ b/arch/sh/kernel/cpu/sh3/clock-sh3.c @@ -28,60 +28,60 @@ static int pfc_divisors[] = { 1, 2, 3, 4, 6, 1, 1, 1 }; static void master_clk_init(struct clk *clk) { - int frqcr = ctrl_inw(FRQCR); + int frqcr = __raw_readw(FRQCR); int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); clk->rate *= pfc_divisors[idx]; } -static struct clk_ops sh3_master_clk_ops = { +static struct sh_clk_ops sh3_master_clk_ops = { .init = master_clk_init, }; -static void module_clk_recalc(struct clk *clk) +static unsigned long module_clk_recalc(struct clk *clk) { - int frqcr = ctrl_inw(FRQCR); + int frqcr = __raw_readw(FRQCR); int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); - clk->rate = clk->parent->rate / pfc_divisors[idx]; + return clk->parent->rate / pfc_divisors[idx]; } -static struct clk_ops sh3_module_clk_ops = { +static struct sh_clk_ops sh3_module_clk_ops = { .recalc = module_clk_recalc, }; -static void bus_clk_recalc(struct clk *clk) +static unsigned long bus_clk_recalc(struct clk *clk) { - int frqcr = ctrl_inw(FRQCR); + int frqcr = __raw_readw(FRQCR); int idx = ((frqcr & 0x8000) >> 13) | ((frqcr & 0x0030) >> 4); - clk->rate = clk->parent->rate / stc_multipliers[idx]; + return clk->parent->rate / stc_multipliers[idx]; } -static struct clk_ops sh3_bus_clk_ops = { +static struct sh_clk_ops sh3_bus_clk_ops = { .recalc = bus_clk_recalc, }; -static void cpu_clk_recalc(struct clk *clk) +static unsigned long cpu_clk_recalc(struct clk *clk) { - int frqcr = ctrl_inw(FRQCR); + int frqcr = __raw_readw(FRQCR); int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2); - clk->rate = clk->parent->rate / ifc_divisors[idx]; + return clk->parent->rate / ifc_divisors[idx]; } -static struct clk_ops sh3_cpu_clk_ops = { +static struct sh_clk_ops sh3_cpu_clk_ops = { .recalc = cpu_clk_recalc, }; -static struct clk_ops *sh3_clk_ops[] = { +static struct sh_clk_ops *sh3_clk_ops[] = { &sh3_master_clk_ops, &sh3_module_clk_ops, &sh3_bus_clk_ops, &sh3_cpu_clk_ops, }; -void __init arch_init_clk_ops(struct clk_ops **ops, int idx) +void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) { if (idx < ARRAY_SIZE(sh3_clk_ops)) *ops = sh3_clk_ops[idx]; diff --git a/arch/sh/kernel/cpu/sh3/clock-sh7705.c b/arch/sh/kernel/cpu/sh3/clock-sh7705.c index dfdbf3277fd..a8da4a9986b 100644 --- a/arch/sh/kernel/cpu/sh3/clock-sh7705.c +++ b/arch/sh/kernel/cpu/sh3/clock-sh7705.c @@ -32,51 +32,51 @@ static int pfc_divisors[] = { 1, 2, 3, 4, 6, 1, 1, 1 }; static void master_clk_init(struct clk *clk) { - clk->rate *= pfc_divisors[ctrl_inw(FRQCR) & 0x0003]; + clk->rate *= pfc_divisors[__raw_readw(FRQCR) & 0x0003]; } -static struct clk_ops sh7705_master_clk_ops = { +static struct sh_clk_ops sh7705_master_clk_ops = { .init = master_clk_init, }; -static void module_clk_recalc(struct clk *clk) +static unsigned long module_clk_recalc(struct clk *clk) { - int idx = ctrl_inw(FRQCR) & 0x0003; - clk->rate = clk->parent->rate / pfc_divisors[idx]; + int idx = __raw_readw(FRQCR) & 0x0003; + return clk->parent->rate / pfc_divisors[idx]; } -static struct clk_ops sh7705_module_clk_ops = { +static struct sh_clk_ops sh7705_module_clk_ops = { .recalc = module_clk_recalc, }; -static void bus_clk_recalc(struct clk *clk) +static unsigned long bus_clk_recalc(struct clk *clk) { - int idx = (ctrl_inw(FRQCR) & 0x0300) >> 8; - clk->rate = clk->parent->rate / stc_multipliers[idx]; + int idx = (__raw_readw(FRQCR) & 0x0300) >> 8; + return clk->parent->rate / stc_multipliers[idx]; } -static struct clk_ops sh7705_bus_clk_ops = { +static struct sh_clk_ops sh7705_bus_clk_ops = { .recalc = bus_clk_recalc, }; -static void cpu_clk_recalc(struct clk *clk) +static unsigned long cpu_clk_recalc(struct clk *clk) { - int idx = (ctrl_inw(FRQCR) & 0x0030) >> 4; - clk->rate = clk->parent->rate / ifc_divisors[idx]; + int idx = (__raw_readw(FRQCR) & 0x0030) >> 4; + return clk->parent->rate / ifc_divisors[idx]; } -static struct clk_ops sh7705_cpu_clk_ops = { +static struct sh_clk_ops sh7705_cpu_clk_ops = { .recalc = cpu_clk_recalc, }; -static struct clk_ops *sh7705_clk_ops[] = { +static struct sh_clk_ops *sh7705_clk_ops[] = { &sh7705_master_clk_ops, &sh7705_module_clk_ops, &sh7705_bus_clk_ops, &sh7705_cpu_clk_ops, }; -void __init arch_init_clk_ops(struct clk_ops **ops, int idx) +void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) { if (idx < ARRAY_SIZE(sh7705_clk_ops)) *ops = sh7705_clk_ops[idx]; diff --git a/arch/sh/kernel/cpu/sh3/clock-sh7706.c b/arch/sh/kernel/cpu/sh3/clock-sh7706.c index 0cf96f9833b..a4088e5b220 100644 --- a/arch/sh/kernel/cpu/sh3/clock-sh7706.c +++ b/arch/sh/kernel/cpu/sh3/clock-sh7706.c @@ -24,60 +24,60 @@ static int pfc_divisors[] = { 1, 2, 4, 1, 3, 6, 1, 1 }; static void master_clk_init(struct clk *clk) { - int frqcr = ctrl_inw(FRQCR); + int frqcr = __raw_readw(FRQCR); int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); clk->rate *= pfc_divisors[idx]; } -static struct clk_ops sh7706_master_clk_ops = { +static struct sh_clk_ops sh7706_master_clk_ops = { .init = master_clk_init, }; -static void module_clk_recalc(struct clk *clk) +static unsigned long module_clk_recalc(struct clk *clk) { - int frqcr = ctrl_inw(FRQCR); + int frqcr = __raw_readw(FRQCR); int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); - clk->rate = clk->parent->rate / pfc_divisors[idx]; + return clk->parent->rate / pfc_divisors[idx]; } -static struct clk_ops sh7706_module_clk_ops = { +static struct sh_clk_ops sh7706_module_clk_ops = { .recalc = module_clk_recalc, }; -static void bus_clk_recalc(struct clk *clk) +static unsigned long bus_clk_recalc(struct clk *clk) { - int frqcr = ctrl_inw(FRQCR); + int frqcr = __raw_readw(FRQCR); int idx = ((frqcr & 0x8000) >> 13) | ((frqcr & 0x0030) >> 4); - clk->rate = clk->parent->rate / stc_multipliers[idx]; + return clk->parent->rate / stc_multipliers[idx]; } -static struct clk_ops sh7706_bus_clk_ops = { +static struct sh_clk_ops sh7706_bus_clk_ops = { .recalc = bus_clk_recalc, }; -static void cpu_clk_recalc(struct clk *clk) +static unsigned long cpu_clk_recalc(struct clk *clk) { - int frqcr = ctrl_inw(FRQCR); + int frqcr = __raw_readw(FRQCR); int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2); - clk->rate = clk->parent->rate / ifc_divisors[idx]; + return clk->parent->rate / ifc_divisors[idx]; } -static struct clk_ops sh7706_cpu_clk_ops = { +static struct sh_clk_ops sh7706_cpu_clk_ops = { .recalc = cpu_clk_recalc, }; -static struct clk_ops *sh7706_clk_ops[] = { +static struct sh_clk_ops *sh7706_clk_ops[] = { &sh7706_master_clk_ops, &sh7706_module_clk_ops, &sh7706_bus_clk_ops, &sh7706_cpu_clk_ops, }; -void __init arch_init_clk_ops(struct clk_ops **ops, int idx) +void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) { if (idx < ARRAY_SIZE(sh7706_clk_ops)) *ops = sh7706_clk_ops[idx]; diff --git a/arch/sh/kernel/cpu/sh3/clock-sh7709.c b/arch/sh/kernel/cpu/sh3/clock-sh7709.c index b791a29fdb6..54a6d4bcc0d 100644 --- a/arch/sh/kernel/cpu/sh3/clock-sh7709.c +++ b/arch/sh/kernel/cpu/sh3/clock-sh7709.c @@ -22,74 +22,63 @@ static int stc_multipliers[] = { 1, 2, 4, 8, 3, 6, 1, 1 }; static int ifc_divisors[] = { 1, 2, 4, 1, 3, 1, 1, 1 }; static int pfc_divisors[] = { 1, 2, 4, 1, 3, 6, 1, 1 }; -static void set_bus_parent(struct clk *clk) -{ - struct clk *bus_clk = clk_get(NULL, "bus_clk"); - clk->parent = bus_clk; - clk_put(bus_clk); -} - static void master_clk_init(struct clk *clk) { - int frqcr = ctrl_inw(FRQCR); + int frqcr = __raw_readw(FRQCR); int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); clk->rate *= pfc_divisors[idx]; } -static struct clk_ops sh7709_master_clk_ops = { +static struct sh_clk_ops sh7709_master_clk_ops = { .init = master_clk_init, }; -static void module_clk_recalc(struct clk *clk) +static unsigned long module_clk_recalc(struct clk *clk) { - int frqcr = ctrl_inw(FRQCR); + int frqcr = __raw_readw(FRQCR); int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); - clk->rate = clk->parent->rate / pfc_divisors[idx]; + return clk->parent->rate / pfc_divisors[idx]; } -static struct clk_ops sh7709_module_clk_ops = { -#ifdef CLOCK_MODE_0_1_2_7 - .init = set_bus_parent, -#endif +static struct sh_clk_ops sh7709_module_clk_ops = { .recalc = module_clk_recalc, }; -static void bus_clk_recalc(struct clk *clk) +static unsigned long bus_clk_recalc(struct clk *clk) { - int frqcr = ctrl_inw(FRQCR); + int frqcr = __raw_readw(FRQCR); int idx = (frqcr & 0x0080) ? ((frqcr & 0x8000) >> 13) | ((frqcr & 0x0030) >> 4) : 1; - clk->rate = clk->parent->rate * stc_multipliers[idx]; + return clk->parent->rate * stc_multipliers[idx]; } -static struct clk_ops sh7709_bus_clk_ops = { +static struct sh_clk_ops sh7709_bus_clk_ops = { .recalc = bus_clk_recalc, }; -static void cpu_clk_recalc(struct clk *clk) +static unsigned long cpu_clk_recalc(struct clk *clk) { - int frqcr = ctrl_inw(FRQCR); + int frqcr = __raw_readw(FRQCR); int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2); - clk->rate = clk->parent->rate / ifc_divisors[idx]; + return clk->parent->rate / ifc_divisors[idx]; } -static struct clk_ops sh7709_cpu_clk_ops = { - .init = set_bus_parent, +static struct sh_clk_ops sh7709_cpu_clk_ops = { .recalc = cpu_clk_recalc, }; -static struct clk_ops *sh7709_clk_ops[] = { +static struct sh_clk_ops *sh7709_clk_ops[] = { &sh7709_master_clk_ops, &sh7709_module_clk_ops, &sh7709_bus_clk_ops, &sh7709_cpu_clk_ops, }; -void __init arch_init_clk_ops(struct clk_ops **ops, int idx) +void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) { if (idx < ARRAY_SIZE(sh7709_clk_ops)) *ops = sh7709_clk_ops[idx]; diff --git a/arch/sh/kernel/cpu/sh3/clock-sh7710.c b/arch/sh/kernel/cpu/sh3/clock-sh7710.c index 4744c50ec44..ce601b2e397 100644 --- a/arch/sh/kernel/cpu/sh3/clock-sh7710.c +++ b/arch/sh/kernel/cpu/sh3/clock-sh7710.c @@ -26,51 +26,51 @@ static int md_table[] = { 1, 2, 3, 4, 6, 8, 12 }; static void master_clk_init(struct clk *clk) { - clk->rate *= md_table[ctrl_inw(FRQCR) & 0x0007]; + clk->rate *= md_table[__raw_readw(FRQCR) & 0x0007]; } -static struct clk_ops sh7710_master_clk_ops = { +static struct sh_clk_ops sh7710_master_clk_ops = { .init = master_clk_init, }; -static void module_clk_recalc(struct clk *clk) +static unsigned long module_clk_recalc(struct clk *clk) { - int idx = (ctrl_inw(FRQCR) & 0x0007); - clk->rate = clk->parent->rate / md_table[idx]; + int idx = (__raw_readw(FRQCR) & 0x0007); + return clk->parent->rate / md_table[idx]; } -static struct clk_ops sh7710_module_clk_ops = { +static struct sh_clk_ops sh7710_module_clk_ops = { .recalc = module_clk_recalc, }; -static void bus_clk_recalc(struct clk *clk) +static unsigned long bus_clk_recalc(struct clk *clk) { - int idx = (ctrl_inw(FRQCR) & 0x0700) >> 8; - clk->rate = clk->parent->rate / md_table[idx]; + int idx = (__raw_readw(FRQCR) & 0x0700) >> 8; + return clk->parent->rate / md_table[idx]; } -static struct clk_ops sh7710_bus_clk_ops = { +static struct sh_clk_ops sh7710_bus_clk_ops = { .recalc = bus_clk_recalc, }; -static void cpu_clk_recalc(struct clk *clk) +static unsigned long cpu_clk_recalc(struct clk *clk) { - int idx = (ctrl_inw(FRQCR) & 0x0070) >> 4; - clk->rate = clk->parent->rate / md_table[idx]; + int idx = (__raw_readw(FRQCR) & 0x0070) >> 4; + return clk->parent->rate / md_table[idx]; } -static struct clk_ops sh7710_cpu_clk_ops = { +static struct sh_clk_ops sh7710_cpu_clk_ops = { .recalc = cpu_clk_recalc, }; -static struct clk_ops *sh7710_clk_ops[] = { +static struct sh_clk_ops *sh7710_clk_ops[] = { &sh7710_master_clk_ops, &sh7710_module_clk_ops, &sh7710_bus_clk_ops, &sh7710_cpu_clk_ops, }; -void __init arch_init_clk_ops(struct clk_ops **ops, int idx) +void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) { if (idx < ARRAY_SIZE(sh7710_clk_ops)) *ops = sh7710_clk_ops[idx]; diff --git a/arch/sh/kernel/cpu/sh3/clock-sh7712.c b/arch/sh/kernel/cpu/sh3/clock-sh7712.c index 54f54df51ef..21438a9a1ae 100644 --- a/arch/sh/kernel/cpu/sh3/clock-sh7712.c +++ b/arch/sh/kernel/cpu/sh3/clock-sh7712.c @@ -23,47 +23,47 @@ static int divisors[] = { 1, 2, 3, 4, 6 }; static void master_clk_init(struct clk *clk) { - int frqcr = ctrl_inw(FRQCR); + int frqcr = __raw_readw(FRQCR); int idx = (frqcr & 0x0300) >> 8; clk->rate *= multipliers[idx]; } -static struct clk_ops sh7712_master_clk_ops = { +static struct sh_clk_ops sh7712_master_clk_ops = { .init = master_clk_init, }; -static void module_clk_recalc(struct clk *clk) +static unsigned long module_clk_recalc(struct clk *clk) { - int frqcr = ctrl_inw(FRQCR); + int frqcr = __raw_readw(FRQCR); int idx = frqcr & 0x0007; - clk->rate = clk->parent->rate / divisors[idx]; + return clk->parent->rate / divisors[idx]; } -static struct clk_ops sh7712_module_clk_ops = { +static struct sh_clk_ops sh7712_module_clk_ops = { .recalc = module_clk_recalc, }; -static void cpu_clk_recalc(struct clk *clk) +static unsigned long cpu_clk_recalc(struct clk *clk) { - int frqcr = ctrl_inw(FRQCR); + int frqcr = __raw_readw(FRQCR); int idx = (frqcr & 0x0030) >> 4; - clk->rate = clk->parent->rate / divisors[idx]; + return clk->parent->rate / divisors[idx]; } -static struct clk_ops sh7712_cpu_clk_ops = { +static struct sh_clk_ops sh7712_cpu_clk_ops = { .recalc = cpu_clk_recalc, }; -static struct clk_ops *sh7712_clk_ops[] = { +static struct sh_clk_ops *sh7712_clk_ops[] = { &sh7712_master_clk_ops, &sh7712_module_clk_ops, &sh7712_cpu_clk_ops, }; -void __init arch_init_clk_ops(struct clk_ops **ops, int idx) +void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) { if (idx < ARRAY_SIZE(sh7712_clk_ops)) *ops = sh7712_clk_ops[idx]; diff --git a/arch/sh/kernel/cpu/sh3/entry.S b/arch/sh/kernel/cpu/sh3/entry.S index b4106d0c68e..262db6ec067 100644 --- a/arch/sh/kernel/cpu/sh3/entry.S +++ b/arch/sh/kernel/cpu/sh3/entry.S @@ -2,7 +2,7 @@ * arch/sh/kernel/cpu/sh3/entry.S * * Copyright (C) 1999, 2000, 2002 Niibe Yutaka - * Copyright (C) 2003 - 2006 Paul Mundt + * Copyright (C) 2003 - 2012 Paul Mundt * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive @@ -16,6 +16,8 @@ #include <asm/unistd.h> #include <cpu/mmu_context.h> #include <asm/page.h> +#include <asm/cache.h> +#include <asm/thread_info.h> ! NOTE: ! GNU as (as of 2.9.1) changes bf/s into bt/s and bra, when the address @@ -52,10 +54,6 @@ * syscall # * */ -#if defined(CONFIG_KGDB) -NMI_VEC = 0x1c0 ! Must catch early for debounce -#endif - /* Offsets to the stack */ OFF_R0 = 0 /* Return value. New ABI also arg4 */ OFF_R1 = 4 /* New ABI: arg5 */ @@ -70,7 +68,6 @@ OFF_PC = (16*4) OFF_SR = (16*4+8) OFF_TRA = (16*4+6*4) - #define k0 r0 #define k1 r1 #define k2 r2 @@ -112,34 +109,33 @@ OFF_TRA = (16*4+6*4) #if defined(CONFIG_MMU) .align 2 ENTRY(tlb_miss_load) - bra call_dpf + bra call_handle_tlbmiss mov #0, r5 .align 2 ENTRY(tlb_miss_store) - bra call_dpf - mov #1, r5 + bra call_handle_tlbmiss + mov #FAULT_CODE_WRITE, r5 .align 2 ENTRY(initial_page_write) - bra call_dpf - mov #1, r5 + bra call_handle_tlbmiss + mov #FAULT_CODE_INITIAL, r5 .align 2 ENTRY(tlb_protection_violation_load) - bra call_dpf - mov #0, r5 + bra call_do_page_fault + mov #FAULT_CODE_PROT, r5 .align 2 ENTRY(tlb_protection_violation_store) - bra call_dpf - mov #1, r5 + bra call_do_page_fault + mov #(FAULT_CODE_PROT | FAULT_CODE_WRITE), r5 -call_dpf: +call_handle_tlbmiss: mov.l 1f, r0 mov r5, r8 mov.l @r0, r6 - mov r6, r9 mov.l 2f, r0 sts pr, r10 jsr @r0 @@ -150,16 +146,23 @@ call_dpf: lds r10, pr rts nop -0: mov.l 3f, r0 - mov r9, r6 +0: mov r8, r5 +call_do_page_fault: + mov.l 1f, r0 + mov.l @r0, r6 + + mov.l 3f, r0 + mov.l 4f, r1 + mov r15, r4 jmp @r0 - mov r15, r4 + lds r1, pr .align 2 1: .long MMU_TEA -2: .long __do_page_fault +2: .long handle_tlbmiss 3: .long do_page_fault +4: .long ret_from_exception .align 2 ENTRY(address_error_load) @@ -187,44 +190,35 @@ call_dae: #if defined(CONFIG_SH_STANDARD_BIOS) /* Unwind the stack and jmp to the debug entry */ ENTRY(sh_bios_handler) - mov.l @r15+, r0 - mov.l @r15+, r1 - mov.l @r15+, r2 - mov.l @r15+, r3 - mov.l @r15+, r4 - mov.l @r15+, r5 - mov.l @r15+, r6 - mov.l @r15+, r7 - stc sr, r8 - mov.l 1f, r9 ! BL =1, RB=1, IMASK=0x0F - or r9, r8 - ldc r8, sr ! here, change the register bank - mov.l @r15+, r8 - mov.l @r15+, r9 - mov.l @r15+, r10 - mov.l @r15+, r11 - mov.l @r15+, r12 - mov.l @r15+, r13 - mov.l @r15+, r14 - mov.l @r15+, k0 - ldc.l @r15+, spc - lds.l @r15+, pr - mov.l @r15+, k1 - ldc.l @r15+, gbr - lds.l @r15+, mach - lds.l @r15+, macl - mov k0, r15 + mov.l 1f, r8 + bsr restore_regs + nop + + lds k2, pr ! restore pr + mov k4, r15 ! mov.l 2f, k0 mov.l @k0, k0 jmp @k0 - ldc k1, ssr + ldc k3, ssr .align 2 1: .long 0x300000f0 2: .long gdb_vbr_vector #endif /* CONFIG_SH_STANDARD_BIOS */ -restore_all: +! restore_regs() +! - restore r0, r1, r2, r3, r4, r5, r6, r7 from the stack +! - switch bank +! - restore r8, r9, r10, r11, r12, r13, r14, r15 from the stack +! - restore spc, pr*, ssr, gbr, mach, macl, skip default tra +! k2 returns original pr +! k3 returns original sr +! k4 returns original stack pointer +! r8 passes SR bitmask, overwritten with restored data on return +! r9 trashed +! BL=0 on entry, on exit BL=1 (depending on r8). + +ENTRY(restore_regs) mov.l @r15+, r0 mov.l @r15+, r1 mov.l @r15+, r2 @@ -234,10 +228,9 @@ restore_all: mov.l @r15+, r6 mov.l @r15+, r7 ! - stc sr, r8 - mov.l 7f, r9 - or r9, r8 ! BL =1, RB=1 - ldc r8, sr ! here, change the register bank + stc sr, r9 + or r8, r9 + ldc r9, sr ! mov.l @r15+, r8 mov.l @r15+, r9 @@ -248,53 +241,27 @@ restore_all: mov.l @r15+, r14 mov.l @r15+, k4 ! original stack pointer ldc.l @r15+, spc - lds.l @r15+, pr + mov.l @r15+, k2 ! original PR mov.l @r15+, k3 ! original SR ldc.l @r15+, gbr lds.l @r15+, mach lds.l @r15+, macl - add #4, r15 ! Skip syscall number - ! -#ifdef CONFIG_SH_DSP - mov.l @r15+, k0 ! DSP mode marker - mov.l 5f, k1 - cmp/eq k0, k1 ! Do we have a DSP stack frame? - bf skip_restore - - stc sr, k0 ! Enable CPU DSP mode - or k1, k0 ! (within kernel it may be disabled) - ldc k0, sr - mov r2, k0 ! Backup r2 - - ! Restore DSP registers from stack - mov r15, r2 - movs.l @r2+, a1 - movs.l @r2+, a0g - movs.l @r2+, a1g - movs.l @r2+, m0 - movs.l @r2+, m1 - mov r2, r15 - - lds.l @r15+, a0 - lds.l @r15+, x0 - lds.l @r15+, x1 - lds.l @r15+, y0 - lds.l @r15+, y1 - lds.l @r15+, dsr - ldc.l @r15+, rs - ldc.l @r15+, re - ldc.l @r15+, mod - - mov k0, r2 ! Restore r2 -skip_restore: -#endif + rts + add #4, r15 ! Skip syscall number + +restore_all: + mov.l 7f, r8 + bsr restore_regs + nop + + lds k2, pr ! restore pr ! ! Calculate new SR value mov k3, k2 ! original SR value - mov #0xf0, k1 + mov #0xfffffff0, k1 extu.b k1, k1 not k1, k1 - and k1, k2 ! Mask orignal SR value + and k1, k2 ! Mask original SR value ! mov k3, k0 ! Calculate IMASK-bits shlr2 k0 @@ -307,22 +274,12 @@ skip_restore: 6: or k0, k2 ! Set the IMASK-bits ldc k2, ssr ! -#if defined(CONFIG_KGDB) - ! Clear in_nmi - mov.l 6f, k0 - mov #0, k1 - mov.b k1, @k0 -#endif - mov.l @r15+, k2 ! restore EXPEVT mov k4, r15 rte nop .align 2 5: .long 0x00001000 ! DSP -#ifdef CONFIG_KGDB -6: .long in_nmi -#endif 7: .long 0x30000000 ! common exception handler @@ -336,81 +293,21 @@ skip_restore: ENTRY(vbr_base) .long 0 ! +! 0x100: General exception vector +! .balign 256,0,256 general_exception: - mov.l 1f, k2 - mov.l 2f, k3 -#ifdef CONFIG_CPU_SUBTYPE_SHX3 - mov.l @k2, k2 - - ! Is EXPEVT larger than 0x800? - mov #0x8, k0 - shll8 k0 - cmp/hs k0, k2 - bf 0f - - ! then add 0x580 (k2 is 0xd80 or 0xda0) - mov #0x58, k0 - shll2 k0 - shll2 k0 - add k0, k2 -0: - bra handle_exception - nop -#else - bra handle_exception - mov.l @k2, k2 -#endif - .align 2 -1: .long EXPEVT -2: .long ret_from_exception -! -! - - .balign 1024,0,1024 -tlb_miss: - mov.l 1f, k2 - mov.l 4f, k3 - bra handle_exception - mov.l @k2, k2 -! - .balign 512,0,512 -interrupt: - mov.l 3f, k3 -#if defined(CONFIG_KGDB) - mov.l 2f, k2 - ! Debounce (filter nested NMI) - mov.l @k2, k0 - mov.l 5f, k1 - cmp/eq k1, k0 - bf 0f - mov.l 6f, k1 - tas.b @k1 - bt 0f - rte - nop - .align 2 -2: .long INTEVT -5: .long NMI_VEC -6: .long in_nmi -0: -#endif /* defined(CONFIG_KGDB) */ bra handle_exception - mov #-1, k2 ! interrupt exception marker + sts pr, k3 ! save original pr value in k3 - .align 2 -1: .long EXPEVT -3: .long ret_from_irq -4: .long ret_from_exception - -! -! - .align 2 -ENTRY(handle_exception) - ! Using k0, k1 for scratch registers (r0_bank1, r1_bank), - ! save all registers onto stack. - ! +! prepare_stack() +! - roll back gRB +! - switch to kernel stack +! k0 returns original sp (after roll back) +! k1 trashed +! k2 trashed +prepare_stack: #ifdef CONFIG_GUSA ! Check for roll back gRB (User and Kernel) mov r15, k0 @@ -430,7 +327,7 @@ ENTRY(handle_exception) 2: mov k1, r15 ! SP = r1 1: #endif - + ! Switch to kernel stack if needed stc ssr, k0 ! Is it from kernel space? shll k0 ! Check MD bit (bit30) by shifting it into... shll k0 ! ...the T bit @@ -443,65 +340,67 @@ ENTRY(handle_exception) add current, k1 mov k1, r15 ! change to kernel stack ! -1: mov.l 2f, k1 - ! -#ifdef CONFIG_SH_DSP - mov.l r2, @-r15 ! Save r2, we need another reg - stc sr, k4 - mov.l 1f, r2 - tst r2, k4 ! Check if in DSP mode - mov.l @r15+, r2 ! Restore r2 now - bt/s skip_save - mov #0, k4 ! Set marker for no stack frame - - mov r2, k4 ! Backup r2 (in k4) for later - - ! Save DSP registers on stack - stc.l mod, @-r15 - stc.l re, @-r15 - stc.l rs, @-r15 - sts.l dsr, @-r15 - sts.l y1, @-r15 - sts.l y0, @-r15 - sts.l x1, @-r15 - sts.l x0, @-r15 - sts.l a0, @-r15 - - ! GAS is broken, does not generate correct "movs.l Ds,@-As" instr. - - ! FIXME: Make sure that this is still the case with newer toolchains, - ! as we're not at all interested in supporting ancient toolchains at - ! this point. -- PFM. - - mov r15, r2 - .word 0xf653 ! movs.l a1, @-r2 - .word 0xf6f3 ! movs.l a0g, @-r2 - .word 0xf6d3 ! movs.l a1g, @-r2 - .word 0xf6c3 ! movs.l m0, @-r2 - .word 0xf6e3 ! movs.l m1, @-r2 - mov r2, r15 - - mov k4, r2 ! Restore r2 - mov.l 1f, k4 ! Force DSP stack frame -skip_save: - mov.l k4, @-r15 ! Push DSP mode marker onto stack -#endif - ! Save the user registers on the stack. - mov.l k2, @-r15 ! EXPEVT +1: + rts + nop - mov #-1, k4 - mov.l k4, @-r15 ! set TRA (default: -1) - ! +! +! 0x400: Instruction and Data TLB miss exception vector +! + .balign 1024,0,1024 +tlb_miss: + sts pr, k3 ! save original pr value in k3 + +handle_exception: + mova exception_data, k0 + + ! Setup stack and save DSP context (k0 contains original r15 on return) + bsr prepare_stack + PREF(k0) + + ! Save registers / Switch to bank 0 + mov.l 5f, k2 ! vector register address + mov.l 1f, k4 ! SR bits to clear in k4 + bsr save_regs ! needs original pr value in k3 + mov.l @k2, k2 ! read out vector and keep in k2 + +handle_exception_special: + setup_frame_reg + + ! Setup return address and jump to exception handler + mov.l 7f, r9 ! fetch return address + stc r2_bank, r0 ! k2 (vector) + mov.l 6f, r10 + shlr2 r0 + shlr r0 + mov.l @(r0, r10), r10 + jmp @r10 + lds r9, pr ! put return address in pr + + .align L1_CACHE_SHIFT + +! save_regs() +! - save default tra, macl, mach, gbr, ssr, pr* and spc on the stack +! - save r15*, r14, r13, r12, r11, r10, r9, r8 on the stack +! - switch bank +! - save r7, r6, r5, r4, r3, r2, r1, r0 on the stack +! k0 contains original stack pointer* +! k1 trashed +! k3 passes original pr* +! k4 passes SR bitmask +! BL=1 on entry, on exit BL=0. + +ENTRY(save_regs) + mov #-1, r1 + mov.l k1, @-r15 ! set TRA (default: -1) sts.l macl, @-r15 sts.l mach, @-r15 stc.l gbr, @-r15 stc.l ssr, @-r15 - sts.l pr, @-r15 + mov.l k3, @-r15 ! original pr in k3 stc.l spc, @-r15 - ! - lds k3, pr ! Set the return address to pr - ! - mov.l k0, @-r15 ! save orignal stack + + mov.l k0, @-r15 ! original stack pointer in k0 mov.l r14, @-r15 mov.l r13, @-r15 mov.l r12, @-r15 @@ -509,13 +408,23 @@ skip_save: mov.l r10, @-r15 mov.l r9, @-r15 mov.l r8, @-r15 - ! - stc sr, r8 ! Back to normal register bank, and - or k1, r8 ! Block all interrupts - mov.l 3f, k1 - and k1, r8 ! ... - ldc r8, sr ! ...changed here. - ! + + mov.l 0f, k3 ! SR bits to set in k3 + + ! fall-through + +! save_low_regs() +! - modify SR for bank switch +! - save r7, r6, r5, r4, r3, r2, r1, r0 on the stack +! k3 passes bits to set in SR +! k4 passes bits to clear in SR + +ENTRY(save_low_regs) + stc sr, r8 + or k3, r8 + and k4, r8 + ldc r8, sr + mov.l r7, @-r15 mov.l r6, @-r15 mov.l r5, @-r15 @@ -523,52 +432,82 @@ skip_save: mov.l r3, @-r15 mov.l r2, @-r15 mov.l r1, @-r15 - mov.l r0, @-r15 + rts + mov.l r0, @-r15 + +! +! 0x600: Interrupt / NMI vector +! + .balign 512,0,512 +ENTRY(handle_interrupt) + sts pr, k3 ! save original pr value in k3 + mova exception_data, k0 + + ! Setup stack and save DSP context (k0 contains original r15 on return) + bsr prepare_stack + PREF(k0) + + ! Save registers / Switch to bank 0 + mov.l 1f, k4 ! SR bits to clear in k4 + bsr save_regs ! needs original pr value in k3 + mov #-1, k2 ! default vector kept in k2 + + setup_frame_reg + + stc sr, r0 ! get status register + shlr2 r0 + and #0x3c, r0 + cmp/eq #0x3c, r0 + bf 9f + TRACE_IRQS_OFF +9: + + ! Setup return address and jump to do_IRQ + mov.l 4f, r9 ! fetch return address + lds r9, pr ! put return address in pr + mov.l 2f, r4 + mov.l 3f, r9 + mov.l @r4, r4 ! pass INTEVT vector as arg0 + + shlr2 r4 + shlr r4 + mov r4, r0 ! save vector->jmp table offset for later + + shlr2 r4 ! vector to IRQ# conversion + add #-0x10, r4 + + cmp/pz r4 ! is it a valid IRQ? + bt 10f /* - * This gets a bit tricky.. in the INTEVT case we don't want to use - * the VBR offset as a destination in the jump call table, since all - * of the destinations are the same. In this case, (interrupt) sets - * a marker in r2 (now r2_bank since SR.RB changed), which we check - * to determine the exception type. For all other exceptions, we - * forcibly read EXPEVT from memory and fix up the jump address, in - * the interrupt exception case we jump to do_IRQ() and defer the - * INTEVT read until there. As a bonus, we can also clean up the SR.RB - * checks that do_IRQ() was doing.. + * We got here as a result of taking the INTEVT path for something + * that isn't a valid hard IRQ, therefore we bypass the do_IRQ() + * path and special case the event dispatch instead. This is the + * expected path for the NMI (and any other brilliantly implemented + * exception), which effectively wants regular exception dispatch + * but is unfortunately reported through INTEVT rather than + * EXPEVT. Grr. */ - stc r2_bank, r8 - cmp/pz r8 - bf interrupt_exception - shlr2 r8 - shlr r8 - mov.l 4f, r9 - add r8, r9 - mov.l @r9, r9 + mov.l 6f, r9 + mov.l @(r0, r9), r9 jmp @r9 - nop - rts - nop + mov r15, r8 ! trap handlers take saved regs in r8 - .align 2 -1: .long 0x00001000 ! DSP=1 -2: .long 0x000080f0 ! FD=1, IMASK=15 -3: .long 0xcfffffff ! RB=0, BL=0 -4: .long exception_handling_table +10: + jmp @r9 ! Off to do_IRQ() we go. + mov r15, r5 ! pass saved registers as arg1 -interrupt_exception: - mov.l 1f, r9 - mov.l 2f, r4 - mov.l @r4, r4 - jmp @r9 - mov r15, r5 +ENTRY(exception_none) rts nop - .align 2 -1: .long do_IRQ + .align L1_CACHE_SHIFT +exception_data: +0: .long 0x000080f0 ! FD=1, IMASK=15 +1: .long 0xcfffffff ! RB=0, BL=0 2: .long INTEVT - - .align 2 -ENTRY(exception_none) - rts - nop +3: .long do_IRQ +4: .long ret_from_irq +5: .long EXPEVT +6: .long exception_handling_table +7: .long ret_from_exception diff --git a/arch/sh/kernel/cpu/sh3/ex.S b/arch/sh/kernel/cpu/sh3/ex.S index e5a0de39a2d..99b4d020179 100644 --- a/arch/sh/kernel/cpu/sh3/ex.S +++ b/arch/sh/kernel/cpu/sh3/ex.S @@ -48,10 +48,8 @@ ENTRY(exception_handling_table) .long system_call ! Unconditional Trap /* 160 */ .long exception_error ! reserved_instruction (filled by trap_init) /* 180 */ .long exception_error ! illegal_slot_instruction (filled by trap_init) /*1A0*/ -ENTRY(nmi_slot) - .long kgdb_handle_exception /* 1C0 */ ! Allow trap to debugger -ENTRY(user_break_point_trap) - .long break_point_trap /* 1E0 */ + .long nmi_trap_handler /* 1C0 */ ! Allow trap to debugger + .long breakpoint_trap_handler /* 1E0 */ /* * Pad the remainder of the table out, exceptions residing in far diff --git a/arch/sh/kernel/cpu/sh3/pinmux-sh7720.c b/arch/sh/kernel/cpu/sh3/pinmux-sh7720.c index 9ca15462714..26e90a66ebb 100644 --- a/arch/sh/kernel/cpu/sh3/pinmux-sh7720.c +++ b/arch/sh/kernel/cpu/sh3/pinmux-sh7720.c @@ -8,1235 +8,23 @@ * for more details. */ +#include <linux/bug.h> #include <linux/init.h> #include <linux/kernel.h> -#include <linux/gpio.h> -#include <cpu/sh7720.h> +#include <linux/ioport.h> +#include <cpu/pfc.h> -enum { - PINMUX_RESERVED = 0, - - PINMUX_DATA_BEGIN, - PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA, - PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA, - PTB7_DATA, PTB6_DATA, PTB5_DATA, PTB4_DATA, - PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA, - PTC7_DATA, PTC6_DATA, PTC5_DATA, PTC4_DATA, - PTC3_DATA, PTC2_DATA, PTC1_DATA, PTC0_DATA, - PTD7_DATA, PTD6_DATA, PTD5_DATA, PTD4_DATA, - PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA, - PTE6_DATA, PTE5_DATA, PTE4_DATA, - PTE3_DATA, PTE2_DATA, PTE1_DATA, PTE0_DATA, - PTF6_DATA, PTF5_DATA, PTF4_DATA, - PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA, - PTG6_DATA, PTG5_DATA, PTG4_DATA, - PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA, - PTH6_DATA, PTH5_DATA, PTH4_DATA, - PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA, - PTJ6_DATA, PTJ5_DATA, PTJ4_DATA, - PTJ3_DATA, PTJ2_DATA, PTJ1_DATA, PTJ0_DATA, - PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA, - PTL7_DATA, PTL6_DATA, PTL5_DATA, PTL4_DATA, PTL3_DATA, - PTM7_DATA, PTM6_DATA, PTM5_DATA, PTM4_DATA, - PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA, - PTP4_DATA, PTP3_DATA, PTP2_DATA, PTP1_DATA, PTP0_DATA, - PTR7_DATA, PTR6_DATA, PTR5_DATA, PTR4_DATA, - PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA, - PTS4_DATA, PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA, - PTT4_DATA, PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA, - PTU4_DATA, PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA, - PTV4_DATA, PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA, - PINMUX_DATA_END, - - PINMUX_INPUT_BEGIN, - PTA7_IN, PTA6_IN, PTA5_IN, PTA4_IN, - PTA3_IN, PTA2_IN, PTA1_IN, PTA0_IN, - PTB7_IN, PTB6_IN, PTB5_IN, PTB4_IN, - PTB3_IN, PTB2_IN, PTB1_IN, PTB0_IN, - PTC7_IN, PTC6_IN, PTC5_IN, PTC4_IN, - PTC3_IN, PTC2_IN, PTC1_IN, PTC0_IN, - PTD7_IN, PTD6_IN, PTD5_IN, PTD4_IN, - PTD3_IN, PTD2_IN, PTD1_IN, PTD0_IN, - PTE6_IN, PTE5_IN, PTE4_IN, - PTE3_IN, PTE2_IN, PTE1_IN, PTE0_IN, - PTF6_IN, PTF5_IN, PTF4_IN, - PTF3_IN, PTF2_IN, PTF1_IN, PTF0_IN, - PTG6_IN, PTG5_IN, PTG4_IN, - PTG3_IN, PTG2_IN, PTG1_IN, PTG0_IN, - PTH6_IN, PTH5_IN, PTH4_IN, - PTH3_IN, PTH2_IN, PTH1_IN, PTH0_IN, - PTJ6_IN, PTJ5_IN, PTJ4_IN, - PTJ3_IN, PTJ2_IN, PTJ1_IN, PTJ0_IN, - PTK3_IN, PTK2_IN, PTK1_IN, PTK0_IN, - PTL7_IN, PTL6_IN, PTL5_IN, PTL4_IN, PTL3_IN, - PTM7_IN, PTM6_IN, PTM5_IN, PTM4_IN, - PTM3_IN, PTM2_IN, PTM1_IN, PTM0_IN, - PTP4_IN, PTP3_IN, PTP2_IN, PTP1_IN, PTP0_IN, - PTR7_IN, PTR6_IN, PTR5_IN, PTR4_IN, - PTR3_IN, PTR2_IN, PTR1_IN, PTR0_IN, - PTS4_IN, PTS3_IN, PTS2_IN, PTS1_IN, PTS0_IN, - PTT4_IN, PTT3_IN, PTT2_IN, PTT1_IN, PTT0_IN, - PTU4_IN, PTU3_IN, PTU2_IN, PTU1_IN, PTU0_IN, - PTV4_IN, PTV3_IN, PTV2_IN, PTV1_IN, PTV0_IN, - PINMUX_INPUT_END, - - PINMUX_INPUT_PULLUP_BEGIN, - PTA7_IN_PU, PTA6_IN_PU, PTA5_IN_PU, PTA4_IN_PU, - PTA3_IN_PU, PTA2_IN_PU, PTA1_IN_PU, PTA0_IN_PU, - PTB7_IN_PU, PTB6_IN_PU, PTB5_IN_PU, PTB4_IN_PU, - PTB3_IN_PU, PTB2_IN_PU, PTB1_IN_PU, PTB0_IN_PU, - PTC7_IN_PU, PTC6_IN_PU, PTC5_IN_PU, PTC4_IN_PU, - PTC3_IN_PU, PTC2_IN_PU, PTC1_IN_PU, PTC0_IN_PU, - PTD7_IN_PU, PTD6_IN_PU, PTD5_IN_PU, PTD4_IN_PU, - PTD3_IN_PU, PTD2_IN_PU, PTD1_IN_PU, PTD0_IN_PU, - PTE4_IN_PU, PTE3_IN_PU, PTE2_IN_PU, PTE1_IN_PU, PTE0_IN_PU, - PTF0_IN_PU, - PTG6_IN_PU, PTG5_IN_PU, PTG4_IN_PU, - PTG3_IN_PU, PTG2_IN_PU, PTG1_IN_PU, PTG0_IN_PU, - PTH6_IN_PU, PTH5_IN_PU, PTH4_IN_PU, - PTH3_IN_PU, PTH2_IN_PU, PTH1_IN_PU, PTH0_IN_PU, - PTJ6_IN_PU, PTJ5_IN_PU, PTJ4_IN_PU, - PTJ3_IN_PU, PTJ2_IN_PU, PTJ1_IN_PU, PTJ0_IN_PU, - PTK3_IN_PU, PTK2_IN_PU, PTK1_IN_PU, PTK0_IN_PU, - PTL7_IN_PU, PTL6_IN_PU, PTL5_IN_PU, PTL4_IN_PU, PTL3_IN_PU, - PTM7_IN_PU, PTM6_IN_PU, PTM5_IN_PU, PTM4_IN_PU, - PTM3_IN_PU, PTM2_IN_PU, PTM1_IN_PU, PTM0_IN_PU, - PTP4_IN_PU, PTP3_IN_PU, PTP2_IN_PU, PTP1_IN_PU, PTP0_IN_PU, - PTR7_IN_PU, PTR6_IN_PU, PTR5_IN_PU, PTR4_IN_PU, - PTR3_IN_PU, PTR2_IN_PU, PTR1_IN_PU, PTR0_IN_PU, - PTS4_IN_PU, PTS3_IN_PU, PTS2_IN_PU, PTS1_IN_PU, PTS0_IN_PU, - PTT4_IN_PU, PTT3_IN_PU, PTT2_IN_PU, PTT1_IN_PU, PTT0_IN_PU, - PTU4_IN_PU, PTU3_IN_PU, PTU2_IN_PU, PTU1_IN_PU, PTU0_IN_PU, - PTV4_IN_PU, PTV3_IN_PU, PTV2_IN_PU, PTV1_IN_PU, PTV0_IN_PU, - PINMUX_INPUT_PULLUP_END, - - PINMUX_OUTPUT_BEGIN, - PTA7_OUT, PTA6_OUT, PTA5_OUT, PTA4_OUT, - PTA3_OUT, PTA2_OUT, PTA1_OUT, PTA0_OUT, - PTB7_OUT, PTB6_OUT, PTB5_OUT, PTB4_OUT, - PTB3_OUT, PTB2_OUT, PTB1_OUT, PTB0_OUT, - PTC7_OUT, PTC6_OUT, PTC5_OUT, PTC4_OUT, - PTC3_OUT, PTC2_OUT, PTC1_OUT, PTC0_OUT, - PTD7_OUT, PTD6_OUT, PTD5_OUT, PTD4_OUT, - PTD3_OUT, PTD2_OUT, PTD1_OUT, PTD0_OUT, - PTE4_OUT, PTE3_OUT, PTE2_OUT, PTE1_OUT, PTE0_OUT, - PTF0_OUT, - PTG6_OUT, PTG5_OUT, PTG4_OUT, - PTG3_OUT, PTG2_OUT, PTG1_OUT, PTG0_OUT, - PTH6_OUT, PTH5_OUT, PTH4_OUT, - PTH3_OUT, PTH2_OUT, PTH1_OUT, PTH0_OUT, - PTJ6_OUT, PTJ5_OUT, PTJ4_OUT, - PTJ3_OUT, PTJ2_OUT, PTJ1_OUT, PTJ0_OUT, - PTK3_OUT, PTK2_OUT, PTK1_OUT, PTK0_OUT, - PTL7_OUT, PTL6_OUT, PTL5_OUT, PTL4_OUT, PTL3_OUT, - PTM7_OUT, PTM6_OUT, PTM5_OUT, PTM4_OUT, - PTM3_OUT, PTM2_OUT, PTM1_OUT, PTM0_OUT, - PTP4_OUT, PTP3_OUT, PTP2_OUT, PTP1_OUT, PTP0_OUT, - PTR7_OUT, PTR6_OUT, PTR5_OUT, PTR4_OUT, - PTR3_OUT, PTR2_OUT, PTR1_OUT, PTR0_OUT, - PTS4_OUT, PTS3_OUT, PTS2_OUT, PTS1_OUT, PTS0_OUT, - PTT4_OUT, PTT3_OUT, PTT2_OUT, PTT1_OUT, PTT0_OUT, - PTU4_OUT, PTU3_OUT, PTU2_OUT, PTU1_OUT, PTU0_OUT, - PTV4_OUT, PTV3_OUT, PTV2_OUT, PTV1_OUT, PTV0_OUT, - PINMUX_OUTPUT_END, - - PINMUX_FUNCTION_BEGIN, - PTA7_FN, PTA6_FN, PTA5_FN, PTA4_FN, - PTA3_FN, PTA2_FN, PTA1_FN, PTA0_FN, - PTB7_FN, PTB6_FN, PTB5_FN, PTB4_FN, - PTB3_FN, PTB2_FN, PTB1_FN, PTB0_FN, - PTC7_FN, PTC6_FN, PTC5_FN, PTC4_FN, - PTC3_FN, PTC2_FN, PTC1_FN, PTC0_FN, - PTD7_FN, PTD6_FN, PTD5_FN, PTD4_FN, - PTD3_FN, PTD2_FN, PTD1_FN, PTD0_FN, - PTE6_FN, PTE5_FN, PTE4_FN, - PTE3_FN, PTE2_FN, PTE1_FN, PTE0_FN, - PTF6_FN, PTF5_FN, PTF4_FN, - PTF3_FN, PTF2_FN, PTF1_FN, PTF0_FN, - PTG6_FN, PTG5_FN, PTG4_FN, - PTG3_FN, PTG2_FN, PTG1_FN, PTG0_FN, - PTH6_FN, PTH5_FN, PTH4_FN, - PTH3_FN, PTH2_FN, PTH1_FN, PTH0_FN, - PTJ6_FN, PTJ5_FN, PTJ4_FN, - PTJ3_FN, PTJ2_FN, PTJ1_FN, PTJ0_FN, - PTK3_FN, PTK2_FN, PTK1_FN, PTK0_FN, - PTL7_FN, PTL6_FN, PTL5_FN, PTL4_FN, PTL3_FN, - PTM7_FN, PTM6_FN, PTM5_FN, PTM4_FN, - PTM3_FN, PTM2_FN, PTM1_FN, PTM0_FN, - PTP4_FN, PTP3_FN, PTP2_FN, PTP1_FN, PTP0_FN, - PTR7_FN, PTR6_FN, PTR5_FN, PTR4_FN, - PTR3_FN, PTR2_FN, PTR1_FN, PTR0_FN, - PTS4_FN, PTS3_FN, PTS2_FN, PTS1_FN, PTS0_FN, - PTT4_FN, PTT3_FN, PTT2_FN, PTT1_FN, PTT0_FN, - PTU4_FN, PTU3_FN, PTU2_FN, PTU1_FN, PTU0_FN, - PTV4_FN, PTV3_FN, PTV2_FN, PTV1_FN, PTV0_FN, - - PSELA_1_0_00, PSELA_1_0_01, PSELA_1_0_10, - PSELA_3_2_00, PSELA_3_2_01, PSELA_3_2_10, PSELA_3_2_11, - PSELA_5_4_00, PSELA_5_4_01, PSELA_5_4_10, PSELA_5_4_11, - PSELA_7_6_00, PSELA_7_6_01, PSELA_7_6_10, - PSELA_9_8_00, PSELA_9_8_01, PSELA_9_8_10, - PSELA_11_10_00, PSELA_11_10_01, PSELA_11_10_10, - PSELA_13_12_00, PSELA_13_12_10, - PSELA_15_14_00, PSELA_15_14_10, - PSELB_9_8_00, PSELB_9_8_11, - PSELB_11_10_00, PSELB_11_10_01, PSELB_11_10_10, PSELB_11_10_11, - PSELB_13_12_00, PSELB_13_12_01, PSELB_13_12_10, PSELB_13_12_11, - PSELB_15_14_00, PSELB_15_14_11, - PSELC_9_8_00, PSELC_9_8_10, - PSELC_11_10_00, PSELC_11_10_10, - PSELC_13_12_00, PSELC_13_12_01, PSELC_13_12_10, - PSELC_15_14_00, PSELC_15_14_01, PSELC_15_14_10, - PSELD_1_0_00, PSELD_1_0_10, - PSELD_11_10_00, PSELD_11_10_01, - PSELD_15_14_00, PSELD_15_14_01, PSELD_15_14_10, - PINMUX_FUNCTION_END, - - PINMUX_MARK_BEGIN, - D31_MARK, D30_MARK, D29_MARK, D28_MARK, - D27_MARK, D26_MARK, D25_MARK, D24_MARK, - D23_MARK, D22_MARK, D21_MARK, D20_MARK, - D19_MARK, D18_MARK, D17_MARK, D16_MARK, - IOIS16_MARK, RAS_MARK, CAS_MARK, CKE_MARK, - CS5B_CE1A_MARK, CS6B_CE1B_MARK, - A25_MARK, A24_MARK, A23_MARK, A22_MARK, - A21_MARK, A20_MARK, A19_MARK, A0_MARK, - REFOUT_MARK, IRQOUT_MARK, - LCD_DATA15_MARK, LCD_DATA14_MARK, - LCD_DATA13_MARK, LCD_DATA12_MARK, - LCD_DATA11_MARK, LCD_DATA10_MARK, - LCD_DATA9_MARK, LCD_DATA8_MARK, - LCD_DATA7_MARK, LCD_DATA6_MARK, - LCD_DATA5_MARK, LCD_DATA4_MARK, - LCD_DATA3_MARK, LCD_DATA2_MARK, - LCD_DATA1_MARK, LCD_DATA0_MARK, - LCD_M_DISP_MARK, - LCD_CL1_MARK, LCD_CL2_MARK, - LCD_DON_MARK, LCD_FLM_MARK, - LCD_VEPWC_MARK, LCD_VCPWC_MARK, - AFE_RXIN_MARK, AFE_RDET_MARK, - AFE_FS_MARK, AFE_TXOUT_MARK, - AFE_SCLK_MARK, AFE_RLYCNT_MARK, - AFE_HC1_MARK, - IIC_SCL_MARK, IIC_SDA_MARK, - DA1_MARK, DA0_MARK, - AN3_MARK, AN2_MARK, AN1_MARK, AN0_MARK, ADTRG_MARK, - USB1D_RCV_MARK, USB1D_TXSE0_MARK, - USB1D_TXDPLS_MARK, USB1D_DMNS_MARK, - USB1D_DPLS_MARK, USB1D_SPEED_MARK, - USB1D_TXENL_MARK, - USB2_PWR_EN_MARK, USB1_PWR_EN_USBF_UPLUP_MARK, USB1D_SUSPEND_MARK, - IRQ5_MARK, IRQ4_MARK, - IRQ3_IRL3_MARK, IRQ2_IRL2_MARK, - IRQ1_IRL1_MARK, IRQ0_IRL0_MARK, - PCC_REG_MARK, PCC_DRV_MARK, - PCC_BVD2_MARK, PCC_BVD1_MARK, - PCC_CD2_MARK, PCC_CD1_MARK, - PCC_RESET_MARK, PCC_RDY_MARK, - PCC_VS2_MARK, PCC_VS1_MARK, - AUDATA3_MARK, AUDATA2_MARK, AUDATA1_MARK, AUDATA0_MARK, - AUDCK_MARK, AUDSYNC_MARK, ASEBRKAK_MARK, TRST_MARK, - TMS_MARK, TDO_MARK, TDI_MARK, TCK_MARK, - DACK1_MARK, DREQ1_MARK, DACK0_MARK, DREQ0_MARK, - TEND1_MARK, TEND0_MARK, - SIOF0_SYNC_MARK, SIOF0_MCLK_MARK, - SIOF0_TXD_MARK, SIOF0_RXD_MARK, - SIOF0_SCK_MARK, - SIOF1_SYNC_MARK, SIOF1_MCLK_MARK, - SIOF1_TXD_MARK, SIOF1_RXD_MARK, - SIOF1_SCK_MARK, - SCIF0_TXD_MARK, SCIF0_RXD_MARK, - SCIF0_RTS_MARK, SCIF0_CTS_MARK, SCIF0_SCK_MARK, - SCIF1_TXD_MARK, SCIF1_RXD_MARK, - SCIF1_RTS_MARK, SCIF1_CTS_MARK, SCIF1_SCK_MARK, - TPU_TO1_MARK, TPU_TO0_MARK, - TPU_TI3B_MARK, TPU_TI3A_MARK, - TPU_TI2B_MARK, TPU_TI2A_MARK, - TPU_TO3_MARK, TPU_TO2_MARK, - SIM_D_MARK, SIM_CLK_MARK, SIM_RST_MARK, - MMC_DAT_MARK, MMC_CMD_MARK, - MMC_CLK_MARK, MMC_VDDON_MARK, - MMC_ODMOD_MARK, - STATUS0_MARK, STATUS1_MARK, - PINMUX_MARK_END, -}; - -static pinmux_enum_t pinmux_data[] = { - /* PTA GPIO */ - PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_OUT, PTA7_IN_PU), - PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_OUT, PTA6_IN_PU), - PINMUX_DATA(PTA5_DATA, PTA5_IN, PTA5_OUT, PTA5_IN_PU), - PINMUX_DATA(PTA4_DATA, PTA4_IN, PTA4_OUT, PTA4_IN_PU), - PINMUX_DATA(PTA3_DATA, PTA3_IN, PTA3_OUT, PTA3_IN_PU), - PINMUX_DATA(PTA2_DATA, PTA2_IN, PTA2_OUT, PTA2_IN_PU), - PINMUX_DATA(PTA1_DATA, PTA1_IN, PTA1_OUT, PTA1_IN_PU), - PINMUX_DATA(PTA0_DATA, PTA0_IN, PTA0_OUT, PTA0_IN_PU), - - /* PTB GPIO */ - PINMUX_DATA(PTB7_DATA, PTB7_IN, PTB7_OUT, PTB7_IN_PU), - PINMUX_DATA(PTB6_DATA, PTB6_IN, PTB6_OUT, PTB6_IN_PU), - PINMUX_DATA(PTB5_DATA, PTB5_IN, PTB5_OUT, PTB5_IN_PU), - PINMUX_DATA(PTB4_DATA, PTB4_IN, PTB4_OUT, PTB4_IN_PU), - PINMUX_DATA(PTB3_DATA, PTB3_IN, PTB3_OUT, PTB3_IN_PU), - PINMUX_DATA(PTB2_DATA, PTB2_IN, PTB2_OUT, PTB2_IN_PU), - PINMUX_DATA(PTB1_DATA, PTB1_IN, PTB1_OUT, PTB1_IN_PU), - PINMUX_DATA(PTB0_DATA, PTB0_IN, PTB0_OUT, PTB0_IN_PU), - - /* PTC GPIO */ - PINMUX_DATA(PTC7_DATA, PTC7_IN, PTC7_OUT, PTC7_IN_PU), - PINMUX_DATA(PTC6_DATA, PTC6_IN, PTC6_OUT, PTC6_IN_PU), - PINMUX_DATA(PTC5_DATA, PTC5_IN, PTC5_OUT, PTC5_IN_PU), - PINMUX_DATA(PTC4_DATA, PTC4_IN, PTC4_OUT, PTC4_IN_PU), - PINMUX_DATA(PTC3_DATA, PTC3_IN, PTC3_OUT, PTC3_IN_PU), - PINMUX_DATA(PTC2_DATA, PTC2_IN, PTC2_OUT, PTC2_IN_PU), - PINMUX_DATA(PTC1_DATA, PTC1_IN, PTC1_OUT, PTC1_IN_PU), - PINMUX_DATA(PTC0_DATA, PTC0_IN, PTC0_OUT, PTC0_IN_PU), - - /* PTD GPIO */ - PINMUX_DATA(PTD7_DATA, PTD7_IN, PTD7_OUT, PTD7_IN_PU), - PINMUX_DATA(PTD6_DATA, PTD6_IN, PTD6_OUT, PTD6_IN_PU), - PINMUX_DATA(PTD5_DATA, PTD5_IN, PTD5_OUT, PTD5_IN_PU), - PINMUX_DATA(PTD4_DATA, PTD4_IN, PTD4_OUT, PTD4_IN_PU), - PINMUX_DATA(PTD3_DATA, PTD3_IN, PTD3_OUT, PTD3_IN_PU), - PINMUX_DATA(PTD2_DATA, PTD2_IN, PTD2_OUT, PTD2_IN_PU), - PINMUX_DATA(PTD1_DATA, PTD1_IN, PTD1_OUT, PTD1_IN_PU), - PINMUX_DATA(PTD0_DATA, PTD0_IN, PTD0_OUT, PTD0_IN_PU), - - /* PTE GPIO */ - PINMUX_DATA(PTE6_DATA, PTE6_IN), - PINMUX_DATA(PTE5_DATA, PTE5_IN), - PINMUX_DATA(PTE4_DATA, PTE4_IN, PTE4_OUT, PTE4_IN_PU), - PINMUX_DATA(PTE3_DATA, PTE3_IN, PTE3_OUT, PTE3_IN_PU), - PINMUX_DATA(PTE2_DATA, PTE2_IN, PTE2_OUT, PTE2_IN_PU), - PINMUX_DATA(PTE1_DATA, PTE1_IN, PTE1_OUT, PTE1_IN_PU), - PINMUX_DATA(PTE0_DATA, PTE0_IN, PTE0_OUT, PTE0_IN_PU), - - /* PTF GPIO */ - PINMUX_DATA(PTF6_DATA, PTF6_IN), - PINMUX_DATA(PTF5_DATA, PTF5_IN), - PINMUX_DATA(PTF4_DATA, PTF4_IN), - PINMUX_DATA(PTF3_DATA, PTF3_IN), - PINMUX_DATA(PTF2_DATA, PTF2_IN), - PINMUX_DATA(PTF1_DATA, PTF1_IN), - PINMUX_DATA(PTF0_DATA, PTF0_IN, PTF0_OUT, PTF0_IN_PU), - - /* PTG GPIO */ - PINMUX_DATA(PTG6_DATA, PTG6_IN, PTG6_OUT, PTG6_IN_PU), - PINMUX_DATA(PTG5_DATA, PTG5_IN, PTG5_OUT, PTG5_IN_PU), - PINMUX_DATA(PTG4_DATA, PTG4_IN, PTG4_OUT, PTG4_IN_PU), - PINMUX_DATA(PTG3_DATA, PTG3_IN, PTG3_OUT, PTG3_IN_PU), - PINMUX_DATA(PTG2_DATA, PTG2_IN, PTG2_OUT, PTG2_IN_PU), - PINMUX_DATA(PTG1_DATA, PTG1_IN, PTG1_OUT, PTG1_IN_PU), - PINMUX_DATA(PTG0_DATA, PTG0_IN, PTG0_OUT, PTG0_IN_PU), - - /* PTH GPIO */ - PINMUX_DATA(PTH6_DATA, PTH6_IN, PTH6_OUT, PTH6_IN_PU), - PINMUX_DATA(PTH5_DATA, PTH5_IN, PTH5_OUT, PTH5_IN_PU), - PINMUX_DATA(PTH4_DATA, PTH4_IN, PTH4_OUT, PTH4_IN_PU), - PINMUX_DATA(PTH3_DATA, PTH3_IN, PTH3_OUT, PTH3_IN_PU), - PINMUX_DATA(PTH2_DATA, PTH2_IN, PTH2_OUT, PTH2_IN_PU), - PINMUX_DATA(PTH1_DATA, PTH1_IN, PTH1_OUT, PTH1_IN_PU), - PINMUX_DATA(PTH0_DATA, PTH0_IN, PTH0_OUT, PTH0_IN_PU), - - /* PTJ GPIO */ - PINMUX_DATA(PTJ6_DATA, PTJ6_IN, PTJ6_OUT, PTJ6_IN_PU), - PINMUX_DATA(PTJ5_DATA, PTJ5_IN, PTJ5_OUT, PTJ5_IN_PU), - PINMUX_DATA(PTJ4_DATA, PTJ4_IN, PTJ4_OUT, PTJ4_IN_PU), - PINMUX_DATA(PTJ3_DATA, PTJ3_IN, PTJ3_OUT, PTJ3_IN_PU), - PINMUX_DATA(PTJ2_DATA, PTJ2_IN, PTJ2_OUT, PTJ2_IN_PU), - PINMUX_DATA(PTJ1_DATA, PTJ1_IN, PTJ1_OUT, PTJ1_IN_PU), - PINMUX_DATA(PTJ0_DATA, PTJ0_IN, PTJ0_OUT, PTJ0_IN_PU), - - /* PTK GPIO */ - PINMUX_DATA(PTK3_DATA, PTK3_IN, PTK3_OUT, PTK3_IN_PU), - PINMUX_DATA(PTK2_DATA, PTK2_IN, PTK2_OUT, PTK2_IN_PU), - PINMUX_DATA(PTK1_DATA, PTK1_IN, PTK1_OUT, PTK1_IN_PU), - PINMUX_DATA(PTK0_DATA, PTK0_IN, PTK0_OUT, PTK0_IN_PU), - - /* PTL GPIO */ - PINMUX_DATA(PTL7_DATA, PTL7_IN, PTL7_OUT, PTL7_IN_PU), - PINMUX_DATA(PTL6_DATA, PTL6_IN, PTL6_OUT, PTL6_IN_PU), - PINMUX_DATA(PTL5_DATA, PTL5_IN, PTL5_OUT, PTL5_IN_PU), - PINMUX_DATA(PTL4_DATA, PTL4_IN, PTL4_OUT, PTL4_IN_PU), - PINMUX_DATA(PTL3_DATA, PTL3_IN, PTL3_OUT, PTL3_IN_PU), - - /* PTM GPIO */ - PINMUX_DATA(PTM7_DATA, PTM7_IN, PTM7_OUT, PTM7_IN_PU), - PINMUX_DATA(PTM6_DATA, PTM6_IN, PTM6_OUT, PTM6_IN_PU), - PINMUX_DATA(PTM5_DATA, PTM5_IN, PTM5_OUT, PTM5_IN_PU), - PINMUX_DATA(PTM4_DATA, PTM4_IN, PTM4_OUT, PTM4_IN_PU), - PINMUX_DATA(PTM3_DATA, PTM3_IN, PTM3_OUT, PTM3_IN_PU), - PINMUX_DATA(PTM2_DATA, PTM2_IN, PTM2_OUT, PTM2_IN_PU), - PINMUX_DATA(PTM1_DATA, PTM1_IN, PTM1_OUT, PTM1_IN_PU), - PINMUX_DATA(PTM0_DATA, PTM0_IN, PTM0_OUT, PTM0_IN_PU), - - /* PTP GPIO */ - PINMUX_DATA(PTP4_DATA, PTP4_IN, PTP4_OUT, PTP4_IN_PU), - PINMUX_DATA(PTP3_DATA, PTP3_IN, PTP3_OUT, PTP3_IN_PU), - PINMUX_DATA(PTP2_DATA, PTP2_IN, PTP2_OUT, PTP2_IN_PU), - PINMUX_DATA(PTP1_DATA, PTP1_IN, PTP1_OUT, PTP1_IN_PU), - PINMUX_DATA(PTP0_DATA, PTP0_IN, PTP0_OUT, PTP0_IN_PU), - - /* PTR GPIO */ - PINMUX_DATA(PTR7_DATA, PTR7_IN, PTR7_OUT, PTR7_IN_PU), - PINMUX_DATA(PTR6_DATA, PTR6_IN, PTR6_OUT, PTR6_IN_PU), - PINMUX_DATA(PTR5_DATA, PTR5_IN, PTR5_OUT, PTR5_IN_PU), - PINMUX_DATA(PTR4_DATA, PTR4_IN, PTR4_OUT, PTR4_IN_PU), - PINMUX_DATA(PTR3_DATA, PTR3_IN, PTR3_OUT, PTR3_IN_PU), - PINMUX_DATA(PTR2_DATA, PTR2_IN, PTR2_OUT, PTR2_IN_PU), - PINMUX_DATA(PTR1_DATA, PTR1_IN, PTR1_OUT, PTR1_IN_PU), - PINMUX_DATA(PTR0_DATA, PTR0_IN, PTR0_OUT, PTR0_IN_PU), - - /* PTS GPIO */ - PINMUX_DATA(PTS4_DATA, PTS4_IN, PTS4_OUT, PTS4_IN_PU), - PINMUX_DATA(PTS3_DATA, PTS3_IN, PTS3_OUT, PTS3_IN_PU), - PINMUX_DATA(PTS2_DATA, PTS2_IN, PTS2_OUT, PTS2_IN_PU), - PINMUX_DATA(PTS1_DATA, PTS1_IN, PTS1_OUT, PTS1_IN_PU), - PINMUX_DATA(PTS0_DATA, PTS0_IN, PTS0_OUT, PTS0_IN_PU), - - /* PTT GPIO */ - PINMUX_DATA(PTT4_DATA, PTT4_IN, PTT4_OUT, PTT4_IN_PU), - PINMUX_DATA(PTT3_DATA, PTT3_IN, PTT3_OUT, PTT3_IN_PU), - PINMUX_DATA(PTT2_DATA, PTT2_IN, PTT2_OUT, PTT2_IN_PU), - PINMUX_DATA(PTT1_DATA, PTT1_IN, PTT1_OUT, PTT1_IN_PU), - PINMUX_DATA(PTT0_DATA, PTT0_IN, PTT0_OUT, PTT0_IN_PU), - - /* PTU GPIO */ - PINMUX_DATA(PTU4_DATA, PTU4_IN, PTU4_OUT, PTU4_IN_PU), - PINMUX_DATA(PTU3_DATA, PTU3_IN, PTU3_OUT, PTU3_IN_PU), - PINMUX_DATA(PTU2_DATA, PTU2_IN, PTU2_OUT, PTU2_IN_PU), - PINMUX_DATA(PTU1_DATA, PTU1_IN, PTU1_OUT, PTU1_IN_PU), - PINMUX_DATA(PTU0_DATA, PTU0_IN, PTU0_OUT, PTU0_IN_PU), - - /* PTV GPIO */ - PINMUX_DATA(PTV4_DATA, PTV4_IN, PTV4_OUT, PTV4_IN_PU), - PINMUX_DATA(PTV3_DATA, PTV3_IN, PTV3_OUT, PTV3_IN_PU), - PINMUX_DATA(PTV2_DATA, PTV2_IN, PTV2_OUT, PTV2_IN_PU), - PINMUX_DATA(PTV1_DATA, PTV1_IN, PTV1_OUT, PTV1_IN_PU), - PINMUX_DATA(PTV0_DATA, PTV0_IN, PTV0_OUT, PTV0_IN_PU), - - /* PTA FN */ - PINMUX_DATA(D23_MARK, PTA7_FN), - PINMUX_DATA(D22_MARK, PTA6_FN), - PINMUX_DATA(D21_MARK, PTA5_FN), - PINMUX_DATA(D20_MARK, PTA4_FN), - PINMUX_DATA(D19_MARK, PTA3_FN), - PINMUX_DATA(D18_MARK, PTA2_FN), - PINMUX_DATA(D17_MARK, PTA1_FN), - PINMUX_DATA(D16_MARK, PTA0_FN), - - /* PTB FN */ - PINMUX_DATA(D31_MARK, PTB7_FN), - PINMUX_DATA(D30_MARK, PTB6_FN), - PINMUX_DATA(D29_MARK, PTB5_FN), - PINMUX_DATA(D28_MARK, PTB4_FN), - PINMUX_DATA(D27_MARK, PTB3_FN), - PINMUX_DATA(D26_MARK, PTB2_FN), - PINMUX_DATA(D25_MARK, PTB1_FN), - PINMUX_DATA(D24_MARK, PTB0_FN), - - /* PTC FN */ - PINMUX_DATA(LCD_DATA7_MARK, PTC7_FN), - PINMUX_DATA(LCD_DATA6_MARK, PTC6_FN), - PINMUX_DATA(LCD_DATA5_MARK, PTC5_FN), - PINMUX_DATA(LCD_DATA4_MARK, PTC4_FN), - PINMUX_DATA(LCD_DATA3_MARK, PTC3_FN), - PINMUX_DATA(LCD_DATA2_MARK, PTC2_FN), - PINMUX_DATA(LCD_DATA1_MARK, PTC1_FN), - PINMUX_DATA(LCD_DATA0_MARK, PTC0_FN), - - /* PTD FN */ - PINMUX_DATA(LCD_DATA15_MARK, PTD7_FN), - PINMUX_DATA(LCD_DATA14_MARK, PTD6_FN), - PINMUX_DATA(LCD_DATA13_MARK, PTD5_FN), - PINMUX_DATA(LCD_DATA12_MARK, PTD4_FN), - PINMUX_DATA(LCD_DATA11_MARK, PTD3_FN), - PINMUX_DATA(LCD_DATA10_MARK, PTD2_FN), - PINMUX_DATA(LCD_DATA9_MARK, PTD1_FN), - PINMUX_DATA(LCD_DATA8_MARK, PTD0_FN), - - /* PTE FN */ - PINMUX_DATA(IIC_SCL_MARK, PSELB_9_8_00, PTE6_FN), - PINMUX_DATA(AFE_RXIN_MARK, PSELB_9_8_11, PTE6_FN), - PINMUX_DATA(IIC_SDA_MARK, PSELB_9_8_00, PTE5_FN), - PINMUX_DATA(AFE_RDET_MARK, PSELB_9_8_11, PTE5_FN), - PINMUX_DATA(LCD_M_DISP_MARK, PTE4_FN), - PINMUX_DATA(LCD_CL1_MARK, PTE3_FN), - PINMUX_DATA(LCD_CL2_MARK, PTE2_FN), - PINMUX_DATA(LCD_DON_MARK, PTE1_FN), - PINMUX_DATA(LCD_FLM_MARK, PTE0_FN), - - /* PTF FN */ - PINMUX_DATA(DA1_MARK, PTF6_FN), - PINMUX_DATA(DA0_MARK, PTF5_FN), - PINMUX_DATA(AN3_MARK, PTF4_FN), - PINMUX_DATA(AN2_MARK, PTF3_FN), - PINMUX_DATA(AN1_MARK, PTF2_FN), - PINMUX_DATA(AN0_MARK, PTF1_FN), - PINMUX_DATA(ADTRG_MARK, PTF0_FN), - - /* PTG FN */ - PINMUX_DATA(USB1D_RCV_MARK, PSELA_3_2_00, PTG6_FN), - PINMUX_DATA(AFE_FS_MARK, PSELA_3_2_01, PTG6_FN), - PINMUX_DATA(PCC_REG_MARK, PSELA_3_2_10, PTG6_FN), - PINMUX_DATA(IRQ5_MARK, PSELA_3_2_11, PTG6_FN), - PINMUX_DATA(USB1D_TXSE0_MARK, PSELA_5_4_00, PTG5_FN), - PINMUX_DATA(AFE_TXOUT_MARK, PSELA_5_4_01, PTG5_FN), - PINMUX_DATA(PCC_DRV_MARK, PSELA_5_4_10, PTG5_FN), - PINMUX_DATA(IRQ4_MARK, PSELA_5_4_11, PTG5_FN), - PINMUX_DATA(USB1D_TXDPLS_MARK, PSELA_7_6_00, PTG4_FN), - PINMUX_DATA(AFE_SCLK_MARK, PSELA_7_6_01, PTG4_FN), - PINMUX_DATA(IOIS16_MARK, PSELA_7_6_10, PTG4_FN), - PINMUX_DATA(USB1D_DMNS_MARK, PSELA_9_8_00, PTG3_FN), - PINMUX_DATA(AFE_RLYCNT_MARK, PSELA_9_8_01, PTG3_FN), - PINMUX_DATA(PCC_BVD2_MARK, PSELA_9_8_10, PTG3_FN), - PINMUX_DATA(USB1D_DPLS_MARK, PSELA_11_10_00, PTG2_FN), - PINMUX_DATA(AFE_HC1_MARK, PSELA_11_10_01, PTG2_FN), - PINMUX_DATA(PCC_BVD1_MARK, PSELA_11_10_10, PTG2_FN), - PINMUX_DATA(USB1D_SPEED_MARK, PSELA_13_12_00, PTG1_FN), - PINMUX_DATA(PCC_CD2_MARK, PSELA_13_12_10, PTG1_FN), - PINMUX_DATA(USB1D_TXENL_MARK, PSELA_15_14_00, PTG0_FN), - PINMUX_DATA(PCC_CD1_MARK, PSELA_15_14_10, PTG0_FN), - - /* PTH FN */ - PINMUX_DATA(RAS_MARK, PTH6_FN), - PINMUX_DATA(CAS_MARK, PTH5_FN), - PINMUX_DATA(CKE_MARK, PTH4_FN), - PINMUX_DATA(STATUS1_MARK, PTH3_FN), - PINMUX_DATA(STATUS0_MARK, PTH2_FN), - PINMUX_DATA(USB2_PWR_EN_MARK, PTH1_FN), - PINMUX_DATA(USB1_PWR_EN_USBF_UPLUP_MARK, PTH0_FN), - - /* PTJ FN */ - PINMUX_DATA(AUDCK_MARK, PTJ6_FN), - PINMUX_DATA(ASEBRKAK_MARK, PTJ5_FN), - PINMUX_DATA(AUDATA3_MARK, PTJ4_FN), - PINMUX_DATA(AUDATA2_MARK, PTJ3_FN), - PINMUX_DATA(AUDATA1_MARK, PTJ2_FN), - PINMUX_DATA(AUDATA0_MARK, PTJ1_FN), - PINMUX_DATA(AUDSYNC_MARK, PTJ0_FN), - - /* PTK FN */ - PINMUX_DATA(PCC_RESET_MARK, PTK3_FN), - PINMUX_DATA(PCC_RDY_MARK, PTK2_FN), - PINMUX_DATA(PCC_VS2_MARK, PTK1_FN), - PINMUX_DATA(PCC_VS1_MARK, PTK0_FN), - - /* PTL FN */ - PINMUX_DATA(TRST_MARK, PTL7_FN), - PINMUX_DATA(TMS_MARK, PTL6_FN), - PINMUX_DATA(TDO_MARK, PTL5_FN), - PINMUX_DATA(TDI_MARK, PTL4_FN), - PINMUX_DATA(TCK_MARK, PTL3_FN), - - /* PTM FN */ - PINMUX_DATA(DREQ1_MARK, PTM7_FN), - PINMUX_DATA(DREQ0_MARK, PTM6_FN), - PINMUX_DATA(DACK1_MARK, PTM5_FN), - PINMUX_DATA(DACK0_MARK, PTM4_FN), - PINMUX_DATA(TEND1_MARK, PTM3_FN), - PINMUX_DATA(TEND0_MARK, PTM2_FN), - PINMUX_DATA(CS5B_CE1A_MARK, PTM1_FN), - PINMUX_DATA(CS6B_CE1B_MARK, PTM0_FN), - - /* PTP FN */ - PINMUX_DATA(USB1D_SUSPEND_MARK, PSELA_1_0_00, PTP4_FN), - PINMUX_DATA(REFOUT_MARK, PSELA_1_0_01, PTP4_FN), - PINMUX_DATA(IRQOUT_MARK, PSELA_1_0_10, PTP4_FN), - PINMUX_DATA(IRQ3_IRL3_MARK, PTP3_FN), - PINMUX_DATA(IRQ2_IRL2_MARK, PTP2_FN), - PINMUX_DATA(IRQ1_IRL1_MARK, PTP1_FN), - PINMUX_DATA(IRQ0_IRL0_MARK, PTP0_FN), - - /* PTR FN */ - PINMUX_DATA(A25_MARK, PTR7_FN), - PINMUX_DATA(A24_MARK, PTR6_FN), - PINMUX_DATA(A23_MARK, PTR5_FN), - PINMUX_DATA(A22_MARK, PTR4_FN), - PINMUX_DATA(A21_MARK, PTR3_FN), - PINMUX_DATA(A20_MARK, PTR2_FN), - PINMUX_DATA(A19_MARK, PTR1_FN), - PINMUX_DATA(A0_MARK, PTR0_FN), - - /* PTS FN */ - PINMUX_DATA(SIOF0_SYNC_MARK, PTS4_FN), - PINMUX_DATA(SIOF0_MCLK_MARK, PTS3_FN), - PINMUX_DATA(SIOF0_TXD_MARK, PTS2_FN), - PINMUX_DATA(SIOF0_RXD_MARK, PTS1_FN), - PINMUX_DATA(SIOF0_SCK_MARK, PTS0_FN), - - /* PTT FN */ - PINMUX_DATA(SCIF0_CTS_MARK, PSELB_15_14_00, PTT4_FN), - PINMUX_DATA(TPU_TO1_MARK, PSELB_15_14_11, PTT4_FN), - PINMUX_DATA(SCIF0_RTS_MARK, PSELB_15_14_00, PTT3_FN), - PINMUX_DATA(TPU_TO0_MARK, PSELB_15_14_11, PTT3_FN), - PINMUX_DATA(SCIF0_TXD_MARK, PTT2_FN), - PINMUX_DATA(SCIF0_RXD_MARK, PTT1_FN), - PINMUX_DATA(SCIF0_SCK_MARK, PTT0_FN), - - /* PTU FN */ - PINMUX_DATA(SIOF1_SYNC_MARK, PTU4_FN), - PINMUX_DATA(SIOF1_MCLK_MARK, PSELD_11_10_00, PTU3_FN), - PINMUX_DATA(TPU_TI3B_MARK, PSELD_11_10_01, PTU3_FN), - PINMUX_DATA(SIOF1_TXD_MARK, PSELD_15_14_00, PTU2_FN), - PINMUX_DATA(TPU_TI3A_MARK, PSELD_15_14_01, PTU2_FN), - PINMUX_DATA(MMC_DAT_MARK, PSELD_15_14_10, PTU2_FN), - PINMUX_DATA(SIOF1_RXD_MARK, PSELC_13_12_00, PTU1_FN), - PINMUX_DATA(TPU_TI2B_MARK, PSELC_13_12_01, PTU1_FN), - PINMUX_DATA(MMC_CMD_MARK, PSELC_13_12_10, PTU1_FN), - PINMUX_DATA(SIOF1_SCK_MARK, PSELC_15_14_00, PTU0_FN), - PINMUX_DATA(TPU_TI2A_MARK, PSELC_15_14_01, PTU0_FN), - PINMUX_DATA(MMC_CLK_MARK, PSELC_15_14_10, PTU0_FN), - - /* PTV FN */ - PINMUX_DATA(SCIF1_CTS_MARK, PSELB_11_10_00, PTV4_FN), - PINMUX_DATA(TPU_TO3_MARK, PSELB_11_10_01, PTV4_FN), - PINMUX_DATA(MMC_VDDON_MARK, PSELB_11_10_10, PTV4_FN), - PINMUX_DATA(LCD_VEPWC_MARK, PSELB_11_10_11, PTV4_FN), - PINMUX_DATA(SCIF1_RTS_MARK, PSELB_13_12_00, PTV3_FN), - PINMUX_DATA(TPU_TO2_MARK, PSELB_13_12_01, PTV3_FN), - PINMUX_DATA(MMC_ODMOD_MARK, PSELB_13_12_10, PTV3_FN), - PINMUX_DATA(LCD_VCPWC_MARK, PSELB_13_12_11, PTV3_FN), - PINMUX_DATA(SCIF1_TXD_MARK, PSELC_9_8_00, PTV2_FN), - PINMUX_DATA(SIM_D_MARK, PSELC_9_8_10, PTV2_FN), - PINMUX_DATA(SCIF1_RXD_MARK, PSELC_11_10_00, PTV1_FN), - PINMUX_DATA(SIM_RST_MARK, PSELC_11_10_10, PTV1_FN), - PINMUX_DATA(SCIF1_SCK_MARK, PSELD_1_0_00, PTV0_FN), - PINMUX_DATA(SIM_CLK_MARK, PSELD_1_0_10, PTV0_FN), -}; - -static struct pinmux_gpio pinmux_gpios[] = { - /* PTA */ - PINMUX_GPIO(GPIO_PTA7, PTA7_DATA), - PINMUX_GPIO(GPIO_PTA6, PTA6_DATA), - PINMUX_GPIO(GPIO_PTA5, PTA5_DATA), - PINMUX_GPIO(GPIO_PTA4, PTA4_DATA), - PINMUX_GPIO(GPIO_PTA3, PTA3_DATA), - PINMUX_GPIO(GPIO_PTA2, PTA2_DATA), - PINMUX_GPIO(GPIO_PTA1, PTA1_DATA), - PINMUX_GPIO(GPIO_PTA0, PTA0_DATA), - - /* PTB */ - PINMUX_GPIO(GPIO_PTB7, PTB7_DATA), - PINMUX_GPIO(GPIO_PTB6, PTB6_DATA), - PINMUX_GPIO(GPIO_PTB5, PTB5_DATA), - PINMUX_GPIO(GPIO_PTB4, PTB4_DATA), - PINMUX_GPIO(GPIO_PTB3, PTB3_DATA), - PINMUX_GPIO(GPIO_PTB2, PTB2_DATA), - PINMUX_GPIO(GPIO_PTB1, PTB1_DATA), - PINMUX_GPIO(GPIO_PTB0, PTB0_DATA), - - /* PTC */ - PINMUX_GPIO(GPIO_PTC7, PTC7_DATA), - PINMUX_GPIO(GPIO_PTC6, PTC6_DATA), - PINMUX_GPIO(GPIO_PTC5, PTC5_DATA), - PINMUX_GPIO(GPIO_PTC4, PTC4_DATA), - PINMUX_GPIO(GPIO_PTC3, PTC3_DATA), - PINMUX_GPIO(GPIO_PTC2, PTC2_DATA), - PINMUX_GPIO(GPIO_PTC1, PTC1_DATA), - PINMUX_GPIO(GPIO_PTC0, PTC0_DATA), - - /* PTD */ - PINMUX_GPIO(GPIO_PTD7, PTD7_DATA), - PINMUX_GPIO(GPIO_PTD6, PTD6_DATA), - PINMUX_GPIO(GPIO_PTD5, PTD5_DATA), - PINMUX_GPIO(GPIO_PTD4, PTD4_DATA), - PINMUX_GPIO(GPIO_PTD3, PTD3_DATA), - PINMUX_GPIO(GPIO_PTD2, PTD2_DATA), - PINMUX_GPIO(GPIO_PTD1, PTD1_DATA), - PINMUX_GPIO(GPIO_PTD0, PTD0_DATA), - - /* PTE */ - PINMUX_GPIO(GPIO_PTE6, PTE6_DATA), - PINMUX_GPIO(GPIO_PTE5, PTE5_DATA), - PINMUX_GPIO(GPIO_PTE4, PTE4_DATA), - PINMUX_GPIO(GPIO_PTE3, PTE3_DATA), - PINMUX_GPIO(GPIO_PTE2, PTE2_DATA), - PINMUX_GPIO(GPIO_PTE1, PTE1_DATA), - PINMUX_GPIO(GPIO_PTE0, PTE0_DATA), - - /* PTF */ - PINMUX_GPIO(GPIO_PTF6, PTF6_DATA), - PINMUX_GPIO(GPIO_PTF5, PTF5_DATA), - PINMUX_GPIO(GPIO_PTF4, PTF4_DATA), - PINMUX_GPIO(GPIO_PTF3, PTF3_DATA), - PINMUX_GPIO(GPIO_PTF2, PTF2_DATA), - PINMUX_GPIO(GPIO_PTF1, PTF1_DATA), - PINMUX_GPIO(GPIO_PTF0, PTF0_DATA), - - /* PTG */ - PINMUX_GPIO(GPIO_PTG6, PTG6_DATA), - PINMUX_GPIO(GPIO_PTG5, PTG5_DATA), - PINMUX_GPIO(GPIO_PTG4, PTG4_DATA), - PINMUX_GPIO(GPIO_PTG3, PTG3_DATA), - PINMUX_GPIO(GPIO_PTG2, PTG2_DATA), - PINMUX_GPIO(GPIO_PTG1, PTG1_DATA), - PINMUX_GPIO(GPIO_PTG0, PTG0_DATA), - - /* PTH */ - PINMUX_GPIO(GPIO_PTH6, PTH6_DATA), - PINMUX_GPIO(GPIO_PTH5, PTH5_DATA), - PINMUX_GPIO(GPIO_PTH4, PTH4_DATA), - PINMUX_GPIO(GPIO_PTH3, PTH3_DATA), - PINMUX_GPIO(GPIO_PTH2, PTH2_DATA), - PINMUX_GPIO(GPIO_PTH1, PTH1_DATA), - PINMUX_GPIO(GPIO_PTH0, PTH0_DATA), - - /* PTJ */ - PINMUX_GPIO(GPIO_PTJ6, PTJ6_DATA), - PINMUX_GPIO(GPIO_PTJ5, PTJ5_DATA), - PINMUX_GPIO(GPIO_PTJ4, PTJ4_DATA), - PINMUX_GPIO(GPIO_PTJ3, PTJ3_DATA), - PINMUX_GPIO(GPIO_PTJ2, PTJ2_DATA), - PINMUX_GPIO(GPIO_PTJ1, PTJ1_DATA), - PINMUX_GPIO(GPIO_PTJ0, PTJ0_DATA), - - /* PTK */ - PINMUX_GPIO(GPIO_PTK3, PTK3_DATA), - PINMUX_GPIO(GPIO_PTK2, PTK2_DATA), - PINMUX_GPIO(GPIO_PTK1, PTK1_DATA), - PINMUX_GPIO(GPIO_PTK0, PTK0_DATA), - - /* PTL */ - PINMUX_GPIO(GPIO_PTL7, PTL7_DATA), - PINMUX_GPIO(GPIO_PTL6, PTL6_DATA), - PINMUX_GPIO(GPIO_PTL5, PTL5_DATA), - PINMUX_GPIO(GPIO_PTL4, PTL4_DATA), - PINMUX_GPIO(GPIO_PTL3, PTL3_DATA), - - /* PTM */ - PINMUX_GPIO(GPIO_PTM7, PTM7_DATA), - PINMUX_GPIO(GPIO_PTM6, PTM6_DATA), - PINMUX_GPIO(GPIO_PTM5, PTM5_DATA), - PINMUX_GPIO(GPIO_PTM4, PTM4_DATA), - PINMUX_GPIO(GPIO_PTM3, PTM3_DATA), - PINMUX_GPIO(GPIO_PTM2, PTM2_DATA), - PINMUX_GPIO(GPIO_PTM1, PTM1_DATA), - PINMUX_GPIO(GPIO_PTM0, PTM0_DATA), - - /* PTP */ - PINMUX_GPIO(GPIO_PTP4, PTP4_DATA), - PINMUX_GPIO(GPIO_PTP3, PTP3_DATA), - PINMUX_GPIO(GPIO_PTP2, PTP2_DATA), - PINMUX_GPIO(GPIO_PTP1, PTP1_DATA), - PINMUX_GPIO(GPIO_PTP0, PTP0_DATA), - - /* PTR */ - PINMUX_GPIO(GPIO_PTR7, PTR7_DATA), - PINMUX_GPIO(GPIO_PTR6, PTR6_DATA), - PINMUX_GPIO(GPIO_PTR5, PTR5_DATA), - PINMUX_GPIO(GPIO_PTR4, PTR4_DATA), - PINMUX_GPIO(GPIO_PTR3, PTR3_DATA), - PINMUX_GPIO(GPIO_PTR2, PTR2_DATA), - PINMUX_GPIO(GPIO_PTR1, PTR1_DATA), - PINMUX_GPIO(GPIO_PTR0, PTR0_DATA), - - /* PTS */ - PINMUX_GPIO(GPIO_PTS4, PTS4_DATA), - PINMUX_GPIO(GPIO_PTS3, PTS3_DATA), - PINMUX_GPIO(GPIO_PTS2, PTS2_DATA), - PINMUX_GPIO(GPIO_PTS1, PTS1_DATA), - PINMUX_GPIO(GPIO_PTS0, PTS0_DATA), - - /* PTT */ - PINMUX_GPIO(GPIO_PTT4, PTT4_DATA), - PINMUX_GPIO(GPIO_PTT3, PTT3_DATA), - PINMUX_GPIO(GPIO_PTT2, PTT2_DATA), - PINMUX_GPIO(GPIO_PTT1, PTT1_DATA), - PINMUX_GPIO(GPIO_PTT0, PTT0_DATA), - - /* PTU */ - PINMUX_GPIO(GPIO_PTU4, PTU4_DATA), - PINMUX_GPIO(GPIO_PTU3, PTU3_DATA), - PINMUX_GPIO(GPIO_PTU2, PTU2_DATA), - PINMUX_GPIO(GPIO_PTU1, PTU1_DATA), - PINMUX_GPIO(GPIO_PTU0, PTU0_DATA), - - /* PTV */ - PINMUX_GPIO(GPIO_PTV4, PTV4_DATA), - PINMUX_GPIO(GPIO_PTV3, PTV3_DATA), - PINMUX_GPIO(GPIO_PTV2, PTV2_DATA), - PINMUX_GPIO(GPIO_PTV1, PTV1_DATA), - PINMUX_GPIO(GPIO_PTV0, PTV0_DATA), - - /* BSC */ - PINMUX_GPIO(GPIO_FN_D31, D31_MARK), - PINMUX_GPIO(GPIO_FN_D30, D30_MARK), - PINMUX_GPIO(GPIO_FN_D29, D29_MARK), - PINMUX_GPIO(GPIO_FN_D28, D28_MARK), - PINMUX_GPIO(GPIO_FN_D27, D27_MARK), - PINMUX_GPIO(GPIO_FN_D26, D26_MARK), - PINMUX_GPIO(GPIO_FN_D25, D25_MARK), - PINMUX_GPIO(GPIO_FN_D24, D24_MARK), - PINMUX_GPIO(GPIO_FN_D23, D23_MARK), - PINMUX_GPIO(GPIO_FN_D22, D22_MARK), - PINMUX_GPIO(GPIO_FN_D21, D21_MARK), - PINMUX_GPIO(GPIO_FN_D20, D20_MARK), - PINMUX_GPIO(GPIO_FN_D19, D19_MARK), - PINMUX_GPIO(GPIO_FN_D18, D18_MARK), - PINMUX_GPIO(GPIO_FN_D17, D17_MARK), - PINMUX_GPIO(GPIO_FN_D16, D16_MARK), - PINMUX_GPIO(GPIO_FN_IOIS16, IOIS16_MARK), - PINMUX_GPIO(GPIO_FN_RAS, RAS_MARK), - PINMUX_GPIO(GPIO_FN_CAS, CAS_MARK), - PINMUX_GPIO(GPIO_FN_CKE, CKE_MARK), - PINMUX_GPIO(GPIO_FN_CS5B_CE1A, CS5B_CE1A_MARK), - PINMUX_GPIO(GPIO_FN_CS6B_CE1B, CS6B_CE1B_MARK), - PINMUX_GPIO(GPIO_FN_A25, A25_MARK), - PINMUX_GPIO(GPIO_FN_A24, A24_MARK), - PINMUX_GPIO(GPIO_FN_A23, A23_MARK), - PINMUX_GPIO(GPIO_FN_A22, A22_MARK), - PINMUX_GPIO(GPIO_FN_A21, A21_MARK), - PINMUX_GPIO(GPIO_FN_A20, A20_MARK), - PINMUX_GPIO(GPIO_FN_A19, A19_MARK), - PINMUX_GPIO(GPIO_FN_A0, A0_MARK), - PINMUX_GPIO(GPIO_FN_REFOUT, REFOUT_MARK), - PINMUX_GPIO(GPIO_FN_IRQOUT, IRQOUT_MARK), - - /* LCDC */ - PINMUX_GPIO(GPIO_FN_LCD_DATA15, LCD_DATA15_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA14, LCD_DATA14_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA13, LCD_DATA13_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA12, LCD_DATA12_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA11, LCD_DATA11_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA10, LCD_DATA10_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA9, LCD_DATA9_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA8, LCD_DATA8_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA7, LCD_DATA7_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA6, LCD_DATA6_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA5, LCD_DATA5_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA4, LCD_DATA4_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA3, LCD_DATA3_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA2, LCD_DATA2_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA1, LCD_DATA1_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA0, LCD_DATA0_MARK), - PINMUX_GPIO(GPIO_FN_LCD_M_DISP, LCD_M_DISP_MARK), - PINMUX_GPIO(GPIO_FN_LCD_CL1, LCD_CL1_MARK), - PINMUX_GPIO(GPIO_FN_LCD_CL2, LCD_CL2_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DON, LCD_DON_MARK), - PINMUX_GPIO(GPIO_FN_LCD_FLM, LCD_FLM_MARK), - PINMUX_GPIO(GPIO_FN_LCD_VEPWC, LCD_VEPWC_MARK), - PINMUX_GPIO(GPIO_FN_LCD_VCPWC, LCD_VCPWC_MARK), - - /* AFEIF */ - PINMUX_GPIO(GPIO_FN_AFE_RXIN, AFE_RXIN_MARK), - PINMUX_GPIO(GPIO_FN_AFE_RDET, AFE_RDET_MARK), - PINMUX_GPIO(GPIO_FN_AFE_FS, AFE_FS_MARK), - PINMUX_GPIO(GPIO_FN_AFE_TXOUT, AFE_TXOUT_MARK), - PINMUX_GPIO(GPIO_FN_AFE_SCLK, AFE_SCLK_MARK), - PINMUX_GPIO(GPIO_FN_AFE_RLYCNT, AFE_RLYCNT_MARK), - PINMUX_GPIO(GPIO_FN_AFE_HC1, AFE_HC1_MARK), - - /* IIC */ - PINMUX_GPIO(GPIO_FN_IIC_SCL, IIC_SCL_MARK), - PINMUX_GPIO(GPIO_FN_IIC_SDA, IIC_SDA_MARK), - - /* DAC */ - PINMUX_GPIO(GPIO_FN_DA1, DA1_MARK), - PINMUX_GPIO(GPIO_FN_DA0, DA0_MARK), - - /* ADC */ - PINMUX_GPIO(GPIO_FN_AN3, AN3_MARK), - PINMUX_GPIO(GPIO_FN_AN2, AN2_MARK), - PINMUX_GPIO(GPIO_FN_AN1, AN1_MARK), - PINMUX_GPIO(GPIO_FN_AN0, AN0_MARK), - PINMUX_GPIO(GPIO_FN_ADTRG, ADTRG_MARK), - - /* USB */ - PINMUX_GPIO(GPIO_FN_USB1D_RCV, USB1D_RCV_MARK), - PINMUX_GPIO(GPIO_FN_USB1D_TXSE0, USB1D_TXSE0_MARK), - PINMUX_GPIO(GPIO_FN_USB1D_TXDPLS, USB1D_TXDPLS_MARK), - PINMUX_GPIO(GPIO_FN_USB1D_DMNS, USB1D_DMNS_MARK), - PINMUX_GPIO(GPIO_FN_USB1D_DPLS, USB1D_DPLS_MARK), - PINMUX_GPIO(GPIO_FN_USB1D_SPEED, USB1D_SPEED_MARK), - PINMUX_GPIO(GPIO_FN_USB1D_TXENL, USB1D_TXENL_MARK), - - PINMUX_GPIO(GPIO_FN_USB2_PWR_EN, USB2_PWR_EN_MARK), - PINMUX_GPIO(GPIO_FN_USB1_PWR_EN_USBF_UPLUP, - USB1_PWR_EN_USBF_UPLUP_MARK), - PINMUX_GPIO(GPIO_FN_USB1D_SUSPEND, USB1D_SUSPEND_MARK), - - /* INTC */ - PINMUX_GPIO(GPIO_FN_IRQ5, IRQ5_MARK), - PINMUX_GPIO(GPIO_FN_IRQ4, IRQ4_MARK), - PINMUX_GPIO(GPIO_FN_IRQ3_IRL3, IRQ3_IRL3_MARK), - PINMUX_GPIO(GPIO_FN_IRQ2_IRL2, IRQ2_IRL2_MARK), - PINMUX_GPIO(GPIO_FN_IRQ1_IRL1, IRQ1_IRL1_MARK), - PINMUX_GPIO(GPIO_FN_IRQ0_IRL0, IRQ0_IRL0_MARK), - - /* PCC */ - PINMUX_GPIO(GPIO_FN_PCC_REG, PCC_REG_MARK), - PINMUX_GPIO(GPIO_FN_PCC_DRV, PCC_DRV_MARK), - PINMUX_GPIO(GPIO_FN_PCC_BVD2, PCC_BVD2_MARK), - PINMUX_GPIO(GPIO_FN_PCC_BVD1, PCC_BVD1_MARK), - PINMUX_GPIO(GPIO_FN_PCC_CD2, PCC_CD2_MARK), - PINMUX_GPIO(GPIO_FN_PCC_CD1, PCC_CD1_MARK), - PINMUX_GPIO(GPIO_FN_PCC_RESET, PCC_RESET_MARK), - PINMUX_GPIO(GPIO_FN_PCC_RDY, PCC_RDY_MARK), - PINMUX_GPIO(GPIO_FN_PCC_VS2, PCC_VS2_MARK), - PINMUX_GPIO(GPIO_FN_PCC_VS1, PCC_VS1_MARK), - - /* HUDI */ - PINMUX_GPIO(GPIO_FN_AUDATA3, AUDATA3_MARK), - PINMUX_GPIO(GPIO_FN_AUDATA2, AUDATA2_MARK), - PINMUX_GPIO(GPIO_FN_AUDATA1, AUDATA1_MARK), - PINMUX_GPIO(GPIO_FN_AUDATA0, AUDATA0_MARK), - PINMUX_GPIO(GPIO_FN_AUDCK, AUDCK_MARK), - PINMUX_GPIO(GPIO_FN_AUDSYNC, AUDSYNC_MARK), - PINMUX_GPIO(GPIO_FN_ASEBRKAK, ASEBRKAK_MARK), - PINMUX_GPIO(GPIO_FN_TRST, TRST_MARK), - PINMUX_GPIO(GPIO_FN_TMS, TMS_MARK), - PINMUX_GPIO(GPIO_FN_TDO, TDO_MARK), - PINMUX_GPIO(GPIO_FN_TDI, TDI_MARK), - PINMUX_GPIO(GPIO_FN_TCK, TCK_MARK), - - /* DMAC */ - PINMUX_GPIO(GPIO_FN_DACK1, DACK1_MARK), - PINMUX_GPIO(GPIO_FN_DREQ1, DREQ1_MARK), - PINMUX_GPIO(GPIO_FN_DACK0, DACK0_MARK), - PINMUX_GPIO(GPIO_FN_DREQ0, DREQ0_MARK), - PINMUX_GPIO(GPIO_FN_TEND1, TEND1_MARK), - PINMUX_GPIO(GPIO_FN_TEND0, TEND0_MARK), - - /* SIOF0 */ - PINMUX_GPIO(GPIO_FN_SIOF0_SYNC, SIOF0_SYNC_MARK), - PINMUX_GPIO(GPIO_FN_SIOF0_MCLK, SIOF0_MCLK_MARK), - PINMUX_GPIO(GPIO_FN_SIOF0_TXD, SIOF0_TXD_MARK), - PINMUX_GPIO(GPIO_FN_SIOF0_RXD, SIOF0_RXD_MARK), - PINMUX_GPIO(GPIO_FN_SIOF0_SCK, SIOF0_SCK_MARK), - - /* SIOF1 */ - PINMUX_GPIO(GPIO_FN_SIOF1_SYNC, SIOF1_SYNC_MARK), - PINMUX_GPIO(GPIO_FN_SIOF1_MCLK, SIOF1_MCLK_MARK), - PINMUX_GPIO(GPIO_FN_SIOF1_TXD, SIOF1_TXD_MARK), - PINMUX_GPIO(GPIO_FN_SIOF1_RXD, SIOF1_RXD_MARK), - PINMUX_GPIO(GPIO_FN_SIOF1_SCK, SIOF1_SCK_MARK), - - /* SCIF0 */ - PINMUX_GPIO(GPIO_FN_SCIF0_TXD, SCIF0_TXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF0_RXD, SCIF0_RXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF0_RTS, SCIF0_RTS_MARK), - PINMUX_GPIO(GPIO_FN_SCIF0_CTS, SCIF0_CTS_MARK), - PINMUX_GPIO(GPIO_FN_SCIF0_SCK, SCIF0_SCK_MARK), - - /* SCIF1 */ - PINMUX_GPIO(GPIO_FN_SCIF1_TXD, SCIF1_TXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF1_RXD, SCIF1_RXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF1_RTS, SCIF1_RTS_MARK), - PINMUX_GPIO(GPIO_FN_SCIF1_CTS, SCIF1_CTS_MARK), - PINMUX_GPIO(GPIO_FN_SCIF1_SCK, SCIF1_SCK_MARK), - - /* TPU */ - PINMUX_GPIO(GPIO_FN_TPU_TO1, TPU_TO1_MARK), - PINMUX_GPIO(GPIO_FN_TPU_TO0, TPU_TO0_MARK), - PINMUX_GPIO(GPIO_FN_TPU_TI3B, TPU_TI3B_MARK), - PINMUX_GPIO(GPIO_FN_TPU_TI3A, TPU_TI3A_MARK), - PINMUX_GPIO(GPIO_FN_TPU_TI2B, TPU_TI2B_MARK), - PINMUX_GPIO(GPIO_FN_TPU_TI2A, TPU_TI2A_MARK), - PINMUX_GPIO(GPIO_FN_TPU_TO3, TPU_TO3_MARK), - PINMUX_GPIO(GPIO_FN_TPU_TO2, TPU_TO2_MARK), - - /* SIM */ - PINMUX_GPIO(GPIO_FN_SIM_D, SIM_D_MARK), - PINMUX_GPIO(GPIO_FN_SIM_CLK, SIM_CLK_MARK), - PINMUX_GPIO(GPIO_FN_SIM_RST, SIM_RST_MARK), - - /* MMC */ - PINMUX_GPIO(GPIO_FN_MMC_DAT, MMC_DAT_MARK), - PINMUX_GPIO(GPIO_FN_MMC_CMD, MMC_CMD_MARK), - PINMUX_GPIO(GPIO_FN_MMC_CLK, MMC_CLK_MARK), - PINMUX_GPIO(GPIO_FN_MMC_VDDON, MMC_VDDON_MARK), - PINMUX_GPIO(GPIO_FN_MMC_ODMOD, MMC_ODMOD_MARK), - - /* SYSC */ - PINMUX_GPIO(GPIO_FN_STATUS0, STATUS0_MARK), - PINMUX_GPIO(GPIO_FN_STATUS1, STATUS1_MARK), -}; - -static struct pinmux_cfg_reg pinmux_config_regs[] = { - { PINMUX_CFG_REG("PACR", 0xa4050100, 16, 2) { - PTA7_FN, PTA7_OUT, PTA7_IN_PU, PTA7_IN, - PTA6_FN, PTA6_OUT, PTA6_IN_PU, PTA6_IN, - PTA5_FN, PTA5_OUT, PTA5_IN_PU, PTA5_IN, - PTA4_FN, PTA4_OUT, PTA4_IN_PU, PTA4_IN, - PTA3_FN, PTA3_OUT, PTA3_IN_PU, PTA3_IN, - PTA2_FN, PTA2_OUT, PTA2_IN_PU, PTA2_IN, - PTA1_FN, PTA1_OUT, PTA1_IN_PU, PTA1_IN, - PTA0_FN, PTA0_OUT, PTA0_IN_PU, PTA0_IN } - }, - { PINMUX_CFG_REG("PBCR", 0xa4050102, 16, 2) { - PTB7_FN, PTB7_OUT, PTB7_IN_PU, PTB7_IN, - PTB6_FN, PTB6_OUT, PTB6_IN_PU, PTB6_IN, - PTB5_FN, PTB5_OUT, PTB5_IN_PU, PTB5_IN, - PTB4_FN, PTB4_OUT, PTB4_IN_PU, PTB4_IN, - PTB3_FN, PTB3_OUT, PTB3_IN_PU, PTB3_IN, - PTB2_FN, PTB2_OUT, PTB2_IN_PU, PTB2_IN, - PTB1_FN, PTB1_OUT, PTB1_IN_PU, PTB1_IN, - PTB0_FN, PTB0_OUT, PTB0_IN_PU, PTB0_IN } - }, - { PINMUX_CFG_REG("PCCR", 0xa4050104, 16, 2) { - PTC7_FN, PTC7_OUT, PTC7_IN_PU, PTC7_IN, - PTC6_FN, PTC6_OUT, PTC6_IN_PU, PTC6_IN, - PTC5_FN, PTC5_OUT, PTC5_IN_PU, PTC5_IN, - PTC4_FN, PTC4_OUT, PTC4_IN_PU, PTC4_IN, - PTC3_FN, PTC3_OUT, PTC3_IN_PU, PTC3_IN, - PTC2_FN, PTC2_OUT, PTC2_IN_PU, PTC2_IN, - PTC1_FN, PTC1_OUT, PTC1_IN_PU, PTC1_IN, - PTC0_FN, PTC0_OUT, PTC0_IN_PU, PTC0_IN } - }, - { PINMUX_CFG_REG("PDCR", 0xa4050106, 16, 2) { - PTD7_FN, PTD7_OUT, PTD7_IN_PU, PTD7_IN, - PTD6_FN, PTD6_OUT, PTD6_IN_PU, PTD6_IN, - PTD5_FN, PTD5_OUT, PTD5_IN_PU, PTD5_IN, - PTD4_FN, PTD4_OUT, PTD4_IN_PU, PTD4_IN, - PTD3_FN, PTD3_OUT, PTD3_IN_PU, PTD3_IN, - PTD2_FN, PTD2_OUT, PTD2_IN_PU, PTD2_IN, - PTD1_FN, PTD1_OUT, PTD1_IN_PU, PTD1_IN, - PTD0_FN, PTD0_OUT, PTD0_IN_PU, PTD0_IN } - }, - { PINMUX_CFG_REG("PECR", 0xa4050108, 16, 2) { - 0, 0, 0, 0, - PTE6_FN, 0, 0, PTE6_IN, - PTE5_FN, 0, 0, PTE5_IN, - PTE4_FN, PTE4_OUT, PTE4_IN_PU, PTE4_IN, - PTE3_FN, PTE3_OUT, PTE3_IN_PU, PTE3_IN, - PTE2_FN, PTE2_OUT, PTE2_IN_PU, PTE2_IN, - PTE1_FN, PTE1_OUT, PTE1_IN_PU, PTE1_IN, - PTE0_FN, PTE0_OUT, PTE0_IN_PU, PTE0_IN } - }, - { PINMUX_CFG_REG("PFCR", 0xa405010a, 16, 2) { - 0, 0, 0, 0, - PTF6_FN, 0, 0, PTF6_IN, - PTF5_FN, 0, 0, PTF5_IN, - PTF4_FN, 0, 0, PTF4_IN, - PTF3_FN, 0, 0, PTF3_IN, - PTF2_FN, 0, 0, PTF2_IN, - PTF1_FN, 0, 0, PTF1_IN, - PTF0_FN, 0, 0, PTF0_IN } - }, - { PINMUX_CFG_REG("PGCR", 0xa405010c, 16, 2) { - 0, 0, 0, 0, - PTG6_FN, PTG6_OUT, PTG6_IN_PU, PTG6_IN, - PTG5_FN, PTG5_OUT, PTG5_IN_PU, PTG5_IN, - PTG4_FN, PTG4_OUT, PTG4_IN_PU, PTG4_IN, - PTG3_FN, PTG3_OUT, PTG3_IN_PU, PTG3_IN, - PTG2_FN, PTG2_OUT, PTG2_IN_PU, PTG2_IN, - PTG1_FN, PTG1_OUT, PTG1_IN_PU, PTG1_IN, - PTG0_FN, PTG0_OUT, PTG0_IN_PU, PTG0_IN } - }, - { PINMUX_CFG_REG("PHCR", 0xa405010e, 16, 2) { - 0, 0, 0, 0, - PTH6_FN, PTH6_OUT, PTH6_IN_PU, PTH6_IN, - PTH5_FN, PTH5_OUT, PTH5_IN_PU, PTH5_IN, - PTH4_FN, PTH4_OUT, PTH4_IN_PU, PTH4_IN, - PTH3_FN, PTH3_OUT, PTH3_IN_PU, PTH3_IN, - PTH2_FN, PTH2_OUT, PTH2_IN_PU, PTH2_IN, - PTH1_FN, PTH1_OUT, PTH1_IN_PU, PTH1_IN, - PTH0_FN, PTH0_OUT, PTH0_IN_PU, PTH0_IN } - }, - { PINMUX_CFG_REG("PJCR", 0xa4050110, 16, 2) { - 0, 0, 0, 0, - PTJ6_FN, PTJ6_OUT, PTJ6_IN_PU, PTJ6_IN, - PTJ5_FN, PTJ5_OUT, PTJ5_IN_PU, PTJ5_IN, - PTJ4_FN, PTJ4_OUT, PTJ4_IN_PU, PTJ4_IN, - PTJ3_FN, PTJ3_OUT, PTJ3_IN_PU, PTJ3_IN, - PTJ2_FN, PTJ2_OUT, PTJ2_IN_PU, PTJ2_IN, - PTJ1_FN, PTJ1_OUT, PTJ1_IN_PU, PTJ1_IN, - PTJ0_FN, PTJ0_OUT, PTJ0_IN_PU, PTJ0_IN } - }, - { PINMUX_CFG_REG("PKCR", 0xa4050112, 16, 2) { - 0, 0, 0, 0, - 0, 0, 0, 0, - 0, 0, 0, 0, - 0, 0, 0, 0, - PTK3_FN, PTK3_OUT, PTK3_IN_PU, PTK3_IN, - PTK2_FN, PTK2_OUT, PTK2_IN_PU, PTK2_IN, - PTK1_FN, PTK1_OUT, PTK1_IN_PU, PTK1_IN, - PTK0_FN, PTK0_OUT, PTK0_IN_PU, PTK0_IN } - }, - { PINMUX_CFG_REG("PLCR", 0xa4050114, 16, 2) { - PTL7_FN, PTL7_OUT, PTL7_IN_PU, PTL7_IN, - PTL6_FN, PTL6_OUT, PTL6_IN_PU, PTL6_IN, - PTL5_FN, PTL5_OUT, PTL5_IN_PU, PTL5_IN, - PTL4_FN, PTL4_OUT, PTL4_IN_PU, PTL4_IN, - PTL3_FN, PTL3_OUT, PTL3_IN_PU, PTL3_IN, - 0, 0, 0, 0, - 0, 0, 0, 0, - 0, 0, 0, 0 } - }, - { PINMUX_CFG_REG("PMCR", 0xa4050116, 16, 2) { - PTM7_FN, PTM7_OUT, PTM7_IN_PU, PTM7_IN, - PTM6_FN, PTM6_OUT, PTM6_IN_PU, PTM6_IN, - PTM5_FN, PTM5_OUT, PTM5_IN_PU, PTM5_IN, - PTM4_FN, PTM4_OUT, PTM4_IN_PU, PTM4_IN, - PTM3_FN, PTM3_OUT, PTM3_IN_PU, PTM3_IN, - PTM2_FN, PTM2_OUT, PTM2_IN_PU, PTM2_IN, - PTM1_FN, PTM1_OUT, PTM1_IN_PU, PTM1_IN, - PTM0_FN, PTM0_OUT, PTM0_IN_PU, PTM0_IN } +static struct resource sh7720_pfc_resources[] = { + [0] = { + .start = 0xa4050100, + .end = 0xa405016f, + .flags = IORESOURCE_MEM, }, - { PINMUX_CFG_REG("PPCR", 0xa4050118, 16, 2) { - 0, 0, 0, 0, - 0, 0, 0, 0, - 0, 0, 0, 0, - PTP4_FN, PTP4_OUT, PTP4_IN_PU, PTP4_IN, - PTP3_FN, PTP3_OUT, PTP3_IN_PU, PTP3_IN, - PTP2_FN, PTP2_OUT, PTP2_IN_PU, PTP2_IN, - PTP1_FN, PTP1_OUT, PTP1_IN_PU, PTP1_IN, - PTP0_FN, PTP0_OUT, PTP0_IN_PU, PTP0_IN } - }, - { PINMUX_CFG_REG("PRCR", 0xa405011a, 16, 2) { - PTR7_FN, PTR7_OUT, PTR7_IN_PU, PTR7_IN, - PTR6_FN, PTR6_OUT, PTR6_IN_PU, PTR6_IN, - PTR5_FN, PTR5_OUT, PTR5_IN_PU, PTR5_IN, - PTR4_FN, PTR4_OUT, PTR4_IN_PU, PTR4_IN, - PTR3_FN, PTR3_OUT, PTR3_IN_PU, PTR3_IN, - PTR2_FN, PTR2_OUT, PTR2_IN_PU, PTR2_IN, - PTR1_FN, PTR1_OUT, PTR1_IN_PU, PTR1_IN, - PTR0_FN, PTR0_OUT, PTR0_IN_PU, PTR0_IN } - }, - { PINMUX_CFG_REG("PSCR", 0xa405011c, 16, 2) { - 0, 0, 0, 0, - 0, 0, 0, 0, - 0, 0, 0, 0, - PTS4_FN, PTS4_OUT, PTS4_IN_PU, PTS4_IN, - PTS3_FN, PTS3_OUT, PTS3_IN_PU, PTS3_IN, - PTS2_FN, PTS2_OUT, PTS2_IN_PU, PTS2_IN, - PTS1_FN, PTS1_OUT, PTS1_IN_PU, PTS1_IN, - PTS0_FN, PTS0_OUT, PTS0_IN_PU, PTS0_IN } - }, - { PINMUX_CFG_REG("PTCR", 0xa405011e, 16, 2) { - 0, 0, 0, 0, - 0, 0, 0, 0, - 0, 0, 0, 0, - PTT4_FN, PTT4_OUT, PTT4_IN_PU, PTT4_IN, - PTT3_FN, PTT3_OUT, PTT3_IN_PU, PTT3_IN, - PTT2_FN, PTT2_OUT, PTT2_IN_PU, PTT2_IN, - PTT1_FN, PTT1_OUT, PTT1_IN_PU, PTT1_IN, - PTT0_FN, PTT0_OUT, PTT0_IN_PU, PTT0_IN } - }, - { PINMUX_CFG_REG("PUCR", 0xa4050120, 16, 2) { - 0, 0, 0, 0, - 0, 0, 0, 0, - 0, 0, 0, 0, - PTU4_FN, PTU4_OUT, PTU4_IN_PU, PTU4_IN, - PTU3_FN, PTU3_OUT, PTU3_IN_PU, PTU3_IN, - PTU2_FN, PTU2_OUT, PTU2_IN_PU, PTU2_IN, - PTU1_FN, PTU1_OUT, PTU1_IN_PU, PTU1_IN, - PTU0_FN, PTU0_OUT, PTU0_IN_PU, PTU0_IN } - }, - { PINMUX_CFG_REG("PVCR", 0xa4050122, 16, 2) { - 0, 0, 0, 0, - 0, 0, 0, 0, - 0, 0, 0, 0, - PTV4_FN, PTV4_OUT, PTV4_IN_PU, PTV4_IN, - PTV3_FN, PTV3_OUT, PTV3_IN_PU, PTV3_IN, - PTV2_FN, PTV2_OUT, PTV2_IN_PU, PTV2_IN, - PTV1_FN, PTV1_OUT, PTV1_IN_PU, PTV1_IN, - PTV0_FN, PTV0_OUT, PTV0_IN_PU, PTV0_IN } - }, - {} -}; - -static struct pinmux_data_reg pinmux_data_regs[] = { - { PINMUX_DATA_REG("PADR", 0xa4050140, 8) { - PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA, - PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA } - }, - { PINMUX_DATA_REG("PBDR", 0xa4050142, 8) { - PTB7_DATA, PTB6_DATA, PTB5_DATA, PTB4_DATA, - PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA } - }, - { PINMUX_DATA_REG("PCDR", 0xa4050144, 8) { - PTC7_DATA, PTC6_DATA, PTC5_DATA, PTC4_DATA, - PTC3_DATA, PTC2_DATA, PTC1_DATA, PTC0_DATA } - }, - { PINMUX_DATA_REG("PDDR", 0xa4050126, 8) { - PTD7_DATA, PTD6_DATA, PTD5_DATA, PTD4_DATA, - PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA } - }, - { PINMUX_DATA_REG("PEDR", 0xa4050148, 8) { - 0, PTE6_DATA, PTE5_DATA, PTE4_DATA, - PTE3_DATA, PTE2_DATA, PTE1_DATA, PTE0_DATA } - }, - { PINMUX_DATA_REG("PFDR", 0xa405014a, 8) { - 0, PTF6_DATA, PTF5_DATA, PTF4_DATA, - PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA } - }, - { PINMUX_DATA_REG("PGDR", 0xa405014c, 8) { - 0, PTG6_DATA, PTG5_DATA, PTG4_DATA, - PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA } - }, - { PINMUX_DATA_REG("PHDR", 0xa405014e, 8) { - 0, PTH6_DATA, PTH5_DATA, PTH4_DATA, - PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA } - }, - { PINMUX_DATA_REG("PJDR", 0xa4050150, 8) { - 0, PTJ6_DATA, PTJ5_DATA, PTJ4_DATA, - PTJ3_DATA, PTJ2_DATA, PTJ1_DATA, PTJ0_DATA } - }, - { PINMUX_DATA_REG("PKDR", 0xa4050152, 8) { - 0, 0, 0, 0, - PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA } - }, - { PINMUX_DATA_REG("PLDR", 0xa4050154, 8) { - PTL7_DATA, PTL6_DATA, PTL5_DATA, PTL4_DATA, - PTL3_DATA, 0, 0, 0 } - }, - { PINMUX_DATA_REG("PMDR", 0xa4050156, 8) { - PTM7_DATA, PTM6_DATA, PTM5_DATA, PTM4_DATA, - PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA } - }, - { PINMUX_DATA_REG("PPDR", 0xa4050158, 8) { - 0, 0, 0, PTP4_DATA, - PTP3_DATA, PTP2_DATA, PTP1_DATA, PTP0_DATA } - }, - { PINMUX_DATA_REG("PRDR", 0xa405015a, 8) { - PTR7_DATA, PTR6_DATA, PTR5_DATA, PTR4_DATA, - PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA } - }, - { PINMUX_DATA_REG("PSDR", 0xa405015c, 8) { - 0, 0, 0, PTS4_DATA, - PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA } - }, - { PINMUX_DATA_REG("PTDR", 0xa405015e, 8) { - 0, 0, 0, PTT4_DATA, - PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA } - }, - { PINMUX_DATA_REG("PUDR", 0xa4050160, 8) { - 0, 0, 0, PTU4_DATA, - PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA } - }, - { PINMUX_DATA_REG("PVDR", 0xa4050162, 8) { - 0, 0, 0, PTV4_DATA, - PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA } - }, - { }, -}; - -static struct pinmux_info sh7720_pinmux_info = { - .name = "sh7720_pfc", - .reserved_id = PINMUX_RESERVED, - .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END }, - .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END }, - .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END }, - .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END }, - .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END }, - .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, - - .first_gpio = GPIO_PTA7, - .last_gpio = GPIO_FN_STATUS1, - - .gpios = pinmux_gpios, - .cfg_regs = pinmux_config_regs, - .data_regs = pinmux_data_regs, - - .gpio_data = pinmux_data, - .gpio_data_size = ARRAY_SIZE(pinmux_data), }; static int __init plat_pinmux_setup(void) { - return register_pinmux(&sh7720_pinmux_info); + return sh_pfc_register("pfc-sh7720", sh7720_pfc_resources, + ARRAY_SIZE(sh7720_pfc_resources)); } - arch_initcall(plat_pinmux_setup); diff --git a/arch/sh/kernel/cpu/sh3/probe.c b/arch/sh/kernel/cpu/sh3/probe.c index 10f2a760c5e..426e1e1dced 100644 --- a/arch/sh/kernel/cpu/sh3/probe.c +++ b/arch/sh/kernel/cpu/sh3/probe.c @@ -16,7 +16,7 @@ #include <asm/cache.h> #include <asm/io.h> -int __uses_jump_to_uncached detect_cpu_and_cache_system(void) +void cpu_probe(void) { unsigned long addr0, addr1, data0, data1, data2, data3; @@ -30,23 +30,23 @@ int __uses_jump_to_uncached detect_cpu_and_cache_system(void) addr1 = CACHE_OC_ADDRESS_ARRAY + (1 << 12); /* First, write back & invalidate */ - data0 = ctrl_inl(addr0); - ctrl_outl(data0&~(SH_CACHE_VALID|SH_CACHE_UPDATED), addr0); - data1 = ctrl_inl(addr1); - ctrl_outl(data1&~(SH_CACHE_VALID|SH_CACHE_UPDATED), addr1); + data0 = __raw_readl(addr0); + __raw_writel(data0&~(SH_CACHE_VALID|SH_CACHE_UPDATED), addr0); + data1 = __raw_readl(addr1); + __raw_writel(data1&~(SH_CACHE_VALID|SH_CACHE_UPDATED), addr1); /* Next, check if there's shadow or not */ - data0 = ctrl_inl(addr0); + data0 = __raw_readl(addr0); data0 ^= SH_CACHE_VALID; - ctrl_outl(data0, addr0); - data1 = ctrl_inl(addr1); + __raw_writel(data0, addr0); + data1 = __raw_readl(addr1); data2 = data1 ^ SH_CACHE_VALID; - ctrl_outl(data2, addr1); - data3 = ctrl_inl(addr0); + __raw_writel(data2, addr1); + data3 = __raw_readl(addr0); /* Lastly, invaliate them. */ - ctrl_outl(data0&~SH_CACHE_VALID, addr0); - ctrl_outl(data2&~SH_CACHE_VALID, addr1); + __raw_writel(data0&~SH_CACHE_VALID, addr0); + __raw_writel(data2&~SH_CACHE_VALID, addr1); back_to_cached(); @@ -94,9 +94,9 @@ int __uses_jump_to_uncached detect_cpu_and_cache_system(void) boot_cpu_data.dcache.way_incr = (1 << 13); boot_cpu_data.dcache.entry_mask = 0x1ff0; boot_cpu_data.dcache.sets = 512; - ctrl_outl(CCR_CACHE_32KB, CCR3_REG); + __raw_writel(CCR_CACHE_32KB, CCR3_REG); #else - ctrl_outl(CCR_CACHE_16KB, CCR3_REG); + __raw_writel(CCR_CACHE_16KB, CCR3_REG); #endif #endif } @@ -107,5 +107,5 @@ int __uses_jump_to_uncached detect_cpu_and_cache_system(void) boot_cpu_data.dcache.flags |= SH_CACHE_COMBINED; boot_cpu_data.icache = boot_cpu_data.dcache; - return 0; + boot_cpu_data.family = CPU_FAMILY_SH3; } diff --git a/arch/sh/kernel/cpu/sh3/serial-sh770x.c b/arch/sh/kernel/cpu/sh3/serial-sh770x.c new file mode 100644 index 00000000000..4f7242c676b --- /dev/null +++ b/arch/sh/kernel/cpu/sh3/serial-sh770x.c @@ -0,0 +1,33 @@ +#include <linux/serial_sci.h> +#include <linux/serial_core.h> +#include <linux/io.h> +#include <cpu/serial.h> + +#define SCPCR 0xA4000116 +#define SCPDR 0xA4000136 + +static void sh770x_sci_init_pins(struct uart_port *port, unsigned int cflag) +{ + unsigned short data; + + /* We need to set SCPCR to enable RTS/CTS */ + data = __raw_readw(SCPCR); + /* Clear out SCP7MD1,0, SCP6MD1,0, SCP4MD1,0*/ + __raw_writew(data & 0x0fcf, SCPCR); + + if (!(cflag & CRTSCTS)) { + /* We need to set SCPCR to enable RTS/CTS */ + data = __raw_readw(SCPCR); + /* Clear out SCP7MD1,0, SCP4MD1,0, + Set SCP6MD1,0 = {01} (output) */ + __raw_writew((data & 0x0fcf) | 0x1000, SCPCR); + + data = __raw_readb(SCPDR); + /* Set /RTS2 (bit6) = 0 */ + __raw_writeb(data & 0xbf, SCPDR); + } +} + +struct plat_sci_port_ops sh770x_sci_port_ops = { + .init_pins = sh770x_sci_init_pins, +}; diff --git a/arch/sh/kernel/cpu/sh3/serial-sh7710.c b/arch/sh/kernel/cpu/sh3/serial-sh7710.c new file mode 100644 index 00000000000..42190ef6aeb --- /dev/null +++ b/arch/sh/kernel/cpu/sh3/serial-sh7710.c @@ -0,0 +1,20 @@ +#include <linux/serial_sci.h> +#include <linux/serial_core.h> +#include <linux/io.h> +#include <cpu/serial.h> + +#define PACR 0xa4050100 +#define PBCR 0xa4050102 + +static void sh7710_sci_init_pins(struct uart_port *port, unsigned int cflag) +{ + if (port->mapbase == 0xA4400000) { + __raw_writew(__raw_readw(PACR) & 0xffc0, PACR); + __raw_writew(__raw_readw(PBCR) & 0x0fff, PBCR); + } else if (port->mapbase == 0xA4410000) + __raw_writew(__raw_readw(PBCR) & 0xf003, PBCR); +} + +struct plat_sci_port_ops sh7710_sci_port_ops = { + .init_pins = sh7710_sci_init_pins, +}; diff --git a/arch/sh/kernel/cpu/sh3/serial-sh7720.c b/arch/sh/kernel/cpu/sh3/serial-sh7720.c new file mode 100644 index 00000000000..c4a0336660d --- /dev/null +++ b/arch/sh/kernel/cpu/sh3/serial-sh7720.c @@ -0,0 +1,37 @@ +#include <linux/serial_sci.h> +#include <linux/serial_core.h> +#include <linux/io.h> +#include <cpu/serial.h> +#include <cpu/gpio.h> + +static void sh7720_sci_init_pins(struct uart_port *port, unsigned int cflag) +{ + unsigned short data; + + if (cflag & CRTSCTS) { + /* enable RTS/CTS */ + if (port->mapbase == 0xa4430000) { /* SCIF0 */ + /* Clear PTCR bit 9-2; enable all scif pins but sck */ + data = __raw_readw(PORT_PTCR); + __raw_writew((data & 0xfc03), PORT_PTCR); + } else if (port->mapbase == 0xa4438000) { /* SCIF1 */ + /* Clear PVCR bit 9-2 */ + data = __raw_readw(PORT_PVCR); + __raw_writew((data & 0xfc03), PORT_PVCR); + } + } else { + if (port->mapbase == 0xa4430000) { /* SCIF0 */ + /* Clear PTCR bit 5-2; enable only tx and rx */ + data = __raw_readw(PORT_PTCR); + __raw_writew((data & 0xffc3), PORT_PTCR); + } else if (port->mapbase == 0xa4438000) { /* SCIF1 */ + /* Clear PVCR bit 5-2 */ + data = __raw_readw(PORT_PVCR); + __raw_writew((data & 0xffc3), PORT_PVCR); + } + } +} + +struct plat_sci_port_ops sh7720_sci_port_ops = { + .init_pins = sh7720_sci_init_pins, +}; diff --git a/arch/sh/kernel/cpu/sh3/setup-sh3.c b/arch/sh/kernel/cpu/sh3/setup-sh3.c index c9884685785..53be70b9811 100644 --- a/arch/sh/kernel/cpu/sh3/setup-sh3.c +++ b/arch/sh/kernel/cpu/sh3/setup-sh3.c @@ -58,7 +58,7 @@ static DECLARE_INTC_DESC_ACK(intc_desc_irq45, "sh3-irq45", void __init plat_irq_setup_pins(int mode) { if (mode == IRQ_MODE_IRQ) { - ctrl_outw(ctrl_inw(INTC_ICR1) & ~INTC_ICR1_IRQLVL, INTC_ICR1); + __raw_writew(__raw_readw(INTC_ICR1) & ~INTC_ICR1_IRQLVL, INTC_ICR1); register_intc_controller(&intc_desc_irq0123); return; } diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7705.c b/arch/sh/kernel/cpu/sh3/setup-sh7705.c index 6468ae86b94..6a72fd14de2 100644 --- a/arch/sh/kernel/cpu/sh3/setup-sh7705.c +++ b/arch/sh/kernel/cpu/sh3/setup-sh7705.c @@ -1,7 +1,7 @@ /* * SH7705 Setup * - * Copyright (C) 2006, 2007 Paul Mundt + * Copyright (C) 2006 - 2009 Paul Mundt * Copyright (C) 2007 Nobuhiro Iwamatsu * * This file is subject to the terms and conditions of the GNU General Public @@ -13,7 +13,10 @@ #include <linux/irq.h> #include <linux/serial.h> #include <linux/serial_sci.h> +#include <linux/sh_timer.h> +#include <linux/sh_intc.h> #include <asm/rtc.h> +#include <cpu/serial.h> enum { UNUSED = 0, @@ -21,51 +24,36 @@ enum { /* interrupt sources */ IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, PINT07, PINT815, - DMAC_DEI0, DMAC_DEI1, DMAC_DEI2, DMAC_DEI3, - SCIF0_ERI, SCIF0_RXI, SCIF0_TXI, - SCIF2_ERI, SCIF2_RXI, SCIF2_TXI, - ADC_ADI, - USB_USI0, USB_USI1, + + DMAC, SCIF0, SCIF2, ADC_ADI, USB, + TPU0, TPU1, TPU2, TPU3, - TMU0, TMU1, TMU2_TUNI, TMU2_TICPI, - RTC_ATI, RTC_PRI, RTC_CUI, - WDT, - REF_RCMI, + TMU0, TMU1, TMU2, - /* interrupt groups */ - RTC, TMU2, DMAC, USB, SCIF2, SCIF0, + RTC, WDT, REF_RCMI, }; static struct intc_vect vectors[] __initdata = { /* IRQ0->5 are handled in setup-sh3.c */ INTC_VECT(PINT07, 0x700), INTC_VECT(PINT815, 0x720), - INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820), - INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860), - INTC_VECT(SCIF0_ERI, 0x880), INTC_VECT(SCIF0_RXI, 0x8a0), - INTC_VECT(SCIF0_TXI, 0x8e0), - INTC_VECT(SCIF2_ERI, 0x900), INTC_VECT(SCIF2_RXI, 0x920), - INTC_VECT(SCIF2_TXI, 0x960), + INTC_VECT(DMAC, 0x800), INTC_VECT(DMAC, 0x820), + INTC_VECT(DMAC, 0x840), INTC_VECT(DMAC, 0x860), + INTC_VECT(SCIF0, 0x880), INTC_VECT(SCIF0, 0x8a0), + INTC_VECT(SCIF0, 0x8e0), + INTC_VECT(SCIF2, 0x900), INTC_VECT(SCIF2, 0x920), + INTC_VECT(SCIF2, 0x960), INTC_VECT(ADC_ADI, 0x980), - INTC_VECT(USB_USI0, 0xa20), INTC_VECT(USB_USI1, 0xa40), + INTC_VECT(USB, 0xa20), INTC_VECT(USB, 0xa40), INTC_VECT(TPU0, 0xc00), INTC_VECT(TPU1, 0xc20), INTC_VECT(TPU2, 0xc80), INTC_VECT(TPU3, 0xca0), INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420), - INTC_VECT(TMU2_TUNI, 0x440), INTC_VECT(TMU2_TICPI, 0x460), - INTC_VECT(RTC_ATI, 0x480), INTC_VECT(RTC_PRI, 0x4a0), - INTC_VECT(RTC_CUI, 0x4c0), + INTC_VECT(TMU2, 0x440), INTC_VECT(TMU2, 0x460), + INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0), + INTC_VECT(RTC, 0x4c0), INTC_VECT(WDT, 0x560), INTC_VECT(REF_RCMI, 0x580), }; -static struct intc_group groups[] __initdata = { - INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI), - INTC_GROUP(TMU2, TMU2_TUNI, TMU2_TICPI), - INTC_GROUP(DMAC, DMAC_DEI0, DMAC_DEI1, DMAC_DEI2, DMAC_DEI3), - INTC_GROUP(USB, USB_USI0, USB_USI1), - INTC_GROUP(SCIF0, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI), - INTC_GROUP(SCIF2, SCIF2_ERI, SCIF2_RXI, SCIF2_TXI), -}; - static struct intc_prio_reg prio_registers[] __initdata = { { 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } }, { 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, 0, 0 } }, @@ -78,30 +66,53 @@ static struct intc_prio_reg prio_registers[] __initdata = { }; -static DECLARE_INTC_DESC(intc_desc, "sh7705", vectors, groups, +static DECLARE_INTC_DESC(intc_desc, "sh7705", vectors, NULL, NULL, prio_registers, NULL); -static struct plat_sci_port sci_platform_data[] = { - { - .mapbase = 0xa4410000, - .flags = UPF_BOOT_AUTOCONF, - .type = PORT_SCIF, - .irqs = { 56, 57, 59 }, - }, { - .mapbase = 0xa4400000, - .flags = UPF_BOOT_AUTOCONF, - .type = PORT_SCIF, - .irqs = { 52, 53, 55 }, - }, { - .flags = 0, - } -}; - -static struct platform_device sci_device = { +static struct plat_sci_port scif0_platform_data = { + .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_TIE | SCSCR_RIE | SCSCR_TE | + SCSCR_RE | SCSCR_CKE1 | SCSCR_CKE0, + .type = PORT_SCIF, + .ops = &sh770x_sci_port_ops, + .regtype = SCIx_SH7705_SCIF_REGTYPE, +}; + +static struct resource scif0_resources[] = { + DEFINE_RES_MEM(0xa4410000, 0x100), + DEFINE_RES_IRQ(evt2irq(0x900)), +}; + +static struct platform_device scif0_device = { .name = "sh-sci", - .id = -1, + .id = 0, + .resource = scif0_resources, + .num_resources = ARRAY_SIZE(scif0_resources), .dev = { - .platform_data = sci_platform_data, + .platform_data = &scif0_platform_data, + }, +}; + +static struct plat_sci_port scif1_platform_data = { + .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_TIE | SCSCR_RIE | SCSCR_TE | SCSCR_RE, + .type = PORT_SCIF, + .ops = &sh770x_sci_port_ops, + .regtype = SCIx_SH7705_SCIF_REGTYPE, +}; + +static struct resource scif1_resources[] = { + DEFINE_RES_MEM(0xa4400000, 0x100), + DEFINE_RES_IRQ(evt2irq(0x880)), +}; + +static struct platform_device scif1_device = { + .name = "sh-sci", + .id = 1, + .resource = scif1_resources, + .num_resources = ARRAY_SIZE(scif1_resources), + .dev = { + .platform_data = &scif1_platform_data, }, }; @@ -112,17 +123,9 @@ static struct resource rtc_resources[] = { .flags = IORESOURCE_IO, }, [1] = { - .start = 20, - .flags = IORESOURCE_IRQ, - }, - [2] = { - .start = 21, + .start = evt2irq(0x480), .flags = IORESOURCE_IRQ, }, - [3] = { - .start = 22, - .flags = IORESOURCE_IRQ, - }, }; static struct sh_rtc_platform_info rtc_info = { @@ -139,8 +142,31 @@ static struct platform_device rtc_device = { }, }; +static struct sh_timer_config tmu0_platform_data = { + .channels_mask = 7, +}; + +static struct resource tmu0_resources[] = { + DEFINE_RES_MEM(0xfffffe90, 0x2c), + DEFINE_RES_IRQ(evt2irq(0x400)), + DEFINE_RES_IRQ(evt2irq(0x420)), + DEFINE_RES_IRQ(evt2irq(0x440)), +}; + +static struct platform_device tmu0_device = { + .name = "sh-tmu-sh3", + .id = 0, + .dev = { + .platform_data = &tmu0_platform_data, + }, + .resource = tmu0_resources, + .num_resources = ARRAY_SIZE(tmu0_resources), +}; + static struct platform_device *sh7705_devices[] __initdata = { - &sci_device, + &scif0_device, + &scif1_device, + &tmu0_device, &rtc_device, }; @@ -149,7 +175,19 @@ static int __init sh7705_devices_setup(void) return platform_add_devices(sh7705_devices, ARRAY_SIZE(sh7705_devices)); } -__initcall(sh7705_devices_setup); +arch_initcall(sh7705_devices_setup); + +static struct platform_device *sh7705_early_devices[] __initdata = { + &scif0_device, + &scif1_device, + &tmu0_device, +}; + +void __init plat_early_device_setup(void) +{ + early_platform_add_devices(sh7705_early_devices, + ARRAY_SIZE(sh7705_early_devices)); +} void __init plat_irq_setup(void) { diff --git a/arch/sh/kernel/cpu/sh3/setup-sh770x.c b/arch/sh/kernel/cpu/sh3/setup-sh770x.c index 93c55e2ed95..9139d14b9c5 100644 --- a/arch/sh/kernel/cpu/sh3/setup-sh770x.c +++ b/arch/sh/kernel/cpu/sh3/setup-sh770x.c @@ -2,6 +2,7 @@ * SH3 Setup code for SH7706, SH7707, SH7708, SH7709 * * Copyright (C) 2007 Magnus Damm + * Copyright (C) 2009 Paul Mundt * * Based on setup-sh7709.c * @@ -17,6 +18,9 @@ #include <linux/platform_device.h> #include <linux/serial.h> #include <linux/serial_sci.h> +#include <linux/sh_timer.h> +#include <linux/sh_intc.h> +#include <cpu/serial.h> enum { UNUSED = 0, @@ -24,46 +28,37 @@ enum { /* interrupt sources */ IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, PINT07, PINT815, - DMAC_DEI0, DMAC_DEI1, DMAC_DEI2, DMAC_DEI3, - SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI, - SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI, - SCI_ERI, SCI_RXI, SCI_TXI, SCI_TEI, - ADC_ADI, + DMAC, SCIF0, SCIF2, SCI, ADC_ADI, LCDC, PCC0, PCC1, - TMU0, TMU1, TMU2_TUNI, TMU2_TICPI, - RTC_ATI, RTC_PRI, RTC_CUI, - WDT, - REF_RCMI, REF_ROVI, - - /* interrupt groups */ - RTC, REF, TMU2, DMAC, SCI, SCIF2, SCIF0, + TMU0, TMU1, TMU2, + RTC, WDT, REF, }; static struct intc_vect vectors[] __initdata = { INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420), - INTC_VECT(TMU2_TUNI, 0x440), INTC_VECT(TMU2_TICPI, 0x460), - INTC_VECT(RTC_ATI, 0x480), INTC_VECT(RTC_PRI, 0x4a0), - INTC_VECT(RTC_CUI, 0x4c0), - INTC_VECT(SCI_ERI, 0x4e0), INTC_VECT(SCI_RXI, 0x500), - INTC_VECT(SCI_TXI, 0x520), INTC_VECT(SCI_TEI, 0x540), + INTC_VECT(TMU2, 0x440), INTC_VECT(TMU2, 0x460), + INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0), + INTC_VECT(RTC, 0x4c0), + INTC_VECT(SCI, 0x4e0), INTC_VECT(SCI, 0x500), + INTC_VECT(SCI, 0x520), INTC_VECT(SCI, 0x540), INTC_VECT(WDT, 0x560), - INTC_VECT(REF_RCMI, 0x580), - INTC_VECT(REF_ROVI, 0x5a0), + INTC_VECT(REF, 0x580), + INTC_VECT(REF, 0x5a0), #if defined(CONFIG_CPU_SUBTYPE_SH7706) || \ defined(CONFIG_CPU_SUBTYPE_SH7707) || \ defined(CONFIG_CPU_SUBTYPE_SH7709) /* IRQ0->5 are handled in setup-sh3.c */ - INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820), - INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860), + INTC_VECT(DMAC, 0x800), INTC_VECT(DMAC, 0x820), + INTC_VECT(DMAC, 0x840), INTC_VECT(DMAC, 0x860), INTC_VECT(ADC_ADI, 0x980), - INTC_VECT(SCIF2_ERI, 0x900), INTC_VECT(SCIF2_RXI, 0x920), - INTC_VECT(SCIF2_BRI, 0x940), INTC_VECT(SCIF2_TXI, 0x960), + INTC_VECT(SCIF2, 0x900), INTC_VECT(SCIF2, 0x920), + INTC_VECT(SCIF2, 0x940), INTC_VECT(SCIF2, 0x960), #endif #if defined(CONFIG_CPU_SUBTYPE_SH7707) || \ defined(CONFIG_CPU_SUBTYPE_SH7709) INTC_VECT(PINT07, 0x700), INTC_VECT(PINT815, 0x720), - INTC_VECT(SCIF0_ERI, 0x880), INTC_VECT(SCIF0_RXI, 0x8a0), - INTC_VECT(SCIF0_BRI, 0x8c0), INTC_VECT(SCIF0_TXI, 0x8e0), + INTC_VECT(SCIF0, 0x880), INTC_VECT(SCIF0, 0x8a0), + INTC_VECT(SCIF0, 0x8c0), INTC_VECT(SCIF0, 0x8e0), #endif #if defined(CONFIG_CPU_SUBTYPE_SH7707) INTC_VECT(LCDC, 0x9a0), @@ -71,16 +66,6 @@ static struct intc_vect vectors[] __initdata = { #endif }; -static struct intc_group groups[] __initdata = { - INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI), - INTC_GROUP(TMU2, TMU2_TUNI, TMU2_TICPI), - INTC_GROUP(REF, REF_RCMI, REF_ROVI), - INTC_GROUP(DMAC, DMAC_DEI0, DMAC_DEI1, DMAC_DEI2, DMAC_DEI3), - INTC_GROUP(SCI, SCI_ERI, SCI_RXI, SCI_TXI, SCI_TEI), - INTC_GROUP(SCIF0, SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI), - INTC_GROUP(SCIF2, SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI), -}; - static struct intc_prio_reg prio_registers[] __initdata = { { 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } }, { 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF, SCI, 0 } }, @@ -101,7 +86,7 @@ static struct intc_prio_reg prio_registers[] __initdata = { #endif }; -static DECLARE_INTC_DESC(intc_desc, "sh770x", vectors, groups, +static DECLARE_INTC_DESC(intc_desc, "sh770x", vectors, NULL, NULL, prio_registers, NULL); static struct resource rtc_resources[] = { @@ -111,15 +96,7 @@ static struct resource rtc_resources[] = { .flags = IORESOURCE_IO, }, [1] = { - .start = 21, - .flags = IORESOURCE_IRQ, - }, - [2] = { - .start = 22, - .flags = IORESOURCE_IRQ, - }, - [3] = { - .start = 20, + .start = evt2irq(0x480), .flags = IORESOURCE_IRQ, }, }; @@ -131,47 +108,115 @@ static struct platform_device rtc_device = { .resource = rtc_resources, }; -static struct plat_sci_port sci_platform_data[] = { - { - .mapbase = 0xfffffe80, - .flags = UPF_BOOT_AUTOCONF, - .type = PORT_SCI, - .irqs = { 23, 24, 25, 0 }, +static struct plat_sci_port scif0_platform_data = { + .port_reg = 0xa4000136, + .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_TE | SCSCR_RE, + .type = PORT_SCI, + .ops = &sh770x_sci_port_ops, + .regshift = 1, +}; + +static struct resource scif0_resources[] = { + DEFINE_RES_MEM(0xfffffe80, 0x100), + DEFINE_RES_IRQ(evt2irq(0x4e0)), +}; + +static struct platform_device scif0_device = { + .name = "sh-sci", + .id = 0, + .resource = scif0_resources, + .num_resources = ARRAY_SIZE(scif0_resources), + .dev = { + .platform_data = &scif0_platform_data, }, +}; #if defined(CONFIG_CPU_SUBTYPE_SH7706) || \ defined(CONFIG_CPU_SUBTYPE_SH7707) || \ defined(CONFIG_CPU_SUBTYPE_SH7709) - { - .mapbase = 0xa4000150, - .flags = UPF_BOOT_AUTOCONF, - .type = PORT_SCIF, - .irqs = { 56, 57, 59, 58 }, +static struct plat_sci_port scif1_platform_data = { + .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_TE | SCSCR_RE, + .type = PORT_SCIF, + .ops = &sh770x_sci_port_ops, + .regtype = SCIx_SH3_SCIF_REGTYPE, +}; + +static struct resource scif1_resources[] = { + DEFINE_RES_MEM(0xa4000150, 0x100), + DEFINE_RES_IRQ(evt2irq(0x900)), +}; + +static struct platform_device scif1_device = { + .name = "sh-sci", + .id = 1, + .resource = scif1_resources, + .num_resources = ARRAY_SIZE(scif1_resources), + .dev = { + .platform_data = &scif1_platform_data, }, +}; #endif #if defined(CONFIG_CPU_SUBTYPE_SH7707) || \ defined(CONFIG_CPU_SUBTYPE_SH7709) - { - .mapbase = 0xa4000140, - .flags = UPF_BOOT_AUTOCONF, - .type = PORT_IRDA, - .irqs = { 52, 53, 55, 54 }, - }, -#endif - { - .flags = 0, - } +static struct plat_sci_port scif2_platform_data = { + .port_reg = SCIx_NOT_SUPPORTED, + .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_TE | SCSCR_RE, + .type = PORT_IRDA, + .ops = &sh770x_sci_port_ops, + .regshift = 1, +}; + +static struct resource scif2_resources[] = { + DEFINE_RES_MEM(0xa4000140, 0x100), + DEFINE_RES_IRQ(evt2irq(0x880)), }; -static struct platform_device sci_device = { +static struct platform_device scif2_device = { .name = "sh-sci", - .id = -1, + .id = 2, + .resource = scif2_resources, + .num_resources = ARRAY_SIZE(scif2_resources), .dev = { - .platform_data = sci_platform_data, + .platform_data = &scif2_platform_data, }, }; +#endif + +static struct sh_timer_config tmu0_platform_data = { + .channels_mask = 7, +}; + +static struct resource tmu0_resources[] = { + DEFINE_RES_MEM(0xfffffe90, 0x2c), + DEFINE_RES_IRQ(evt2irq(0x400)), + DEFINE_RES_IRQ(evt2irq(0x420)), + DEFINE_RES_IRQ(evt2irq(0x440)), +}; + +static struct platform_device tmu0_device = { + .name = "sh-tmu-sh3", + .id = 0, + .dev = { + .platform_data = &tmu0_platform_data, + }, + .resource = tmu0_resources, + .num_resources = ARRAY_SIZE(tmu0_resources), +}; static struct platform_device *sh770x_devices[] __initdata = { - &sci_device, + &scif0_device, +#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \ + defined(CONFIG_CPU_SUBTYPE_SH7707) || \ + defined(CONFIG_CPU_SUBTYPE_SH7709) + &scif1_device, +#endif +#if defined(CONFIG_CPU_SUBTYPE_SH7707) || \ + defined(CONFIG_CPU_SUBTYPE_SH7709) + &scif2_device, +#endif + &tmu0_device, &rtc_device, }; @@ -180,7 +225,27 @@ static int __init sh770x_devices_setup(void) return platform_add_devices(sh770x_devices, ARRAY_SIZE(sh770x_devices)); } -__initcall(sh770x_devices_setup); +arch_initcall(sh770x_devices_setup); + +static struct platform_device *sh770x_early_devices[] __initdata = { + &scif0_device, +#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \ + defined(CONFIG_CPU_SUBTYPE_SH7707) || \ + defined(CONFIG_CPU_SUBTYPE_SH7709) + &scif1_device, +#endif +#if defined(CONFIG_CPU_SUBTYPE_SH7707) || \ + defined(CONFIG_CPU_SUBTYPE_SH7709) + &scif2_device, +#endif + &tmu0_device, +}; + +void __init plat_early_device_setup(void) +{ + early_platform_add_devices(sh770x_early_devices, + ARRAY_SIZE(sh770x_early_devices)); +} void __init plat_irq_setup(void) { diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7710.c b/arch/sh/kernel/cpu/sh3/setup-sh7710.c index 77eee481de4..e9ed300dba5 100644 --- a/arch/sh/kernel/cpu/sh3/setup-sh7710.c +++ b/arch/sh/kernel/cpu/sh3/setup-sh7710.c @@ -1,7 +1,7 @@ /* * SH3 Setup code for SH7710, SH7712 * - * Copyright (C) 2006, 2007 Paul Mundt + * Copyright (C) 2006 - 2009 Paul Mundt * Copyright (C) 2007 Nobuhiro Iwamatsu * * This file is subject to the terms and conditions of the GNU General Public @@ -13,6 +13,8 @@ #include <linux/irq.h> #include <linux/serial.h> #include <linux/serial_sci.h> +#include <linux/sh_timer.h> +#include <linux/sh_intc.h> #include <asm/rtc.h> enum { @@ -20,59 +22,40 @@ enum { /* interrupt sources */ IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, - DMAC_DEI0, DMAC_DEI1, DMAC_DEI2, DMAC_DEI3, - SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI, - SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI, - DMAC_DEI4, DMAC_DEI5, - IPSEC, + DMAC1, SCIF0, SCIF1, DMAC2, IPSEC, EDMAC0, EDMAC1, EDMAC2, - SIOF0_ERI, SIOF0_TXI, SIOF0_RXI, SIOF0_CCI, - SIOF1_ERI, SIOF1_TXI, SIOF1_RXI, SIOF1_CCI, - TMU0, TMU1, TMU2, - RTC_ATI, RTC_PRI, RTC_CUI, - WDT, - REF, + SIOF0, SIOF1, - /* interrupt groups */ - RTC, DMAC1, SCIF0, SCIF1, DMAC2, SIOF0, SIOF1, + TMU0, TMU1, TMU2, + RTC, WDT, REF, }; static struct intc_vect vectors[] __initdata = { /* IRQ0->5 are handled in setup-sh3.c */ - INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820), - INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860), - INTC_VECT(SCIF0_ERI, 0x880), INTC_VECT(SCIF0_RXI, 0x8a0), - INTC_VECT(SCIF0_BRI, 0x8c0), INTC_VECT(SCIF0_TXI, 0x8e0), - INTC_VECT(SCIF1_ERI, 0x900), INTC_VECT(SCIF1_RXI, 0x920), - INTC_VECT(SCIF1_BRI, 0x940), INTC_VECT(SCIF1_TXI, 0x960), - INTC_VECT(DMAC_DEI4, 0xb80), INTC_VECT(DMAC_DEI5, 0xba0), + INTC_VECT(DMAC1, 0x800), INTC_VECT(DMAC1, 0x820), + INTC_VECT(DMAC1, 0x840), INTC_VECT(DMAC1, 0x860), + INTC_VECT(SCIF0, 0x880), INTC_VECT(SCIF0, 0x8a0), + INTC_VECT(SCIF0, 0x8c0), INTC_VECT(SCIF0, 0x8e0), + INTC_VECT(SCIF1, 0x900), INTC_VECT(SCIF1, 0x920), + INTC_VECT(SCIF1, 0x940), INTC_VECT(SCIF1, 0x960), + INTC_VECT(DMAC2, 0xb80), INTC_VECT(DMAC2, 0xba0), #ifdef CONFIG_CPU_SUBTYPE_SH7710 INTC_VECT(IPSEC, 0xbe0), #endif INTC_VECT(EDMAC0, 0xc00), INTC_VECT(EDMAC1, 0xc20), INTC_VECT(EDMAC2, 0xc40), - INTC_VECT(SIOF0_ERI, 0xe00), INTC_VECT(SIOF0_TXI, 0xe20), - INTC_VECT(SIOF0_RXI, 0xe40), INTC_VECT(SIOF0_CCI, 0xe60), - INTC_VECT(SIOF1_ERI, 0xe80), INTC_VECT(SIOF1_TXI, 0xea0), - INTC_VECT(SIOF1_RXI, 0xec0), INTC_VECT(SIOF1_CCI, 0xee0), + INTC_VECT(SIOF0, 0xe00), INTC_VECT(SIOF0, 0xe20), + INTC_VECT(SIOF0, 0xe40), INTC_VECT(SIOF0, 0xe60), + INTC_VECT(SIOF1, 0xe80), INTC_VECT(SIOF1, 0xea0), + INTC_VECT(SIOF1, 0xec0), INTC_VECT(SIOF1, 0xee0), INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420), INTC_VECT(TMU2, 0x440), - INTC_VECT(RTC_ATI, 0x480), INTC_VECT(RTC_PRI, 0x4a0), - INTC_VECT(RTC_CUI, 0x4c0), + INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0), + INTC_VECT(RTC, 0x4c0), INTC_VECT(WDT, 0x560), INTC_VECT(REF, 0x580), }; -static struct intc_group groups[] __initdata = { - INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI), - INTC_GROUP(DMAC1, DMAC_DEI0, DMAC_DEI1, DMAC_DEI2, DMAC_DEI3), - INTC_GROUP(SCIF0, SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI), - INTC_GROUP(SCIF1, SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI), - INTC_GROUP(DMAC2, DMAC_DEI4, DMAC_DEI5), - INTC_GROUP(SIOF0, SIOF0_ERI, SIOF0_TXI, SIOF0_RXI, SIOF0_CCI), - INTC_GROUP(SIOF1, SIOF1_ERI, SIOF1_TXI, SIOF1_RXI, SIOF1_CCI), -}; - static struct intc_prio_reg prio_registers[] __initdata = { { 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } }, { 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF, 0, 0 } }, @@ -85,7 +68,7 @@ static struct intc_prio_reg prio_registers[] __initdata = { { 0xa4080006, 0, 16, 4, /* IPRI */ { 0, 0, SIOF1 } }, }; -static DECLARE_INTC_DESC(intc_desc, "sh7710", vectors, groups, +static DECLARE_INTC_DESC(intc_desc, "sh7710", vectors, NULL, NULL, prio_registers, NULL); static struct resource rtc_resources[] = { @@ -95,17 +78,9 @@ static struct resource rtc_resources[] = { .flags = IORESOURCE_IO, }, [1] = { - .start = 20, + .start = evt2irq(0x480), .flags = IORESOURCE_IRQ, }, - [2] = { - .start = 21, - .flags = IORESOURCE_IRQ, - }, - [3] = { - .start = 22, - .flags = IORESOURCE_IRQ, - }, }; static struct sh_rtc_platform_info rtc_info = { @@ -122,33 +97,75 @@ static struct platform_device rtc_device = { }, }; -static struct plat_sci_port sci_platform_data[] = { - { - .mapbase = 0xa4400000, - .flags = UPF_BOOT_AUTOCONF, - .type = PORT_SCIF, - .irqs = { 52, 53, 55, 54 }, - }, { - .mapbase = 0xa4410000, - .flags = UPF_BOOT_AUTOCONF, - .type = PORT_SCIF, - .irqs = { 56, 57, 59, 58 }, - }, { +static struct plat_sci_port scif0_platform_data = { + .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_TE | SCSCR_RE | SCSCR_REIE | + SCSCR_CKE1 | SCSCR_CKE0, + .type = PORT_SCIF, +}; - .flags = 0, - } +static struct resource scif0_resources[] = { + DEFINE_RES_MEM(0xa4400000, 0x100), + DEFINE_RES_IRQ(evt2irq(0x880)), }; -static struct platform_device sci_device = { +static struct platform_device scif0_device = { .name = "sh-sci", - .id = -1, + .id = 0, + .resource = scif0_resources, + .num_resources = ARRAY_SIZE(scif0_resources), + .dev = { + .platform_data = &scif0_platform_data, + }, +}; + +static struct plat_sci_port scif1_platform_data = { + .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_TE | SCSCR_RE | SCSCR_REIE | + SCSCR_CKE1 | SCSCR_CKE0, + .type = PORT_SCIF, +}; + +static struct resource scif1_resources[] = { + DEFINE_RES_MEM(0xa4410000, 0x100), + DEFINE_RES_IRQ(evt2irq(0x900)), +}; + +static struct platform_device scif1_device = { + .name = "sh-sci", + .id = 1, + .resource = scif1_resources, + .num_resources = ARRAY_SIZE(scif1_resources), .dev = { - .platform_data = sci_platform_data, + .platform_data = &scif1_platform_data, }, }; +static struct sh_timer_config tmu0_platform_data = { + .channels_mask = 7, +}; + +static struct resource tmu0_resources[] = { + DEFINE_RES_MEM(0xa412fe90, 0x28), + DEFINE_RES_IRQ(evt2irq(0x400)), + DEFINE_RES_IRQ(evt2irq(0x420)), + DEFINE_RES_IRQ(evt2irq(0x440)), +}; + +static struct platform_device tmu0_device = { + .name = "sh-tmu-sh3", + .id = 0, + .dev = { + .platform_data = &tmu0_platform_data, + }, + .resource = tmu0_resources, + .num_resources = ARRAY_SIZE(tmu0_resources), +}; + static struct platform_device *sh7710_devices[] __initdata = { - &sci_device, + &scif0_device, + &scif1_device, + &tmu0_device, &rtc_device, }; @@ -157,7 +174,19 @@ static int __init sh7710_devices_setup(void) return platform_add_devices(sh7710_devices, ARRAY_SIZE(sh7710_devices)); } -__initcall(sh7710_devices_setup); +arch_initcall(sh7710_devices_setup); + +static struct platform_device *sh7710_early_devices[] __initdata = { + &scif0_device, + &scif1_device, + &tmu0_device, +}; + +void __init plat_early_device_setup(void) +{ + early_platform_add_devices(sh7710_early_devices, + ARRAY_SIZE(sh7710_early_devices)); +} void __init plat_irq_setup(void) { diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7720.c b/arch/sh/kernel/cpu/sh3/setup-sh7720.c index f807a21b066..84df85a5b80 100644 --- a/arch/sh/kernel/cpu/sh3/setup-sh7720.c +++ b/arch/sh/kernel/cpu/sh3/setup-sh7720.c @@ -1,7 +1,8 @@ /* - * SH7720 Setup + * Setup code for SH7720, SH7721. * * Copyright (C) 2007 Markus Brunner, Mark Jonas + * Copyright (C) 2009 Paul Mundt * * Based on arch/sh/kernel/cpu/sh4/setup-sh7750.c: * @@ -17,7 +18,11 @@ #include <linux/serial.h> #include <linux/io.h> #include <linux/serial_sci.h> +#include <linux/sh_timer.h> +#include <linux/sh_intc.h> +#include <linux/usb/ohci_pdriver.h> #include <asm/rtc.h> +#include <cpu/serial.h> static struct resource rtc_resources[] = { [0] = { @@ -26,18 +31,8 @@ static struct resource rtc_resources[] = { .flags = IORESOURCE_IO, }, [1] = { - /* Period IRQ */ - .start = 21, - .flags = IORESOURCE_IRQ, - }, - [2] = { - /* Carry IRQ */ - .start = 22, - .flags = IORESOURCE_IRQ, - }, - [3] = { - /* Alarm IRQ */ - .start = 20, + /* Shared Period/Carry/Alarm IRQ */ + .start = evt2irq(0x480), .flags = IORESOURCE_IRQ, }, }; @@ -56,28 +51,49 @@ static struct platform_device rtc_device = { }, }; -static struct plat_sci_port sci_platform_data[] = { - { - .mapbase = 0xa4430000, - .flags = UPF_BOOT_AUTOCONF, - .type = PORT_SCIF, - .irqs = { 80, 80, 80, 80 }, - }, { - .mapbase = 0xa4438000, - .flags = UPF_BOOT_AUTOCONF, - .type = PORT_SCIF, - .irqs = { 81, 81, 81, 81 }, - }, { +static struct plat_sci_port scif0_platform_data = { + .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE, + .type = PORT_SCIF, + .ops = &sh7720_sci_port_ops, + .regtype = SCIx_SH7705_SCIF_REGTYPE, +}; - .flags = 0, - } +static struct resource scif0_resources[] = { + DEFINE_RES_MEM(0xa4430000, 0x100), + DEFINE_RES_IRQ(evt2irq(0xc00)), }; -static struct platform_device sci_device = { +static struct platform_device scif0_device = { .name = "sh-sci", - .id = -1, + .id = 0, + .resource = scif0_resources, + .num_resources = ARRAY_SIZE(scif0_resources), + .dev = { + .platform_data = &scif0_platform_data, + }, +}; + +static struct plat_sci_port scif1_platform_data = { + .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE, + .type = PORT_SCIF, + .ops = &sh7720_sci_port_ops, + .regtype = SCIx_SH7705_SCIF_REGTYPE, +}; + +static struct resource scif1_resources[] = { + DEFINE_RES_MEM(0xa4438000, 0x100), + DEFINE_RES_IRQ(evt2irq(0xc20)), +}; + +static struct platform_device scif1_device = { + .name = "sh-sci", + .id = 1, + .resource = scif1_resources, + .num_resources = ARRAY_SIZE(scif1_resources), .dev = { - .platform_data = sci_platform_data, + .platform_data = &scif1_platform_data, }, }; @@ -88,19 +104,23 @@ static struct resource usb_ohci_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = 67, - .end = 67, + .start = evt2irq(0xa60), + .end = evt2irq(0xa60), .flags = IORESOURCE_IRQ, }, }; static u64 usb_ohci_dma_mask = 0xffffffffUL; + +static struct usb_ohci_pdata usb_ohci_pdata; + static struct platform_device usb_ohci_device = { - .name = "sh_ohci", + .name = "ohci-platform", .id = -1, .dev = { .dma_mask = &usb_ohci_dma_mask, .coherent_dma_mask = 0xffffffff, + .platform_data = &usb_ohci_pdata, }, .num_resources = ARRAY_SIZE(usb_ohci_resources), .resource = usb_ohci_resources, @@ -115,8 +135,8 @@ static struct resource usbf_resources[] = { }, [1] = { .name = "sh_udc", - .start = 65, - .end = 65, + .start = evt2irq(0xa20), + .end = evt2irq(0xa20), .flags = IORESOURCE_IRQ, }, }; @@ -132,9 +152,52 @@ static struct platform_device usbf_device = { .resource = usbf_resources, }; +static struct sh_timer_config cmt_platform_data = { + .channels_mask = 0x1f, +}; + +static struct resource cmt_resources[] = { + DEFINE_RES_MEM(0x044a0000, 0x60), + DEFINE_RES_IRQ(evt2irq(0xf00)), +}; + +static struct platform_device cmt_device = { + .name = "sh-cmt-32", + .id = 0, + .dev = { + .platform_data = &cmt_platform_data, + }, + .resource = cmt_resources, + .num_resources = ARRAY_SIZE(cmt_resources), +}; + +static struct sh_timer_config tmu0_platform_data = { + .channels_mask = 7, +}; + +static struct resource tmu0_resources[] = { + DEFINE_RES_MEM(0xa412fe90, 0x28), + DEFINE_RES_IRQ(evt2irq(0x400)), + DEFINE_RES_IRQ(evt2irq(0x420)), + DEFINE_RES_IRQ(evt2irq(0x440)), +}; + +static struct platform_device tmu0_device = { + .name = "sh-tmu-sh3", + .id = 0, + .dev = { + .platform_data = &tmu0_platform_data, + }, + .resource = tmu0_resources, + .num_resources = ARRAY_SIZE(tmu0_resources), +}; + static struct platform_device *sh7720_devices[] __initdata = { + &scif0_device, + &scif1_device, + &cmt_device, + &tmu0_device, &rtc_device, - &sci_device, &usb_ohci_device, &usbf_device, }; @@ -144,68 +207,68 @@ static int __init sh7720_devices_setup(void) return platform_add_devices(sh7720_devices, ARRAY_SIZE(sh7720_devices)); } -__initcall(sh7720_devices_setup); +arch_initcall(sh7720_devices_setup); + +static struct platform_device *sh7720_early_devices[] __initdata = { + &scif0_device, + &scif1_device, + &cmt_device, + &tmu0_device, +}; + +void __init plat_early_device_setup(void) +{ + early_platform_add_devices(sh7720_early_devices, + ARRAY_SIZE(sh7720_early_devices)); +} enum { UNUSED = 0, /* interrupt sources */ - TMU0, TMU1, TMU2, RTC_ATI, RTC_PRI, RTC_CUI, - WDT, REF_RCMI, SIM_ERI, SIM_RXI, SIM_TXI, SIM_TEND, + TMU0, TMU1, TMU2, RTC, + WDT, REF_RCMI, SIM, IRQ0, IRQ1, IRQ2, IRQ3, USBF_SPD, TMU_SUNI, IRQ5, IRQ4, - DMAC1_DEI0, DMAC1_DEI1, DMAC1_DEI2, DMAC1_DEI3, LCDC, SSL, - ADC, DMAC2_DEI4, DMAC2_DEI5, USBFI0, USBFI1, CMT, + DMAC1, LCDC, SSL, + ADC, DMAC2, USBFI, CMT, SCIF0, SCIF1, - PINT07, PINT815, TPU0, TPU1, TPU2, TPU3, IIC, - SIOF0, SIOF1, MMCI0, MMCI1, MMCI2, MMCI3, PCC, + PINT07, PINT815, TPU, IIC, + SIOF0, SIOF1, MMC, PCC, USBHI, AFEIF, H_UDI, - /* interrupt groups */ - TMU, RTC, SIM, DMAC1, USBFI, DMAC2, USB, TPU, MMC, }; static struct intc_vect vectors[] __initdata = { /* IRQ0->5 are handled in setup-sh3.c */ INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420), - INTC_VECT(TMU2, 0x440), INTC_VECT(RTC_ATI, 0x480), - INTC_VECT(RTC_PRI, 0x4a0), INTC_VECT(RTC_CUI, 0x4c0), - INTC_VECT(SIM_ERI, 0x4e0), INTC_VECT(SIM_RXI, 0x500), - INTC_VECT(SIM_TXI, 0x520), INTC_VECT(SIM_TEND, 0x540), + INTC_VECT(TMU2, 0x440), INTC_VECT(RTC, 0x480), + INTC_VECT(RTC, 0x4a0), INTC_VECT(RTC, 0x4c0), + INTC_VECT(SIM, 0x4e0), INTC_VECT(SIM, 0x500), + INTC_VECT(SIM, 0x520), INTC_VECT(SIM, 0x540), INTC_VECT(WDT, 0x560), INTC_VECT(REF_RCMI, 0x580), /* H_UDI cannot be masked */ INTC_VECT(TMU_SUNI, 0x6c0), - INTC_VECT(USBF_SPD, 0x6e0), INTC_VECT(DMAC1_DEI0, 0x800), - INTC_VECT(DMAC1_DEI1, 0x820), INTC_VECT(DMAC1_DEI2, 0x840), - INTC_VECT(DMAC1_DEI3, 0x860), INTC_VECT(LCDC, 0x900), + INTC_VECT(USBF_SPD, 0x6e0), INTC_VECT(DMAC1, 0x800), + INTC_VECT(DMAC1, 0x820), INTC_VECT(DMAC1, 0x840), + INTC_VECT(DMAC1, 0x860), INTC_VECT(LCDC, 0x900), #if defined(CONFIG_CPU_SUBTYPE_SH7720) INTC_VECT(SSL, 0x980), #endif - INTC_VECT(USBFI0, 0xa20), INTC_VECT(USBFI1, 0xa40), + INTC_VECT(USBFI, 0xa20), INTC_VECT(USBFI, 0xa40), INTC_VECT(USBHI, 0xa60), - INTC_VECT(DMAC2_DEI4, 0xb80), INTC_VECT(DMAC2_DEI5, 0xba0), + INTC_VECT(DMAC2, 0xb80), INTC_VECT(DMAC2, 0xba0), INTC_VECT(ADC, 0xbe0), INTC_VECT(SCIF0, 0xc00), INTC_VECT(SCIF1, 0xc20), INTC_VECT(PINT07, 0xc80), INTC_VECT(PINT815, 0xca0), INTC_VECT(SIOF0, 0xd00), - INTC_VECT(SIOF1, 0xd20), INTC_VECT(TPU0, 0xd80), - INTC_VECT(TPU1, 0xda0), INTC_VECT(TPU2, 0xdc0), - INTC_VECT(TPU3, 0xde0), INTC_VECT(IIC, 0xe00), - INTC_VECT(MMCI0, 0xe80), INTC_VECT(MMCI1, 0xea0), - INTC_VECT(MMCI2, 0xec0), INTC_VECT(MMCI3, 0xee0), + INTC_VECT(SIOF1, 0xd20), INTC_VECT(TPU, 0xd80), + INTC_VECT(TPU, 0xda0), INTC_VECT(TPU, 0xdc0), + INTC_VECT(TPU, 0xde0), INTC_VECT(IIC, 0xe00), + INTC_VECT(MMC, 0xe80), INTC_VECT(MMC, 0xea0), + INTC_VECT(MMC, 0xec0), INTC_VECT(MMC, 0xee0), INTC_VECT(CMT, 0xf00), INTC_VECT(PCC, 0xf60), INTC_VECT(AFEIF, 0xfe0), }; -static struct intc_group groups[] __initdata = { - INTC_GROUP(TMU, TMU0, TMU1, TMU2), - INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI), - INTC_GROUP(SIM, SIM_ERI, SIM_RXI, SIM_TXI, SIM_TEND), - INTC_GROUP(DMAC1, DMAC1_DEI0, DMAC1_DEI1, DMAC1_DEI2, DMAC1_DEI3), - INTC_GROUP(USBFI, USBFI0, USBFI1), - INTC_GROUP(DMAC2, DMAC2_DEI4, DMAC2_DEI5), - INTC_GROUP(TPU, TPU0, TPU1, TPU2, TPU3), - INTC_GROUP(MMC, MMCI0, MMCI1, MMCI2, MMCI3), -}; - static struct intc_prio_reg prio_registers[] __initdata = { { 0xA414FEE2UL, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } }, { 0xA414FEE4UL, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, SIM, 0 } }, @@ -219,7 +282,7 @@ static struct intc_prio_reg prio_registers[] __initdata = { { 0xA4080008UL, 0, 16, 4, /* IPRJ */ { 0, USBHI, 0, AFEIF } }, }; -static DECLARE_INTC_DESC(intc_desc, "sh7720", vectors, groups, +static DECLARE_INTC_DESC(intc_desc, "sh7720", vectors, NULL, NULL, prio_registers, NULL); void __init plat_irq_setup(void) diff --git a/arch/sh/kernel/cpu/sh3/swsusp.S b/arch/sh/kernel/cpu/sh3/swsusp.S new file mode 100644 index 00000000000..01145426a2b --- /dev/null +++ b/arch/sh/kernel/cpu/sh3/swsusp.S @@ -0,0 +1,147 @@ +/* + * arch/sh/kernel/cpu/sh3/swsusp.S + * + * Copyright (C) 2009 Magnus Damm + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include <linux/sys.h> +#include <linux/errno.h> +#include <linux/linkage.h> +#include <asm/asm-offsets.h> +#include <asm/page.h> + +#define k0 r0 +#define k1 r1 +#define k2 r2 +#define k3 r3 +#define k4 r4 + +! swsusp_arch_resume() +! - copy restore_pblist pages +! - restore registers from swsusp_arch_regs_cpu0 + +ENTRY(swsusp_arch_resume) + mov.l 1f, r15 + mov.l 2f, r4 + mov.l @r4, r4 + +swsusp_copy_loop: + mov r4, r0 + cmp/eq #0, r0 + bt swsusp_restore_regs + + mov.l @(PBE_ADDRESS, r4), r2 + mov.l @(PBE_ORIG_ADDRESS, r4), r5 + + mov #(PAGE_SIZE >> 10), r3 + shll8 r3 + shlr2 r3 /* PAGE_SIZE / 16 */ +swsusp_copy_page: + dt r3 + mov.l @r2+,r1 /* 16n+0 */ + mov.l r1,@r5 + add #4,r5 + mov.l @r2+,r1 /* 16n+4 */ + mov.l r1,@r5 + add #4,r5 + mov.l @r2+,r1 /* 16n+8 */ + mov.l r1,@r5 + add #4,r5 + mov.l @r2+,r1 /* 16n+12 */ + mov.l r1,@r5 + bf/s swsusp_copy_page + add #4,r5 + + bra swsusp_copy_loop + mov.l @(PBE_NEXT, r4), r4 + +swsusp_restore_regs: + ! BL=0: R7->R0 is bank0 + mov.l 3f, r8 + mov.l 4f, r5 + jsr @r5 + nop + + ! BL=1: R7->R0 is bank1 + lds k2, pr + ldc k3, ssr + + mov.l @r15+, r0 + mov.l @r15+, r1 + mov.l @r15+, r2 + mov.l @r15+, r3 + mov.l @r15+, r4 + mov.l @r15+, r5 + mov.l @r15+, r6 + mov.l @r15+, r7 + + rte + nop + ! BL=0: R7->R0 is bank0 + + .align 2 +1: .long swsusp_arch_regs_cpu0 +2: .long restore_pblist +3: .long 0x20000000 ! RB=1 +4: .long restore_regs + +! swsusp_arch_suspend() +! - prepare pc for resume, return from function without swsusp_save on resume +! - save registers in swsusp_arch_regs_cpu0 +! - call swsusp_save write suspend image + +ENTRY(swsusp_arch_suspend) + sts pr, r0 ! save pr in r0 + mov r15, r2 ! save sp in r2 + mov r8, r5 ! save r8 in r5 + stc sr, r1 + ldc r1, ssr ! save sr in ssr + mov.l 1f, r1 + ldc r1, spc ! setup pc value for resuming + mov.l 5f, r15 ! use swsusp_arch_regs_cpu0 as stack + mov.l 6f, r3 + add r3, r15 ! save from top of structure + + ! BL=0: R7->R0 is bank0 + mov.l 2f, r3 ! get new SR value for bank1 + mov #0, r4 + mov.l 7f, r1 + jsr @r1 ! switch to bank1 and save bank1 r7->r0 + not r4, r4 + + ! BL=1: R7->R0 is bank1 + stc r2_bank, k0 ! fetch old sp from r2_bank0 + mov.l 3f, k4 ! SR bits to clear in k4 + mov.l 8f, k1 + jsr @k1 ! switch to bank0 and save all regs + stc r0_bank, k3 ! fetch old pr from r0_bank0 + + ! BL=0: R7->R0 is bank0 + mov r2, r15 ! restore old sp + mov r5, r8 ! restore old r8 + stc ssr, r1 + ldc r1, sr ! restore old sr + lds r0, pr ! restore old pr + mov.l 4f, r0 + jmp @r0 + nop + +swsusp_call_save: + mov r2, r15 ! restore old sp + mov r5, r8 ! restore old r8 + lds r0, pr ! restore old pr + rts + mov #0, r0 + + .align 2 +1: .long swsusp_call_save +2: .long 0x20000000 ! RB=1 +3: .long 0xdfffffff ! RB=0 +4: .long swsusp_save +5: .long swsusp_arch_regs_cpu0 +6: .long SWSUSP_ARCH_REGS_SIZE +7: .long save_low_regs +8: .long save_regs |