diff options
Diffstat (limited to 'arch/sh/include')
240 files changed, 4388 insertions, 3404 deletions
diff --git a/arch/sh/include/asm/Kbuild b/arch/sh/include/asm/Kbuild index e121c30f797..c19e47dacb3 100644 --- a/arch/sh/include/asm/Kbuild +++ b/arch/sh/include/asm/Kbuild @@ -1,8 +1,39 @@ -include include/asm-generic/Kbuild.asm -header-y += cachectl.h cpu-features.h - -unifdef-y += unistd_32.h -unifdef-y += unistd_64.h -unifdef-y += posix_types_32.h -unifdef-y += posix_types_64.h +generic-y += bitsperlong.h +generic-y += cputime.h +generic-y += current.h +generic-y += delay.h +generic-y += div64.h +generic-y += emergency-restart.h +generic-y += errno.h +generic-y += exec.h +generic-y += fcntl.h +generic-y += hash.h +generic-y += ioctl.h +generic-y += ipcbuf.h +generic-y += irq_regs.h +generic-y += kvm_para.h +generic-y += local.h +generic-y += local64.h +generic-y += mcs_spinlock.h +generic-y += mman.h +generic-y += msgbuf.h +generic-y += param.h +generic-y += parport.h +generic-y += percpu.h +generic-y += poll.h +generic-y += preempt.h +generic-y += resource.h +generic-y += scatterlist.h +generic-y += sembuf.h +generic-y += serial.h +generic-y += shmbuf.h +generic-y += siginfo.h +generic-y += sizes.h +generic-y += socket.h +generic-y += statfs.h +generic-y += termbits.h +generic-y += termios.h +generic-y += trace_clock.h +generic-y += ucontext.h +generic-y += xor.h diff --git a/arch/sh/include/asm/addrspace.h b/arch/sh/include/asm/addrspace.h index 99d6b3ecbe2..3d1ae2bfaa6 100644 --- a/arch/sh/include/asm/addrspace.h +++ b/arch/sh/include/asm/addrspace.h @@ -28,7 +28,7 @@ /* Returns the privileged segment base of a given address */ #define PXSEG(a) (((unsigned long)(a)) & 0xe0000000) -#if defined(CONFIG_29BIT) || defined(CONFIG_PMB_FIXED) +#ifdef CONFIG_29BIT /* * Map an address to a certain privileged segment */ @@ -40,7 +40,15 @@ ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P3SEG)) #define P4SEGADDR(a) \ ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P4SEG)) -#endif /* 29BIT || PMB_FIXED */ +#else +/* + * These will never work in 32-bit, don't even bother. + */ +#define P1SEGADDR(a) ({ (void)(a); BUG(); NULL; }) +#define P2SEGADDR(a) ({ (void)(a); BUG(); NULL; }) +#define P3SEGADDR(a) ({ (void)(a); BUG(); NULL; }) +#define P4SEGADDR(a) ({ (void)(a); BUG(); NULL; }) +#endif #endif /* P1SEG */ /* Check if an address can be reached in 29 bits */ @@ -57,11 +65,5 @@ #define P3_ADDR_MAX P4SEG #endif -#ifndef __ASSEMBLY__ -#ifdef CONFIG_PMB -extern int __in_29bit_mode(void); -#endif /* CONFIG_PMB */ -#endif /* __ASSEMBLY__ */ - #endif /* __KERNEL__ */ #endif /* __ASM_SH_ADDRSPACE_H */ diff --git a/arch/sh/include/asm/alignment.h b/arch/sh/include/asm/alignment.h new file mode 100644 index 00000000000..b12efecf529 --- /dev/null +++ b/arch/sh/include/asm/alignment.h @@ -0,0 +1,21 @@ +#ifndef __ASM_SH_ALIGNMENT_H +#define __ASM_SH_ALIGNMENT_H + +#include <linux/types.h> + +extern void inc_unaligned_byte_access(void); +extern void inc_unaligned_word_access(void); +extern void inc_unaligned_dword_access(void); +extern void inc_unaligned_multi_access(void); +extern void inc_unaligned_user_access(void); +extern void inc_unaligned_kernel_access(void); + +#define UM_WARN (1 << 0) +#define UM_FIXUP (1 << 1) +#define UM_SIGNAL (1 << 2) + +extern unsigned int unaligned_user_action(void); + +extern void unaligned_fixups_notify(struct task_struct *, insn_size_t, struct pt_regs *); + +#endif /* __ASM_SH_ALIGNMENT_H */ diff --git a/arch/sh/include/asm/atomic-grb.h b/arch/sh/include/asm/atomic-grb.h index 4c5b7dbfced..a273c88578f 100644 --- a/arch/sh/include/asm/atomic-grb.h +++ b/arch/sh/include/asm/atomic-grb.h @@ -120,50 +120,4 @@ static inline void atomic_set_mask(unsigned int mask, atomic_t *v) : "memory" , "r0", "r1"); } -static inline int atomic_cmpxchg(atomic_t *v, int old, int new) -{ - int ret; - - __asm__ __volatile__ ( - " .align 2 \n\t" - " mova 1f, r0 \n\t" - " nop \n\t" - " mov r15, r1 \n\t" - " mov #-8, r15 \n\t" - " mov.l @%1, %0 \n\t" - " cmp/eq %2, %0 \n\t" - " bf 1f \n\t" - " mov.l %3, @%1 \n\t" - "1: mov r1, r15 \n\t" - : "=&r" (ret) - : "r" (v), "r" (old), "r" (new) - : "memory" , "r0", "r1" , "t"); - - return ret; -} - -static inline int atomic_add_unless(atomic_t *v, int a, int u) -{ - int ret; - unsigned long tmp; - - __asm__ __volatile__ ( - " .align 2 \n\t" - " mova 1f, r0 \n\t" - " nop \n\t" - " mov r15, r1 \n\t" - " mov #-12, r15 \n\t" - " mov.l @%2, %1 \n\t" - " mov %1, %0 \n\t" - " cmp/eq %4, %0 \n\t" - " bt/s 1f \n\t" - " add %3, %1 \n\t" - " mov.l %1, @%2 \n\t" - "1: mov r1, r15 \n\t" - : "=&r" (ret), "=&r" (tmp) - : "r" (v), "r" (a), "r" (u) - : "memory" , "r0", "r1" , "t"); - - return ret != u; -} #endif /* __ASM_SH_ATOMIC_GRB_H */ diff --git a/arch/sh/include/asm/atomic-irq.h b/arch/sh/include/asm/atomic-irq.h index 467d9415a32..9f7c56609e5 100644 --- a/arch/sh/include/asm/atomic-irq.h +++ b/arch/sh/include/asm/atomic-irq.h @@ -1,6 +1,8 @@ #ifndef __ASM_SH_ATOMIC_IRQ_H #define __ASM_SH_ATOMIC_IRQ_H +#include <linux/irqflags.h> + /* * To get proper branch prediction for the main line, we must branch * forward to code at the end of this object's .text section, then diff --git a/arch/sh/include/asm/atomic-llsc.h b/arch/sh/include/asm/atomic-llsc.h index b040e1e0861..4b00b78e3f4 100644 --- a/arch/sh/include/asm/atomic-llsc.h +++ b/arch/sh/include/asm/atomic-llsc.h @@ -104,31 +104,4 @@ static inline void atomic_set_mask(unsigned int mask, atomic_t *v) : "t"); } -#define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n))) - -/** - * atomic_add_unless - add unless the number is a given value - * @v: pointer of type atomic_t - * @a: the amount to add to v... - * @u: ...unless v is equal to u. - * - * Atomically adds @a to @v, so long as it was not @u. - * Returns non-zero if @v was not @u, and zero otherwise. - */ -static inline int atomic_add_unless(atomic_t *v, int a, int u) -{ - int c, old; - c = atomic_read(v); - for (;;) { - if (unlikely(c == (u))) - break; - old = atomic_cmpxchg((v), c, c + (a)); - if (likely(old == c)) - break; - c = old; - } - - return c != (u); -} - #endif /* __ASM_SH_ATOMIC_LLSC_H */ diff --git a/arch/sh/include/asm/atomic.h b/arch/sh/include/asm/atomic.h index b16388d7195..f57b8a6743b 100644 --- a/arch/sh/include/asm/atomic.h +++ b/arch/sh/include/asm/atomic.h @@ -9,11 +9,12 @@ #include <linux/compiler.h> #include <linux/types.h> -#include <asm/system.h> +#include <asm/cmpxchg.h> +#include <asm/barrier.h> -#define ATOMIC_INIT(i) ( (atomic_t) { (i) } ) +#define ATOMIC_INIT(i) { (i) } -#define atomic_read(v) ((v)->counter) +#define atomic_read(v) (*(volatile int *)&(v)->counter) #define atomic_set(v,i) ((v)->counter = (i)) #if defined(CONFIG_GUSA_RB) @@ -25,65 +26,41 @@ #endif #define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0) +#define atomic_dec_return(v) atomic_sub_return(1, (v)) +#define atomic_inc_return(v) atomic_add_return(1, (v)) +#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0) +#define atomic_sub_and_test(i,v) (atomic_sub_return((i), (v)) == 0) +#define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0) -#define atomic_dec_return(v) atomic_sub_return(1,(v)) -#define atomic_inc_return(v) atomic_add_return(1,(v)) +#define atomic_inc(v) atomic_add(1, (v)) +#define atomic_dec(v) atomic_sub(1, (v)) -/* - * atomic_inc_and_test - increment and test +#define atomic_xchg(v, new) (xchg(&((v)->counter), new)) +#define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n))) + +/** + * __atomic_add_unless - add unless the number is a given value * @v: pointer of type atomic_t + * @a: the amount to add to v... + * @u: ...unless v is equal to u. * - * Atomically increments @v by 1 - * and returns true if the result is zero, or false for all - * other cases. + * Atomically adds @a to @v, so long as it was not @u. + * Returns the old value of @v. */ -#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0) - -#define atomic_sub_and_test(i,v) (atomic_sub_return((i), (v)) == 0) -#define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0) - -#define atomic_inc(v) atomic_add(1,(v)) -#define atomic_dec(v) atomic_sub(1,(v)) - -#if !defined(CONFIG_GUSA_RB) && !defined(CONFIG_CPU_SH4A) -static inline int atomic_cmpxchg(atomic_t *v, int old, int new) +static inline int __atomic_add_unless(atomic_t *v, int a, int u) { - int ret; - unsigned long flags; - - local_irq_save(flags); - ret = v->counter; - if (likely(ret == old)) - v->counter = new; - local_irq_restore(flags); - - return ret; + int c, old; + c = atomic_read(v); + for (;;) { + if (unlikely(c == (u))) + break; + old = atomic_cmpxchg((v), c, c + (a)); + if (likely(old == c)) + break; + c = old; + } + + return c; } -static inline int atomic_add_unless(atomic_t *v, int a, int u) -{ - int ret; - unsigned long flags; - - local_irq_save(flags); - ret = v->counter; - if (ret != u) - v->counter += a; - local_irq_restore(flags); - - return ret != u; -} -#endif /* !CONFIG_GUSA_RB && !CONFIG_CPU_SH4A */ - -#define atomic_xchg(v, new) (xchg(&((v)->counter), new)) -#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) - -#define smp_mb__before_atomic_dec() smp_mb() -#define smp_mb__after_atomic_dec() smp_mb() -#define smp_mb__before_atomic_inc() smp_mb() -#define smp_mb__after_atomic_inc() smp_mb() - -#include <asm-generic/atomic-long.h> -#include <asm-generic/atomic64.h> - #endif /* __ASM_SH_ATOMIC_H */ diff --git a/arch/sh/include/asm/barrier.h b/arch/sh/include/asm/barrier.h new file mode 100644 index 00000000000..43715308b06 --- /dev/null +++ b/arch/sh/include/asm/barrier.h @@ -0,0 +1,39 @@ +/* + * Copyright (C) 1999, 2000 Niibe Yutaka & Kaz Kojima + * Copyright (C) 2002 Paul Mundt + */ +#ifndef __ASM_SH_BARRIER_H +#define __ASM_SH_BARRIER_H + +#if defined(CONFIG_CPU_SH4A) || defined(CONFIG_CPU_SH5) +#include <asm/cache_insns.h> +#endif + +/* + * A brief note on ctrl_barrier(), the control register write barrier. + * + * Legacy SH cores typically require a sequence of 8 nops after + * modification of a control register in order for the changes to take + * effect. On newer cores (like the sh4a and sh5) this is accomplished + * with icbi. + * + * Also note that on sh4a in the icbi case we can forego a synco for the + * write barrier, as it's not necessary for control registers. + * + * Historically we have only done this type of barrier for the MMUCR, but + * it's also necessary for the CCR, so we make it generic here instead. + */ +#if defined(CONFIG_CPU_SH4A) || defined(CONFIG_CPU_SH5) +#define mb() __asm__ __volatile__ ("synco": : :"memory") +#define rmb() mb() +#define wmb() mb() +#define ctrl_barrier() __icbi(PAGE_OFFSET) +#else +#define ctrl_barrier() __asm__ __volatile__ ("nop;nop;nop;nop;nop;nop;nop;nop") +#endif + +#define set_mb(var, value) do { (void)xchg(&var, value); } while (0) + +#include <asm-generic/barrier.h> + +#endif /* __ASM_SH_BARRIER_H */ diff --git a/arch/sh/include/asm/bitops.h b/arch/sh/include/asm/bitops.h index 98511e4d28c..fc8e652cf17 100644 --- a/arch/sh/include/asm/bitops.h +++ b/arch/sh/include/asm/bitops.h @@ -7,9 +7,9 @@ #error only <linux/bitops.h> can be included directly #endif -#include <asm/system.h> /* For __swab32 */ #include <asm/byteorder.h> +#include <asm/barrier.h> #ifdef CONFIG_GUSA_RB #include <asm/bitops-grb.h> @@ -23,12 +23,6 @@ #include <asm-generic/bitops/non-atomic.h> #endif -/* - * clear_bit() doesn't provide any barrier for the compiler. - */ -#define smp_mb__before_clear_bit() smp_mb() -#define smp_mb__after_clear_bit() smp_mb() - #ifdef CONFIG_SUPERH32 static inline unsigned long ffz(unsigned long word) { @@ -94,9 +88,8 @@ static inline unsigned long ffz(unsigned long word) #include <asm-generic/bitops/hweight.h> #include <asm-generic/bitops/lock.h> #include <asm-generic/bitops/sched.h> -#include <asm-generic/bitops/ext2-non-atomic.h> +#include <asm-generic/bitops/le.h> #include <asm-generic/bitops/ext2-atomic.h> -#include <asm-generic/bitops/minix.h> #include <asm-generic/bitops/fls.h> #include <asm-generic/bitops/__fls.h> #include <asm-generic/bitops/fls64.h> diff --git a/arch/sh/include/asm/bitsperlong.h b/arch/sh/include/asm/bitsperlong.h deleted file mode 100644 index 6dc0bb0c13b..00000000000 --- a/arch/sh/include/asm/bitsperlong.h +++ /dev/null @@ -1 +0,0 @@ -#include <asm-generic/bitsperlong.h> diff --git a/arch/sh/include/asm/bl_bit.h b/arch/sh/include/asm/bl_bit.h new file mode 100644 index 00000000000..06e4163c674 --- /dev/null +++ b/arch/sh/include/asm/bl_bit.h @@ -0,0 +1,10 @@ +#ifndef __ASM_SH_BL_BIT_H +#define __ASM_SH_BL_BIT_H + +#ifdef CONFIG_SUPERH32 +# include <asm/bl_bit_32.h> +#else +# include <asm/bl_bit_64.h> +#endif + +#endif /* __ASM_SH_BL_BIT_H */ diff --git a/arch/sh/include/asm/bl_bit_32.h b/arch/sh/include/asm/bl_bit_32.h new file mode 100644 index 00000000000..fd21eee6214 --- /dev/null +++ b/arch/sh/include/asm/bl_bit_32.h @@ -0,0 +1,33 @@ +#ifndef __ASM_SH_BL_BIT_32_H +#define __ASM_SH_BL_BIT_32_H + +static inline void set_bl_bit(void) +{ + unsigned long __dummy0, __dummy1; + + __asm__ __volatile__ ( + "stc sr, %0\n\t" + "or %2, %0\n\t" + "and %3, %0\n\t" + "ldc %0, sr\n\t" + : "=&r" (__dummy0), "=r" (__dummy1) + : "r" (0x10000000), "r" (0xffffff0f) + : "memory" + ); +} + +static inline void clear_bl_bit(void) +{ + unsigned long __dummy0, __dummy1; + + __asm__ __volatile__ ( + "stc sr, %0\n\t" + "and %2, %0\n\t" + "ldc %0, sr\n\t" + : "=&r" (__dummy0), "=r" (__dummy1) + : "1" (~0x10000000) + : "memory" + ); +} + +#endif /* __ASM_SH_BL_BIT_32_H */ diff --git a/arch/sh/include/asm/bl_bit_64.h b/arch/sh/include/asm/bl_bit_64.h new file mode 100644 index 00000000000..6cc8711af43 --- /dev/null +++ b/arch/sh/include/asm/bl_bit_64.h @@ -0,0 +1,40 @@ +/* + * Copyright (C) 2000, 2001 Paolo Alberelli + * Copyright (C) 2003 Paul Mundt + * Copyright (C) 2004 Richard Curnow + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#ifndef __ASM_SH_BL_BIT_64_H +#define __ASM_SH_BL_BIT_64_H + +#include <asm/processor.h> + +#define SR_BL_LL 0x0000000010000000LL + +static inline void set_bl_bit(void) +{ + unsigned long long __dummy0, __dummy1 = SR_BL_LL; + + __asm__ __volatile__("getcon " __SR ", %0\n\t" + "or %0, %1, %0\n\t" + "putcon %0, " __SR "\n\t" + : "=&r" (__dummy0) + : "r" (__dummy1)); + +} + +static inline void clear_bl_bit(void) +{ + unsigned long long __dummy0, __dummy1 = ~SR_BL_LL; + + __asm__ __volatile__("getcon " __SR ", %0\n\t" + "and %0, %1, %0\n\t" + "putcon %0, " __SR "\n\t" + : "=&r" (__dummy0) + : "r" (__dummy1)); +} + +#endif /* __ASM_SH_BL_BIT_64_H */ diff --git a/arch/sh/include/asm/bug.h b/arch/sh/include/asm/bug.h index d02c01b3e6b..dcf27807542 100644 --- a/arch/sh/include/asm/bug.h +++ b/arch/sh/include/asm/bug.h @@ -1,6 +1,8 @@ #ifndef __ASM_SH_BUG_H #define __ASM_SH_BUG_H +#include <linux/linkage.h> + #define TRAPA_BUG_OPCODE 0xc33e /* trapa #0x3e */ #define BUGFLAG_UNWINDER (1 << 1) @@ -48,7 +50,7 @@ do { \ "i" (sizeof(struct bug_entry))); \ } while (0) -#define __WARN() \ +#define __WARN_TAINT(taint) \ do { \ __asm__ __volatile__ ( \ "1:\t.short %O0\n" \ @@ -57,7 +59,7 @@ do { \ : "n" (TRAPA_BUG_OPCODE), \ "i" (__FILE__), \ "i" (__LINE__), \ - "i" (BUGFLAG_WARNING), \ + "i" (BUGFLAG_TAINT(taint)), \ "i" (sizeof(struct bug_entry))); \ } while (0) @@ -107,4 +109,11 @@ do { \ #include <asm-generic/bug.h> +struct pt_regs; + +/* arch/sh/kernel/traps.c */ +extern void die(const char *str, struct pt_regs *regs, long err) __attribute__ ((noreturn)); +extern void die_if_kernel(const char *str, struct pt_regs *regs, long err); +extern void die_if_no_fixup(const char *str, struct pt_regs *regs, long err); + #endif /* __ASM_SH_BUG_H */ diff --git a/arch/sh/include/asm/cache.h b/arch/sh/include/asm/cache.h index 02df18ea960..ef9e555aafb 100644 --- a/arch/sh/include/asm/cache.h +++ b/arch/sh/include/asm/cache.h @@ -14,7 +14,7 @@ #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) -#define __read_mostly __attribute__((__section__(".data.read_mostly"))) +#define __read_mostly __attribute__((__section__(".data..read_mostly"))) #ifndef __ASSEMBLY__ struct cache_info { @@ -38,14 +38,10 @@ struct cache_info { * 2. those in the physical page number. */ unsigned int alias_mask; - unsigned int n_aliases; /* Number of aliases */ unsigned long flags; }; - -int __init detect_cpu_and_cache_system(void); - #endif /* __ASSEMBLY__ */ #endif /* __KERNEL__ */ #endif /* __ASM_SH_CACHE_H */ diff --git a/arch/sh/include/asm/cache_insns.h b/arch/sh/include/asm/cache_insns.h new file mode 100644 index 00000000000..355cb06b7a3 --- /dev/null +++ b/arch/sh/include/asm/cache_insns.h @@ -0,0 +1,11 @@ +#ifndef __ASM_SH_CACHE_INSNS_H +#define __ASM_SH_CACHE_INSNS_H + + +#ifdef CONFIG_SUPERH32 +# include <asm/cache_insns_32.h> +#else +# include <asm/cache_insns_64.h> +#endif + +#endif /* __ASM_SH_CACHE_INSNS_H */ diff --git a/arch/sh/include/asm/cache_insns_32.h b/arch/sh/include/asm/cache_insns_32.h new file mode 100644 index 00000000000..b92fe541609 --- /dev/null +++ b/arch/sh/include/asm/cache_insns_32.h @@ -0,0 +1,21 @@ +#ifndef __ASM_SH_CACHE_INSNS_32_H +#define __ASM_SH_CACHE_INSNS_32_H + +#include <linux/types.h> + +#if defined(CONFIG_CPU_SH4A) +#define __icbi(addr) __asm__ __volatile__ ( "icbi @%0\n\t" : : "r" (addr)) +#else +#define __icbi(addr) mb() +#endif + +#define __ocbp(addr) __asm__ __volatile__ ( "ocbp @%0\n\t" : : "r" (addr)) +#define __ocbi(addr) __asm__ __volatile__ ( "ocbi @%0\n\t" : : "r" (addr)) +#define __ocbwb(addr) __asm__ __volatile__ ( "ocbwb @%0\n\t" : : "r" (addr)) + +static inline reg_size_t register_align(void *val) +{ + return (unsigned long)(signed long)val; +} + +#endif /* __ASM_SH_CACHE_INSNS_32_H */ diff --git a/arch/sh/include/asm/cache_insns_64.h b/arch/sh/include/asm/cache_insns_64.h new file mode 100644 index 00000000000..70b6357eaf1 --- /dev/null +++ b/arch/sh/include/asm/cache_insns_64.h @@ -0,0 +1,23 @@ +/* + * Copyright (C) 2000, 2001 Paolo Alberelli + * Copyright (C) 2003 Paul Mundt + * Copyright (C) 2004 Richard Curnow + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#ifndef __ASM_SH_CACHE_INSNS_64_H +#define __ASM_SH_CACHE_INSNS_64_H + +#define __icbi(addr) __asm__ __volatile__ ( "icbi %0, 0\n\t" : : "r" (addr)) +#define __ocbp(addr) __asm__ __volatile__ ( "ocbp %0, 0\n\t" : : "r" (addr)) +#define __ocbi(addr) __asm__ __volatile__ ( "ocbi %0, 0\n\t" : : "r" (addr)) +#define __ocbwb(addr) __asm__ __volatile__ ( "ocbwb %0, 0\n\t" : : "r" (addr)) + +static inline reg_size_t register_align(void *val) +{ + return (unsigned long long)(signed long long)(signed long)val; +} + +#endif /* __ASM_SH_CACHE_INSNS_64_H */ diff --git a/arch/sh/include/asm/cacheflush.h b/arch/sh/include/asm/cacheflush.h index dda96eb3e7c..82e1eabeac9 100644 --- a/arch/sh/include/asm/cacheflush.h +++ b/arch/sh/include/asm/cacheflush.h @@ -63,6 +63,14 @@ static inline void flush_anon_page(struct vm_area_struct *vma, if (boot_cpu_data.dcache.n_aliases && PageAnon(page)) __flush_anon_page(page, vmaddr); } +static inline void flush_kernel_vmap_range(void *addr, int size) +{ + __flush_wback_region(addr, size); +} +static inline void invalidate_kernel_vmap_range(void *addr, int size) +{ + __flush_invalidate_region(addr, size); +} #define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE static inline void flush_kernel_dcache_page(struct page *page) @@ -78,8 +86,8 @@ extern void copy_from_user_page(struct vm_area_struct *vma, struct page *page, unsigned long vaddr, void *dst, const void *src, unsigned long len); -#define flush_cache_vmap(start, end) flush_cache_all() -#define flush_cache_vunmap(start, end) flush_cache_all() +#define flush_cache_vmap(start, end) local_flush_cache_all(NULL) +#define flush_cache_vunmap(start, end) local_flush_cache_all(NULL) #define flush_dcache_mmap_lock(mapping) do { } while (0) #define flush_dcache_mmap_unlock(mapping) do { } while (0) @@ -88,7 +96,7 @@ void kmap_coherent_init(void); void *kmap_coherent(struct page *page, unsigned long addr); void kunmap_coherent(void *kvaddr); -#define PG_dcache_dirty PG_arch_1 +#define PG_dcache_clean PG_arch_1 void cpu_cache_init(void); diff --git a/arch/sh/include/asm/checksum.h b/arch/sh/include/asm/checksum.h index fc26d1f4b59..34ae2620452 100644 --- a/arch/sh/include/asm/checksum.h +++ b/arch/sh/include/asm/checksum.h @@ -1,5 +1,5 @@ #ifdef CONFIG_SUPERH32 -# include "checksum_32.h" +# include <asm/checksum_32.h> #else # include <asm-generic/checksum.h> #endif diff --git a/arch/sh/include/asm/clkdev.h b/arch/sh/include/asm/clkdev.h new file mode 100644 index 00000000000..c41901465fb --- /dev/null +++ b/arch/sh/include/asm/clkdev.h @@ -0,0 +1,33 @@ +/* + * Copyright (C) 2010 Paul Mundt <lethal@linux-sh.org> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Helper for the clk API to assist looking up a struct clk. + */ + +#ifndef __CLKDEV__H_ +#define __CLKDEV__H_ + +#include <linux/bootmem.h> +#include <linux/mm.h> +#include <linux/slab.h> + +#include <asm/clock.h> + +static inline struct clk_lookup_alloc *__clkdev_alloc(size_t size) +{ + if (!slab_is_available()) + return alloc_bootmem_low_pages(size); + else + return kzalloc(size, GFP_KERNEL); +} + +#ifndef CONFIG_COMMON_CLK +#define __clk_put(clk) +#define __clk_get(clk) ({ 1; }) +#endif + +#endif /* __CLKDEV_H__ */ diff --git a/arch/sh/include/asm/clock.h b/arch/sh/include/asm/clock.h index 9fe7d7f8af4..0390a07e7e3 100644 --- a/arch/sh/include/asm/clock.h +++ b/arch/sh/include/asm/clock.h @@ -1,162 +1,16 @@ #ifndef __ASM_SH_CLOCK_H #define __ASM_SH_CLOCK_H -#include <linux/list.h> -#include <linux/seq_file.h> -#include <linux/cpufreq.h> -#include <linux/clk.h> -#include <linux/err.h> - -struct clk; - -struct clk_ops { - void (*init)(struct clk *clk); - int (*enable)(struct clk *clk); - void (*disable)(struct clk *clk); - unsigned long (*recalc)(struct clk *clk); - int (*set_rate)(struct clk *clk, unsigned long rate, int algo_id); - int (*set_parent)(struct clk *clk, struct clk *parent); - long (*round_rate)(struct clk *clk, unsigned long rate); -}; - -struct clk { - struct list_head node; - const char *name; - int id; - struct module *owner; - - struct clk *parent; - struct clk_ops *ops; - - struct list_head children; - struct list_head sibling; /* node for children */ - - int usecount; - - unsigned long rate; - unsigned long flags; - - void __iomem *enable_reg; - unsigned int enable_bit; - - unsigned long arch_flags; - void *priv; - struct dentry *dentry; - struct cpufreq_frequency_table *freq_table; -}; - -struct clk_lookup { - struct list_head node; - const char *dev_id; - const char *con_id; - struct clk *clk; -}; - -#define CLK_ENABLE_ON_INIT (1 << 0) +#include <linux/sh_clk.h> /* Should be defined by processor-specific code */ -void __deprecated arch_init_clk_ops(struct clk_ops **, int type); +void __deprecated arch_init_clk_ops(struct sh_clk_ops **, int type); int __init arch_clk_init(void); -/* arch/sh/kernel/cpu/clock.c */ -int clk_init(void); -unsigned long followparent_recalc(struct clk *); -void recalculate_root_clocks(void); -void propagate_rate(struct clk *); -int clk_reparent(struct clk *child, struct clk *parent); -int clk_register(struct clk *); -void clk_unregister(struct clk *); - /* arch/sh/kernel/cpu/clock-cpg.c */ int __init __deprecated cpg_clk_init(void); -/* the exported API, in addition to clk_set_rate */ -/** - * clk_set_rate_ex - set the clock rate for a clock source, with additional parameter - * @clk: clock source - * @rate: desired clock rate in Hz - * @algo_id: algorithm id to be passed down to ops->set_rate - * - * Returns success (0) or negative errno. - */ -int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id); - -enum clk_sh_algo_id { - NO_CHANGE = 0, - - IUS_N1_N1, - IUS_322, - IUS_522, - IUS_N11, - - SB_N1, - - SB3_N1, - SB3_32, - SB3_43, - SB3_54, - - BP_N1, - - IP_N1, -}; - -struct clk_div_mult_table { - unsigned int *divisors; - unsigned int nr_divisors; - unsigned int *multipliers; - unsigned int nr_multipliers; -}; - -struct cpufreq_frequency_table; -void clk_rate_table_build(struct clk *clk, - struct cpufreq_frequency_table *freq_table, - int nr_freqs, - struct clk_div_mult_table *src_table, - unsigned long *bitmap); - -long clk_rate_table_round(struct clk *clk, - struct cpufreq_frequency_table *freq_table, - unsigned long rate); - -int clk_rate_table_find(struct clk *clk, - struct cpufreq_frequency_table *freq_table, - unsigned long rate); - -#define SH_CLK_MSTP32(_name, _id, _parent, _enable_reg, \ - _enable_bit, _flags) \ -{ \ - .name = _name, \ - .id = _id, \ - .parent = _parent, \ - .enable_reg = (void __iomem *)_enable_reg, \ - .enable_bit = _enable_bit, \ - .flags = _flags, \ -} - -int sh_clk_mstp32_register(struct clk *clks, int nr); - -#define SH_CLK_DIV4(_name, _parent, _reg, _shift, _div_bitmap, _flags) \ -{ \ - .name = _name, \ - .parent = _parent, \ - .enable_reg = (void __iomem *)_reg, \ - .enable_bit = _shift, \ - .arch_flags = _div_bitmap, \ - .flags = _flags, \ -} - -int sh_clk_div4_register(struct clk *clks, int nr, - struct clk_div_mult_table *table); - -#define SH_CLK_DIV6(_name, _parent, _reg, _flags) \ -{ \ - .name = _name, \ - .parent = _parent, \ - .enable_reg = (void __iomem *)_reg, \ - .flags = _flags, \ -} - -int sh_clk_div6_register(struct clk *clks, int nr); +/* arch/sh/kernel/cpu/clock.c */ +int clk_init(void); #endif /* __ASM_SH_CLOCK_H */ diff --git a/arch/sh/include/asm/cmpxchg-grb.h b/arch/sh/include/asm/cmpxchg-grb.h index e2681abe764..f848dec9e48 100644 --- a/arch/sh/include/asm/cmpxchg-grb.h +++ b/arch/sh/include/asm/cmpxchg-grb.h @@ -15,8 +15,9 @@ static inline unsigned long xchg_u32(volatile u32 *m, unsigned long val) " mov.l %2, @%1 \n\t" /* store new value */ "1: mov r1, r15 \n\t" /* LOGOUT */ : "=&r" (retval), - "+r" (m) - : "r" (val) + "+r" (m), + "+r" (val) /* inhibit r15 overloading */ + : : "memory", "r0", "r1"); return retval; @@ -36,8 +37,9 @@ static inline unsigned long xchg_u8(volatile u8 *m, unsigned long val) " mov.b %2, @%1 \n\t" /* store new value */ "1: mov r1, r15 \n\t" /* LOGOUT */ : "=&r" (retval), - "+r" (m) - : "r" (val) + "+r" (m), + "+r" (val) /* inhibit r15 overloading */ + : : "memory" , "r0", "r1"); return retval; @@ -54,14 +56,14 @@ static inline unsigned long __cmpxchg_u32(volatile int *m, unsigned long old, " nop \n\t" " mov r15, r1 \n\t" /* r1 = saved sp */ " mov #-8, r15 \n\t" /* LOGIN */ - " mov.l @%1, %0 \n\t" /* load old value */ - " cmp/eq %0, %2 \n\t" + " mov.l @%3, %0 \n\t" /* load old value */ + " cmp/eq %0, %1 \n\t" " bf 1f \n\t" /* if not equal */ - " mov.l %2, @%1 \n\t" /* store new value */ + " mov.l %2, @%3 \n\t" /* store new value */ "1: mov r1, r15 \n\t" /* LOGOUT */ : "=&r" (retval), - "+r" (m) - : "r" (new) + "+r" (old), "+r" (new) /* old or new can be r15 */ + : "r" (m) : "memory" , "r0", "r1", "t"); return retval; diff --git a/arch/sh/include/asm/cmpxchg-irq.h b/arch/sh/include/asm/cmpxchg-irq.h index 43049ec0554..bd11f630414 100644 --- a/arch/sh/include/asm/cmpxchg-irq.h +++ b/arch/sh/include/asm/cmpxchg-irq.h @@ -1,6 +1,8 @@ #ifndef __ASM_SH_CMPXCHG_IRQ_H #define __ASM_SH_CMPXCHG_IRQ_H +#include <linux/irqflags.h> + static inline unsigned long xchg_u32(volatile u32 *m, unsigned long val) { unsigned long flags, retval; diff --git a/arch/sh/include/asm/cmpxchg.h b/arch/sh/include/asm/cmpxchg.h new file mode 100644 index 00000000000..f6bd1406b89 --- /dev/null +++ b/arch/sh/include/asm/cmpxchg.h @@ -0,0 +1,70 @@ +#ifndef __ASM_SH_CMPXCHG_H +#define __ASM_SH_CMPXCHG_H + +/* + * Atomic operations that C can't guarantee us. Useful for + * resource counting etc.. + */ + +#include <linux/compiler.h> +#include <linux/types.h> + +#if defined(CONFIG_GUSA_RB) +#include <asm/cmpxchg-grb.h> +#elif defined(CONFIG_CPU_SH4A) +#include <asm/cmpxchg-llsc.h> +#else +#include <asm/cmpxchg-irq.h> +#endif + +extern void __xchg_called_with_bad_pointer(void); + +#define __xchg(ptr, x, size) \ +({ \ + unsigned long __xchg__res; \ + volatile void *__xchg_ptr = (ptr); \ + switch (size) { \ + case 4: \ + __xchg__res = xchg_u32(__xchg_ptr, x); \ + break; \ + case 1: \ + __xchg__res = xchg_u8(__xchg_ptr, x); \ + break; \ + default: \ + __xchg_called_with_bad_pointer(); \ + __xchg__res = x; \ + break; \ + } \ + \ + __xchg__res; \ +}) + +#define xchg(ptr,x) \ + ((__typeof__(*(ptr)))__xchg((ptr),(unsigned long)(x), sizeof(*(ptr)))) + +/* This function doesn't exist, so you'll get a linker error + * if something tries to do an invalid cmpxchg(). */ +extern void __cmpxchg_called_with_bad_pointer(void); + +#define __HAVE_ARCH_CMPXCHG 1 + +static inline unsigned long __cmpxchg(volatile void * ptr, unsigned long old, + unsigned long new, int size) +{ + switch (size) { + case 4: + return __cmpxchg_u32(ptr, old, new); + } + __cmpxchg_called_with_bad_pointer(); + return old; +} + +#define cmpxchg(ptr,o,n) \ + ({ \ + __typeof__(*(ptr)) _o_ = (o); \ + __typeof__(*(ptr)) _n_ = (n); \ + (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \ + (unsigned long)_n_, sizeof(*(ptr))); \ + }) + +#endif /* __ASM_SH_CMPXCHG_H */ diff --git a/arch/sh/include/asm/cputime.h b/arch/sh/include/asm/cputime.h deleted file mode 100644 index 6ca395d1393..00000000000 --- a/arch/sh/include/asm/cputime.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __SH_CPUTIME_H -#define __SH_CPUTIME_H - -#include <asm-generic/cputime.h> - -#endif /* __SH_CPUTIME_H */ diff --git a/arch/sh/include/asm/current.h b/arch/sh/include/asm/current.h deleted file mode 100644 index 4c51401b553..00000000000 --- a/arch/sh/include/asm/current.h +++ /dev/null @@ -1 +0,0 @@ -#include <asm-generic/current.h> diff --git a/arch/sh/include/asm/delay.h b/arch/sh/include/asm/delay.h deleted file mode 100644 index 4b16bf9b56b..00000000000 --- a/arch/sh/include/asm/delay.h +++ /dev/null @@ -1,26 +0,0 @@ -#ifndef __ASM_SH_DELAY_H -#define __ASM_SH_DELAY_H - -/* - * Copyright (C) 1993 Linus Torvalds - * - * Delay routines calling functions in arch/sh/lib/delay.c - */ - -extern void __bad_udelay(void); -extern void __bad_ndelay(void); - -extern void __udelay(unsigned long usecs); -extern void __ndelay(unsigned long nsecs); -extern void __const_udelay(unsigned long xloops); -extern void __delay(unsigned long loops); - -#define udelay(n) (__builtin_constant_p(n) ? \ - ((n) > 20000 ? __bad_udelay() : __const_udelay((n) * 0x10c6ul)) : \ - __udelay(n)) - -#define ndelay(n) (__builtin_constant_p(n) ? \ - ((n) > 20000 ? __bad_ndelay() : __const_udelay((n) * 5ul)) : \ - __ndelay(n)) - -#endif /* __ASM_SH_DELAY_H */ diff --git a/arch/sh/include/asm/device.h b/arch/sh/include/asm/device.h index b16debfe8c1..071bcb4d4bf 100644 --- a/arch/sh/include/asm/device.h +++ b/arch/sh/include/asm/device.h @@ -3,9 +3,10 @@ * * This file is released under the GPLv2 */ +#ifndef __ASM_SH_DEVICE_H +#define __ASM_SH_DEVICE_H -struct dev_archdata { -}; +#include <asm-generic/device.h> struct platform_device; /* allocate contiguous memory chunk and fill in struct resource */ @@ -14,15 +15,4 @@ int platform_resource_setup_memory(struct platform_device *pdev, void plat_early_device_setup(void); -#define PDEV_ARCHDATA_FLAG_INIT 0 -#define PDEV_ARCHDATA_FLAG_IDLE 1 -#define PDEV_ARCHDATA_FLAG_SUSP 2 - -struct pdev_archdata { - int hwblk_id; -#ifdef CONFIG_PM_RUNTIME - unsigned long flags; - struct list_head entry; - struct mutex mutex; -#endif -}; +#endif /* __ASM_SH_DEVICE_H */ diff --git a/arch/sh/include/asm/div64.h b/arch/sh/include/asm/div64.h deleted file mode 100644 index 6cd978cefb2..00000000000 --- a/arch/sh/include/asm/div64.h +++ /dev/null @@ -1 +0,0 @@ -#include <asm-generic/div64.h> diff --git a/arch/sh/include/asm/dma-mapping.h b/arch/sh/include/asm/dma-mapping.h index 87ced133a36..b437f2c780b 100644 --- a/arch/sh/include/asm/dma-mapping.h +++ b/arch/sh/include/asm/dma-mapping.h @@ -42,67 +42,59 @@ void dma_cache_sync(struct device *dev, void *vaddr, size_t size, #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) -#ifdef CONFIG_DMA_COHERENT -#define dma_is_consistent(d, h) (1) -#else -#define dma_is_consistent(d, h) (0) -#endif - -static inline int dma_get_cache_alignment(void) -{ - /* - * Each processor family will define its own L1_CACHE_SHIFT, - * L1_CACHE_BYTES wraps to this, so this is always safe. - */ - return L1_CACHE_BYTES; -} - static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) { struct dma_map_ops *ops = get_dma_ops(dev); + debug_dma_mapping_error(dev, dma_addr); if (ops->mapping_error) return ops->mapping_error(dev, dma_addr); return dma_addr == 0; } -static inline void *dma_alloc_coherent(struct device *dev, size_t size, - dma_addr_t *dma_handle, gfp_t gfp) +#define dma_alloc_coherent(d,s,h,f) dma_alloc_attrs(d,s,h,f,NULL) + +static inline void *dma_alloc_attrs(struct device *dev, size_t size, + dma_addr_t *dma_handle, gfp_t gfp, + struct dma_attrs *attrs) { struct dma_map_ops *ops = get_dma_ops(dev); void *memory; if (dma_alloc_from_coherent(dev, size, dma_handle, &memory)) return memory; - if (!ops->alloc_coherent) + if (!ops->alloc) return NULL; - memory = ops->alloc_coherent(dev, size, dma_handle, gfp); + memory = ops->alloc(dev, size, dma_handle, gfp, attrs); debug_dma_alloc_coherent(dev, size, *dma_handle, memory); return memory; } -static inline void dma_free_coherent(struct device *dev, size_t size, - void *vaddr, dma_addr_t dma_handle) +#define dma_free_coherent(d,s,c,h) dma_free_attrs(d,s,c,h,NULL) + +static inline void dma_free_attrs(struct device *dev, size_t size, + void *vaddr, dma_addr_t dma_handle, + struct dma_attrs *attrs) { struct dma_map_ops *ops = get_dma_ops(dev); - WARN_ON(irqs_disabled()); /* for portability */ - if (dma_release_from_coherent(dev, get_order(size), vaddr)) return; debug_dma_free_coherent(dev, size, vaddr, dma_handle); - if (ops->free_coherent) - ops->free_coherent(dev, size, vaddr, dma_handle); + if (ops->free) + ops->free(dev, size, vaddr, dma_handle, attrs); } /* arch/sh/mm/consistent.c */ extern void *dma_generic_alloc_coherent(struct device *dev, size_t size, - dma_addr_t *dma_addr, gfp_t flag); + dma_addr_t *dma_addr, gfp_t flag, + struct dma_attrs *attrs); extern void dma_generic_free_coherent(struct device *dev, size_t size, - void *vaddr, dma_addr_t dma_handle); + void *vaddr, dma_addr_t dma_handle, + struct dma_attrs *attrs); #endif /* __ASM_SH_DMA_MAPPING_H */ diff --git a/arch/sh/include/asm/dma-register.h b/arch/sh/include/asm/dma-register.h new file mode 100644 index 00000000000..51cd78feacf --- /dev/null +++ b/arch/sh/include/asm/dma-register.h @@ -0,0 +1,51 @@ +/* + * Common header for the legacy SH DMA driver and the new dmaengine driver + * + * extracted from arch/sh/include/asm/dma-sh.h: + * + * Copyright (C) 2000 Takashi YOSHII + * Copyright (C) 2003 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#ifndef DMA_REGISTER_H +#define DMA_REGISTER_H + +/* DMA register */ +#define SAR 0x00 +#define DAR 0x04 +#define TCR 0x08 +#define CHCR 0x0C +#define DMAOR 0x40 + +/* DMAOR definitions */ +#define DMAOR_AE 0x00000004 +#define DMAOR_NMIF 0x00000002 +#define DMAOR_DME 0x00000001 + +/* Definitions for the SuperH DMAC */ +#define REQ_L 0x00000000 +#define REQ_E 0x00080000 +#define RACK_H 0x00000000 +#define RACK_L 0x00040000 +#define ACK_R 0x00000000 +#define ACK_W 0x00020000 +#define ACK_H 0x00000000 +#define ACK_L 0x00010000 +#define DM_INC 0x00004000 +#define DM_DEC 0x00008000 +#define DM_FIX 0x0000c000 +#define SM_INC 0x00001000 +#define SM_DEC 0x00002000 +#define SM_FIX 0x00003000 +#define RS_IN 0x00000200 +#define RS_OUT 0x00000300 +#define TS_BLK 0x00000040 +#define TM_BUR 0x00000020 +#define CHCR_DE 0x00000001 +#define CHCR_TE 0x00000002 +#define CHCR_IE 0x00000004 + +#endif diff --git a/arch/sh/include/asm/dma-sh.h b/arch/sh/include/asm/dma-sh.h deleted file mode 100644 index 78eed3e0bdf..00000000000 --- a/arch/sh/include/asm/dma-sh.h +++ /dev/null @@ -1,132 +0,0 @@ -/* - * arch/sh/include/asm/dma-sh.h - * - * Copyright (C) 2000 Takashi YOSHII - * Copyright (C) 2003 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __DMA_SH_H -#define __DMA_SH_H - -#include <asm/dma.h> -#include <cpu/dma.h> - -/* DMAOR contorl: The DMAOR access size is different by CPU.*/ -#if defined(CONFIG_CPU_SUBTYPE_SH7723) || \ - defined(CONFIG_CPU_SUBTYPE_SH7724) || \ - defined(CONFIG_CPU_SUBTYPE_SH7780) || \ - defined(CONFIG_CPU_SUBTYPE_SH7785) -#define dmaor_read_reg(n) \ - (n ? ctrl_inw(SH_DMAC_BASE1 + DMAOR) \ - : ctrl_inw(SH_DMAC_BASE0 + DMAOR)) -#define dmaor_write_reg(n, data) \ - (n ? ctrl_outw(data, SH_DMAC_BASE1 + DMAOR) \ - : ctrl_outw(data, SH_DMAC_BASE0 + DMAOR)) -#else /* Other CPU */ -#define dmaor_read_reg(n) ctrl_inw(SH_DMAC_BASE0 + DMAOR) -#define dmaor_write_reg(n, data) ctrl_outw(data, SH_DMAC_BASE0 + DMAOR) -#endif - -static int dmte_irq_map[] __maybe_unused = { -#if (MAX_DMA_CHANNELS >= 4) - DMTE0_IRQ, - DMTE0_IRQ + 1, - DMTE0_IRQ + 2, - DMTE0_IRQ + 3, -#endif -#if (MAX_DMA_CHANNELS >= 6) - DMTE4_IRQ, - DMTE4_IRQ + 1, -#endif -#if (MAX_DMA_CHANNELS >= 8) - DMTE6_IRQ, - DMTE6_IRQ + 1, -#endif -#if (MAX_DMA_CHANNELS >= 12) - DMTE8_IRQ, - DMTE9_IRQ, - DMTE10_IRQ, - DMTE11_IRQ, -#endif -}; - -/* Definitions for the SuperH DMAC */ -#define REQ_L 0x00000000 -#define REQ_E 0x00080000 -#define RACK_H 0x00000000 -#define RACK_L 0x00040000 -#define ACK_R 0x00000000 -#define ACK_W 0x00020000 -#define ACK_H 0x00000000 -#define ACK_L 0x00010000 -#define DM_INC 0x00004000 -#define DM_DEC 0x00008000 -#define SM_INC 0x00001000 -#define SM_DEC 0x00002000 -#define RS_IN 0x00000200 -#define RS_OUT 0x00000300 -#define TS_BLK 0x00000040 -#define TM_BUR 0x00000020 -#define CHCR_DE 0x00000001 -#define CHCR_TE 0x00000002 -#define CHCR_IE 0x00000004 - -/* DMAOR definitions */ -#define DMAOR_AE 0x00000004 -#define DMAOR_NMIF 0x00000002 -#define DMAOR_DME 0x00000001 - -/* - * Define the default configuration for dual address memory-memory transfer. - * The 0x400 value represents auto-request, external->external. - */ -#define RS_DUAL (DM_INC | SM_INC | 0x400 | TS_32) - -/* DMA base address */ -static u32 dma_base_addr[] __maybe_unused = { -#if (MAX_DMA_CHANNELS >= 4) - SH_DMAC_BASE0 + 0x00, /* channel 0 */ - SH_DMAC_BASE0 + 0x10, - SH_DMAC_BASE0 + 0x20, - SH_DMAC_BASE0 + 0x30, -#endif -#if (MAX_DMA_CHANNELS >= 6) - SH_DMAC_BASE0 + 0x50, - SH_DMAC_BASE0 + 0x60, -#endif -#if (MAX_DMA_CHANNELS >= 8) - SH_DMAC_BASE1 + 0x00, - SH_DMAC_BASE1 + 0x10, -#endif -#if (MAX_DMA_CHANNELS >= 12) - SH_DMAC_BASE1 + 0x20, - SH_DMAC_BASE1 + 0x30, - SH_DMAC_BASE1 + 0x50, - SH_DMAC_BASE1 + 0x60, /* channel 11 */ -#endif -}; - -/* DMA register */ -#define SAR 0x00 -#define DAR 0x04 -#define TCR 0x08 -#define CHCR 0x0C -#define DMAOR 0x40 - -/* - * for dma engine - * - * SuperH DMA mode - */ -#define SHDMA_MIX_IRQ (1 << 1) -#define SHDMA_DMAOR1 (1 << 2) -#define SHDMA_DMAE1 (1 << 3) - -struct sh_dmae_pdata { - unsigned int mode; -}; - -#endif /* __DMA_SH_H */ diff --git a/arch/sh/include/asm/dma.h b/arch/sh/include/asm/dma.h index 07373a07409..fb6e4f7b00a 100644 --- a/arch/sh/include/asm/dma.h +++ b/arch/sh/include/asm/dma.h @@ -14,18 +14,9 @@ #include <linux/spinlock.h> #include <linux/wait.h> #include <linux/sched.h> -#include <linux/sysdev.h> -#include <cpu/dma.h> +#include <linux/device.h> #include <asm-generic/dma.h> -#ifdef CONFIG_NR_DMA_CHANNELS -# define MAX_DMA_CHANNELS (CONFIG_NR_DMA_CHANNELS) -#elif defined(CONFIG_NR_ONCHIP_DMA_CHANNELS) -# define MAX_DMA_CHANNELS (CONFIG_NR_ONCHIP_DMA_CHANNELS) -#else -# define MAX_DMA_CHANNELS 0 -#endif - /* * Read and write modes can mean drastically different things depending on the * channel configuration. Consult your DMAC documentation and module @@ -91,7 +82,7 @@ struct dma_channel { wait_queue_head_t wait_queue; - struct sys_device dev; + struct device dev; void *priv_data; }; diff --git a/arch/sh/include/asm/dwarf.h b/arch/sh/include/asm/dwarf.h index bdccbbfdc0b..d62abd1d0c0 100644 --- a/arch/sh/include/asm/dwarf.h +++ b/arch/sh/include/asm/dwarf.h @@ -243,16 +243,13 @@ struct dwarf_cie { unsigned long cie_pointer; - struct list_head link; - unsigned long flags; #define DWARF_CIE_Z_AUGMENTATION (1 << 0) - /* - * 'mod' will be non-NULL if this CIE came from a module's - * .eh_frame section. - */ - struct module *mod; + /* linked-list entry if this CIE is from a module */ + struct list_head link; + + struct rb_node node; }; /** @@ -266,13 +263,11 @@ struct dwarf_fde { unsigned long address_range; unsigned char *instructions; unsigned char *end; + + /* linked-list entry if this FDE is from a module */ struct list_head link; - /* - * 'mod' will be non-NULL if this FDE came from a module's - * .eh_frame section. - */ - struct module *mod; + struct rb_node node; }; /** diff --git a/arch/sh/include/asm/elf.h b/arch/sh/include/asm/elf.h index ac04255022b..bf9f44f17c2 100644 --- a/arch/sh/include/asm/elf.h +++ b/arch/sh/include/asm/elf.h @@ -50,25 +50,14 @@ #define R_SH_GOTPC 167 /* FDPIC relocs */ -#define R_SH_GOT20 70 -#define R_SH_GOTOFF20 71 -#define R_SH_GOTFUNCDESC 72 -#define R_SH_GOTFUNCDESC20 73 -#define R_SH_GOTOFFFUNCDESC 74 -#define R_SH_GOTOFFFUNCDESC20 75 -#define R_SH_FUNCDESC 76 -#define R_SH_FUNCDESC_VALUE 77 - -#if 0 /* XXX - later .. */ -#define R_SH_GOT20 198 -#define R_SH_GOTOFF20 199 -#define R_SH_GOTFUNCDESC 200 -#define R_SH_GOTFUNCDESC20 201 -#define R_SH_GOTOFFFUNCDESC 202 -#define R_SH_GOTOFFFUNCDESC20 203 -#define R_SH_FUNCDESC 204 -#define R_SH_FUNCDESC_VALUE 205 -#endif +#define R_SH_GOT20 201 +#define R_SH_GOTOFF20 202 +#define R_SH_GOTFUNCDESC 203 +#define R_SH_GOTFUNCDESC20 204 +#define R_SH_GOTOFFFUNCDESC 205 +#define R_SH_GOTOFFFUNCDESC20 206 +#define R_SH_FUNCDESC 207 +#define R_SH_FUNCDESC_VALUE 208 /* SHmedia relocs */ #define R_SH_IMM_LOW16 246 @@ -194,7 +183,8 @@ do { \ } while (0) #endif -#define SET_PERSONALITY(ex) set_personality(PER_LINUX_32BIT) +#define SET_PERSONALITY(ex) \ + set_personality(PER_LINUX_32BIT | (current->personality & (~PER_MASK))) #ifdef CONFIG_VSYSCALL /* vDSO has arch_setup_additional_pages */ @@ -211,15 +201,17 @@ extern void __kernel_vsyscall; #define VSYSCALL_AUX_ENT \ if (vdso_enabled) \ - NEW_AUX_ENT(AT_SYSINFO_EHDR, VDSO_BASE); + NEW_AUX_ENT(AT_SYSINFO_EHDR, VDSO_BASE); \ + else \ + NEW_AUX_ENT(AT_IGNORE, 0) #else -#define VSYSCALL_AUX_ENT +#define VSYSCALL_AUX_ENT NEW_AUX_ENT(AT_IGNORE, 0) #endif /* CONFIG_VSYSCALL */ #ifdef CONFIG_SH_FPU #define FPU_AUX_ENT NEW_AUX_ENT(AT_FPUCW, FPSCR_INIT) #else -#define FPU_AUX_ENT +#define FPU_AUX_ENT NEW_AUX_ENT(AT_IGNORE, 0) #endif extern int l1i_cache_shape, l1d_cache_shape, l2_cache_shape; diff --git a/arch/sh/include/asm/emergency-restart.h b/arch/sh/include/asm/emergency-restart.h deleted file mode 100644 index 108d8c48e42..00000000000 --- a/arch/sh/include/asm/emergency-restart.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ASM_EMERGENCY_RESTART_H -#define _ASM_EMERGENCY_RESTART_H - -#include <asm-generic/emergency-restart.h> - -#endif /* _ASM_EMERGENCY_RESTART_H */ diff --git a/arch/sh/include/asm/errno.h b/arch/sh/include/asm/errno.h deleted file mode 100644 index 51cf6f9cebb..00000000000 --- a/arch/sh/include/asm/errno.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __ASM_SH_ERRNO_H -#define __ASM_SH_ERRNO_H - -#include <asm-generic/errno.h> - -#endif /* __ASM_SH_ERRNO_H */ diff --git a/arch/sh/include/asm/fcntl.h b/arch/sh/include/asm/fcntl.h deleted file mode 100644 index 46ab12db573..00000000000 --- a/arch/sh/include/asm/fcntl.h +++ /dev/null @@ -1 +0,0 @@ -#include <asm-generic/fcntl.h> diff --git a/arch/sh/include/asm/fixmap.h b/arch/sh/include/asm/fixmap.h index 5ac1e40a511..4daf91c3b72 100644 --- a/arch/sh/include/asm/fixmap.h +++ b/arch/sh/include/asm/fixmap.h @@ -55,24 +55,30 @@ enum fixed_addresses { #define FIX_N_COLOURS 8 FIX_CMAP_BEGIN, FIX_CMAP_END = FIX_CMAP_BEGIN + (FIX_N_COLOURS * NR_CPUS) - 1, - FIX_UNCACHED, + #ifdef CONFIG_HIGHMEM FIX_KMAP_BEGIN, /* reserved pte's for temporary kernel mappings */ - FIX_KMAP_END = FIX_KMAP_BEGIN+(KM_TYPE_NR*NR_CPUS)-1, + FIX_KMAP_END = FIX_KMAP_BEGIN + (KM_TYPE_NR * NR_CPUS) - 1, #endif + +#ifdef CONFIG_IOREMAP_FIXED + /* + * FIX_IOREMAP entries are useful for mapping physical address + * space before ioremap() is useable, e.g. really early in boot + * before kmalloc() is working. + */ +#define FIX_N_IOREMAPS 32 + FIX_IOREMAP_BEGIN, + FIX_IOREMAP_END = FIX_IOREMAP_BEGIN + FIX_N_IOREMAPS - 1, +#endif + __end_of_fixed_addresses }; extern void __set_fixmap(enum fixed_addresses idx, unsigned long phys, pgprot_t flags); +extern void __clear_fixmap(enum fixed_addresses idx, pgprot_t flags); -#define set_fixmap(idx, phys) \ - __set_fixmap(idx, phys, PAGE_KERNEL) -/* - * Some hardware wants to get fixmapped without caching. - */ -#define set_fixmap_nocache(idx, phys) \ - __set_fixmap(idx, phys, PAGE_KERNEL_NOCACHE) /* * used by vmalloc.c. * @@ -83,41 +89,13 @@ extern void __set_fixmap(enum fixed_addresses idx, #ifdef CONFIG_SUPERH32 #define FIXADDR_TOP (P4SEG - PAGE_SIZE) #else -#define FIXADDR_TOP (0xff000000 - PAGE_SIZE) +#define FIXADDR_TOP ((unsigned long)(-PAGE_SIZE)) #endif #define FIXADDR_SIZE (__end_of_fixed_addresses << PAGE_SHIFT) #define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE) -#define __fix_to_virt(x) (FIXADDR_TOP - ((x) << PAGE_SHIFT)) -#define __virt_to_fix(x) ((FIXADDR_TOP - ((x)&PAGE_MASK)) >> PAGE_SHIFT) - -extern void __this_fixmap_does_not_exist(void); - -/* - * 'index to address' translation. If anyone tries to use the idx - * directly without tranlation, we catch the bug with a NULL-deference - * kernel oops. Illegal ranges of incoming indices are caught too. - */ -static inline unsigned long fix_to_virt(const unsigned int idx) -{ - /* - * this branch gets completely eliminated after inlining, - * except when someone tries to use fixaddr indices in an - * illegal way. (such as mixing up address types or using - * out-of-range indices). - * - * If it doesn't get removed, the linker will complain - * loudly with a reasonably clear error message.. - */ - if (idx >= __end_of_fixed_addresses) - __this_fixmap_does_not_exist(); +#define FIXMAP_PAGE_NOCACHE PAGE_KERNEL_NOCACHE - return __fix_to_virt(idx); -} +#include <asm-generic/fixmap.h> -static inline unsigned long virt_to_fix(const unsigned long vaddr) -{ - BUG_ON(vaddr >= FIXADDR_TOP || vaddr < FIXADDR_START); - return __virt_to_fix(vaddr); -} #endif diff --git a/arch/sh/include/asm/fpu.h b/arch/sh/include/asm/fpu.h index fb6bbb9b1cc..09fc2bc8a79 100644 --- a/arch/sh/include/asm/fpu.h +++ b/arch/sh/include/asm/fpu.h @@ -2,8 +2,8 @@ #define __ASM_SH_FPU_H #ifndef __ASSEMBLY__ -#include <linux/preempt.h> -#include <asm/ptrace.h> + +struct task_struct; #ifdef CONFIG_SH_FPU static inline void release_fpu(struct pt_regs *regs) @@ -16,22 +16,23 @@ static inline void grab_fpu(struct pt_regs *regs) regs->sr &= ~SR_FD; } -struct task_struct; - extern void save_fpu(struct task_struct *__tsk); -void fpu_state_restore(struct pt_regs *regs); +extern void restore_fpu(struct task_struct *__tsk); +extern void fpu_state_restore(struct pt_regs *regs); +extern void __fpu_state_restore(void); #else - -#define save_fpu(tsk) do { } while (0) -#define release_fpu(regs) do { } while (0) -#define grab_fpu(regs) do { } while (0) -#define fpu_state_restore(regs) do { } while (0) - +#define save_fpu(tsk) do { } while (0) +#define restore_fpu(tsk) do { } while (0) +#define release_fpu(regs) do { } while (0) +#define grab_fpu(regs) do { } while (0) +#define fpu_state_restore(regs) do { } while (0) +#define __fpu_state_restore(regs) do { } while (0) #endif struct user_regset; extern int do_fpu_inst(unsigned short, struct pt_regs *); +extern int init_fpu(struct task_struct *); extern int fpregs_get(struct task_struct *target, const struct user_regset *regset, @@ -45,7 +46,7 @@ static inline void __unlazy_fpu(struct task_struct *tsk, struct pt_regs *regs) save_fpu(tsk); release_fpu(regs); } else - tsk->fpu_counter = 0; + tsk->thread.fpu_counter = 0; } static inline void unlazy_fpu(struct task_struct *tsk, struct pt_regs *regs) @@ -65,18 +66,6 @@ static inline void clear_fpu(struct task_struct *tsk, struct pt_regs *regs) preempt_enable(); } -static inline int init_fpu(struct task_struct *tsk) -{ - if (tsk_used_math(tsk)) { - if ((boot_cpu_data.flags & CPU_HAS_FPU) && tsk == current) - unlazy_fpu(tsk, task_pt_regs(tsk)); - return 0; - } - - set_stopped_child_used_math(tsk); - return 0; -} - #endif /* __ASSEMBLY__ */ #endif /* __ASM_SH_FPU_H */ diff --git a/arch/sh/include/asm/ftrace.h b/arch/sh/include/asm/ftrace.h index 13e9966464c..e79fb6ebaa4 100644 --- a/arch/sh/include/asm/ftrace.h +++ b/arch/sh/include/asm/ftrace.h @@ -40,15 +40,7 @@ static inline unsigned long ftrace_call_adjust(unsigned long addr) /* arch/sh/kernel/return_address.c */ extern void *return_address(unsigned int); -#define HAVE_ARCH_CALLER_ADDR - -#define CALLER_ADDR0 ((unsigned long)__builtin_return_address(0)) -#define CALLER_ADDR1 ((unsigned long)return_address(1)) -#define CALLER_ADDR2 ((unsigned long)return_address(2)) -#define CALLER_ADDR3 ((unsigned long)return_address(3)) -#define CALLER_ADDR4 ((unsigned long)return_address(4)) -#define CALLER_ADDR5 ((unsigned long)return_address(5)) -#define CALLER_ADDR6 ((unsigned long)return_address(6)) +#define ftrace_return_address(n) return_address(n) #endif /* __ASSEMBLY__ */ diff --git a/arch/sh/include/asm/futex-irq.h b/arch/sh/include/asm/futex-irq.h index a9f16a7f9ae..63d33129ea2 100644 --- a/arch/sh/include/asm/futex-irq.h +++ b/arch/sh/include/asm/futex-irq.h @@ -1,9 +1,8 @@ #ifndef __ASM_SH_FUTEX_IRQ_H #define __ASM_SH_FUTEX_IRQ_H -#include <asm/system.h> -static inline int atomic_futex_op_xchg_set(int oparg, int __user *uaddr, +static inline int atomic_futex_op_xchg_set(int oparg, u32 __user *uaddr, int *oldval) { unsigned long flags; @@ -20,7 +19,7 @@ static inline int atomic_futex_op_xchg_set(int oparg, int __user *uaddr, return ret; } -static inline int atomic_futex_op_xchg_add(int oparg, int __user *uaddr, +static inline int atomic_futex_op_xchg_add(int oparg, u32 __user *uaddr, int *oldval) { unsigned long flags; @@ -37,7 +36,7 @@ static inline int atomic_futex_op_xchg_add(int oparg, int __user *uaddr, return ret; } -static inline int atomic_futex_op_xchg_or(int oparg, int __user *uaddr, +static inline int atomic_futex_op_xchg_or(int oparg, u32 __user *uaddr, int *oldval) { unsigned long flags; @@ -54,7 +53,7 @@ static inline int atomic_futex_op_xchg_or(int oparg, int __user *uaddr, return ret; } -static inline int atomic_futex_op_xchg_and(int oparg, int __user *uaddr, +static inline int atomic_futex_op_xchg_and(int oparg, u32 __user *uaddr, int *oldval) { unsigned long flags; @@ -71,7 +70,7 @@ static inline int atomic_futex_op_xchg_and(int oparg, int __user *uaddr, return ret; } -static inline int atomic_futex_op_xchg_xor(int oparg, int __user *uaddr, +static inline int atomic_futex_op_xchg_xor(int oparg, u32 __user *uaddr, int *oldval) { unsigned long flags; @@ -88,11 +87,13 @@ static inline int atomic_futex_op_xchg_xor(int oparg, int __user *uaddr, return ret; } -static inline int atomic_futex_op_cmpxchg_inatomic(int __user *uaddr, - int oldval, int newval) +static inline int atomic_futex_op_cmpxchg_inatomic(u32 *uval, + u32 __user *uaddr, + u32 oldval, u32 newval) { unsigned long flags; - int ret, prev = 0; + int ret; + u32 prev = 0; local_irq_save(flags); @@ -102,10 +103,8 @@ static inline int atomic_futex_op_cmpxchg_inatomic(int __user *uaddr, local_irq_restore(flags); - if (ret) - return ret; - - return prev; + *uval = prev; + return ret; } #endif /* __ASM_SH_FUTEX_IRQ_H */ diff --git a/arch/sh/include/asm/futex.h b/arch/sh/include/asm/futex.h index 68256ec5fa3..7be39a646fb 100644 --- a/arch/sh/include/asm/futex.h +++ b/arch/sh/include/asm/futex.h @@ -10,7 +10,7 @@ /* XXX: UP variants, fix for SH-4A and SMP.. */ #include <asm/futex-irq.h> -static inline int futex_atomic_op_inuser(int encoded_op, int __user *uaddr) +static inline int futex_atomic_op_inuser(int encoded_op, u32 __user *uaddr) { int op = (encoded_op >> 28) & 7; int cmp = (encoded_op >> 24) & 15; @@ -21,7 +21,7 @@ static inline int futex_atomic_op_inuser(int encoded_op, int __user *uaddr) if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28)) oparg = 1 << oparg; - if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int))) + if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32))) return -EFAULT; pagefault_disable(); @@ -65,12 +65,13 @@ static inline int futex_atomic_op_inuser(int encoded_op, int __user *uaddr) } static inline int -futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval) +futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr, + u32 oldval, u32 newval) { - if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int))) + if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32))) return -EFAULT; - return atomic_futex_op_cmpxchg_inatomic(uaddr, oldval, newval); + return atomic_futex_op_cmpxchg_inatomic(uval, uaddr, oldval, newval); } #endif /* __KERNEL__ */ diff --git a/arch/sh/include/asm/gpio.h b/arch/sh/include/asm/gpio.h index f8d9a731e90..7dfe15e2e99 100644 --- a/arch/sh/include/asm/gpio.h +++ b/arch/sh/include/asm/gpio.h @@ -20,7 +20,7 @@ #endif #define ARCH_NR_GPIOS 512 -#include <linux/sh_pfc.h> +#include <asm-generic/gpio.h> #ifdef CONFIG_GPIOLIB @@ -41,14 +41,12 @@ static inline int gpio_cansleep(unsigned gpio) static inline int gpio_to_irq(unsigned gpio) { - WARN_ON(1); - return -ENOSYS; + return __gpio_to_irq(gpio); } static inline int irq_to_gpio(unsigned int irq) { - WARN_ON(1); - return -EINVAL; + return -ENOSYS; } #endif /* CONFIG_GPIOLIB */ diff --git a/arch/sh/include/asm/hugetlb.h b/arch/sh/include/asm/hugetlb.h index 967068fb79a..699255d6d1c 100644 --- a/arch/sh/include/asm/hugetlb.h +++ b/arch/sh/include/asm/hugetlb.h @@ -1,7 +1,9 @@ #ifndef _ASM_SH_HUGETLB_H #define _ASM_SH_HUGETLB_H +#include <asm/cacheflush.h> #include <asm/page.h> +#include <asm-generic/hugetlb.h> static inline int is_hugepage_only_range(struct mm_struct *mm, @@ -89,4 +91,9 @@ static inline void arch_release_hugepage(struct page *page) { } +static inline void arch_clear_hugepage_flags(struct page *page) +{ + clear_bit(PG_dcache_clean, &page->flags); +} + #endif /* _ASM_SH_HUGETLB_H */ diff --git a/arch/sh/include/asm/hw_breakpoint.h b/arch/sh/include/asm/hw_breakpoint.h new file mode 100644 index 00000000000..ec9ad593c3d --- /dev/null +++ b/arch/sh/include/asm/hw_breakpoint.h @@ -0,0 +1,70 @@ +#ifndef __ASM_SH_HW_BREAKPOINT_H +#define __ASM_SH_HW_BREAKPOINT_H + +#include <uapi/asm/hw_breakpoint.h> + +#define __ARCH_HW_BREAKPOINT_H + +#include <linux/kdebug.h> +#include <linux/types.h> + +struct arch_hw_breakpoint { + char *name; /* Contains name of the symbol to set bkpt */ + unsigned long address; + u16 len; + u16 type; +}; + +enum { + SH_BREAKPOINT_READ = (1 << 1), + SH_BREAKPOINT_WRITE = (1 << 2), + SH_BREAKPOINT_RW = SH_BREAKPOINT_READ | SH_BREAKPOINT_WRITE, + + SH_BREAKPOINT_LEN_1 = (1 << 12), + SH_BREAKPOINT_LEN_2 = (1 << 13), + SH_BREAKPOINT_LEN_4 = SH_BREAKPOINT_LEN_1 | SH_BREAKPOINT_LEN_2, + SH_BREAKPOINT_LEN_8 = (1 << 14), +}; + +struct sh_ubc { + const char *name; + unsigned int num_events; + unsigned int trap_nr; + void (*enable)(struct arch_hw_breakpoint *, int); + void (*disable)(struct arch_hw_breakpoint *, int); + void (*enable_all)(unsigned long); + void (*disable_all)(void); + unsigned long (*active_mask)(void); + unsigned long (*triggered_mask)(void); + void (*clear_triggered_mask)(unsigned long); + struct clk *clk; /* optional interface clock / MSTP bit */ +}; + +struct perf_event; +struct task_struct; +struct pmu; + +/* Maximum number of UBC channels */ +#define HBP_NUM 2 + +static inline int hw_breakpoint_slots(int type) +{ + return HBP_NUM; +} + +/* arch/sh/kernel/hw_breakpoint.c */ +extern int arch_check_bp_in_kernelspace(struct perf_event *bp); +extern int arch_validate_hwbkpt_settings(struct perf_event *bp); +extern int hw_breakpoint_exceptions_notify(struct notifier_block *unused, + unsigned long val, void *data); + +int arch_install_hw_breakpoint(struct perf_event *bp); +void arch_uninstall_hw_breakpoint(struct perf_event *bp); +void hw_breakpoint_pmu_read(struct perf_event *bp); + +extern void arch_fill_perf_breakpoint(struct perf_event *bp); +extern int register_sh_ubc(struct sh_ubc *); + +extern struct pmu perf_ops_bp; + +#endif /* __ASM_SH_HW_BREAKPOINT_H */ diff --git a/arch/sh/include/asm/hw_irq.h b/arch/sh/include/asm/hw_irq.h index 603cdde813d..693d4418405 100644 --- a/arch/sh/include/asm/hw_irq.h +++ b/arch/sh/include/asm/hw_irq.h @@ -3,7 +3,7 @@ #include <linux/init.h> #include <linux/sh_intc.h> -#include <asm/atomic.h> +#include <linux/atomic.h> extern atomic_t irq_err_count; diff --git a/arch/sh/include/asm/hwblk.h b/arch/sh/include/asm/hwblk.h deleted file mode 100644 index 5d3ccae4202..00000000000 --- a/arch/sh/include/asm/hwblk.h +++ /dev/null @@ -1,72 +0,0 @@ -#ifndef __ASM_SH_HWBLK_H -#define __ASM_SH_HWBLK_H - -#include <asm/clock.h> -#include <asm/io.h> - -#define HWBLK_CNT_USAGE 0 -#define HWBLK_CNT_IDLE 1 -#define HWBLK_CNT_DEVICES 2 -#define HWBLK_CNT_NR 3 - -#define HWBLK_AREA_FLAG_PARENT (1 << 0) /* valid parent */ - -#define HWBLK_AREA(_flags, _parent) \ -{ \ - .flags = _flags, \ - .parent = _parent, \ -} - -struct hwblk_area { - int cnt[HWBLK_CNT_NR]; - unsigned char parent; - unsigned char flags; -}; - -#define HWBLK(_mstp, _bit, _area) \ -{ \ - .mstp = (void __iomem *)_mstp, \ - .bit = _bit, \ - .area = _area, \ -} - -struct hwblk { - void __iomem *mstp; - unsigned char bit; - unsigned char area; - int cnt[HWBLK_CNT_NR]; -}; - -struct hwblk_info { - struct hwblk_area *areas; - int nr_areas; - struct hwblk *hwblks; - int nr_hwblks; -}; - -/* Should be defined by processor-specific code */ -int arch_hwblk_init(void); -int arch_hwblk_sleep_mode(void); - -int hwblk_register(struct hwblk_info *info); -int hwblk_init(void); - -void hwblk_enable(struct hwblk_info *info, int hwblk); -void hwblk_disable(struct hwblk_info *info, int hwblk); - -void hwblk_cnt_inc(struct hwblk_info *info, int hwblk, int cnt); -void hwblk_cnt_dec(struct hwblk_info *info, int hwblk, int cnt); - -/* allow clocks to enable and disable hardware blocks */ -#define SH_HWBLK_CLK(_name, _id, _parent, _hwblk, _flags) \ -{ \ - .name = _name, \ - .id = _id, \ - .parent = _parent, \ - .arch_flags = _hwblk, \ - .flags = _flags, \ -} - -int sh_hwblk_clk_register(struct clk *clks, int nr); - -#endif /* __ASM_SH_HWBLK_H */ diff --git a/arch/sh/include/asm/i2c-sh7760.h b/arch/sh/include/asm/i2c-sh7760.h index 24182116711..69fee1239b0 100644 --- a/arch/sh/include/asm/i2c-sh7760.h +++ b/arch/sh/include/asm/i2c-sh7760.h @@ -9,11 +9,9 @@ #define SH7760_I2C0_MMIO 0xFE140000 #define SH7760_I2C0_MMIOEND 0xFE14003B -#define SH7760_I2C0_IRQ 62 #define SH7760_I2C1_MMIO 0xFE150000 #define SH7760_I2C1_MMIOEND 0xFE15003B -#define SH7760_I2C1_IRQ 63 struct sh7760_i2c_platdata { unsigned int speed_khz; diff --git a/arch/sh/include/asm/io.h b/arch/sh/include/asm/io.h index 026dd659a64..728c4c571f4 100644 --- a/arch/sh/include/asm/io.h +++ b/arch/sh/include/asm/io.h @@ -1,5 +1,6 @@ #ifndef __ASM_SH_IO_H #define __ASM_SH_IO_H + /* * Convention: * read{b,w,l,q}/write{b,w,l,q} are for PCI, @@ -10,54 +11,19 @@ * * While read{b,w,l,q} and write{b,w,l,q} contain memory barriers * automatically, there are also __raw versions, which do not. - * - * Historically, we have also had ctrl_in{b,w,l,q}/ctrl_out{b,w,l,q} for - * SuperH specific I/O (raw I/O to on-chip CPU peripherals). In practice - * these have the same semantics as the __raw variants, and as such, all - * new code should be using the __raw versions. - * - * All ISA I/O routines are wrapped through the machine vector. If a - * board does not provide overrides, a generic set that are copied in - * from the default machine vector are used instead. These are largely - * for old compat code for I/O offseting to SuperIOs, all of which are - * better handled through the machvec ioport mapping routines these days. */ +#include <linux/errno.h> #include <asm/cache.h> -#include <asm/system.h> #include <asm/addrspace.h> #include <asm/machvec.h> #include <asm/pgtable.h> #include <asm-generic/iomap.h> #ifdef __KERNEL__ -/* - * Depending on which platform we are running on, we need different - * I/O functions. - */ -#define __IO_PREFIX generic +#define __IO_PREFIX generic #include <asm/io_generic.h> #include <asm/io_trapped.h> - -#define inb(p) sh_mv.mv_inb((p)) -#define inw(p) sh_mv.mv_inw((p)) -#define inl(p) sh_mv.mv_inl((p)) -#define outb(x,p) sh_mv.mv_outb((x),(p)) -#define outw(x,p) sh_mv.mv_outw((x),(p)) -#define outl(x,p) sh_mv.mv_outl((x),(p)) - -#define inb_p(p) sh_mv.mv_inb_p((p)) -#define inw_p(p) sh_mv.mv_inw_p((p)) -#define inl_p(p) sh_mv.mv_inl_p((p)) -#define outb_p(x,p) sh_mv.mv_outb_p((x),(p)) -#define outw_p(x,p) sh_mv.mv_outw_p((x),(p)) -#define outl_p(x,p) sh_mv.mv_outl_p((x),(p)) - -#define insb(p,b,c) sh_mv.mv_insb((p), (b), (c)) -#define insw(p,b,c) sh_mv.mv_insw((p), (b), (c)) -#define insl(p,b,c) sh_mv.mv_insl((p), (b), (c)) -#define outsb(p,b,c) sh_mv.mv_outsb((p), (b), (c)) -#define outsw(p,b,c) sh_mv.mv_outsw((p), (b), (c)) -#define outsl(p,b,c) sh_mv.mv_outsl((p), (b), (c)) +#include <mach/mangle-port.h> #define __raw_writeb(v,a) (__chk_io_ptr(a), *(volatile u8 __force *)(a) = (v)) #define __raw_writew(v,a) (__chk_io_ptr(a), *(volatile u16 __force *)(a) = (v)) @@ -69,38 +35,61 @@ #define __raw_readl(a) (__chk_io_ptr(a), *(volatile u32 __force *)(a)) #define __raw_readq(a) (__chk_io_ptr(a), *(volatile u64 __force *)(a)) -#define readb(a) ({ u8 r_ = __raw_readb(a); mb(); r_; }) -#define readw(a) ({ u16 r_ = __raw_readw(a); mb(); r_; }) -#define readl(a) ({ u32 r_ = __raw_readl(a); mb(); r_; }) -#define readq(a) ({ u64 r_ = __raw_readq(a); mb(); r_; }) +#define readb_relaxed(c) ({ u8 __v = ioswabb(__raw_readb(c)); __v; }) +#define readw_relaxed(c) ({ u16 __v = ioswabw(__raw_readw(c)); __v; }) +#define readl_relaxed(c) ({ u32 __v = ioswabl(__raw_readl(c)); __v; }) +#define readq_relaxed(c) ({ u64 __v = ioswabq(__raw_readq(c)); __v; }) -#define writeb(v,a) ({ __raw_writeb((v),(a)); mb(); }) -#define writew(v,a) ({ __raw_writew((v),(a)); mb(); }) -#define writel(v,a) ({ __raw_writel((v),(a)); mb(); }) -#define writeq(v,a) ({ __raw_writeq((v),(a)); mb(); }) +#define writeb_relaxed(v,c) ((void)__raw_writeb((__force u8)ioswabb(v),c)) +#define writew_relaxed(v,c) ((void)__raw_writew((__force u16)ioswabw(v),c)) +#define writel_relaxed(v,c) ((void)__raw_writel((__force u32)ioswabl(v),c)) +#define writeq_relaxed(v,c) ((void)__raw_writeq((__force u64)ioswabq(v),c)) -/* SuperH on-chip I/O functions */ -#define ctrl_inb __raw_readb -#define ctrl_inw __raw_readw -#define ctrl_inl __raw_readl -#define ctrl_inq __raw_readq +#define readb(a) ({ u8 r_ = readb_relaxed(a); rmb(); r_; }) +#define readw(a) ({ u16 r_ = readw_relaxed(a); rmb(); r_; }) +#define readl(a) ({ u32 r_ = readl_relaxed(a); rmb(); r_; }) +#define readq(a) ({ u64 r_ = readq_relaxed(a); rmb(); r_; }) -#define ctrl_outb __raw_writeb -#define ctrl_outw __raw_writew -#define ctrl_outl __raw_writel -#define ctrl_outq __raw_writeq +#define writeb(v,a) ({ wmb(); writeb_relaxed((v),(a)); }) +#define writew(v,a) ({ wmb(); writew_relaxed((v),(a)); }) +#define writel(v,a) ({ wmb(); writel_relaxed((v),(a)); }) +#define writeq(v,a) ({ wmb(); writeq_relaxed((v),(a)); }) -extern unsigned long generic_io_base; +#define readsb(p,d,l) __raw_readsb(p,d,l) +#define readsw(p,d,l) __raw_readsw(p,d,l) +#define readsl(p,d,l) __raw_readsl(p,d,l) -static inline void ctrl_delay(void) -{ - __raw_readw(generic_io_base); +#define writesb(p,d,l) __raw_writesb(p,d,l) +#define writesw(p,d,l) __raw_writesw(p,d,l) +#define writesl(p,d,l) __raw_writesl(p,d,l) + +#define __BUILD_UNCACHED_IO(bwlq, type) \ +static inline type read##bwlq##_uncached(unsigned long addr) \ +{ \ + type ret; \ + jump_to_uncached(); \ + ret = __raw_read##bwlq(addr); \ + back_to_cached(); \ + return ret; \ +} \ + \ +static inline void write##bwlq##_uncached(type v, unsigned long addr) \ +{ \ + jump_to_uncached(); \ + __raw_write##bwlq(v, addr); \ + back_to_cached(); \ } -#define __BUILD_MEMORY_STRING(bwlq, type) \ +__BUILD_UNCACHED_IO(b, u8) +__BUILD_UNCACHED_IO(w, u16) +__BUILD_UNCACHED_IO(l, u32) +__BUILD_UNCACHED_IO(q, u64) + +#define __BUILD_MEMORY_STRING(pfx, bwlq, type) \ \ -static inline void __raw_writes##bwlq(volatile void __iomem *mem, \ - const void *addr, unsigned int count) \ +static inline void \ +pfx##writes##bwlq(volatile void __iomem *mem, const void *addr, \ + unsigned int count) \ { \ const volatile type *__addr = addr; \ \ @@ -110,8 +99,8 @@ static inline void __raw_writes##bwlq(volatile void __iomem *mem, \ } \ } \ \ -static inline void __raw_reads##bwlq(volatile void __iomem *mem, \ - void *addr, unsigned int count) \ +static inline void pfx##reads##bwlq(volatile void __iomem *mem, \ + void *addr, unsigned int count) \ { \ volatile type *__addr = addr; \ \ @@ -121,81 +110,125 @@ static inline void __raw_reads##bwlq(volatile void __iomem *mem, \ } \ } -__BUILD_MEMORY_STRING(b, u8) -__BUILD_MEMORY_STRING(w, u16) +__BUILD_MEMORY_STRING(__raw_, b, u8) +__BUILD_MEMORY_STRING(__raw_, w, u16) #ifdef CONFIG_SUPERH32 void __raw_writesl(void __iomem *addr, const void *data, int longlen); void __raw_readsl(const void __iomem *addr, void *data, int longlen); #else -__BUILD_MEMORY_STRING(l, u32) +__BUILD_MEMORY_STRING(__raw_, l, u32) #endif -__BUILD_MEMORY_STRING(q, u64) - -#define writesb __raw_writesb -#define writesw __raw_writesw -#define writesl __raw_writesl - -#define readsb __raw_readsb -#define readsw __raw_readsw -#define readsl __raw_readsl - -#define readb_relaxed(a) readb(a) -#define readw_relaxed(a) readw(a) -#define readl_relaxed(a) readl(a) -#define readq_relaxed(a) readq(a) - -#ifndef CONFIG_GENERIC_IOMAP -/* Simple MMIO */ -#define ioread8(a) __raw_readb(a) -#define ioread16(a) __raw_readw(a) -#define ioread16be(a) be16_to_cpu(__raw_readw((a))) -#define ioread32(a) __raw_readl(a) -#define ioread32be(a) be32_to_cpu(__raw_readl((a))) - -#define iowrite8(v,a) __raw_writeb((v),(a)) -#define iowrite16(v,a) __raw_writew((v),(a)) -#define iowrite16be(v,a) __raw_writew(cpu_to_be16((v)),(a)) -#define iowrite32(v,a) __raw_writel((v),(a)) -#define iowrite32be(v,a) __raw_writel(cpu_to_be32((v)),(a)) - -#define ioread8_rep(a, d, c) __raw_readsb((a), (d), (c)) -#define ioread16_rep(a, d, c) __raw_readsw((a), (d), (c)) -#define ioread32_rep(a, d, c) __raw_readsl((a), (d), (c)) - -#define iowrite8_rep(a, s, c) __raw_writesb((a), (s), (c)) -#define iowrite16_rep(a, s, c) __raw_writesw((a), (s), (c)) -#define iowrite32_rep(a, s, c) __raw_writesl((a), (s), (c)) -#endif +__BUILD_MEMORY_STRING(__raw_, q, u64) -#define mmio_insb(p,d,c) __raw_readsb(p,d,c) -#define mmio_insw(p,d,c) __raw_readsw(p,d,c) -#define mmio_insl(p,d,c) __raw_readsl(p,d,c) +#ifdef CONFIG_HAS_IOPORT_MAP -#define mmio_outsb(p,s,c) __raw_writesb(p,s,c) -#define mmio_outsw(p,s,c) __raw_writesw(p,s,c) -#define mmio_outsl(p,s,c) __raw_writesl(p,s,c) - -/* synco on SH-4A, otherwise a nop */ -#define mmiowb() wmb() - -#define IO_SPACE_LIMIT 0xffffffff +/* + * Slowdown I/O port space accesses for antique hardware. + */ +#undef CONF_SLOWDOWN_IO /* - * This function provides a method for the generic case where a - * board-specific ioport_map simply needs to return the port + some - * arbitrary port base. - * - * We use this at board setup time to implicitly set the port base, and - * as a result, we can use the generic ioport_map. + * On SuperH I/O ports are memory mapped, so we access them using normal + * load/store instructions. sh_io_port_base is the virtual address to + * which all ports are being mapped. */ +extern unsigned long sh_io_port_base; + static inline void __set_io_port_base(unsigned long pbase) { - generic_io_base = pbase; + *(unsigned long *)&sh_io_port_base = pbase; + barrier(); +} + +#ifdef CONFIG_GENERIC_IOMAP +#define __ioport_map ioport_map +#else +extern void __iomem *__ioport_map(unsigned long addr, unsigned int size); +#endif + +#ifdef CONF_SLOWDOWN_IO +#define SLOW_DOWN_IO __raw_readw(sh_io_port_base) +#else +#define SLOW_DOWN_IO +#endif + +#define __BUILD_IOPORT_SINGLE(pfx, bwlq, type, p, slow) \ + \ +static inline void pfx##out##bwlq##p(type val, unsigned long port) \ +{ \ + volatile type *__addr; \ + \ + __addr = __ioport_map(port, sizeof(type)); \ + *__addr = val; \ + slow; \ +} \ + \ +static inline type pfx##in##bwlq##p(unsigned long port) \ +{ \ + volatile type *__addr; \ + type __val; \ + \ + __addr = __ioport_map(port, sizeof(type)); \ + __val = *__addr; \ + slow; \ + \ + return __val; \ } -#define __ioport_map(p, n) sh_mv.mv_ioport_map((p), (n)) +#define __BUILD_IOPORT_PFX(bus, bwlq, type) \ + __BUILD_IOPORT_SINGLE(bus, bwlq, type, ,) \ + __BUILD_IOPORT_SINGLE(bus, bwlq, type, _p, SLOW_DOWN_IO) + +#define BUILDIO_IOPORT(bwlq, type) \ + __BUILD_IOPORT_PFX(, bwlq, type) + +BUILDIO_IOPORT(b, u8) +BUILDIO_IOPORT(w, u16) +BUILDIO_IOPORT(l, u32) +BUILDIO_IOPORT(q, u64) + +#define __BUILD_IOPORT_STRING(bwlq, type) \ + \ +static inline void outs##bwlq(unsigned long port, const void *addr, \ + unsigned int count) \ +{ \ + const volatile type *__addr = addr; \ + \ + while (count--) { \ + out##bwlq(*__addr, port); \ + __addr++; \ + } \ +} \ + \ +static inline void ins##bwlq(unsigned long port, void *addr, \ + unsigned int count) \ +{ \ + volatile type *__addr = addr; \ + \ + while (count--) { \ + *__addr = in##bwlq(port); \ + __addr++; \ + } \ +} + +__BUILD_IOPORT_STRING(b, u8) +__BUILD_IOPORT_STRING(w, u16) +__BUILD_IOPORT_STRING(l, u32) +__BUILD_IOPORT_STRING(q, u64) + +#else /* !CONFIG_HAS_IOPORT_MAP */ + +#include <asm/io_noioport.h> + +#endif + + +#define IO_SPACE_LIMIT 0xffffffff + +/* synco on SH-4A, otherwise a nop */ +#define mmiowb() wmb() /* We really want to try and get these to memcpy etc */ void memcpy_fromio(void *, const volatile void __iomem *, unsigned long); @@ -233,29 +266,22 @@ unsigned long long poke_real_address_q(unsigned long long addr, * doesn't exist, so everything must go through page tables. */ #ifdef CONFIG_MMU -void __iomem *__ioremap_caller(unsigned long offset, unsigned long size, - unsigned long flags, void *caller); +void __iomem *__ioremap_caller(phys_addr_t offset, unsigned long size, + pgprot_t prot, void *caller); void __iounmap(void __iomem *addr); static inline void __iomem * -__ioremap(unsigned long offset, unsigned long size, unsigned long flags) +__ioremap(phys_addr_t offset, unsigned long size, pgprot_t prot) { - return __ioremap_caller(offset, size, flags, __builtin_return_address(0)); + return __ioremap_caller(offset, size, prot, __builtin_return_address(0)); } static inline void __iomem * -__ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags) +__ioremap_29bit(phys_addr_t offset, unsigned long size, pgprot_t prot) { -#if defined(CONFIG_SUPERH32) && !defined(CONFIG_PMB_FIXED) && !defined(CONFIG_PMB) - unsigned long last_addr = offset + size - 1; -#endif - void __iomem *ret; - - ret = __ioremap_trapped(offset, size); - if (ret) - return ret; +#ifdef CONFIG_29BIT + phys_addr_t last_addr = offset + size - 1; -#if defined(CONFIG_SUPERH32) && !defined(CONFIG_PMB_FIXED) && !defined(CONFIG_PMB) /* * For P1 and P2 space this is trivial, as everything is already * mapped. Uncached access for P1 addresses are done through P2. @@ -263,6 +289,14 @@ __ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags) * mapping must be done by the PMB or by using page tables. */ if (likely(PXSEG(offset) < P3SEG && PXSEG(last_addr) < P3SEG)) { + u64 flags = pgprot_val(prot); + + /* + * Anything using the legacy PTEA space attributes needs + * to be kicked down to page table mappings. + */ + if (unlikely(flags & _PAGE_PCC_MASK)) + return NULL; if (unlikely(flags & _PAGE_CACHABLE)) return (void __iomem *)P1SEGADDR(offset); @@ -274,30 +308,67 @@ __ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags) return (void __iomem *)P4SEGADDR(offset); #endif - return __ioremap(offset, size, flags); + return NULL; +} + +static inline void __iomem * +__ioremap_mode(phys_addr_t offset, unsigned long size, pgprot_t prot) +{ + void __iomem *ret; + + ret = __ioremap_trapped(offset, size); + if (ret) + return ret; + + ret = __ioremap_29bit(offset, size, prot); + if (ret) + return ret; + + return __ioremap(offset, size, prot); } #else -#define __ioremap(offset, size, flags) ((void __iomem *)(offset)) -#define __ioremap_mode(offset, size, flags) ((void __iomem *)(offset)) +#define __ioremap(offset, size, prot) ((void __iomem *)(offset)) +#define __ioremap_mode(offset, size, prot) ((void __iomem *)(offset)) #define __iounmap(addr) do { } while (0) #endif /* CONFIG_MMU */ -#define ioremap(offset, size) \ - __ioremap_mode((offset), (size), 0) -#define ioremap_nocache(offset, size) \ - __ioremap_mode((offset), (size), 0) -#define ioremap_cache(offset, size) \ - __ioremap_mode((offset), (size), _PAGE_CACHABLE) -#define p3_ioremap(offset, size, flags) \ - __ioremap((offset), (size), (flags)) -#define ioremap_prot(offset, size, flags) \ - __ioremap_mode((offset), (size), (flags)) -#define iounmap(addr) \ - __iounmap((addr)) - -#define maybebadio(port) \ - printk(KERN_ERR "bad PC-like io %s:%u for port 0x%lx at 0x%08x\n", \ - __func__, __LINE__, (port), (u32)__builtin_return_address(0)) +static inline void __iomem *ioremap(phys_addr_t offset, unsigned long size) +{ + return __ioremap_mode(offset, size, PAGE_KERNEL_NOCACHE); +} + +static inline void __iomem * +ioremap_cache(phys_addr_t offset, unsigned long size) +{ + return __ioremap_mode(offset, size, PAGE_KERNEL); +} + +#ifdef CONFIG_HAVE_IOREMAP_PROT +static inline void __iomem * +ioremap_prot(phys_addr_t offset, unsigned long size, unsigned long flags) +{ + return __ioremap_mode(offset, size, __pgprot(flags)); +} +#endif + +#ifdef CONFIG_IOREMAP_FIXED +extern void __iomem *ioremap_fixed(phys_addr_t, unsigned long, pgprot_t); +extern int iounmap_fixed(void __iomem *); +extern void ioremap_fixed_init(void); +#else +static inline void __iomem * +ioremap_fixed(phys_addr_t phys_addr, unsigned long size, pgprot_t prot) +{ + BUG(); + return NULL; +} + +static inline void ioremap_fixed_init(void) { } +static inline int iounmap_fixed(void __iomem *addr) { return -EINVAL; } +#endif + +#define ioremap_nocache ioremap +#define iounmap __iounmap /* * Convert a physical pointer to a virtual kernel pointer for /dev/mem @@ -311,7 +382,7 @@ __ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags) #define xlate_dev_kmem_ptr(p) p #define ARCH_HAS_VALID_PHYS_ADDR_RANGE -int valid_phys_addr_range(unsigned long addr, size_t size); +int valid_phys_addr_range(phys_addr_t addr, size_t size); int valid_mmap_phys_addr_range(unsigned long pfn, size_t size); #endif /* __KERNEL__ */ diff --git a/arch/sh/include/asm/io_generic.h b/arch/sh/include/asm/io_generic.h index 1e5d375f55d..b5f6956f19c 100644 --- a/arch/sh/include/asm/io_generic.h +++ b/arch/sh/include/asm/io_generic.h @@ -11,32 +11,8 @@ #error "Don't include this header without a valid system prefix" #endif -u8 IO_CONCAT(__IO_PREFIX,inb)(unsigned long); -u16 IO_CONCAT(__IO_PREFIX,inw)(unsigned long); -u32 IO_CONCAT(__IO_PREFIX,inl)(unsigned long); - -void IO_CONCAT(__IO_PREFIX,outb)(u8, unsigned long); -void IO_CONCAT(__IO_PREFIX,outw)(u16, unsigned long); -void IO_CONCAT(__IO_PREFIX,outl)(u32, unsigned long); - -u8 IO_CONCAT(__IO_PREFIX,inb_p)(unsigned long); -u16 IO_CONCAT(__IO_PREFIX,inw_p)(unsigned long); -u32 IO_CONCAT(__IO_PREFIX,inl_p)(unsigned long); -void IO_CONCAT(__IO_PREFIX,outb_p)(u8, unsigned long); -void IO_CONCAT(__IO_PREFIX,outw_p)(u16, unsigned long); -void IO_CONCAT(__IO_PREFIX,outl_p)(u32, unsigned long); - -void IO_CONCAT(__IO_PREFIX,insb)(unsigned long, void *dst, unsigned long count); -void IO_CONCAT(__IO_PREFIX,insw)(unsigned long, void *dst, unsigned long count); -void IO_CONCAT(__IO_PREFIX,insl)(unsigned long, void *dst, unsigned long count); -void IO_CONCAT(__IO_PREFIX,outsb)(unsigned long, const void *src, unsigned long count); -void IO_CONCAT(__IO_PREFIX,outsw)(unsigned long, const void *src, unsigned long count); -void IO_CONCAT(__IO_PREFIX,outsl)(unsigned long, const void *src, unsigned long count); - -void *IO_CONCAT(__IO_PREFIX,ioremap)(unsigned long offset, unsigned long size); -void IO_CONCAT(__IO_PREFIX,iounmap)(void *addr); - void __iomem *IO_CONCAT(__IO_PREFIX,ioport_map)(unsigned long addr, unsigned int size); void IO_CONCAT(__IO_PREFIX,ioport_unmap)(void __iomem *addr); +void IO_CONCAT(__IO_PREFIX,mem_init)(void); #undef __IO_PREFIX diff --git a/arch/sh/include/asm/io_noioport.h b/arch/sh/include/asm/io_noioport.h new file mode 100644 index 00000000000..4d48f1436a6 --- /dev/null +++ b/arch/sh/include/asm/io_noioport.h @@ -0,0 +1,52 @@ +#ifndef __ASM_SH_IO_NOIOPORT_H +#define __ASM_SH_IO_NOIOPORT_H + +static inline u8 inb(unsigned long addr) +{ + BUG(); + return -1; +} + +static inline u16 inw(unsigned long addr) +{ + BUG(); + return -1; +} + +static inline u32 inl(unsigned long addr) +{ + BUG(); + return -1; +} + +static inline void outb(unsigned char x, unsigned long port) +{ + BUG(); +} + +static inline void outw(unsigned short x, unsigned long port) +{ + BUG(); +} + +static inline void outl(unsigned int x, unsigned long port) +{ + BUG(); +} + +#define inb_p(addr) inb(addr) +#define inw_p(addr) inw(addr) +#define inl_p(addr) inl(addr) +#define outb_p(x, addr) outb((x), (addr)) +#define outw_p(x, addr) outw((x), (addr)) +#define outl_p(x, addr) outl((x), (addr)) + +#define insb(a, b, c) BUG() +#define insw(a, b, c) BUG() +#define insl(a, b, c) BUG() + +#define outsb(a, b, c) BUG() +#define outsw(a, b, c) BUG() +#define outsl(a, b, c) BUG() + +#endif /* __ASM_SH_IO_NOIOPORT_H */ diff --git a/arch/sh/include/asm/io_trapped.h b/arch/sh/include/asm/io_trapped.h index f1251d4f0ba..4ab94ef5107 100644 --- a/arch/sh/include/asm/io_trapped.h +++ b/arch/sh/include/asm/io_trapped.h @@ -36,7 +36,7 @@ __ioremap_trapped(unsigned long offset, unsigned long size) #define __ioremap_trapped(offset, size) NULL #endif -#ifdef CONFIG_HAS_IOPORT +#ifdef CONFIG_HAS_IOPORT_MAP extern struct list_head trapped_io; static inline void __iomem * diff --git a/arch/sh/include/asm/ioctl.h b/arch/sh/include/asm/ioctl.h deleted file mode 100644 index b279fe06dfe..00000000000 --- a/arch/sh/include/asm/ioctl.h +++ /dev/null @@ -1 +0,0 @@ -#include <asm-generic/ioctl.h> diff --git a/arch/sh/include/asm/ipcbuf.h b/arch/sh/include/asm/ipcbuf.h deleted file mode 100644 index 84c7e51cb6d..00000000000 --- a/arch/sh/include/asm/ipcbuf.h +++ /dev/null @@ -1 +0,0 @@ -#include <asm-generic/ipcbuf.h> diff --git a/arch/sh/include/asm/irq.h b/arch/sh/include/asm/irq.h index df8e1500527..0e4f532e473 100644 --- a/arch/sh/include/asm/irq.h +++ b/arch/sh/include/asm/irq.h @@ -1,26 +1,27 @@ #ifndef __ASM_SH_IRQ_H #define __ASM_SH_IRQ_H +#include <linux/cpumask.h> #include <asm/machvec.h> /* - * A sane default based on a reasonable vector table size, platforms are - * advised to cap this at the hard limit that they're interested in - * through the machvec. + * Only legacy non-sparseirq platforms have to set a reasonably sane + * value here. sparseirq platforms allocate their irq_descs on the fly, + * so will expand automatically based on the number of registered IRQs. */ -#define NR_IRQS 256 -#define NR_IRQS_LEGACY 8 /* Legacy external IRQ0-7 */ +#ifdef CONFIG_SPARSE_IRQ +# define NR_IRQS 8 +#else +# define NR_IRQS 512 +#endif /* - * Convert back and forth between INTEVT and IRQ values. + * This is a special IRQ number for indicating that no IRQ has been + * triggered and to simply ignore the IRQ dispatch. This is a special + * case that can happen with IRQ auto-distribution when multiple CPUs + * are woken up and signalled in parallel. */ -#ifdef CONFIG_CPU_HAS_INTEVT -#define evt2irq(evt) (((evt) >> 5) - 16) -#define irq2evt(irq) (((irq) + 16) << 5) -#else -#define evt2irq(evt) (evt) -#define irq2evt(irq) (irq) -#endif +#define NO_IRQ_IGNORE ((unsigned int)-1) /* * Simple Mask Register Support @@ -42,6 +43,8 @@ static inline int generic_irq_demux(int irq) #define irq_demux(irq) sh_mv.mv_irq_demux(irq) void init_IRQ(void); +void migrate_irqs(void); + asmlinkage int do_IRQ(unsigned int irq, struct pt_regs *regs); #ifdef CONFIG_IRQSTACKS @@ -53,6 +56,14 @@ extern void irq_ctx_exit(int cpu); # define irq_ctx_exit(cpu) do { } while (0) #endif +#ifdef CONFIG_INTC_BALANCING +extern unsigned int irq_lookup(unsigned int irq); +extern void irq_finish(unsigned int irq); +#else +#define irq_lookup(irq) (irq) +#define irq_finish(irq) do { } while (0) +#endif + #include <asm-generic/irq.h> #ifdef CONFIG_CPU_SH5 #include <cpu/irq.h> diff --git a/arch/sh/include/asm/irq_regs.h b/arch/sh/include/asm/irq_regs.h deleted file mode 100644 index 3dd9c0b7027..00000000000 --- a/arch/sh/include/asm/irq_regs.h +++ /dev/null @@ -1 +0,0 @@ -#include <asm-generic/irq_regs.h> diff --git a/arch/sh/include/asm/irqflags.h b/arch/sh/include/asm/irqflags.h index a741153b41c..43b7608606c 100644 --- a/arch/sh/include/asm/irqflags.h +++ b/arch/sh/include/asm/irqflags.h @@ -1,8 +1,8 @@ #ifndef __ASM_SH_IRQFLAGS_H #define __ASM_SH_IRQFLAGS_H -#define RAW_IRQ_DISABLED 0xf0 -#define RAW_IRQ_ENABLED 0x00 +#define ARCH_IRQ_DISABLED 0xf0 +#define ARCH_IRQ_ENABLED 0x00 #include <asm-generic/irqflags.h> diff --git a/arch/sh/include/asm/kdebug.h b/arch/sh/include/asm/kdebug.h index 985219f9759..8d6a831e7ba 100644 --- a/arch/sh/include/asm/kdebug.h +++ b/arch/sh/include/asm/kdebug.h @@ -6,6 +6,12 @@ enum die_val { DIE_TRAP, DIE_NMI, DIE_OOPS, + DIE_BREAKPOINT, + DIE_SSTEP, }; +/* arch/sh/kernel/dumpstack.c */ +extern void printk_address(unsigned long address, int reliable); +extern void dump_mem(const char *str, unsigned long bottom, unsigned long top); + #endif /* __ASM_SH_KDEBUG_H */ diff --git a/arch/sh/include/asm/kexec.h b/arch/sh/include/asm/kexec.h index 765a5e1660f..ad6ef8a275e 100644 --- a/arch/sh/include/asm/kexec.h +++ b/arch/sh/include/asm/kexec.h @@ -26,6 +26,10 @@ /* The native architecture */ #define KEXEC_ARCH KEXEC_ARCH_SH +#ifdef CONFIG_KEXEC +/* arch/sh/kernel/machine_kexec.c */ +void reserve_crashkernel(void); + static inline void crash_setup_regs(struct pt_regs *newregs, struct pt_regs *oldregs) { @@ -59,4 +63,8 @@ static inline void crash_setup_regs(struct pt_regs *newregs, newregs->pc = (unsigned long)current_text_addr(); } } +#else +static inline void reserve_crashkernel(void) { } +#endif /* CONFIG_KEXEC */ + #endif /* __ASM_SH_KEXEC_H */ diff --git a/arch/sh/include/asm/kgdb.h b/arch/sh/include/asm/kgdb.h index 4235e228d92..9e7d2d1b03e 100644 --- a/arch/sh/include/asm/kgdb.h +++ b/arch/sh/include/asm/kgdb.h @@ -4,18 +4,6 @@ #include <asm/cacheflush.h> #include <asm/ptrace.h> -/* Same as pt_regs but has vbr in place of syscall_nr */ -struct kgdb_regs { - unsigned long regs[16]; - unsigned long pc; - unsigned long pr; - unsigned long sr; - unsigned long gbr; - unsigned long mach; - unsigned long macl; - unsigned long vbr; -}; - enum regnames { GDB_R0, GDB_R1, GDB_R2, GDB_R3, GDB_R4, GDB_R5, GDB_R6, GDB_R7, GDB_R8, GDB_R9, GDB_R10, GDB_R11, GDB_R12, GDB_R13, GDB_R14, GDB_R15, @@ -23,16 +11,27 @@ enum regnames { GDB_PC, GDB_PR, GDB_SR, GDB_GBR, GDB_MACH, GDB_MACL, GDB_VBR, }; -#define NUMREGBYTES ((GDB_VBR + 1) * 4) +#define _GP_REGS 16 +#define _EXTRA_REGS 7 +#define GDB_SIZEOF_REG sizeof(u32) + +#define DBG_MAX_REG_NUM (_GP_REGS + _EXTRA_REGS) +#define NUMREGBYTES (DBG_MAX_REG_NUM * sizeof(GDB_SIZEOF_REG)) static inline void arch_kgdb_breakpoint(void) { __asm__ __volatile__ ("trapa #0x3c\n"); } -#define BUFMAX 2048 - -#define CACHE_FLUSH_IS_SAFE 1 #define BREAK_INSTR_SIZE 2 +#define BUFMAX 2048 + +#ifdef CONFIG_SMP +# define CACHE_FLUSH_IS_SAFE 0 +#else +# define CACHE_FLUSH_IS_SAFE 1 +#endif + +#define GDB_ADJUSTS_BREAK_OFFSET #endif /* __ASM_SH_KGDB_H */ diff --git a/arch/sh/include/asm/kprobes.h b/arch/sh/include/asm/kprobes.h index 036c3311233..134f3980e44 100644 --- a/arch/sh/include/asm/kprobes.h +++ b/arch/sh/include/asm/kprobes.h @@ -16,7 +16,6 @@ typedef insn_size_t kprobe_opcode_t; ? (MAX_STACK_SIZE) \ : (((unsigned long)current_thread_info()) + THREAD_SIZE - (ADDR))) -#define regs_return_value(_regs) ((_regs)->regs[0]) #define flush_insn_slot(p) do { } while (0) #define kretprobe_blacklist_size 0 diff --git a/arch/sh/include/asm/lmb.h b/arch/sh/include/asm/lmb.h deleted file mode 100644 index 9b437f657ff..00000000000 --- a/arch/sh/include/asm/lmb.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __ASM_SH_LMB_H -#define __ASM_SH_LMB_H - -#define LMB_REAL_LIMIT 0 - -#endif /* __ASM_SH_LMB_H */ diff --git a/arch/sh/include/asm/local.h b/arch/sh/include/asm/local.h deleted file mode 100644 index 9ed9b9cb459..00000000000 --- a/arch/sh/include/asm/local.h +++ /dev/null @@ -1,7 +0,0 @@ -#ifndef __ASM_SH_LOCAL_H -#define __ASM_SH_LOCAL_H - -#include <asm-generic/local.h> - -#endif /* __ASM_SH_LOCAL_H */ - diff --git a/arch/sh/include/asm/machvec.h b/arch/sh/include/asm/machvec.h index 9c30955630f..d3324e4f372 100644 --- a/arch/sh/include/asm/machvec.h +++ b/arch/sh/include/asm/machvec.h @@ -17,38 +17,20 @@ struct sh_machine_vector { void (*mv_setup)(char **cmdline_p); const char *mv_name; - int mv_nr_irqs; - - u8 (*mv_inb)(unsigned long); - u16 (*mv_inw)(unsigned long); - u32 (*mv_inl)(unsigned long); - void (*mv_outb)(u8, unsigned long); - void (*mv_outw)(u16, unsigned long); - void (*mv_outl)(u32, unsigned long); - - u8 (*mv_inb_p)(unsigned long); - u16 (*mv_inw_p)(unsigned long); - u32 (*mv_inl_p)(unsigned long); - void (*mv_outb_p)(u8, unsigned long); - void (*mv_outw_p)(u16, unsigned long); - void (*mv_outl_p)(u32, unsigned long); - - void (*mv_insb)(unsigned long, void *dst, unsigned long count); - void (*mv_insw)(unsigned long, void *dst, unsigned long count); - void (*mv_insl)(unsigned long, void *dst, unsigned long count); - void (*mv_outsb)(unsigned long, const void *src, unsigned long count); - void (*mv_outsw)(unsigned long, const void *src, unsigned long count); - void (*mv_outsl)(unsigned long, const void *src, unsigned long count); int (*mv_irq_demux)(int irq); - void (*mv_init_irq)(void); +#ifdef CONFIG_HAS_IOPORT_MAP void __iomem *(*mv_ioport_map)(unsigned long port, unsigned int size); void (*mv_ioport_unmap)(void __iomem *); +#endif int (*mv_clk_init)(void); int (*mv_mode_pins)(void); + + void (*mv_mem_init)(void); + void (*mv_mem_reserve)(void); }; extern struct sh_machine_vector sh_mv; diff --git a/arch/sh/include/asm/mman.h b/arch/sh/include/asm/mman.h deleted file mode 100644 index 8eebf89f5ab..00000000000 --- a/arch/sh/include/asm/mman.h +++ /dev/null @@ -1 +0,0 @@ -#include <asm-generic/mman.h> diff --git a/arch/sh/include/asm/mmu.h b/arch/sh/include/asm/mmu.h index c7426ad9926..56e4418c19b 100644 --- a/arch/sh/include/asm/mmu.h +++ b/arch/sh/include/asm/mmu.h @@ -11,7 +11,9 @@ #define PMB_ADDR 0xf6100000 #define PMB_DATA 0xf7100000 -#define PMB_ENTRY_MAX 16 + +#define NR_PMB_ENTRIES 16 + #define PMB_E_MASK 0x0000000f #define PMB_E_SHIFT 8 @@ -25,11 +27,15 @@ #define PMB_C 0x00000008 #define PMB_WT 0x00000001 #define PMB_UB 0x00000200 +#define PMB_CACHE_MASK (PMB_C | PMB_WT | PMB_UB) #define PMB_V 0x00000100 #define PMB_NO_ENTRY (-1) #ifndef __ASSEMBLY__ +#include <linux/errno.h> +#include <linux/threads.h> +#include <asm/page.h> /* Default "unsigned long" context */ typedef unsigned long mm_context_id_t[NR_CPUS]; @@ -47,29 +53,54 @@ typedef struct { #endif } mm_context_t; -struct pmb_entry; +#ifdef CONFIG_PMB +/* arch/sh/mm/pmb.c */ +bool __in_29bit_mode(void); -struct pmb_entry { - unsigned long vpn; - unsigned long ppn; - unsigned long flags; +void pmb_init(void); +int pmb_bolt_mapping(unsigned long virt, phys_addr_t phys, + unsigned long size, pgprot_t prot); +void __iomem *pmb_remap_caller(phys_addr_t phys, unsigned long size, + pgprot_t prot, void *caller); +int pmb_unmap(void __iomem *addr); - /* - * 0 .. NR_PMB_ENTRIES for specific entry selection, or - * PMB_NO_ENTRY to search for a free one - */ - int entry; +#else - struct pmb_entry *next; - /* Adjacent entry link for contiguous multi-entry mappings */ - struct pmb_entry *link; -}; +static inline int +pmb_bolt_mapping(unsigned long virt, phys_addr_t phys, + unsigned long size, pgprot_t prot) +{ + return -EINVAL; +} + +static inline void __iomem * +pmb_remap_caller(phys_addr_t phys, unsigned long size, + pgprot_t prot, void *caller) +{ + return NULL; +} + +static inline int pmb_unmap(void __iomem *addr) +{ + return -EINVAL; +} + +#define pmb_init(addr) do { } while (0) + +#ifdef CONFIG_29BIT +#define __in_29bit_mode() (1) +#else +#define __in_29bit_mode() (0) +#endif + +#endif /* CONFIG_PMB */ + +static inline void __iomem * +pmb_remap(phys_addr_t phys, unsigned long size, pgprot_t prot) +{ + return pmb_remap_caller(phys, size, prot, __builtin_return_address(0)); +} -/* arch/sh/mm/pmb.c */ -long pmb_remap(unsigned long virt, unsigned long phys, - unsigned long size, unsigned long flags); -void pmb_unmap(unsigned long addr); -int pmb_init(void); #endif /* __ASSEMBLY__ */ #endif /* __MMU_H */ diff --git a/arch/sh/include/asm/mmu_context.h b/arch/sh/include/asm/mmu_context.h index 41080b173a7..b9d9489a501 100644 --- a/arch/sh/include/asm/mmu_context.h +++ b/arch/sh/include/asm/mmu_context.h @@ -46,9 +46,9 @@ #define MMU_VPN_MASK 0xfffff000 #if defined(CONFIG_SUPERH32) -#include "mmu_context_32.h" +#include <asm/mmu_context_32.h> #else -#include "mmu_context_64.h" +#include <asm/mmu_context_64.h> #endif /* @@ -81,7 +81,7 @@ static inline void get_mmu_context(struct mm_struct *mm, unsigned int cpu) /* * Fix version; Note that we avoid version #0 - * to distingush NO_CONTEXT. + * to distinguish NO_CONTEXT. */ if (!asid) asid = MMU_CONTEXT_FIRST_VERSION; @@ -158,7 +158,7 @@ static inline void enable_mmu(void) unsigned int cpu = smp_processor_id(); /* Enable MMU */ - ctrl_outl(MMU_CONTROL_INIT, MMUCR); + __raw_writel(MMU_CONTROL_INIT, MMUCR); ctrl_barrier(); if (asid_cache(cpu) == NO_CONTEXT) @@ -171,9 +171,9 @@ static inline void disable_mmu(void) { unsigned long cr; - cr = ctrl_inl(MMUCR); + cr = __raw_readl(MMUCR); cr &= ~MMU_CONTROL_INIT; - ctrl_outl(cr, MMUCR); + __raw_writel(cr, MMUCR); ctrl_barrier(); } diff --git a/arch/sh/include/asm/mmu_context_32.h b/arch/sh/include/asm/mmu_context_32.h index 8ef800c549a..10e2e17210d 100644 --- a/arch/sh/include/asm/mmu_context_32.h +++ b/arch/sh/include/asm/mmu_context_32.h @@ -49,11 +49,11 @@ static inline unsigned long get_asid(void) /* MMU_TTB is used for optimizing the fault handling. */ static inline void set_TTB(pgd_t *pgd) { - ctrl_outl((unsigned long)pgd, MMU_TTB); + __raw_writel((unsigned long)pgd, MMU_TTB); } static inline pgd_t *get_TTB(void) { - return (pgd_t *)ctrl_inl(MMU_TTB); + return (pgd_t *)__raw_readl(MMU_TTB); } #endif /* __ASM_SH_MMU_CONTEXT_32_H */ diff --git a/arch/sh/include/asm/mmzone.h b/arch/sh/include/asm/mmzone.h index 7f5363b29ba..15a8496960e 100644 --- a/arch/sh/include/asm/mmzone.h +++ b/arch/sh/include/asm/mmzone.h @@ -9,10 +9,6 @@ extern struct pglist_data *node_data[]; #define NODE_DATA(nid) (node_data[nid]) -#define node_start_pfn(nid) (NODE_DATA(nid)->node_start_pfn) -#define node_end_pfn(nid) (NODE_DATA(nid)->node_start_pfn + \ - NODE_DATA(nid)->node_spanned_pages) - static inline int pfn_to_nid(unsigned long pfn) { int nid; @@ -42,9 +38,10 @@ setup_bootmem_node(int nid, unsigned long start, unsigned long end) void __init plat_mem_setup(void); /* arch/sh/kernel/setup.c */ -void __init setup_bootmem_allocator(unsigned long start_pfn); void __init __add_active_range(unsigned int nid, unsigned long start_pfn, unsigned long end_pfn); +/* arch/sh/mm/init.c */ +void __init allocate_pgdat(unsigned int nid); #endif /* __KERNEL__ */ #endif /* __ASM_SH_MMZONE_H */ diff --git a/arch/sh/include/asm/module.h b/arch/sh/include/asm/module.h index 068bf165975..81300d8b544 100644 --- a/arch/sh/include/asm/module.h +++ b/arch/sh/include/asm/module.h @@ -3,6 +3,13 @@ #include <asm-generic/module.h> +#ifdef CONFIG_DWARF_UNWINDER +struct mod_arch_specific { + struct list_head fde_list; + struct list_head cie_list; +}; +#endif + #ifdef CONFIG_CPU_LITTLE_ENDIAN # ifdef CONFIG_CPU_SH2 # define MODULE_PROC_FAMILY "SH2LE " diff --git a/arch/sh/include/asm/msgbuf.h b/arch/sh/include/asm/msgbuf.h deleted file mode 100644 index 809134c644a..00000000000 --- a/arch/sh/include/asm/msgbuf.h +++ /dev/null @@ -1 +0,0 @@ -#include <asm-generic/msgbuf.h> diff --git a/arch/sh/include/asm/mutex-llsc.h b/arch/sh/include/asm/mutex-llsc.h index 090358a7e1b..dad29b687bd 100644 --- a/arch/sh/include/asm/mutex-llsc.h +++ b/arch/sh/include/asm/mutex-llsc.h @@ -37,7 +37,7 @@ __mutex_fastpath_lock(atomic_t *count, void (*fail_fn)(atomic_t *)) } static inline int -__mutex_fastpath_lock_retval(atomic_t *count, int (*fail_fn)(atomic_t *)) +__mutex_fastpath_lock_retval(atomic_t *count) { int __done, __res; @@ -51,7 +51,7 @@ __mutex_fastpath_lock_retval(atomic_t *count, int (*fail_fn)(atomic_t *)) : "t"); if (unlikely(!__done || __res != 0)) - __res = fail_fn(count); + __res = -1; return __res; } diff --git a/arch/sh/include/asm/page.h b/arch/sh/include/asm/page.h index 81bffc0d686..15d970328f7 100644 --- a/arch/sh/include/asm/page.h +++ b/arch/sh/include/asm/page.h @@ -45,10 +45,11 @@ #endif #ifndef __ASSEMBLY__ +#include <asm/uncached.h> extern unsigned long shm_align_mask; extern unsigned long max_low_pfn, min_low_pfn; -extern unsigned long memory_start, memory_end; +extern unsigned long memory_start, memory_end, memory_limit; static inline unsigned long pages_do_alias(unsigned long addr1, unsigned long addr2) @@ -56,7 +57,6 @@ pages_do_alias(unsigned long addr1, unsigned long addr2) return (addr1 ^ addr2) & shm_align_mask; } - #define clear_page(page) memset((void *)(page), 0, PAGE_SIZE) extern void copy_page(void *to, void *from); @@ -88,7 +88,7 @@ typedef struct { unsigned long pgd; } pgd_t; #define __pte(x) ((pte_t) { (x) } ) #else typedef struct { unsigned long long pte_low; } pte_t; -typedef struct { unsigned long pgprot; } pgprot_t; +typedef struct { unsigned long long pgprot; } pgprot_t; typedef struct { unsigned long pgd; } pgd_t; #define pte_val(x) ((x).pte_low) #define __pte(x) ((pte_t) { (x) } ) @@ -113,6 +113,16 @@ typedef struct page *pgtable_t; #define __MEMORY_SIZE CONFIG_MEMORY_SIZE /* + * PHYSICAL_OFFSET is the offset in physical memory where the base + * of the kernel is loaded. + */ +#ifdef CONFIG_PHYSICAL_START +#define PHYSICAL_OFFSET (CONFIG_PHYSICAL_START - __MEMORY_START) +#else +#define PHYSICAL_OFFSET 0 +#endif + +/* * PAGE_OFFSET is the virtual address of the start of kernel address * space. */ @@ -127,17 +137,30 @@ typedef struct page *pgtable_t; * is not visible (it is part of the PMB mapping) and so needs to be * added or subtracted as required. */ -#if defined(CONFIG_PMB_FIXED) -/* phys = virt - PAGE_OFFSET - (__MEMORY_START & 0xe0000000) */ -#define PMB_OFFSET (PAGE_OFFSET - PXSEG(__MEMORY_START)) -#define __pa(x) ((unsigned long)(x) - PMB_OFFSET) -#define __va(x) ((void *)((unsigned long)(x) + PMB_OFFSET)) -#elif defined(CONFIG_32BIT) -#define __pa(x) ((unsigned long)(x)-PAGE_OFFSET+__MEMORY_START) -#define __va(x) ((void *)((unsigned long)(x)+PAGE_OFFSET-__MEMORY_START)) +#ifdef CONFIG_PMB +#define ___pa(x) ((x)-PAGE_OFFSET+__MEMORY_START) +#define ___va(x) ((x)+PAGE_OFFSET-__MEMORY_START) +#else +#define ___pa(x) ((x)-PAGE_OFFSET) +#define ___va(x) ((x)+PAGE_OFFSET) +#endif + +#ifndef __ASSEMBLY__ +#define __pa(x) ___pa((unsigned long)x) +#define __va(x) (void *)___va((unsigned long)x) +#endif /* !__ASSEMBLY__ */ + +#ifdef CONFIG_UNCACHED_MAPPING +#if defined(CONFIG_29BIT) +#define UNCAC_ADDR(addr) P2SEGADDR(addr) +#define CAC_ADDR(addr) P1SEGADDR(addr) +#else +#define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + uncached_start) +#define CAC_ADDR(addr) ((addr) - uncached_start + PAGE_OFFSET) +#endif #else -#define __pa(x) ((unsigned long)(x)-PAGE_OFFSET) -#define __va(x) ((void *)((unsigned long)(x)+PAGE_OFFSET)) +#define UNCAC_ADDR(addr) ((addr)) +#define CAC_ADDR(addr) ((addr)) #endif #define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) @@ -172,13 +195,13 @@ typedef struct page *pgtable_t; * Some drivers need to perform DMA into kmalloc'ed buffers * and so we have to increase the kmalloc minalign for this. */ -#define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES +#define ARCH_DMA_MINALIGN L1_CACHE_BYTES #ifdef CONFIG_SUPERH64 /* * While BYTES_PER_WORD == 4 on the current sh64 ABI, GCC will still * happily generate {ld/st}.q pairs, requiring us to have 8-byte - * alignment to avoid traps. The kmalloc alignment is gauranteed by + * alignment to avoid traps. The kmalloc alignment is guaranteed by * virtue of L1_CACHE_BYTES, requiring this to only be special cased * for slab caches. */ diff --git a/arch/sh/include/asm/param.h b/arch/sh/include/asm/param.h deleted file mode 100644 index 965d4542797..00000000000 --- a/arch/sh/include/asm/param.h +++ /dev/null @@ -1 +0,0 @@ -#include <asm-generic/param.h> diff --git a/arch/sh/include/asm/parport.h b/arch/sh/include/asm/parport.h deleted file mode 100644 index cf252af6459..00000000000 --- a/arch/sh/include/asm/parport.h +++ /dev/null @@ -1 +0,0 @@ -#include <asm-generic/parport.h> diff --git a/arch/sh/include/asm/pci.h b/arch/sh/include/asm/pci.h index 67f3999b544..5b451155299 100644 --- a/arch/sh/include/asm/pci.h +++ b/arch/sh/include/asm/pci.h @@ -15,20 +15,51 @@ */ struct pci_channel { struct pci_channel *next; + struct pci_bus *bus; struct pci_ops *pci_ops; - struct resource *io_resource; - struct resource *mem_resource; + + struct resource *resources; + unsigned int nr_resources; unsigned long io_offset; unsigned long mem_offset; unsigned long reg_base; - unsigned long io_map_base; + + unsigned int index; + unsigned int need_domain_info; + + /* Optional error handling */ + struct timer_list err_timer, serr_timer; + unsigned int err_irq, serr_irq; }; -extern void register_pci_controller(struct pci_channel *hose); +/* arch/sh/drivers/pci/pci.c */ +extern raw_spinlock_t pci_config_lock; + +extern int register_pci_controller(struct pci_channel *hose); +extern void pcibios_report_status(unsigned int status_mask, int warn); + +/* arch/sh/drivers/pci/common.c */ +extern int early_read_config_byte(struct pci_channel *hose, int top_bus, + int bus, int devfn, int offset, u8 *value); +extern int early_read_config_word(struct pci_channel *hose, int top_bus, + int bus, int devfn, int offset, u16 *value); +extern int early_read_config_dword(struct pci_channel *hose, int top_bus, + int bus, int devfn, int offset, u32 *value); +extern int early_write_config_byte(struct pci_channel *hose, int top_bus, + int bus, int devfn, int offset, u8 value); +extern int early_write_config_word(struct pci_channel *hose, int top_bus, + int bus, int devfn, int offset, u16 value); +extern int early_write_config_dword(struct pci_channel *hose, int top_bus, + int bus, int devfn, int offset, u32 value); +extern void pcibios_enable_timers(struct pci_channel *hose); +extern unsigned int pcibios_handle_status_errors(unsigned long addr, + unsigned int status, struct pci_channel *hose); +extern int pci_is_66mhz_capable(struct pci_channel *hose, + int top_bus, int current_bus); extern unsigned long PCIBIOS_MIN_IO, PCIBIOS_MIN_MEM; @@ -39,11 +70,6 @@ extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, enum pci_mmap_state mmap_state, int write_combine); extern void pcibios_set_master(struct pci_dev *dev); -static inline void pcibios_penalize_isa_irq(int irq, int active) -{ - /* We don't do dynamic PCI IRQ allocation */ -} - /* Dynamic DMA mapping stuff. * SuperH has everything mapped statically like x86. */ @@ -54,25 +80,6 @@ static inline void pcibios_penalize_isa_irq(int irq, int active) */ #define PCI_DMA_BUS_IS_PHYS (dma_ops->is_phys) -/* pci_unmap_{single,page} being a nop depends upon the - * configuration. - */ -#ifdef CONFIG_DMA_NONCOHERENT -#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME; -#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME; -#define pci_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME) -#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL)) -#define pci_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME) -#define pci_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL)) -#else -#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) -#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) -#define pci_unmap_addr(PTR, ADDR_NAME) (0) -#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0) -#define pci_unmap_len(PTR, LEN_NAME) (0) -#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) -#endif - #ifdef CONFIG_PCI /* * None of the SH PCI controllers support MWI, it is always treated as a @@ -99,28 +106,16 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev, } #endif -#ifdef CONFIG_SUPERH32 -/* - * If we're on an SH7751 or SH7780 PCI controller, PCI memory is mapped - * at the end of the address space in a special non-translatable area. - */ -#define PCI_MEM_FIXED_START 0xfd000000 -#define PCI_MEM_FIXED_END (PCI_MEM_FIXED_START + 0x01000000) - -#define is_pci_memory_fixed_range(s, e) \ - ((s) >= PCI_MEM_FIXED_START && (e) < PCI_MEM_FIXED_END) -#else -#define is_pci_memory_fixed_range(s, e) (0) -#endif - /* Board-specific fixup routines. */ -int pcibios_map_platform_irq(struct pci_dev *dev, u8 slot, u8 pin); +int pcibios_map_platform_irq(const struct pci_dev *dev, u8 slot, u8 pin); -extern void pcibios_resource_to_bus(struct pci_dev *dev, - struct pci_bus_region *region, struct resource *res); +#define pci_domain_nr(bus) ((struct pci_channel *)(bus)->sysdata)->index -extern void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res, - struct pci_bus_region *region); +static inline int pci_proc_domain(struct pci_bus *bus) +{ + struct pci_channel *hose = bus->sysdata; + return hose->need_domain_info; +} /* Chances are this interrupt is wired PC-style ... */ static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) diff --git a/arch/sh/include/asm/percpu.h b/arch/sh/include/asm/percpu.h deleted file mode 100644 index 4db4b39a439..00000000000 --- a/arch/sh/include/asm/percpu.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __ARCH_SH_PERCPU -#define __ARCH_SH_PERCPU - -#include <asm-generic/percpu.h> - -#endif /* __ARCH_SH_PERCPU */ diff --git a/arch/sh/include/asm/perf_event.h b/arch/sh/include/asm/perf_event.h index 3d0c9f36d15..14308bed7ea 100644 --- a/arch/sh/include/asm/perf_event.h +++ b/arch/sh/include/asm/perf_event.h @@ -26,11 +26,4 @@ extern int register_sh_pmu(struct sh_pmu *); extern int reserve_pmc_hardware(void); extern void release_pmc_hardware(void); -static inline void set_perf_event_pending(void) -{ - /* Nothing to see here, move along. */ -} - -#define PERF_EVENT_INDEX_OFFSET 0 - #endif /* __ASM_SH_PERF_EVENT_H */ diff --git a/arch/sh/include/asm/pgalloc.h b/arch/sh/include/asm/pgalloc.h index 63ca37bd9a9..a33673b3687 100644 --- a/arch/sh/include/asm/pgalloc.h +++ b/arch/sh/include/asm/pgalloc.h @@ -4,8 +4,16 @@ #include <linux/quicklist.h> #include <asm/page.h> -#define QUICK_PGD 0 /* We preserve special mappings over free */ -#define QUICK_PT 1 /* Other page table pages that are zero on free */ +#define QUICK_PT 0 /* Other page table pages that are zero on free */ + +extern pgd_t *pgd_alloc(struct mm_struct *); +extern void pgd_free(struct mm_struct *mm, pgd_t *pgd); + +#if PAGETABLE_LEVELS > 2 +extern void pud_populate(struct mm_struct *mm, pud_t *pudp, pmd_t *pmd); +extern pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address); +extern void pmd_free(struct mm_struct *mm, pmd_t *pmd); +#endif static inline void pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmd, pte_t *pte) @@ -20,28 +28,9 @@ static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd, } #define pmd_pgtable(pmd) pmd_page(pmd) -static inline void pgd_ctor(void *x) -{ - pgd_t *pgd = x; - - memcpy(pgd + USER_PTRS_PER_PGD, - swapper_pg_dir + USER_PTRS_PER_PGD, - (PTRS_PER_PGD - USER_PTRS_PER_PGD) * sizeof(pgd_t)); -} - /* * Allocate and free page tables. */ -static inline pgd_t *pgd_alloc(struct mm_struct *mm) -{ - return quicklist_alloc(QUICK_PGD, GFP_KERNEL | __GFP_REPEAT, pgd_ctor); -} - -static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd) -{ - quicklist_free(QUICK_PGD, NULL, pgd); -} - static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address) { @@ -58,7 +47,10 @@ static inline pgtable_t pte_alloc_one(struct mm_struct *mm, if (!pg) return NULL; page = virt_to_page(pg); - pgtable_page_ctor(page); + if (!pgtable_page_ctor(page)) { + quicklist_free(QUICK_PT, NULL, pg); + return NULL; + } return page; } @@ -81,7 +73,6 @@ do { \ static inline void check_pgt_cache(void) { - quicklist_trim(QUICK_PGD, NULL, 25, 16); quicklist_trim(QUICK_PT, NULL, 25, 16); } diff --git a/arch/sh/include/asm/pgtable-2level.h b/arch/sh/include/asm/pgtable-2level.h new file mode 100644 index 00000000000..19bd89db17e --- /dev/null +++ b/arch/sh/include/asm/pgtable-2level.h @@ -0,0 +1,23 @@ +#ifndef __ASM_SH_PGTABLE_2LEVEL_H +#define __ASM_SH_PGTABLE_2LEVEL_H + +#include <asm-generic/pgtable-nopmd.h> + +/* + * traditional two-level paging structure + */ +#define PAGETABLE_LEVELS 2 + +/* PTE bits */ +#define PTE_MAGNITUDE 2 /* 32-bit PTEs */ + +#define PTE_SHIFT PAGE_SHIFT +#define PTE_BITS (PTE_SHIFT - PTE_MAGNITUDE) + +/* PGD bits */ +#define PGDIR_SHIFT (PTE_SHIFT + PTE_BITS) + +#define PTRS_PER_PGD (PAGE_SIZE / (1 << PTE_MAGNITUDE)) +#define USER_PTRS_PER_PGD (TASK_SIZE/PGDIR_SIZE) + +#endif /* __ASM_SH_PGTABLE_2LEVEL_H */ diff --git a/arch/sh/include/asm/pgtable-3level.h b/arch/sh/include/asm/pgtable-3level.h new file mode 100644 index 00000000000..249a985d964 --- /dev/null +++ b/arch/sh/include/asm/pgtable-3level.h @@ -0,0 +1,56 @@ +#ifndef __ASM_SH_PGTABLE_3LEVEL_H +#define __ASM_SH_PGTABLE_3LEVEL_H + +#include <asm-generic/pgtable-nopud.h> + +/* + * Some cores need a 3-level page table layout, for example when using + * 64-bit PTEs and 4K pages. + */ +#define PAGETABLE_LEVELS 3 + +#define PTE_MAGNITUDE 3 /* 64-bit PTEs on SH-X2 TLB */ + +/* PGD bits */ +#define PGDIR_SHIFT 30 + +#define PTRS_PER_PGD 4 +#define USER_PTRS_PER_PGD 2 + +/* PMD bits */ +#define PMD_SHIFT (PAGE_SHIFT + (PAGE_SHIFT - PTE_MAGNITUDE)) +#define PMD_SIZE (1UL << PMD_SHIFT) +#define PMD_MASK (~(PMD_SIZE-1)) + +#define PTRS_PER_PMD ((1 << PGDIR_SHIFT) / PMD_SIZE) + +#define pmd_ERROR(e) \ + printk("%s:%d: bad pmd %016llx.\n", __FILE__, __LINE__, pmd_val(e)) + +typedef struct { unsigned long long pmd; } pmd_t; +#define pmd_val(x) ((x).pmd) +#define __pmd(x) ((pmd_t) { (x) } ) + +static inline unsigned long pud_page_vaddr(pud_t pud) +{ + return pud_val(pud); +} + +#define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1)) +static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address) +{ + return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(address); +} + +#define pud_none(x) (!pud_val(x)) +#define pud_present(x) (pud_val(x)) +#define pud_clear(xp) do { set_pud(xp, __pud(0)); } while (0) +#define pud_bad(x) (pud_val(x) & ~PAGE_MASK) + +/* + * (puds are folded into pgds so this doesn't get actually called, + * but the define is needed for a generic inline function.) + */ +#define set_pud(pudptr, pudval) do { *(pudptr) = (pudval); } while(0) + +#endif /* __ASM_SH_PGTABLE_3LEVEL_H */ diff --git a/arch/sh/include/asm/pgtable.h b/arch/sh/include/asm/pgtable.h index ba3046e4f06..cf434c64408 100644 --- a/arch/sh/include/asm/pgtable.h +++ b/arch/sh/include/asm/pgtable.h @@ -12,8 +12,13 @@ #ifndef __ASM_SH_PGTABLE_H #define __ASM_SH_PGTABLE_H -#include <asm-generic/pgtable-nopmd.h> +#ifdef CONFIG_X2TLB +#include <asm/pgtable-3level.h> +#else +#include <asm/pgtable-2level.h> +#endif #include <asm/page.h> +#include <asm/mmu.h> #ifndef __ASSEMBLY__ #include <asm/addrspace.h> @@ -51,34 +56,17 @@ static inline unsigned long long neff_sign_extend(unsigned long val) #define NPHYS_SIGN (1LL << (NPHYS - 1)) #define NPHYS_MASK (-1LL << NPHYS) -/* - * traditional two-level paging structure - */ -/* PTE bits */ -#if defined(CONFIG_X2TLB) || defined(CONFIG_SUPERH64) -# define PTE_MAGNITUDE 3 /* 64-bit PTEs on extended mode SH-X2 TLB */ -#else -# define PTE_MAGNITUDE 2 /* 32-bit PTEs */ -#endif -#define PTE_SHIFT PAGE_SHIFT -#define PTE_BITS (PTE_SHIFT - PTE_MAGNITUDE) - -/* PGD bits */ -#define PGDIR_SHIFT (PTE_SHIFT + PTE_BITS) #define PGDIR_SIZE (1UL << PGDIR_SHIFT) #define PGDIR_MASK (~(PGDIR_SIZE-1)) /* Entries per level */ #define PTRS_PER_PTE (PAGE_SIZE / (1 << PTE_MAGNITUDE)) -#define PTRS_PER_PGD (PAGE_SIZE / sizeof(pgd_t)) -#define USER_PTRS_PER_PGD (TASK_SIZE/PGDIR_SIZE) #define FIRST_USER_ADDRESS 0 #define PHYS_ADDR_MASK29 0x1fffffff #define PHYS_ADDR_MASK32 0xffffffff -#ifdef CONFIG_PMB static inline unsigned long phys_addr_mask(void) { /* Is the MMU in 29bit mode? */ @@ -87,17 +75,6 @@ static inline unsigned long phys_addr_mask(void) return PHYS_ADDR_MASK32; } -#elif defined(CONFIG_32BIT) -static inline unsigned long phys_addr_mask(void) -{ - return PHYS_ADDR_MASK32; -} -#else -static inline unsigned long phys_addr_mask(void) -{ - return PHYS_ADDR_MASK29; -} -#endif #define PTE_PHYS_MASK (phys_addr_mask() & PAGE_MASK) #define PTE_FLAGS_MASK (~(PTE_PHYS_MASK) << PAGE_SHIFT) @@ -147,17 +124,15 @@ typedef pte_t *pte_addr_t; #define kern_addr_valid(addr) (1) -#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \ - remap_pfn_range(vma, vaddr, pfn, size, prot) - #define pte_pfn(x) ((unsigned long)(((x).pte_low >> PAGE_SHIFT))) /* - * No page table caches to initialise + * Initialise the page table caches */ -#define pgtable_cache_init() do { } while (0) +extern void pgtable_cache_init(void); struct vm_area_struct; +struct mm_struct; extern void __update_cache(struct vm_area_struct *vma, unsigned long address, pte_t pte); @@ -165,8 +140,9 @@ extern void __update_tlb(struct vm_area_struct *vma, unsigned long address, pte_t pte); static inline void -update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t pte) +update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t *ptep) { + pte_t pte = *ptep; __update_cache(vma, address, pte); __update_tlb(vma, address, pte); } @@ -180,6 +156,8 @@ extern void page_table_range_init(unsigned long start, unsigned long end, #define HAVE_ARCH_UNMAPPED_AREA #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN +#define __HAVE_ARCH_PTE_SPECIAL + #include <asm-generic/pgtable.h> #endif /* __ASM_SH_PGTABLE_H */ diff --git a/arch/sh/include/asm/pgtable_32.h b/arch/sh/include/asm/pgtable_32.h index 5003ee86f67..0bce3d81569 100644 --- a/arch/sh/include/asm/pgtable_32.h +++ b/arch/sh/include/asm/pgtable_32.h @@ -71,9 +71,15 @@ #define _PAGE_EXT_KERN_WRITE 0x1000 /* EPR4-bit: Kernel space writable */ #define _PAGE_EXT_KERN_READ 0x2000 /* EPR5-bit: Kernel space readable */ +#define _PAGE_EXT_WIRED 0x4000 /* software: Wire TLB entry */ + /* Wrapper for extended mode pgprot twiddling */ #define _PAGE_EXT(x) ((unsigned long long)(x) << 32) +#ifdef CONFIG_X2TLB +#define _PAGE_PCC_MASK 0x00000000 /* No legacy PTEA support */ +#else + /* software: moves to PTEA.TC (Timing Control) */ #define _PAGE_PCC_AREA5 0x00000000 /* use BSC registers for area5 */ #define _PAGE_PCC_AREA6 0x80000000 /* use BSC registers for area6 */ @@ -87,7 +93,8 @@ #define _PAGE_PCC_ATR8 0x60000000 /* Attribute Memory space, 8 bit bus */ #define _PAGE_PCC_ATR16 0x60000001 /* Attribute Memory space, 6 bit bus */ -#ifndef CONFIG_X2TLB +#define _PAGE_PCC_MASK 0xe0000001 + /* copy the ptea attributes */ static inline unsigned long copy_ptea_attributes(unsigned long x) { @@ -141,12 +148,14 @@ static inline unsigned long copy_ptea_attributes(unsigned long x) # elif defined(CONFIG_HUGETLB_PAGE_SIZE_64MB) # define _PAGE_SZHUGE (_PAGE_EXT_ESZ2 | _PAGE_EXT_ESZ3) # endif +# define _PAGE_WIRED (_PAGE_EXT(_PAGE_EXT_WIRED)) #else # if defined(CONFIG_HUGETLB_PAGE_SIZE_64K) # define _PAGE_SZHUGE (_PAGE_SZ1) # elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB) # define _PAGE_SZHUGE (_PAGE_SZ0 | _PAGE_SZ1) # endif +# define _PAGE_WIRED (0) #endif /* @@ -158,7 +167,7 @@ static inline unsigned long copy_ptea_attributes(unsigned long x) #endif /* - * Mask of bits that are to be preserved accross pgprot changes. + * Mask of bits that are to be preserved across pgprot changes. */ #define _PAGE_CHG_MASK \ (PTE_MASK | _PAGE_ACCESSED | _PAGE_CACHABLE | \ @@ -227,13 +236,7 @@ static inline unsigned long copy_ptea_attributes(unsigned long x) _PAGE_EXT_KERN_EXEC)) #define PAGE_KERNEL_PCC(slot, type) \ - __pgprot(_PAGE_PRESENT | _PAGE_DIRTY | \ - _PAGE_ACCESSED | _PAGE_FLAGS_HARD | \ - _PAGE_EXT(_PAGE_EXT_KERN_READ | \ - _PAGE_EXT_KERN_WRITE | \ - _PAGE_EXT_KERN_EXEC) \ - (slot ? _PAGE_PCC_AREA5 : _PAGE_PCC_AREA6) | \ - (type)) + __pgprot(0) #elif defined(CONFIG_MMU) /* SH-X TLB */ #define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_CACHABLE | \ @@ -374,8 +377,6 @@ PTE_BIT_FUNC(low, mkold, &= ~_PAGE_ACCESSED); PTE_BIT_FUNC(low, mkyoung, |= _PAGE_ACCESSED); PTE_BIT_FUNC(low, mkspecial, |= _PAGE_SPECIAL); -#define __HAVE_ARCH_PTE_SPECIAL - /* * Macro and implementation to make a page protection as uncachable. */ @@ -425,10 +426,7 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) #define pte_offset_kernel(dir, address) \ ((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(address)) #define pte_offset_map(dir, address) pte_offset_kernel(dir, address) -#define pte_offset_map_nested(dir, address) pte_offset_kernel(dir, address) - #define pte_unmap(pte) do { } while (0) -#define pte_unmap_nested(pte) do { } while (0) #ifdef CONFIG_X2TLB #define pte_ERROR(e) \ diff --git a/arch/sh/include/asm/pgtable_64.h b/arch/sh/include/asm/pgtable_64.h index 17cdbecc3ad..dda8c82601b 100644 --- a/arch/sh/include/asm/pgtable_64.h +++ b/arch/sh/include/asm/pgtable_64.h @@ -43,11 +43,6 @@ static __inline__ void set_pte(pte_t *pteptr, pte_t pteval) } #define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval) -static __inline__ void pmd_set(pmd_t *pmdp,pte_t *ptep) -{ - pmd_val(*pmdp) = (unsigned long) ptep; -} - /* * PGD defines. Top level. */ @@ -89,14 +84,9 @@ static __inline__ void pmd_set(pmd_t *pmdp,pte_t *ptep) ((pte_t *) ((pmd_val(*(dir))) & PAGE_MASK) + pte_index((addr))) #define pte_offset_map(dir,addr) pte_offset_kernel(dir, addr) -#define pte_offset_map_nested(dir,addr) pte_offset_kernel(dir, addr) #define pte_unmap(pte) do { } while (0) -#define pte_unmap_nested(pte) do { } while (0) #ifndef __ASSEMBLY__ -#define IOBASE_VADDR 0xff000000 -#define IOBASE_END 0xffffffff - /* * PTEL coherent flags. * See Chapter 17 ST50 CPU Core Volume 1, Architecture. @@ -128,8 +118,22 @@ static __inline__ void pmd_set(pmd_t *pmdp,pte_t *ptep) #define _PAGE_DIRTY 0x400 /* software: page accessed in write */ #define _PAGE_ACCESSED 0x800 /* software: page referenced */ +/* Wrapper for extended mode pgprot twiddling */ +#define _PAGE_EXT(x) ((unsigned long long)(x) << 32) + +/* + * We can use the sign-extended bits in the PTEL to get 32 bits of + * software flags. This works for now because no implementations uses + * anything above the PPN field. + */ +#define _PAGE_WIRED _PAGE_EXT(0x001) /* software: wire the tlb entry */ +#define _PAGE_SPECIAL _PAGE_EXT(0x002) + +#define _PAGE_CLEAR_FLAGS (_PAGE_PRESENT | _PAGE_FILE | _PAGE_SHARED | \ + _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_WIRED) + /* Mask which drops software flags */ -#define _PAGE_FLAGS_HARDWARE_MASK 0xfffffffffffff3dbLL +#define _PAGE_FLAGS_HARDWARE_MASK (NEFF_MASK & ~(_PAGE_CLEAR_FLAGS)) /* * HugeTLB support @@ -167,7 +171,8 @@ static __inline__ void pmd_set(pmd_t *pmdp,pte_t *ptep) /* Default flags for a User page */ #define _PAGE_TABLE (_KERNPG_TABLE | _PAGE_USER) -#define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY) +#define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY | \ + _PAGE_SPECIAL) /* * We have full permissions (Read/Write/Execute/Shared). @@ -203,12 +208,6 @@ static __inline__ void pmd_set(pmd_t *pmdp,pte_t *ptep) #define pgprot_writecombine(prot) __pgprot(pgprot_val(prot) & ~_PAGE_CACHABLE) /* - * Handling allocation failures during page table setup. - */ -extern void __handle_bad_pmd_kernel(pmd_t * pmd); -#define __handle_bad_pmd(x) __handle_bad_pmd_kernel(x) - -/* * PTE level access routines. * * Note1: @@ -263,7 +262,7 @@ static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; } static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; } static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; } static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_WRITE; } -static inline int pte_special(pte_t pte){ return 0; } +static inline int pte_special(pte_t pte){ return pte_val(pte) & _PAGE_SPECIAL; } static inline pte_t pte_wrprotect(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_WRITE)); return pte; } static inline pte_t pte_mkclean(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_DIRTY)); return pte; } @@ -272,8 +271,7 @@ static inline pte_t pte_mkwrite(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | static inline pte_t pte_mkdirty(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_DIRTY)); return pte; } static inline pte_t pte_mkyoung(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_ACCESSED)); return pte; } static inline pte_t pte_mkhuge(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_SZHUGE)); return pte; } -static inline pte_t pte_mkspecial(pte_t pte) { return pte; } - +static inline pte_t pte_mkspecial(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_SPECIAL)); return pte; } /* * Conversion functions: convert a page and protection to a page entry. diff --git a/arch/sh/include/asm/poll.h b/arch/sh/include/asm/poll.h deleted file mode 100644 index c98509d3149..00000000000 --- a/arch/sh/include/asm/poll.h +++ /dev/null @@ -1 +0,0 @@ -#include <asm-generic/poll.h> diff --git a/arch/sh/include/asm/posix_types.h b/arch/sh/include/asm/posix_types.h index 4eeb723aee7..1aa781079b1 100644 --- a/arch/sh/include/asm/posix_types.h +++ b/arch/sh/include/asm/posix_types.h @@ -1,13 +1,5 @@ -#ifdef __KERNEL__ # ifdef CONFIG_SUPERH32 -# include "posix_types_32.h" +# include <asm/posix_types_32.h> # else -# include "posix_types_64.h" +# include <asm/posix_types_64.h> # endif -#else -# ifdef __SH5__ -# include "posix_types_64.h" -# else -# include "posix_types_32.h" -# endif -#endif /* __KERNEL__ */ diff --git a/arch/sh/include/asm/processor.h b/arch/sh/include/asm/processor.h index 017e0c1807b..5448f9bbf4a 100644 --- a/arch/sh/include/asm/processor.h +++ b/arch/sh/include/asm/processor.h @@ -18,7 +18,8 @@ enum cpu_type { CPU_SH7619, /* SH-2A types */ - CPU_SH7201, CPU_SH7203, CPU_SH7206, CPU_SH7263, CPU_MXG, + CPU_SH7201, CPU_SH7203, CPU_SH7206, CPU_SH7263, CPU_SH7264, CPU_SH7269, + CPU_MXG, /* SH-3 types */ CPU_SH7705, CPU_SH7706, CPU_SH7707, @@ -32,10 +33,10 @@ enum cpu_type { /* SH-4A types */ CPU_SH7763, CPU_SH7770, CPU_SH7780, CPU_SH7781, CPU_SH7785, CPU_SH7786, - CPU_SH7723, CPU_SH7724, CPU_SH7757, CPU_SHX3, + CPU_SH7723, CPU_SH7724, CPU_SH7757, CPU_SH7734, CPU_SHX3, /* SH4AL-DSP types */ - CPU_SH7343, CPU_SH7722, CPU_SH7366, + CPU_SH7343, CPU_SH7722, CPU_SH7366, CPU_SH7372, /* SH-5 types */ CPU_SH5_101, CPU_SH5_103, @@ -85,6 +86,7 @@ struct sh_cpuinfo { struct tlb_info itlb; struct tlb_info dtlb; + unsigned int phys_bits; unsigned long flags; } __attribute__ ((aligned(L1_CACHE_BYTES))); @@ -96,15 +98,42 @@ extern struct sh_cpuinfo cpu_data[]; #define cpu_sleep() __asm__ __volatile__ ("sleep" : : : "memory") #define cpu_relax() barrier() +void default_idle(void); +void stop_this_cpu(void *); + /* Forward decl */ struct seq_operations; +struct task_struct; extern struct pt_regs fake_swapper_regs; +extern void cpu_init(void); +extern void cpu_probe(void); + +/* arch/sh/kernel/process.c */ +extern unsigned int xstate_size; +extern void free_thread_xstate(struct task_struct *); +extern struct kmem_cache *task_xstate_cachep; + +/* arch/sh/mm/alignment.c */ +extern int get_unalign_ctl(struct task_struct *, unsigned long addr); +extern int set_unalign_ctl(struct task_struct *, unsigned int val); + +#define GET_UNALIGN_CTL(tsk, addr) get_unalign_ctl((tsk), (addr)) +#define SET_UNALIGN_CTL(tsk, val) set_unalign_ctl((tsk), (val)) + +/* arch/sh/mm/init.c */ +extern unsigned int mem_init_done; + /* arch/sh/kernel/setup.c */ const char *get_cpu_subtype(struct sh_cpuinfo *c); extern const struct seq_operations cpuinfo_op; +/* thread_struct flags */ +#define SH_THREAD_UAC_NOPRINT (1 << 0) +#define SH_THREAD_UAC_SIGBUS (1 << 1) +#define SH_THREAD_UAC_MASK (SH_THREAD_UAC_NOPRINT | SH_THREAD_UAC_SIGBUS) + /* processor boot mode configuration */ #define MODE_PIN0 (1 << 0) #define MODE_PIN1 (1 << 1) @@ -132,12 +161,23 @@ int vsyscall_init(void); #define vsyscall_init() do { } while (0) #endif +/* + * SH-2A has both 16 and 32-bit opcodes, do lame encoding checks. + */ +#ifdef CONFIG_CPU_SH2A +extern unsigned int instruction_size(unsigned int insn); +#elif defined(CONFIG_SUPERH32) +#define instruction_size(insn) (2) +#else +#define instruction_size(insn) (4) +#endif + #endif /* __ASSEMBLY__ */ #ifdef CONFIG_SUPERH32 -# include "processor_32.h" +# include <asm/processor_32.h> #else -# include "processor_64.h" +# include <asm/processor_64.h> #endif #endif /* __ASM_SH_PROCESSOR_H */ diff --git a/arch/sh/include/asm/processor_32.h b/arch/sh/include/asm/processor_32.h index 1f3d6fab660..18e0377f72b 100644 --- a/arch/sh/include/asm/processor_32.h +++ b/arch/sh/include/asm/processor_32.h @@ -13,7 +13,7 @@ #include <linux/linkage.h> #include <asm/page.h> #include <asm/types.h> -#include <asm/ptrace.h> +#include <asm/hw_breakpoint.h> /* * Default implementation of macro that returns current @@ -26,8 +26,6 @@ #define CCN_CVR 0xff000040 #define CCN_PRR 0xff000044 -asmlinkage void __init sh_cpu_init(void); - /* * User space process size: 2GB. * @@ -41,7 +39,7 @@ asmlinkage void __init sh_cpu_init(void); /* This decides where the kernel will search for a free chunk of vm * space during mmap's. */ -#define TASK_UNMAPPED_BASE (TASK_SIZE / 3) +#define TASK_UNMAPPED_BASE PAGE_ALIGN(TASK_SIZE / 3) /* * Bit of SR register @@ -90,9 +88,9 @@ struct sh_fpu_soft_struct { unsigned long entry_pc; }; -union sh_fpu_union { - struct sh_fpu_hard_struct hard; - struct sh_fpu_soft_struct soft; +union thread_xstate { + struct sh_fpu_hard_struct hardfpu; + struct sh_fpu_soft_struct softfpu; }; struct thread_struct { @@ -100,50 +98,44 @@ struct thread_struct { unsigned long sp; unsigned long pc; - /* Hardware debugging registers */ - unsigned long ubc_pc; + /* Various thread flags, see SH_THREAD_xxx */ + unsigned long flags; - /* floating point info */ - union sh_fpu_union fpu; + /* Save middle states of ptrace breakpoints */ + struct perf_event *ptrace_bps[HBP_NUM]; #ifdef CONFIG_SH_DSP /* Dsp status information */ struct sh_dsp_struct dsp_status; #endif -}; -/* Count of active tasks with UBC settings */ -extern int ubc_usercnt; + /* Extended processor state */ + union thread_xstate *xstate; + + /* + * fpu_counter contains the number of consecutive context switches + * that the FPU is used. If this is over a threshold, the lazy fpu + * saving becomes unlazy to save the trap. This is an unsigned char + * so that after 256 times the counter wraps and the behavior turns + * lazy again; this to deal with bursty apps that only use FPU for + * a short time + */ + unsigned char fpu_counter; +}; #define INIT_THREAD { \ .sp = sizeof(init_stack) + (long) &init_stack, \ + .flags = 0, \ } -/* - * Do necessary setup to start up a newly executed thread. - */ -#define start_thread(_regs, new_pc, new_sp) \ - set_fs(USER_DS); \ - _regs->pr = 0; \ - _regs->sr = SR_FD; /* User mode. */ \ - _regs->pc = new_pc; \ - _regs->regs[15] = new_sp - /* Forward declaration, a strange C thing */ struct task_struct; -struct mm_struct; + +extern void start_thread(struct pt_regs *regs, unsigned long new_pc, unsigned long new_sp); /* Free all resources held by a thread. */ extern void release_thread(struct task_struct *); -/* Prepare to copy thread state - unlazy all lazy status */ -void prepare_to_copy(struct task_struct *tsk); - -/* - * create a kernel thread without removing it from tasklists - */ -extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); - /* Copy and release all segment info associated with a VM */ #define copy_segments(p, mm) do { } while(0) #define release_segments(mm) do { } while(0) @@ -203,18 +195,21 @@ extern unsigned long get_wchan(struct task_struct *p); #define KSTK_EIP(tsk) (task_pt_regs(tsk)->pc) #define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[15]) -#define user_stack_pointer(_regs) ((_regs)->regs[15]) - #if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH4) + #define PREFETCH_STRIDE L1_CACHE_BYTES #define ARCH_HAS_PREFETCH #define ARCH_HAS_PREFETCHW -static inline void prefetch(void *x) + +static inline void prefetch(const void *x) { - __asm__ __volatile__ ("pref @%0\n\t" : : "r" (x) : "memory"); + __builtin_prefetch(x, 0, 3); } -#define prefetchw(x) prefetch(x) +static inline void prefetchw(const void *x) +{ + __builtin_prefetch(x, 1, 3); +} #endif #endif /* __KERNEL__ */ diff --git a/arch/sh/include/asm/processor_64.h b/arch/sh/include/asm/processor_64.h index 5727d31b0cc..eedd4f625d0 100644 --- a/arch/sh/include/asm/processor_64.h +++ b/arch/sh/include/asm/processor_64.h @@ -17,7 +17,6 @@ #include <linux/compiler.h> #include <asm/page.h> #include <asm/types.h> -#include <asm/ptrace.h> #include <cpu/registers.h> /* @@ -48,7 +47,7 @@ pc; }) /* This decides where the kernel will search for a free chunk of vm * space during mmap's. */ -#define TASK_UNMAPPED_BASE (TASK_SIZE / 3) +#define TASK_UNMAPPED_BASE PAGE_ALIGN(TASK_SIZE / 3) /* * Bit of SR register @@ -87,26 +86,31 @@ struct sh_fpu_hard_struct { /* long status; * software status information */ }; -#if 0 /* Dummy fpu emulator */ struct sh_fpu_soft_struct { - unsigned long long fp_regs[32]; + unsigned long fp_regs[64]; unsigned int fpscr; unsigned char lookahead; unsigned long entry_pc; }; -#endif -union sh_fpu_union { - struct sh_fpu_hard_struct hard; - /* 'hard' itself only produces 32 bit alignment, yet we need - to access it using 64 bit load/store as well. */ +union thread_xstate { + struct sh_fpu_hard_struct hardfpu; + struct sh_fpu_soft_struct softfpu; + /* + * The structure definitions only produce 32 bit alignment, yet we need + * to access them using 64 bit load/store as well. + */ unsigned long long alignment_dummy; }; struct thread_struct { unsigned long sp; unsigned long pc; + + /* Various thread flags, see SH_THREAD_xxx */ + unsigned long flags; + /* This stores the address of the pt_regs built during a context switch, or of the register save area built for a kernel mode exception. It is used for backtracing the stack of a sleeping task @@ -117,12 +121,21 @@ struct thread_struct { NULL for a kernel thread. */ struct pt_regs *uregs; - unsigned long trap_no, error_code; unsigned long address; /* Hardware debugging registers may come here */ /* floating point info */ - union sh_fpu_union fpu; + union thread_xstate *xstate; + + /* + * fpu_counter contains the number of consecutive context switches + * that the FPU is used. If this is over a threshold, the lazy fpu + * saving becomes unlazy to save the trap. This is an unsigned char + * so that after 256 times the counter wraps and the behavior turns + * lazy again; this to deal with bursty apps that only use FPU for + * a short time + */ + unsigned char fpu_counter; }; #define INIT_MMAP \ @@ -134,10 +147,8 @@ struct thread_struct { .pc = 0, \ .kregs = &fake_swapper_regs, \ .uregs = NULL, \ - .trap_no = 0, \ - .error_code = 0, \ .address = 0, \ - .fpu = { { { 0, } }, } \ + .flags = 0, \ } /* @@ -146,7 +157,6 @@ struct thread_struct { #define SR_USER (SR_MMU | SR_FD) #define start_thread(_regs, new_pc, new_sp) \ - set_fs(USER_DS); \ _regs->sr = SR_USER; /* User mode. */ \ _regs->pc = new_pc - 4; /* Compensate syscall exit */ \ _regs->pc |= 1; /* Set SHmedia ! */ \ @@ -159,17 +169,11 @@ struct mm_struct; /* Free all resources held by a thread. */ extern void release_thread(struct task_struct *); -/* - * create a kernel thread without removing it from tasklists - */ -extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); - /* Copy and release all segment info associated with a VM */ #define copy_segments(p, mm) do { } while (0) #define release_segments(mm) do { } while (0) #define forget_segments() do { } while (0) -#define prepare_to_copy(tsk) do { } while (0) /* * FPU lazy state save handling. */ @@ -226,7 +230,5 @@ extern unsigned long get_wchan(struct task_struct *p); #define KSTK_EIP(tsk) ((tsk)->thread.pc) #define KSTK_ESP(tsk) ((tsk)->thread.sp) -#define user_stack_pointer(_regs) ((_regs)->regs[15]) - #endif /* __ASSEMBLY__ */ #endif /* __ASM_SH_PROCESSOR_64_H */ diff --git a/arch/sh/include/asm/ptrace.h b/arch/sh/include/asm/ptrace.h index 1dc12cb44a2..2506c7db76b 100644 --- a/arch/sh/include/asm/ptrace.h +++ b/arch/sh/include/asm/ptrace.h @@ -1,143 +1,117 @@ -#ifndef __ASM_SH_PTRACE_H -#define __ASM_SH_PTRACE_H - /* * Copyright (C) 1999, 2000 Niibe Yutaka - * - */ -#if defined(__SH5__) -struct pt_regs { - unsigned long long pc; - unsigned long long sr; - long long syscall_nr; - unsigned long long regs[63]; - unsigned long long tregs[8]; - unsigned long long pad[2]; -}; -#else -/* - * GCC defines register number like this: - * ----------------------------- - * 0 - 15 are integer registers - * 17 - 22 are control/special registers - * 24 - 39 fp registers - * 40 - 47 xd registers - * 48 - fpscr register - * ----------------------------- - * - * We follows above, except: - * 16 --- program counter (PC) - * 22 --- syscall # - * 23 --- floating point communication register */ -#define REG_REG0 0 -#define REG_REG15 15 - -#define REG_PC 16 +#ifndef __ASM_SH_PTRACE_H +#define __ASM_SH_PTRACE_H -#define REG_PR 17 -#define REG_SR 18 -#define REG_GBR 19 -#define REG_MACH 20 -#define REG_MACL 21 -#define REG_SYSCALL 22 +#include <linux/stringify.h> +#include <linux/stddef.h> +#include <linux/thread_info.h> +#include <asm/addrspace.h> +#include <asm/page.h> +#include <uapi/asm/ptrace.h> -#define REG_FPREG0 23 -#define REG_FPREG15 38 -#define REG_XFREG0 39 -#define REG_XFREG15 54 +#define user_mode(regs) (((regs)->sr & 0x40000000)==0) +#define kernel_stack_pointer(_regs) ((unsigned long)(_regs)->regs[15]) -#define REG_FPSCR 55 -#define REG_FPUL 56 +#define GET_FP(regs) ((regs)->regs[14]) +#define GET_USP(regs) ((regs)->regs[15]) -/* - * This struct defines the way the registers are stored on the - * kernel stack during a system call or other kernel entry. - */ -struct pt_regs { - unsigned long regs[16]; - unsigned long pc; - unsigned long pr; - unsigned long sr; - unsigned long gbr; - unsigned long mach; - unsigned long macl; - long tra; -}; +#define arch_has_single_step() (1) /* - * This struct defines the way the DSP registers are stored on the - * kernel stack during a system call or other kernel entry. + * kprobe-based event tracer support */ -struct pt_dspregs { - unsigned long a1; - unsigned long a0g; - unsigned long a1g; - unsigned long m0; - unsigned long m1; - unsigned long a0; - unsigned long x0; - unsigned long x1; - unsigned long y0; - unsigned long y1; - unsigned long dsr; - unsigned long rs; - unsigned long re; - unsigned long mod; +struct pt_regs_offset { + const char *name; + int offset; }; -#endif - -#define PTRACE_GETREGS 12 /* General registers */ -#define PTRACE_SETREGS 13 - -#define PTRACE_GETFPREGS 14 /* FPU registers */ -#define PTRACE_SETFPREGS 15 -#define PTRACE_GETFDPIC 31 /* get the ELF fdpic loadmap address */ +#define REG_OFFSET_NAME(r) {.name = #r, .offset = offsetof(struct pt_regs, r)} +#define REGS_OFFSET_NAME(num) \ + {.name = __stringify(r##num), .offset = offsetof(struct pt_regs, regs[num])} +#define TREGS_OFFSET_NAME(num) \ + {.name = __stringify(tr##num), .offset = offsetof(struct pt_regs, tregs[num])} +#define REG_OFFSET_END {.name = NULL, .offset = 0} -#define PTRACE_GETFDPIC_EXEC 0 /* [addr] request the executable loadmap */ -#define PTRACE_GETFDPIC_INTERP 1 /* [addr] request the interpreter loadmap */ +/* Query offset/name of register from its name/offset */ +extern int regs_query_register_offset(const char *name); +extern const char *regs_query_register_name(unsigned int offset); -#define PTRACE_GETDSPREGS 55 /* DSP registers */ -#define PTRACE_SETDSPREGS 56 +extern const struct pt_regs_offset regoffset_table[]; -#define PT_TEXT_END_ADDR 240 -#define PT_TEXT_ADDR 244 /* &(struct user)->start_code */ -#define PT_DATA_ADDR 248 /* &(struct user)->start_data */ -#define PT_TEXT_LEN 252 - -#ifdef __KERNEL__ -#include <asm/addrspace.h> - -#define user_mode(regs) (((regs)->sr & 0x40000000)==0) -#define instruction_pointer(regs) ((unsigned long)(regs)->pc) +/** + * regs_get_register() - get register value from its offset + * @regs: pt_regs from which register value is gotten. + * @offset: offset number of the register. + * + * regs_get_register returns the value of a register. The @offset is the + * offset of the register in struct pt_regs address which specified by @regs. + * If @offset is bigger than MAX_REG_OFFSET, this returns 0. + */ +static inline unsigned long regs_get_register(struct pt_regs *regs, + unsigned int offset) +{ + if (unlikely(offset > MAX_REG_OFFSET)) + return 0; + return *(unsigned long *)((unsigned long)regs + offset); +} -extern void show_regs(struct pt_regs *); +/** + * regs_within_kernel_stack() - check the address in the stack + * @regs: pt_regs which contains kernel stack pointer. + * @addr: address which is checked. + * + * regs_within_kernel_stack() checks @addr is within the kernel stack page(s). + * If @addr is within the kernel stack, it returns true. If not, returns false. + */ +static inline int regs_within_kernel_stack(struct pt_regs *regs, + unsigned long addr) +{ + return ((addr & ~(THREAD_SIZE - 1)) == + (kernel_stack_pointer(regs) & ~(THREAD_SIZE - 1))); +} -/* - * These are defined as per linux/ptrace.h. +/** + * regs_get_kernel_stack_nth() - get Nth entry of the stack + * @regs: pt_regs which contains kernel stack pointer. + * @n: stack entry number. + * + * regs_get_kernel_stack_nth() returns @n th entry of the kernel stack which + * is specified by @regs. If the @n th entry is NOT in the kernel stack, + * this returns 0. */ -struct task_struct; +static inline unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, + unsigned int n) +{ + unsigned long *addr = (unsigned long *)kernel_stack_pointer(regs); + addr += n; + if (regs_within_kernel_stack(regs, (unsigned long)addr)) + return *addr; + else + return 0; +} -#define arch_has_single_step() (1) -extern void user_enable_single_step(struct task_struct *); -extern void user_disable_single_step(struct task_struct *); +struct perf_event; +struct perf_sample_data; + +extern void ptrace_triggered(struct perf_event *bp, + struct perf_sample_data *data, struct pt_regs *regs); #define task_pt_regs(task) \ ((struct pt_regs *) (task_stack_page(task) + THREAD_SIZE) - 1) static inline unsigned long profile_pc(struct pt_regs *regs) { - unsigned long pc = instruction_pointer(regs); + unsigned long pc = regs->pc; -#ifdef P2SEG - if (pc >= P2SEG && pc < P3SEG) - pc -= 0x20000000; -#endif + if (virt_addr_uncached(pc)) + return CAC_ADDR(pc); return pc; } -#endif /* __KERNEL__ */ +#define profile_pc profile_pc +#include <asm-generic/ptrace.h> #endif /* __ASM_SH_PTRACE_H */ diff --git a/arch/sh/include/asm/ptrace_32.h b/arch/sh/include/asm/ptrace_32.h new file mode 100644 index 00000000000..1dd4480c536 --- /dev/null +++ b/arch/sh/include/asm/ptrace_32.h @@ -0,0 +1,13 @@ +#ifndef __ASM_SH_PTRACE_32_H +#define __ASM_SH_PTRACE_32_H + +#include <uapi/asm/ptrace_32.h> + + +#define MAX_REG_OFFSET offsetof(struct pt_regs, tra) +static inline long regs_return_value(struct pt_regs *regs) +{ + return regs->regs[0]; +} + +#endif /* __ASM_SH_PTRACE_32_H */ diff --git a/arch/sh/include/asm/ptrace_64.h b/arch/sh/include/asm/ptrace_64.h new file mode 100644 index 00000000000..97f4b5660f2 --- /dev/null +++ b/arch/sh/include/asm/ptrace_64.h @@ -0,0 +1,13 @@ +#ifndef __ASM_SH_PTRACE_64_H +#define __ASM_SH_PTRACE_64_H + +#include <uapi/asm/ptrace_64.h> + + +#define MAX_REG_OFFSET offsetof(struct pt_regs, tregs[7]) +static inline long regs_return_value(struct pt_regs *regs) +{ + return regs->regs[3]; +} + +#endif /* __ASM_SH_PTRACE_64_H */ diff --git a/arch/sh/include/asm/reboot.h b/arch/sh/include/asm/reboot.h new file mode 100644 index 00000000000..b3da0c63fc3 --- /dev/null +++ b/arch/sh/include/asm/reboot.h @@ -0,0 +1,21 @@ +#ifndef __ASM_SH_REBOOT_H +#define __ASM_SH_REBOOT_H + +#include <linux/kdebug.h> + +struct pt_regs; + +struct machine_ops { + void (*restart)(char *cmd); + void (*halt)(void); + void (*power_off)(void); + void (*shutdown)(void); + void (*crash_shutdown)(struct pt_regs *); +}; + +extern struct machine_ops machine_ops; + +/* arch/sh/kernel/machine_kexec.c */ +void native_machine_crash_shutdown(struct pt_regs *regs); + +#endif /* __ASM_SH_REBOOT_H */ diff --git a/arch/sh/include/asm/resource.h b/arch/sh/include/asm/resource.h deleted file mode 100644 index 9c2499a86ec..00000000000 --- a/arch/sh/include/asm/resource.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __ASM_SH_RESOURCE_H -#define __ASM_SH_RESOURCE_H - -#include <asm-generic/resource.h> - -#endif /* __ASM_SH_RESOURCE_H */ diff --git a/arch/sh/include/asm/rwsem.h b/arch/sh/include/asm/rwsem.h index 06e2251a5e4..edab5726529 100644 --- a/arch/sh/include/asm/rwsem.h +++ b/arch/sh/include/asm/rwsem.h @@ -11,64 +11,13 @@ #endif #ifdef __KERNEL__ -#include <linux/list.h> -#include <linux/spinlock.h> -#include <asm/atomic.h> -#include <asm/system.h> -/* - * the semaphore definition - */ -struct rw_semaphore { - long count; #define RWSEM_UNLOCKED_VALUE 0x00000000 #define RWSEM_ACTIVE_BIAS 0x00000001 #define RWSEM_ACTIVE_MASK 0x0000ffff #define RWSEM_WAITING_BIAS (-0x00010000) #define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS #define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS) - spinlock_t wait_lock; - struct list_head wait_list; -#ifdef CONFIG_DEBUG_LOCK_ALLOC - struct lockdep_map dep_map; -#endif -}; - -#ifdef CONFIG_DEBUG_LOCK_ALLOC -# define __RWSEM_DEP_MAP_INIT(lockname) , .dep_map = { .name = #lockname } -#else -# define __RWSEM_DEP_MAP_INIT(lockname) -#endif - -#define __RWSEM_INITIALIZER(name) \ - { RWSEM_UNLOCKED_VALUE, __SPIN_LOCK_UNLOCKED((name).wait_lock), \ - LIST_HEAD_INIT((name).wait_list) \ - __RWSEM_DEP_MAP_INIT(name) } - -#define DECLARE_RWSEM(name) \ - struct rw_semaphore name = __RWSEM_INITIALIZER(name) - -extern struct rw_semaphore *rwsem_down_read_failed(struct rw_semaphore *sem); -extern struct rw_semaphore *rwsem_down_write_failed(struct rw_semaphore *sem); -extern struct rw_semaphore *rwsem_wake(struct rw_semaphore *sem); -extern struct rw_semaphore *rwsem_downgrade_wake(struct rw_semaphore *sem); - -extern void __init_rwsem(struct rw_semaphore *sem, const char *name, - struct lock_class_key *key); - -#define init_rwsem(sem) \ -do { \ - static struct lock_class_key __key; \ - \ - __init_rwsem((sem), #sem, &__key); \ -} while (0) - -static inline void init_rwsem(struct rw_semaphore *sem) -{ - sem->count = RWSEM_UNLOCKED_VALUE; - spin_lock_init(&sem->wait_lock); - INIT_LIST_HEAD(&sem->wait_list); -} /* * lock for reading @@ -179,10 +128,5 @@ static inline int rwsem_atomic_update(int delta, struct rw_semaphore *sem) return atomic_add_return(delta, (atomic_t *)(&sem->count)); } -static inline int rwsem_is_locked(struct rw_semaphore *sem) -{ - return (sem->count != 0); -} - #endif /* __KERNEL__ */ #endif /* _ASM_SH_RWSEM_H */ diff --git a/arch/sh/include/asm/scatterlist.h b/arch/sh/include/asm/scatterlist.h deleted file mode 100644 index e38d1d4c7f6..00000000000 --- a/arch/sh/include/asm/scatterlist.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef __ASM_SH_SCATTERLIST_H -#define __ASM_SH_SCATTERLIST_H - -#define ISA_DMA_THRESHOLD phys_addr_mask() - -#include <asm-generic/scatterlist.h> - -#endif /* __ASM_SH_SCATTERLIST_H */ diff --git a/arch/sh/include/asm/sections.h b/arch/sh/include/asm/sections.h index a78701da775..1b6199740e9 100644 --- a/arch/sh/include/asm/sections.h +++ b/arch/sh/include/asm/sections.h @@ -3,10 +3,9 @@ #include <asm-generic/sections.h> -extern void __nosave_begin, __nosave_end; +extern long __nosave_begin, __nosave_end; extern long __machvec_start, __machvec_end; extern char __uncached_start, __uncached_end; -extern char _ebss[]; extern char __start_eh_frame[], __stop_eh_frame[]; #endif /* __ASM_SH_SECTIONS_H */ diff --git a/arch/sh/include/asm/sembuf.h b/arch/sh/include/asm/sembuf.h deleted file mode 100644 index 7673b83cfef..00000000000 --- a/arch/sh/include/asm/sembuf.h +++ /dev/null @@ -1 +0,0 @@ -#include <asm-generic/sembuf.h> diff --git a/arch/sh/include/asm/serial.h b/arch/sh/include/asm/serial.h deleted file mode 100644 index a0cb0caff15..00000000000 --- a/arch/sh/include/asm/serial.h +++ /dev/null @@ -1 +0,0 @@ -#include <asm-generic/serial.h> diff --git a/arch/sh/include/asm/setup.h b/arch/sh/include/asm/setup.h index ce3743599b2..99238108e7a 100644 --- a/arch/sh/include/asm/setup.h +++ b/arch/sh/include/asm/setup.h @@ -1,9 +1,8 @@ #ifndef _SH_SETUP_H #define _SH_SETUP_H -#include <asm-generic/setup.h> +#include <uapi/asm/setup.h> -#ifdef __KERNEL__ /* * This is set up by the setup-routine at boot-time */ @@ -18,9 +17,8 @@ /* ... */ #define COMMAND_LINE ((char *) (PARAM+0x100)) -int setup_early_printk(char *); void sh_mv_setup(void); - -#endif /* __KERNEL__ */ +void check_for_initrd(void); +void per_cpu_trap_init(void); #endif /* _SH_SETUP_H */ diff --git a/arch/sh/include/asm/sh_bios.h b/arch/sh/include/asm/sh_bios.h index d9c96d7cf6c..95714c28422 100644 --- a/arch/sh/include/asm/sh_bios.h +++ b/arch/sh/include/asm/sh_bios.h @@ -1,18 +1,27 @@ #ifndef __ASM_SH_BIOS_H #define __ASM_SH_BIOS_H +#ifdef CONFIG_SH_STANDARD_BIOS + /* * Copyright (C) 2000 Greg Banks, Mitch Davis * C API to interface to the standard LinuxSH BIOS * usually from within the early stages of kernel boot. */ - - extern void sh_bios_console_write(const char *buf, unsigned int len); -extern void sh_bios_char_out(char ch); extern void sh_bios_gdb_detach(void); extern void sh_bios_get_node_addr(unsigned char *node_addr); extern void sh_bios_shutdown(unsigned int how); +extern void sh_bios_vbr_init(void); +extern void sh_bios_vbr_reload(void); + +#else + +static inline void sh_bios_vbr_init(void) { } +static inline void sh_bios_vbr_reload(void) { } + +#endif /* CONFIG_SH_STANDARD_BIOS */ + #endif /* __ASM_SH_BIOS_H */ diff --git a/arch/sh/include/asm/sh_eth.h b/arch/sh/include/asm/sh_eth.h deleted file mode 100644 index f739061e2ee..00000000000 --- a/arch/sh/include/asm/sh_eth.h +++ /dev/null @@ -1,15 +0,0 @@ -#ifndef __ASM_SH_ETH_H__ -#define __ASM_SH_ETH_H__ - -enum {EDMAC_LITTLE_ENDIAN, EDMAC_BIG_ENDIAN}; - -struct sh_eth_plat_data { - int phy; - int edmac_endian; - - unsigned char mac_addr[6]; - unsigned no_ether_link:1; - unsigned ether_link_active_low:1; -}; - -#endif diff --git a/arch/sh/include/asm/shmbuf.h b/arch/sh/include/asm/shmbuf.h deleted file mode 100644 index 83c05fc2de3..00000000000 --- a/arch/sh/include/asm/shmbuf.h +++ /dev/null @@ -1 +0,0 @@ -#include <asm-generic/shmbuf.h> diff --git a/arch/sh/include/asm/siginfo.h b/arch/sh/include/asm/siginfo.h deleted file mode 100644 index 813040ed68a..00000000000 --- a/arch/sh/include/asm/siginfo.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __ASM_SH_SIGINFO_H -#define __ASM_SH_SIGINFO_H - -#include <asm-generic/siginfo.h> - -#endif /* __ASM_SH_SIGINFO_H */ diff --git a/arch/sh/include/asm/siu.h b/arch/sh/include/asm/siu.h new file mode 100644 index 00000000000..580b7ac228b --- /dev/null +++ b/arch/sh/include/asm/siu.h @@ -0,0 +1,23 @@ +/* + * platform header for the SIU ASoC driver + * + * Copyright (C) 2009-2010 Guennadi Liakhovetski <g.liakhovetski@gmx.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef ASM_SIU_H +#define ASM_SIU_H + +struct device; + +struct siu_platform { + unsigned int dma_slave_tx_a; + unsigned int dma_slave_rx_a; + unsigned int dma_slave_tx_b; + unsigned int dma_slave_rx_b; +}; + +#endif /* ASM_SIU_H */ diff --git a/arch/sh/include/asm/sizes.h b/arch/sh/include/asm/sizes.h deleted file mode 100644 index 3a1fb97770f..00000000000 --- a/arch/sh/include/asm/sizes.h +++ /dev/null @@ -1,61 +0,0 @@ -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -/* DO NOT EDIT!! - this file automatically generated - * from .s file by awk -f s2h.awk - */ -/* Size definitions - * Copyright (C) ARM Limited 1998. All rights reserved. - */ - -#ifndef __sizes_h -#define __sizes_h 1 - -/* handy sizes */ -#define SZ_16 0x00000010 -#define SZ_32 0x00000020 -#define SZ_64 0x00000040 -#define SZ_128 0x00000080 -#define SZ_256 0x00000100 -#define SZ_512 0x00000200 - -#define SZ_1K 0x00000400 -#define SZ_4K 0x00001000 -#define SZ_8K 0x00002000 -#define SZ_16K 0x00004000 -#define SZ_32K 0x00008000 -#define SZ_64K 0x00010000 -#define SZ_128K 0x00020000 -#define SZ_256K 0x00040000 -#define SZ_512K 0x00080000 - -#define SZ_1M 0x00100000 -#define SZ_2M 0x00200000 -#define SZ_4M 0x00400000 -#define SZ_8M 0x00800000 -#define SZ_16M 0x01000000 -#define SZ_26M 0x01a00000 -#define SZ_32M 0x02000000 -#define SZ_64M 0x04000000 -#define SZ_128M 0x08000000 -#define SZ_256M 0x10000000 -#define SZ_512M 0x20000000 - -#define SZ_1G 0x40000000 -#define SZ_2G 0x80000000 - -#endif - -/* END */ diff --git a/arch/sh/include/asm/smp-ops.h b/arch/sh/include/asm/smp-ops.h new file mode 100644 index 00000000000..c590f76856f --- /dev/null +++ b/arch/sh/include/asm/smp-ops.h @@ -0,0 +1,51 @@ +#ifndef __ASM_SH_SMP_OPS_H +#define __ASM_SH_SMP_OPS_H + +struct plat_smp_ops { + void (*smp_setup)(void); + unsigned int (*smp_processor_id)(void); + void (*prepare_cpus)(unsigned int max_cpus); + void (*start_cpu)(unsigned int cpu, unsigned long entry_point); + void (*send_ipi)(unsigned int cpu, unsigned int message); + int (*cpu_disable)(unsigned int cpu); + void (*cpu_die)(unsigned int cpu); + void (*play_dead)(void); +}; + +extern struct plat_smp_ops *mp_ops; +extern struct plat_smp_ops shx3_smp_ops; + +#ifdef CONFIG_SMP + +static inline void plat_smp_setup(void) +{ + BUG_ON(!mp_ops); + mp_ops->smp_setup(); +} + +static inline void play_dead(void) +{ + mp_ops->play_dead(); +} + +extern void register_smp_ops(struct plat_smp_ops *ops); + +#else + +static inline void plat_smp_setup(void) +{ + /* UP, nothing to do ... */ +} + +static inline void register_smp_ops(struct plat_smp_ops *ops) +{ +} + +static inline void play_dead(void) +{ + BUG(); +} + +#endif /* CONFIG_SMP */ + +#endif /* __ASM_SH_SMP_OPS_H */ diff --git a/arch/sh/include/asm/smp.h b/arch/sh/include/asm/smp.h index 53ef26ced75..78b0d0f4b24 100644 --- a/arch/sh/include/asm/smp.h +++ b/arch/sh/include/asm/smp.h @@ -3,15 +3,16 @@ #include <linux/bitops.h> #include <linux/cpumask.h> +#include <asm/smp-ops.h> #ifdef CONFIG_SMP #include <linux/spinlock.h> -#include <asm/atomic.h> +#include <linux/atomic.h> #include <asm/current.h> +#include <asm/percpu.h> #define raw_smp_processor_id() (current_thread_info()->cpu) -#define hard_smp_processor_id() plat_smp_processor_id() /* Map from cpu id to sequential logical cpu number. */ extern int __cpu_number_map[NR_CPUS]; @@ -30,20 +31,43 @@ enum { SMP_MSG_NR, /* must be last */ }; +DECLARE_PER_CPU(int, cpu_state); + void smp_message_recv(unsigned int msg); void smp_timer_broadcast(const struct cpumask *mask); void local_timer_interrupt(void); void local_timer_setup(unsigned int cpu); - -void plat_smp_setup(void); -void plat_prepare_cpus(unsigned int max_cpus); -int plat_smp_processor_id(void); -void plat_start_cpu(unsigned int cpu, unsigned long entry_point); -void plat_send_ipi(unsigned int cpu, unsigned int message); +void local_timer_stop(unsigned int cpu); void arch_send_call_function_single_ipi(int cpu); -extern void arch_send_call_function_ipi_mask(const struct cpumask *mask); +void arch_send_call_function_ipi_mask(const struct cpumask *mask); + +void native_play_dead(void); +void native_cpu_die(unsigned int cpu); +int native_cpu_disable(unsigned int cpu); + +#ifdef CONFIG_HOTPLUG_CPU +void play_dead_common(void); +extern int __cpu_disable(void); + +static inline void __cpu_die(unsigned int cpu) +{ + extern struct plat_smp_ops *mp_ops; /* private */ + + mp_ops->cpu_die(cpu); +} +#endif + +static inline int hard_smp_processor_id(void) +{ + extern struct plat_smp_ops *mp_ops; /* private */ + + if (!mp_ops) + return 0; /* boot CPU */ + + return mp_ops->smp_processor_id(); +} #else diff --git a/arch/sh/include/asm/socket.h b/arch/sh/include/asm/socket.h deleted file mode 100644 index 6b71384b9d8..00000000000 --- a/arch/sh/include/asm/socket.h +++ /dev/null @@ -1 +0,0 @@ -#include <asm-generic/socket.h> diff --git a/arch/sh/include/asm/sram.h b/arch/sh/include/asm/sram.h new file mode 100644 index 00000000000..a2808ce4c0a --- /dev/null +++ b/arch/sh/include/asm/sram.h @@ -0,0 +1,38 @@ +#ifndef __ASM_SRAM_H +#define __ASM_SRAM_H + +#ifdef CONFIG_HAVE_SRAM_POOL + +#include <linux/spinlock.h> +#include <linux/genalloc.h> + +/* arch/sh/mm/sram.c */ +extern struct gen_pool *sram_pool; + +static inline unsigned long sram_alloc(size_t len) +{ + if (!sram_pool) + return 0UL; + + return gen_pool_alloc(sram_pool, len); +} + +static inline void sram_free(unsigned long addr, size_t len) +{ + return gen_pool_free(sram_pool, addr, len); +} + +#else + +static inline unsigned long sram_alloc(size_t len) +{ + return 0; +} + +static inline void sram_free(unsigned long addr, size_t len) +{ +} + +#endif /* CONFIG_HAVE_SRAM_POOL */ + +#endif /* __ASM_SRAM_H */ diff --git a/arch/sh/include/asm/stackprotector.h b/arch/sh/include/asm/stackprotector.h new file mode 100644 index 00000000000..d9df3a76847 --- /dev/null +++ b/arch/sh/include/asm/stackprotector.h @@ -0,0 +1,27 @@ +#ifndef __ASM_SH_STACKPROTECTOR_H +#define __ASM_SH_STACKPROTECTOR_H + +#include <linux/random.h> +#include <linux/version.h> + +extern unsigned long __stack_chk_guard; + +/* + * Initialize the stackprotector canary value. + * + * NOTE: this must only be called from functions that never return, + * and it must always be inlined. + */ +static __always_inline void boot_init_stack_canary(void) +{ + unsigned long canary; + + /* Try to get a semi random initial value. */ + get_random_bytes(&canary, sizeof(canary)); + canary ^= LINUX_VERSION_CODE; + + current->stack_canary = canary; + __stack_chk_guard = current->stack_canary; +} + +#endif /* __ASM_SH_STACKPROTECTOR_H */ diff --git a/arch/sh/include/asm/stacktrace.h b/arch/sh/include/asm/stacktrace.h index 79701821371..a7e2d4dfd08 100644 --- a/arch/sh/include/asm/stacktrace.h +++ b/arch/sh/include/asm/stacktrace.h @@ -10,9 +10,6 @@ /* Generic stack tracer with callbacks */ struct stacktrace_ops { - void (*warning)(void *data, char *msg); - /* msg must contain %s for the symbol */ - void (*warning_symbol)(void *data, char *msg, unsigned long symbol); void (*address)(void *data, unsigned long address, int reliable); /* On negative return stop dumping */ int (*stack)(void *data, char *name); diff --git a/arch/sh/include/asm/statfs.h b/arch/sh/include/asm/statfs.h deleted file mode 100644 index 9202a023328..00000000000 --- a/arch/sh/include/asm/statfs.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __ASM_SH_STATFS_H -#define __ASM_SH_STATFS_H - -#include <asm-generic/statfs.h> - -#endif /* __ASM_SH_STATFS_H */ diff --git a/arch/sh/include/asm/string.h b/arch/sh/include/asm/string.h index 8c1ea21dc0a..114011fa08a 100644 --- a/arch/sh/include/asm/string.h +++ b/arch/sh/include/asm/string.h @@ -1,5 +1,5 @@ #ifdef CONFIG_SUPERH32 -# include "string_32.h" +# include <asm/string_32.h> #else -# include "string_64.h" +# include <asm/string_64.h> #endif diff --git a/arch/sh/include/asm/suspend.h b/arch/sh/include/asm/suspend.h index fe9c2a1ad04..70ae0b2888a 100644 --- a/arch/sh/include/asm/suspend.h +++ b/arch/sh/include/asm/suspend.h @@ -3,7 +3,6 @@ #ifndef __ASSEMBLY__ #include <linux/notifier.h> -static inline int arch_prepare_suspend(void) { return 0; } #include <asm/ptrace.h> @@ -15,9 +14,9 @@ struct swsusp_arch_regs { void sh_mobile_call_standby(unsigned long mode); #ifdef CONFIG_CPU_IDLE -void sh_mobile_setup_cpuidle(void); +int sh_mobile_setup_cpuidle(void); #else -static inline void sh_mobile_setup_cpuidle(void) {} +static inline int sh_mobile_setup_cpuidle(void) { return 0; } #endif /* notifier chains for pre/post sleep hooks */ @@ -92,5 +91,6 @@ extern unsigned long sh_mobile_sleep_supported; #define SUSP_SH_USTANDBY (1 << 3) /* SH-Mobile U-standby mode */ #define SUSP_SH_SF (1 << 4) /* Enable self-refresh */ #define SUSP_SH_MMU (1 << 5) /* Save/restore MMU and cache */ +#define SUSP_SH_REGS (1 << 6) /* Save/restore registers */ #endif /* _ASM_SH_SUSPEND_H */ diff --git a/arch/sh/include/asm/switch_to.h b/arch/sh/include/asm/switch_to.h new file mode 100644 index 00000000000..bcd722fc834 --- /dev/null +++ b/arch/sh/include/asm/switch_to.h @@ -0,0 +1,19 @@ +/* + * Copyright (C) 2000, 2001 Paolo Alberelli + * Copyright (C) 2003 Paul Mundt + * Copyright (C) 2004 Richard Curnow + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#ifndef __ASM_SH_SWITCH_TO_H +#define __ASM_SH_SWITCH_TO_H + +#ifdef CONFIG_SUPERH32 +# include <asm/switch_to_32.h> +#else +# include <asm/switch_to_64.h> +#endif + +#endif /* __ASM_SH_SWITCH_TO_H */ diff --git a/arch/sh/include/asm/system_32.h b/arch/sh/include/asm/switch_to_32.h index 06814f5b59c..0c065513e7a 100644 --- a/arch/sh/include/asm/system_32.h +++ b/arch/sh/include/asm/switch_to_32.h @@ -1,7 +1,5 @@ -#ifndef __ASM_SH_SYSTEM_32_H -#define __ASM_SH_SYSTEM_32_H - -#include <linux/types.h> +#ifndef __ASM_SH_SWITCH_TO_32_H +#define __ASM_SH_SWITCH_TO_32_H #ifdef CONFIG_SH_DSP @@ -31,7 +29,6 @@ do { \ : : "r" (__ts2)); \ } while (0) - #define __save_dsp(tsk) \ do { \ register u32 *__ts2 __asm__ ("r2") = \ @@ -63,16 +60,6 @@ do { \ #define __restore_dsp(tsk) do { } while (0) #endif -#if defined(CONFIG_CPU_SH4A) -#define __icbi(addr) __asm__ __volatile__ ( "icbi @%0\n\t" : : "r" (addr)) -#else -#define __icbi(addr) mb() -#endif - -#define __ocbp(addr) __asm__ __volatile__ ( "ocbp @%0\n\t" : : "r" (addr)) -#define __ocbi(addr) __asm__ __volatile__ ( "ocbi @%0\n\t" : : "r" (addr)) -#define __ocbwb(addr) __asm__ __volatile__ ( "ocbwb @%0\n\t" : : "r" (addr)) - struct task_struct *__switch_to(struct task_struct *prev, struct task_struct *next); @@ -144,121 +131,4 @@ do { \ __restore_dsp(prev); \ } while (0) -#define __uses_jump_to_uncached \ - noinline __attribute__ ((__section__ (".uncached.text"))) - -/* - * Jump to uncached area. - * When handling TLB or caches, we need to do it from an uncached area. - */ -#define jump_to_uncached() \ -do { \ - unsigned long __dummy; \ - \ - __asm__ __volatile__( \ - "mova 1f, %0\n\t" \ - "add %1, %0\n\t" \ - "jmp @%0\n\t" \ - " nop\n\t" \ - ".balign 4\n" \ - "1:" \ - : "=&z" (__dummy) \ - : "r" (cached_to_uncached)); \ -} while (0) - -/* - * Back to cached area. - */ -#define back_to_cached() \ -do { \ - unsigned long __dummy; \ - ctrl_barrier(); \ - __asm__ __volatile__( \ - "mov.l 1f, %0\n\t" \ - "jmp @%0\n\t" \ - " nop\n\t" \ - ".balign 4\n" \ - "1: .long 2f\n" \ - "2:" \ - : "=&r" (__dummy)); \ -} while (0) - -#ifdef CONFIG_CPU_HAS_SR_RB -#define lookup_exception_vector() \ -({ \ - unsigned long _vec; \ - \ - __asm__ __volatile__ ( \ - "stc r2_bank, %0\n\t" \ - : "=r" (_vec) \ - ); \ - \ - _vec; \ -}) -#else -#define lookup_exception_vector() \ -({ \ - unsigned long _vec; \ - __asm__ __volatile__ ( \ - "mov r4, %0\n\t" \ - : "=r" (_vec) \ - ); \ - \ - _vec; \ -}) -#endif - -static inline reg_size_t register_align(void *val) -{ - return (unsigned long)(signed long)val; -} - -int handle_unaligned_access(insn_size_t instruction, struct pt_regs *regs, - struct mem_access *ma, int); - -asmlinkage void do_address_error(struct pt_regs *regs, - unsigned long writeaccess, - unsigned long address); -asmlinkage void do_divide_error(unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7, - struct pt_regs __regs); -asmlinkage void do_reserved_inst(unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7, - struct pt_regs __regs); -asmlinkage void do_illegal_slot_inst(unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7, - struct pt_regs __regs); -asmlinkage void do_exception_error(unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7, - struct pt_regs __regs); - -static inline void set_bl_bit(void) -{ - unsigned long __dummy0, __dummy1; - - __asm__ __volatile__ ( - "stc sr, %0\n\t" - "or %2, %0\n\t" - "and %3, %0\n\t" - "ldc %0, sr\n\t" - : "=&r" (__dummy0), "=r" (__dummy1) - : "r" (0x10000000), "r" (0xffffff0f) - : "memory" - ); -} - -static inline void clear_bl_bit(void) -{ - unsigned long __dummy0, __dummy1; - - __asm__ __volatile__ ( - "stc sr, %0\n\t" - "and %2, %0\n\t" - "ldc %0, sr\n\t" - : "=&r" (__dummy0), "=r" (__dummy1) - : "1" (~0x10000000) - : "memory" - ); -} - -#endif /* __ASM_SH_SYSTEM_32_H */ +#endif /* __ASM_SH_SWITCH_TO_32_H */ diff --git a/arch/sh/include/asm/switch_to_64.h b/arch/sh/include/asm/switch_to_64.h new file mode 100644 index 00000000000..ba3129d6bc2 --- /dev/null +++ b/arch/sh/include/asm/switch_to_64.h @@ -0,0 +1,35 @@ +/* + * Copyright (C) 2000, 2001 Paolo Alberelli + * Copyright (C) 2003 Paul Mundt + * Copyright (C) 2004 Richard Curnow + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#ifndef __ASM_SH_SWITCH_TO_64_H +#define __ASM_SH_SWITCH_TO_64_H + +struct thread_struct; +struct task_struct; + +/* + * switch_to() should switch tasks to task nr n, first + */ +struct task_struct *sh64_switch_to(struct task_struct *prev, + struct thread_struct *prev_thread, + struct task_struct *next, + struct thread_struct *next_thread); + +#define switch_to(prev,next,last) \ +do { \ + if (last_task_used_math != next) { \ + struct pt_regs *regs = next->thread.uregs; \ + if (regs) regs->sr |= SR_FD; \ + } \ + last = sh64_switch_to(prev, &prev->thread, next, \ + &next->thread); \ +} while (0) + + +#endif /* __ASM_SH_SWITCH_TO_64_H */ diff --git a/arch/sh/include/asm/syscall.h b/arch/sh/include/asm/syscall.h index 6a381429ee9..847128da6ea 100644 --- a/arch/sh/include/asm/syscall.h +++ b/arch/sh/include/asm/syscall.h @@ -1,10 +1,12 @@ #ifndef __ASM_SH_SYSCALL_H #define __ASM_SH_SYSCALL_H +extern const unsigned long sys_call_table[]; + #ifdef CONFIG_SUPERH32 -# include "syscall_32.h" +# include <asm/syscall_32.h> #else -# include "syscall_64.h" +# include <asm/syscall_64.h> #endif #endif /* __ASM_SH_SYSCALL_H */ diff --git a/arch/sh/include/asm/syscalls.h b/arch/sh/include/asm/syscalls.h index c1e2b8deb83..3dbfef06f6b 100644 --- a/arch/sh/include/asm/syscalls.h +++ b/arch/sh/include/asm/syscalls.h @@ -3,22 +3,17 @@ #ifdef __KERNEL__ -struct old_utsname; - asmlinkage int old_mmap(unsigned long addr, unsigned long len, unsigned long prot, unsigned long flags, int fd, unsigned long off); asmlinkage long sys_mmap2(unsigned long addr, unsigned long len, unsigned long prot, unsigned long flags, unsigned long fd, unsigned long pgoff); -asmlinkage int sys_ipc(uint call, int first, int second, - int third, void __user *ptr, long fifth); -asmlinkage int sys_uname(struct old_utsname __user *name); #ifdef CONFIG_SUPERH32 -# include "syscalls_32.h" +# include <asm/syscalls_32.h> #else -# include "syscalls_64.h" +# include <asm/syscalls_64.h> #endif #endif /* __KERNEL__ */ diff --git a/arch/sh/include/asm/syscalls_32.h b/arch/sh/include/asm/syscalls_32.h index 8b30200305c..4f643aa718e 100644 --- a/arch/sh/include/asm/syscalls_32.h +++ b/arch/sh/include/asm/syscalls_32.h @@ -9,36 +9,9 @@ struct pt_regs; -asmlinkage int sys_fork(unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7, - struct pt_regs __regs); -asmlinkage int sys_clone(unsigned long clone_flags, unsigned long newsp, - unsigned long parent_tidptr, - unsigned long child_tidptr, - struct pt_regs __regs); -asmlinkage int sys_vfork(unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7, - struct pt_regs __regs); -asmlinkage int sys_execve(char __user *ufilename, char __user * __user *uargv, - char __user * __user *uenvp, unsigned long r7, - struct pt_regs __regs); -asmlinkage int sys_sigsuspend(old_sigset_t mask, unsigned long r5, - unsigned long r6, unsigned long r7, - struct pt_regs __regs); -asmlinkage int sys_sigaction(int sig, const struct old_sigaction __user *act, - struct old_sigaction __user *oact); -asmlinkage int sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss, - unsigned long r6, unsigned long r7, - struct pt_regs __regs); -asmlinkage int sys_sigreturn(unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7, - struct pt_regs __regs); -asmlinkage int sys_rt_sigreturn(unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7, - struct pt_regs __regs); -asmlinkage int sys_sh_pipe(unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7, - struct pt_regs __regs); +asmlinkage int sys_sigreturn(void); +asmlinkage int sys_rt_sigreturn(void); +asmlinkage int sys_sh_pipe(void); asmlinkage ssize_t sys_pread_wrapper(unsigned int fd, char __user *buf, size_t count, long dummy, loff_t pos); asmlinkage ssize_t sys_pwrite_wrapper(unsigned int fd, const char __user *buf, diff --git a/arch/sh/include/asm/syscalls_64.h b/arch/sh/include/asm/syscalls_64.h index 751fd881136..d62e8eb22f7 100644 --- a/arch/sh/include/asm/syscalls_64.h +++ b/arch/sh/include/asm/syscalls_64.h @@ -9,23 +9,6 @@ struct pt_regs; -asmlinkage int sys_fork(unsigned long r2, unsigned long r3, - unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7, - struct pt_regs *pregs); -asmlinkage int sys_clone(unsigned long clone_flags, unsigned long newsp, - unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7, - struct pt_regs *pregs); -asmlinkage int sys_vfork(unsigned long r2, unsigned long r3, - unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7, - struct pt_regs *pregs); -asmlinkage int sys_execve(char *ufilename, char **uargv, - char **uenvp, unsigned long r5, - unsigned long r6, unsigned long r7, - struct pt_regs *pregs); - /* Misc syscall related bits */ asmlinkage long long do_syscall_trace_enter(struct pt_regs *regs); asmlinkage void do_syscall_trace_leave(struct pt_regs *regs); diff --git a/arch/sh/include/asm/system.h b/arch/sh/include/asm/system.h deleted file mode 100644 index c15415b4b16..00000000000 --- a/arch/sh/include/asm/system.h +++ /dev/null @@ -1,187 +0,0 @@ -#ifndef __ASM_SH_SYSTEM_H -#define __ASM_SH_SYSTEM_H - -/* - * Copyright (C) 1999, 2000 Niibe Yutaka & Kaz Kojima - * Copyright (C) 2002 Paul Mundt - */ - -#include <linux/irqflags.h> -#include <linux/compiler.h> -#include <linux/linkage.h> -#include <asm/types.h> -#include <asm/ptrace.h> - -#define AT_VECTOR_SIZE_ARCH 5 /* entries in ARCH_DLINFO */ - -/* - * A brief note on ctrl_barrier(), the control register write barrier. - * - * Legacy SH cores typically require a sequence of 8 nops after - * modification of a control register in order for the changes to take - * effect. On newer cores (like the sh4a and sh5) this is accomplished - * with icbi. - * - * Also note that on sh4a in the icbi case we can forego a synco for the - * write barrier, as it's not necessary for control registers. - * - * Historically we have only done this type of barrier for the MMUCR, but - * it's also necessary for the CCR, so we make it generic here instead. - */ -#if defined(CONFIG_CPU_SH4A) || defined(CONFIG_CPU_SH5) -#define mb() __asm__ __volatile__ ("synco": : :"memory") -#define rmb() mb() -#define wmb() __asm__ __volatile__ ("synco": : :"memory") -#define ctrl_barrier() __icbi(0xa8000000) -#define read_barrier_depends() do { } while(0) -#else -#define mb() __asm__ __volatile__ ("": : :"memory") -#define rmb() mb() -#define wmb() __asm__ __volatile__ ("": : :"memory") -#define ctrl_barrier() __asm__ __volatile__ ("nop;nop;nop;nop;nop;nop;nop;nop") -#define read_barrier_depends() do { } while(0) -#endif - -#ifdef CONFIG_SMP -#define smp_mb() mb() -#define smp_rmb() rmb() -#define smp_wmb() wmb() -#define smp_read_barrier_depends() read_barrier_depends() -#else -#define smp_mb() barrier() -#define smp_rmb() barrier() -#define smp_wmb() barrier() -#define smp_read_barrier_depends() do { } while(0) -#endif - -#define set_mb(var, value) do { (void)xchg(&var, value); } while (0) - -#ifdef CONFIG_GUSA_RB -#include <asm/cmpxchg-grb.h> -#elif defined(CONFIG_CPU_SH4A) -#include <asm/cmpxchg-llsc.h> -#else -#include <asm/cmpxchg-irq.h> -#endif - -extern void __xchg_called_with_bad_pointer(void); - -#define __xchg(ptr, x, size) \ -({ \ - unsigned long __xchg__res; \ - volatile void *__xchg_ptr = (ptr); \ - switch (size) { \ - case 4: \ - __xchg__res = xchg_u32(__xchg_ptr, x); \ - break; \ - case 1: \ - __xchg__res = xchg_u8(__xchg_ptr, x); \ - break; \ - default: \ - __xchg_called_with_bad_pointer(); \ - __xchg__res = x; \ - break; \ - } \ - \ - __xchg__res; \ -}) - -#define xchg(ptr,x) \ - ((__typeof__(*(ptr)))__xchg((ptr),(unsigned long)(x), sizeof(*(ptr)))) - -/* This function doesn't exist, so you'll get a linker error - * if something tries to do an invalid cmpxchg(). */ -extern void __cmpxchg_called_with_bad_pointer(void); - -#define __HAVE_ARCH_CMPXCHG 1 - -static inline unsigned long __cmpxchg(volatile void * ptr, unsigned long old, - unsigned long new, int size) -{ - switch (size) { - case 4: - return __cmpxchg_u32(ptr, old, new); - } - __cmpxchg_called_with_bad_pointer(); - return old; -} - -#define cmpxchg(ptr,o,n) \ - ({ \ - __typeof__(*(ptr)) _o_ = (o); \ - __typeof__(*(ptr)) _n_ = (n); \ - (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \ - (unsigned long)_n_, sizeof(*(ptr))); \ - }) - -extern void die(const char *str, struct pt_regs *regs, long err) __attribute__ ((noreturn)); -void free_initmem(void); -void free_initrd_mem(unsigned long start, unsigned long end); - -extern void *set_exception_table_vec(unsigned int vec, void *handler); - -static inline void *set_exception_table_evt(unsigned int evt, void *handler) -{ - return set_exception_table_vec(evt >> 5, handler); -} - -/* - * SH-2A has both 16 and 32-bit opcodes, do lame encoding checks. - */ -#ifdef CONFIG_CPU_SH2A -extern unsigned int instruction_size(unsigned int insn); -#elif defined(CONFIG_SUPERH32) -#define instruction_size(insn) (2) -#else -#define instruction_size(insn) (4) -#endif - -extern unsigned long cached_to_uncached; - -extern struct dentry *sh_debugfs_root; - -void per_cpu_trap_init(void); -void default_idle(void); -void cpu_idle_wait(void); - -asmlinkage void break_point_trap(void); - -#ifdef CONFIG_SUPERH32 -#define BUILD_TRAP_HANDLER(name) \ -asmlinkage void name##_trap_handler(unsigned long r4, unsigned long r5, \ - unsigned long r6, unsigned long r7, \ - struct pt_regs __regs) - -#define TRAP_HANDLER_DECL \ - struct pt_regs *regs = RELOC_HIDE(&__regs, 0); \ - unsigned int vec = regs->tra; \ - (void)vec; -#else -#define BUILD_TRAP_HANDLER(name) \ -asmlinkage void name##_trap_handler(unsigned int vec, struct pt_regs *regs) -#define TRAP_HANDLER_DECL -#endif - -BUILD_TRAP_HANDLER(address_error); -BUILD_TRAP_HANDLER(debug); -BUILD_TRAP_HANDLER(bug); -BUILD_TRAP_HANDLER(breakpoint); -BUILD_TRAP_HANDLER(singlestep); -BUILD_TRAP_HANDLER(fpu_error); -BUILD_TRAP_HANDLER(fpu_state_restore); -BUILD_TRAP_HANDLER(nmi); - -#define arch_align_stack(x) (x) - -struct mem_access { - unsigned long (*from)(void *dst, const void __user *src, unsigned long cnt); - unsigned long (*to)(void __user *dst, const void *src, unsigned long cnt); -}; - -#ifdef CONFIG_SUPERH32 -# include "system_32.h" -#else -# include "system_64.h" -#endif - -#endif diff --git a/arch/sh/include/asm/system_64.h b/arch/sh/include/asm/system_64.h deleted file mode 100644 index ab1dd917ea8..00000000000 --- a/arch/sh/include/asm/system_64.h +++ /dev/null @@ -1,76 +0,0 @@ -#ifndef __ASM_SH_SYSTEM_64_H -#define __ASM_SH_SYSTEM_64_H - -/* - * include/asm-sh/system_64.h - * - * Copyright (C) 2000, 2001 Paolo Alberelli - * Copyright (C) 2003 Paul Mundt - * Copyright (C) 2004 Richard Curnow - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#include <cpu/registers.h> -#include <asm/processor.h> - -/* - * switch_to() should switch tasks to task nr n, first - */ -struct task_struct *sh64_switch_to(struct task_struct *prev, - struct thread_struct *prev_thread, - struct task_struct *next, - struct thread_struct *next_thread); - -#define switch_to(prev,next,last) \ -do { \ - if (last_task_used_math != next) { \ - struct pt_regs *regs = next->thread.uregs; \ - if (regs) regs->sr |= SR_FD; \ - } \ - last = sh64_switch_to(prev, &prev->thread, next, \ - &next->thread); \ -} while (0) - -#define __uses_jump_to_uncached - -#define jump_to_uncached() do { } while (0) -#define back_to_cached() do { } while (0) - -#define __icbi(addr) __asm__ __volatile__ ( "icbi %0, 0\n\t" : : "r" (addr)) -#define __ocbp(addr) __asm__ __volatile__ ( "ocbp %0, 0\n\t" : : "r" (addr)) -#define __ocbi(addr) __asm__ __volatile__ ( "ocbi %0, 0\n\t" : : "r" (addr)) -#define __ocbwb(addr) __asm__ __volatile__ ( "ocbwb %0, 0\n\t" : : "r" (addr)) - -static inline reg_size_t register_align(void *val) -{ - return (unsigned long long)(signed long long)(signed long)val; -} - -#define SR_BL_LL 0x0000000010000000LL - -static inline void set_bl_bit(void) -{ - unsigned long long __dummy0, __dummy1 = SR_BL_LL; - - __asm__ __volatile__("getcon " __SR ", %0\n\t" - "or %0, %1, %0\n\t" - "putcon %0, " __SR "\n\t" - : "=&r" (__dummy0) - : "r" (__dummy1)); - -} - -static inline void clear_bl_bit(void) -{ - unsigned long long __dummy0, __dummy1 = ~SR_BL_LL; - - __asm__ __volatile__("getcon " __SR ", %0\n\t" - "and %0, %1, %0\n\t" - "putcon %0, " __SR "\n\t" - : "=&r" (__dummy0) - : "r" (__dummy1)); -} - -#endif /* __ASM_SH_SYSTEM_64_H */ diff --git a/arch/sh/include/asm/termbits.h b/arch/sh/include/asm/termbits.h deleted file mode 100644 index 3935b106de7..00000000000 --- a/arch/sh/include/asm/termbits.h +++ /dev/null @@ -1 +0,0 @@ -#include <asm-generic/termbits.h> diff --git a/arch/sh/include/asm/termios.h b/arch/sh/include/asm/termios.h deleted file mode 100644 index 280d78a9d96..00000000000 --- a/arch/sh/include/asm/termios.h +++ /dev/null @@ -1 +0,0 @@ -#include <asm-generic/termios.h> diff --git a/arch/sh/include/asm/thread_info.h b/arch/sh/include/asm/thread_info.h index 1f3d927e226..ad27ffa65e2 100644 --- a/arch/sh/include/asm/thread_info.h +++ b/arch/sh/include/asm/thread_info.h @@ -10,8 +10,18 @@ * - Incorporating suggestions made by Linus Torvalds and Dave Miller */ #ifdef __KERNEL__ + #include <asm/page.h> +/* + * Page fault error code bits + */ +#define FAULT_CODE_WRITE (1 << 0) /* write access */ +#define FAULT_CODE_INITIAL (1 << 1) /* initial page write */ +#define FAULT_CODE_ITLB (1 << 2) /* ITLB miss */ +#define FAULT_CODE_PROT (1 << 3) /* protection fault */ +#define FAULT_CODE_USER (1 << 4) /* user-mode access */ + #ifndef __ASSEMBLY__ #include <asm/processor.h> @@ -31,8 +41,6 @@ struct thread_info { #endif -#define PREEMPT_ACTIVE 0x10000000 - #if defined(CONFIG_4KSTACKS) #define THREAD_SHIFT 12 #else @@ -88,27 +96,23 @@ static inline struct thread_info *current_thread_info(void) return ti; } -/* thread information allocation */ -#if THREAD_SHIFT >= PAGE_SHIFT - #define THREAD_SIZE_ORDER (THREAD_SHIFT - PAGE_SHIFT) -#else /* THREAD_SHIFT < PAGE_SHIFT */ - -#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR - -extern struct thread_info *alloc_thread_info(struct task_struct *tsk); -extern void free_thread_info(struct thread_info *ti); - -#endif /* THREAD_SHIFT < PAGE_SHIFT */ +extern void arch_task_cache_init(void); +extern int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src); +extern void arch_release_task_struct(struct task_struct *tsk); +extern void init_thread_xstate(void); #endif /* __ASSEMBLY__ */ /* - * thread information flags - * - these are process state flags that various assembly files may need to access - * - pending work-to-be-done flags are in LSW - * - other flags in MSW + * Thread information flags + * + * - Limited to 24 bits, upper byte used for fault code encoding. + * + * - _TIF_ALLWORK_MASK and _TIF_WORK_MASK need to fit within 2 bytes, or + * we blow the tst immediate size constraints and need to fix up + * arch/sh/kernel/entry-common.S. */ #define TIF_SYSCALL_TRACE 0 /* syscall trace active */ #define TIF_SIGPENDING 1 /* signal pending */ @@ -119,8 +123,7 @@ extern void free_thread_info(struct thread_info *ti); #define TIF_NOTIFY_RESUME 7 /* callback before returning to user */ #define TIF_SYSCALL_TRACEPOINT 8 /* for ftrace syscall instrumentation */ #define TIF_POLLING_NRFLAG 17 /* true if poll_idle() is polling TIF_NEED_RESCHED */ -#define TIF_MEMDIE 18 -#define TIF_FREEZE 19 /* Freezing for suspend */ +#define TIF_MEMDIE 18 /* is terminating due to OOM killer */ #define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE) #define _TIF_SIGPENDING (1 << TIF_SIGPENDING) @@ -131,13 +134,6 @@ extern void free_thread_info(struct thread_info *ti); #define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME) #define _TIF_SYSCALL_TRACEPOINT (1 << TIF_SYSCALL_TRACEPOINT) #define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG) -#define _TIF_FREEZE (1 << TIF_FREEZE) - -/* - * _TIF_ALLWORK_MASK and _TIF_WORK_MASK need to fit within 2 bytes, or we - * blow the tst immediate size constraints and need to fix up - * arch/sh/kernel/entry-common.S. - */ /* work to do in syscall trace */ #define _TIF_WORK_SYSCALL_MASK (_TIF_SYSCALL_TRACE | _TIF_SINGLESTEP | \ @@ -165,13 +161,50 @@ extern void free_thread_info(struct thread_info *ti); #define TS_USEDFPU 0x0002 /* FPU used by this task this quantum */ #ifndef __ASSEMBLY__ + #define HAVE_SET_RESTORE_SIGMASK 1 static inline void set_restore_sigmask(void) { struct thread_info *ti = current_thread_info(); ti->status |= TS_RESTORE_SIGMASK; - set_bit(TIF_SIGPENDING, (unsigned long *)&ti->flags); + WARN_ON(!test_bit(TIF_SIGPENDING, (unsigned long *)&ti->flags)); } + +#define TI_FLAG_FAULT_CODE_SHIFT 24 + +/* + * Additional thread flag encoding + */ +static inline void set_thread_fault_code(unsigned int val) +{ + struct thread_info *ti = current_thread_info(); + ti->flags = (ti->flags & (~0 >> (32 - TI_FLAG_FAULT_CODE_SHIFT))) + | (val << TI_FLAG_FAULT_CODE_SHIFT); +} + +static inline unsigned int get_thread_fault_code(void) +{ + struct thread_info *ti = current_thread_info(); + return ti->flags >> TI_FLAG_FAULT_CODE_SHIFT; +} + +static inline void clear_restore_sigmask(void) +{ + current_thread_info()->status &= ~TS_RESTORE_SIGMASK; +} +static inline bool test_restore_sigmask(void) +{ + return current_thread_info()->status & TS_RESTORE_SIGMASK; +} +static inline bool test_and_clear_restore_sigmask(void) +{ + struct thread_info *ti = current_thread_info(); + if (!(ti->status & TS_RESTORE_SIGMASK)) + return false; + ti->status &= ~TS_RESTORE_SIGMASK; + return true; +} + #endif /* !__ASSEMBLY__ */ #endif /* __KERNEL__ */ diff --git a/arch/sh/include/asm/tlb.h b/arch/sh/include/asm/tlb.h index da8fe7ab872..62f80d2a9df 100644 --- a/arch/sh/include/asm/tlb.h +++ b/arch/sh/include/asm/tlb.h @@ -2,15 +2,17 @@ #define __ASM_SH_TLB_H #ifdef CONFIG_SUPERH64 -# include "tlb_64.h" +# include <asm/tlb_64.h> #endif #ifndef __ASSEMBLY__ #include <linux/pagemap.h> #ifdef CONFIG_MMU +#include <linux/swap.h> #include <asm/pgalloc.h> #include <asm/tlbflush.h> +#include <asm/mmu_context.h> /* * TLB handling. This allows us to remove pages from the page @@ -22,8 +24,6 @@ struct mmu_gather { unsigned long start, end; }; -DECLARE_PER_CPU(struct mmu_gather, mmu_gathers); - static inline void init_tlb_gather(struct mmu_gather *tlb) { tlb->start = TASK_SIZE; @@ -35,17 +35,15 @@ static inline void init_tlb_gather(struct mmu_gather *tlb) } } -static inline struct mmu_gather * -tlb_gather_mmu(struct mm_struct *mm, unsigned int full_mm_flush) +static inline void +tlb_gather_mmu(struct mmu_gather *tlb, struct mm_struct *mm, unsigned long start, unsigned long end) { - struct mmu_gather *tlb = &get_cpu_var(mmu_gathers); - tlb->mm = mm; - tlb->fullmm = full_mm_flush; + tlb->start = start; + tlb->end = end; + tlb->fullmm = !(start | (end+1)); init_tlb_gather(tlb); - - return tlb; } static inline void @@ -56,8 +54,6 @@ tlb_finish_mmu(struct mmu_gather *tlb, unsigned long start, unsigned long end) /* keep the page table cache within bounds */ check_pgt_cache(); - - put_cpu_var(mmu_gathers); } static inline void @@ -90,13 +86,51 @@ tlb_end_vma(struct mmu_gather *tlb, struct vm_area_struct *vma) } } -#define tlb_remove_page(tlb,page) free_page_and_swap_cache(page) +static inline void tlb_flush_mmu_tlbonly(struct mmu_gather *tlb) +{ +} + +static inline void tlb_flush_mmu_free(struct mmu_gather *tlb) +{ +} + +static inline void tlb_flush_mmu(struct mmu_gather *tlb) +{ +} + +static inline int __tlb_remove_page(struct mmu_gather *tlb, struct page *page) +{ + free_page_and_swap_cache(page); + return 1; /* avoid calling tlb_flush_mmu */ +} + +static inline void tlb_remove_page(struct mmu_gather *tlb, struct page *page) +{ + __tlb_remove_page(tlb, page); +} + #define pte_free_tlb(tlb, ptep, addr) pte_free((tlb)->mm, ptep) #define pmd_free_tlb(tlb, pmdp, addr) pmd_free((tlb)->mm, pmdp) #define pud_free_tlb(tlb, pudp, addr) pud_free((tlb)->mm, pudp) #define tlb_migrate_finish(mm) do { } while (0) +#if defined(CONFIG_CPU_SH4) || defined(CONFIG_SUPERH64) +extern void tlb_wire_entry(struct vm_area_struct *, unsigned long, pte_t); +extern void tlb_unwire_entry(void); +#else +static inline void tlb_wire_entry(struct vm_area_struct *vma , + unsigned long addr, pte_t pte) +{ + BUG(); +} + +static inline void tlb_unwire_entry(void) +{ + BUG(); +} +#endif + #else /* CONFIG_MMU */ #define tlb_start_vma(tlb, vma) do { } while (0) diff --git a/arch/sh/include/asm/tlbflush.h b/arch/sh/include/asm/tlbflush.h index e0ac97221ae..0df66f0c728 100644 --- a/arch/sh/include/asm/tlbflush.h +++ b/arch/sh/include/asm/tlbflush.h @@ -21,6 +21,8 @@ extern void local_flush_tlb_kernel_range(unsigned long start, unsigned long end); extern void local_flush_tlb_one(unsigned long asid, unsigned long page); +extern void __flush_tlb_global(void); + #ifdef CONFIG_SMP extern void flush_tlb_all(void); diff --git a/arch/sh/include/asm/topology.h b/arch/sh/include/asm/topology.h index 37cdadd975a..b0a282d65f6 100644 --- a/arch/sh/include/asm/topology.h +++ b/arch/sh/include/asm/topology.h @@ -3,31 +3,6 @@ #ifdef CONFIG_NUMA -/* sched_domains SD_NODE_INIT for sh machines */ -#define SD_NODE_INIT (struct sched_domain) { \ - .parent = NULL, \ - .child = NULL, \ - .groups = NULL, \ - .min_interval = 8, \ - .max_interval = 32, \ - .busy_factor = 32, \ - .imbalance_pct = 125, \ - .cache_nice_tries = 2, \ - .busy_idx = 3, \ - .idle_idx = 2, \ - .newidle_idx = 0, \ - .wake_idx = 0, \ - .forkexec_idx = 0, \ - .flags = SD_LOAD_BALANCE \ - | SD_BALANCE_FORK \ - | SD_BALANCE_EXEC \ - | SD_BALANCE_NEWIDLE \ - | SD_SERIALIZE, \ - .last_balance = jiffies, \ - .balance_interval = 1, \ - .nr_balance_failed = 0, \ -} - #define cpu_to_node(cpu) ((void)(cpu),0) #define parent_node(node) ((void)(node),0) @@ -35,7 +10,7 @@ #define pcibus_to_node(bus) ((void)(bus), -1) #define cpumask_of_pcibus(bus) (pcibus_to_node(bus) == -1 ? \ - CPU_MASK_ALL_PTR : \ + cpu_all_mask : \ cpumask_of_node(pcibus_to_node(bus))) #endif diff --git a/arch/sh/include/asm/traps.h b/arch/sh/include/asm/traps.h new file mode 100644 index 00000000000..9cc149a0dbd --- /dev/null +++ b/arch/sh/include/asm/traps.h @@ -0,0 +1,21 @@ +#ifndef __ASM_SH_TRAPS_H +#define __ASM_SH_TRAPS_H + +#include <linux/compiler.h> + +#ifdef CONFIG_SUPERH32 +# include <asm/traps_32.h> +#else +# include <asm/traps_64.h> +#endif + +BUILD_TRAP_HANDLER(address_error); +BUILD_TRAP_HANDLER(debug); +BUILD_TRAP_HANDLER(bug); +BUILD_TRAP_HANDLER(breakpoint); +BUILD_TRAP_HANDLER(singlestep); +BUILD_TRAP_HANDLER(fpu_error); +BUILD_TRAP_HANDLER(fpu_state_restore); +BUILD_TRAP_HANDLER(nmi); + +#endif /* __ASM_SH_TRAPS_H */ diff --git a/arch/sh/include/asm/traps_32.h b/arch/sh/include/asm/traps_32.h new file mode 100644 index 00000000000..17e129fe459 --- /dev/null +++ b/arch/sh/include/asm/traps_32.h @@ -0,0 +1,60 @@ +#ifndef __ASM_SH_TRAPS_32_H +#define __ASM_SH_TRAPS_32_H + +#include <linux/types.h> +#include <asm/mmu.h> + +#ifdef CONFIG_CPU_HAS_SR_RB +#define lookup_exception_vector() \ +({ \ + unsigned long _vec; \ + \ + __asm__ __volatile__ ( \ + "stc r2_bank, %0\n\t" \ + : "=r" (_vec) \ + ); \ + \ + _vec; \ +}) +#else +#define lookup_exception_vector() \ +({ \ + unsigned long _vec; \ + __asm__ __volatile__ ( \ + "mov r4, %0\n\t" \ + : "=r" (_vec) \ + ); \ + \ + _vec; \ +}) +#endif + +static inline void trigger_address_error(void) +{ + __asm__ __volatile__ ( + "ldc %0, sr\n\t" + "mov.l @%1, %0" + : + : "r" (0x10000000), "r" (0x80000001) + ); +} + +asmlinkage void do_address_error(struct pt_regs *regs, + unsigned long writeaccess, + unsigned long address); +asmlinkage void do_divide_error(unsigned long r4); +asmlinkage void do_reserved_inst(void); +asmlinkage void do_illegal_slot_inst(void); +asmlinkage void do_exception_error(void); + +#define BUILD_TRAP_HANDLER(name) \ +asmlinkage void name##_trap_handler(unsigned long r4, unsigned long r5, \ + unsigned long r6, unsigned long r7, \ + struct pt_regs __regs) + +#define TRAP_HANDLER_DECL \ + struct pt_regs *regs = RELOC_HIDE(&__regs, 0); \ + unsigned int vec = regs->tra; \ + (void)vec; + +#endif /* __ASM_SH_TRAPS_32_H */ diff --git a/arch/sh/include/asm/traps_64.h b/arch/sh/include/asm/traps_64.h new file mode 100644 index 00000000000..ef5eff91944 --- /dev/null +++ b/arch/sh/include/asm/traps_64.h @@ -0,0 +1,38 @@ +/* + * Copyright (C) 2000, 2001 Paolo Alberelli + * Copyright (C) 2003 Paul Mundt + * Copyright (C) 2004 Richard Curnow + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#ifndef __ASM_SH_TRAPS_64_H +#define __ASM_SH_TRAPS_64_H + +#include <cpu/registers.h> + +extern void phys_stext(void); + +#define lookup_exception_vector() \ +({ \ + unsigned long _vec; \ + \ + __asm__ __volatile__ ( \ + "getcon " __EXPEVT ", %0\n\t" \ + : "=r" (_vec) \ + ); \ + \ + _vec; \ +}) + +static inline void trigger_address_error(void) +{ + phys_stext(); +} + +#define BUILD_TRAP_HANDLER(name) \ +asmlinkage void name##_trap_handler(unsigned int vec, struct pt_regs *regs) +#define TRAP_HANDLER_DECL + +#endif /* __ASM_SH_TRAPS_64_H */ diff --git a/arch/sh/include/asm/types.h b/arch/sh/include/asm/types.h index f8421f7ad63..6a31053fa5e 100644 --- a/arch/sh/include/asm/types.h +++ b/arch/sh/include/asm/types.h @@ -1,12 +1,11 @@ #ifndef __ASM_SH_TYPES_H #define __ASM_SH_TYPES_H -#include <asm-generic/types.h> +#include <uapi/asm/types.h> /* * These aren't exported outside the kernel to avoid name space clashes */ -#ifdef __KERNEL__ #ifndef __ASSEMBLY__ #ifdef CONFIG_SUPERH32 @@ -18,6 +17,4 @@ typedef u64 reg_size_t; #endif #endif /* __ASSEMBLY__ */ -#endif /* __KERNEL__ */ - #endif /* __ASM_SH_TYPES_H */ diff --git a/arch/sh/include/asm/uaccess.h b/arch/sh/include/asm/uaccess.h index 075848f43b6..9486376605f 100644 --- a/arch/sh/include/asm/uaccess.h +++ b/arch/sh/include/asm/uaccess.h @@ -25,6 +25,8 @@ (__chk_user_ptr(addr), \ __access_ok((unsigned long __force)(addr), (size))) +#define user_addr_max() (current_thread_info()->addr_limit.seg) + /* * Uh, these should become the main single-value transfer routines ... * They automatically use the right size if we just have the right @@ -95,11 +97,16 @@ struct __large_struct { unsigned long buf[100]; }; }) #ifdef CONFIG_SUPERH32 -# include "uaccess_32.h" +# include <asm/uaccess_32.h> #else -# include "uaccess_64.h" +# include <asm/uaccess_64.h> #endif +extern long strncpy_from_user(char *dest, const char __user *src, long count); + +extern __must_check long strlen_user(const char __user *str); +extern __must_check long strnlen_user(const char __user *str, long n); + /* Generic arbitrary sized copy. */ /* Return the number of bytes NOT copied */ __kernel_size_t __copy_user(void *to, const void *from, __kernel_size_t n); @@ -137,37 +144,6 @@ __kernel_size_t __clear_user(void *addr, __kernel_size_t size); __cl_size; \ }) -/** - * strncpy_from_user: - Copy a NUL terminated string from userspace. - * @dst: Destination address, in kernel space. This buffer must be at - * least @count bytes long. - * @src: Source address, in user space. - * @count: Maximum number of bytes to copy, including the trailing NUL. - * - * Copies a NUL-terminated string from userspace to kernel space. - * - * On success, returns the length of the string (not including the trailing - * NUL). - * - * If access to userspace fails, returns -EFAULT (some data may have been - * copied). - * - * If @count is smaller than the length of the string, copies @count bytes - * and returns @count. - */ -#define strncpy_from_user(dest,src,count) \ -({ \ - unsigned long __sfu_src = (unsigned long)(src); \ - int __sfu_count = (int)(count); \ - long __sfu_res = -EFAULT; \ - \ - if (__access_ok(__sfu_src, __sfu_count)) \ - __sfu_res = __strncpy_from_user((unsigned long)(dest), \ - __sfu_src, __sfu_count); \ - \ - __sfu_res; \ -}) - static inline unsigned long copy_from_user(void *to, const void __user *from, unsigned long n) { @@ -192,43 +168,6 @@ copy_to_user(void __user *to, const void *from, unsigned long n) return __copy_size; } -/** - * strnlen_user: - Get the size of a string in user space. - * @s: The string to measure. - * @n: The maximum valid length - * - * Context: User context only. This function may sleep. - * - * Get the size of a NUL-terminated string in user space. - * - * Returns the size of the string INCLUDING the terminating NUL. - * On exception, returns 0. - * If the string is too long, returns a value greater than @n. - */ -static inline long strnlen_user(const char __user *s, long n) -{ - if (!__addr_ok(s)) - return 0; - else - return __strnlen_user(s, n); -} - -/** - * strlen_user: - Get the size of a string in user space. - * @str: The string to measure. - * - * Context: User context only. This function may sleep. - * - * Get the size of a NUL-terminated string in user space. - * - * Returns the size of the string INCLUDING the terminating NUL. - * On exception, returns 0. - * - * If there is a limit on the length of a valid string, you may wish to - * consider using strnlen_user() instead. - */ -#define strlen_user(str) strnlen_user(str, ~0UL >> 1) - /* * The exception table consists of pairs of addresses: the first is the * address of an instruction that is allowed to fault, and the second is @@ -254,5 +193,19 @@ int fixup_exception(struct pt_regs *regs); unsigned long search_exception_table(unsigned long addr); const struct exception_table_entry *search_exception_tables(unsigned long addr); +extern void *set_exception_table_vec(unsigned int vec, void *handler); + +static inline void *set_exception_table_evt(unsigned int evt, void *handler) +{ + return set_exception_table_vec(evt >> 5, handler); +} + +struct mem_access { + unsigned long (*from)(void *dst, const void __user *src, unsigned long cnt); + unsigned long (*to)(void __user *dst, const void *src, unsigned long cnt); +}; + +int handle_unaligned_access(insn_size_t instruction, struct pt_regs *regs, + struct mem_access *ma, int, unsigned long address); #endif /* __ASM_SH_UACCESS_H */ diff --git a/arch/sh/include/asm/uaccess_32.h b/arch/sh/include/asm/uaccess_32.h index ae0d24f6653..c0de7ee35ab 100644 --- a/arch/sh/include/asm/uaccess_32.h +++ b/arch/sh/include/asm/uaccess_32.h @@ -170,79 +170,4 @@ __asm__ __volatile__( \ extern void __put_user_unknown(void); -static inline int -__strncpy_from_user(unsigned long __dest, unsigned long __user __src, int __count) -{ - __kernel_size_t res; - unsigned long __dummy, _d, _s, _c; - - __asm__ __volatile__( - "9:\n" - "mov.b @%2+, %1\n\t" - "cmp/eq #0, %1\n\t" - "bt/s 2f\n" - "1:\n" - "mov.b %1, @%3\n\t" - "dt %4\n\t" - "bf/s 9b\n\t" - " add #1, %3\n\t" - "2:\n\t" - "sub %4, %0\n" - "3:\n" - ".section .fixup,\"ax\"\n" - "4:\n\t" - "mov.l 5f, %1\n\t" - "jmp @%1\n\t" - " mov %9, %0\n\t" - ".balign 4\n" - "5: .long 3b\n" - ".previous\n" - ".section __ex_table,\"a\"\n" - " .balign 4\n" - " .long 9b,4b\n" - ".previous" - : "=r" (res), "=&z" (__dummy), "=r" (_s), "=r" (_d), "=r"(_c) - : "0" (__count), "2" (__src), "3" (__dest), "4" (__count), - "i" (-EFAULT) - : "memory", "t"); - - return res; -} - -/* - * Return the size of a string (including the ending 0 even when we have - * exceeded the maximum string length). - */ -static inline long __strnlen_user(const char __user *__s, long __n) -{ - unsigned long res; - unsigned long __dummy; - - __asm__ __volatile__( - "1:\t" - "mov.b @(%0,%3), %1\n\t" - "cmp/eq %4, %0\n\t" - "bt/s 2f\n\t" - " add #1, %0\n\t" - "tst %1, %1\n\t" - "bf 1b\n\t" - "2:\n" - ".section .fixup,\"ax\"\n" - "3:\n\t" - "mov.l 4f, %1\n\t" - "jmp @%1\n\t" - " mov #0, %0\n" - ".balign 4\n" - "4: .long 2b\n" - ".previous\n" - ".section __ex_table,\"a\"\n" - " .balign 4\n" - " .long 1b,3b\n" - ".previous" - : "=z" (res), "=&r" (__dummy) - : "0" (0), "r" (__s), "r" (__n) - : "t"); - return res; -} - #endif /* __ASM_SH_UACCESS_32_H */ diff --git a/arch/sh/include/asm/uaccess_64.h b/arch/sh/include/asm/uaccess_64.h index 56fd20b8cdc..2e07e0f40c6 100644 --- a/arch/sh/include/asm/uaccess_64.h +++ b/arch/sh/include/asm/uaccess_64.h @@ -84,8 +84,4 @@ extern long __put_user_asm_l(void *, long); extern long __put_user_asm_q(void *, long); extern void __put_user_unknown(void); -extern long __strnlen_user(const char *__s, long __n); -extern int __strncpy_from_user(unsigned long __dest, - unsigned long __user __src, int __count); - #endif /* __ASM_SH_UACCESS_64_H */ diff --git a/arch/sh/include/asm/ubc.h b/arch/sh/include/asm/ubc.h deleted file mode 100644 index 9bf96168443..00000000000 --- a/arch/sh/include/asm/ubc.h +++ /dev/null @@ -1,64 +0,0 @@ -/* - * include/asm-sh/ubc.h - * - * Copyright (C) 1999 Niibe Yutaka - * Copyright (C) 2002, 2003 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_SH_UBC_H -#define __ASM_SH_UBC_H -#ifdef __KERNEL__ - -#include <cpu/ubc.h> - -/* User Break Controller */ -#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) -#define UBC_TYPE_SH7729 (current_cpu_data.type == CPU_SH7729) -#else -#define UBC_TYPE_SH7729 0 -#endif - -#define BAMR_ASID (1 << 2) -#define BAMR_NONE 0 -#define BAMR_10 0x1 -#define BAMR_12 0x2 -#define BAMR_ALL 0x3 -#define BAMR_16 0x8 -#define BAMR_20 0x9 - -#define BBR_INST (1 << 4) -#define BBR_DATA (2 << 4) -#define BBR_READ (1 << 2) -#define BBR_WRITE (2 << 2) -#define BBR_BYTE 0x1 -#define BBR_HALF 0x2 -#define BBR_LONG 0x3 -#define BBR_QUAD (1 << 6) /* SH7750 */ -#define BBR_CPU (1 << 6) /* SH7709A,SH7729 */ -#define BBR_DMA (2 << 6) /* SH7709A,SH7729 */ - -#define BRCR_CMFA (1 << 15) -#define BRCR_CMFB (1 << 14) - -#if defined CONFIG_CPU_SH2A -#define BRCR_CMFCA (1 << 15) -#define BRCR_CMFCB (1 << 14) -#define BRCR_CMFDA (1 << 13) -#define BRCR_CMFDB (1 << 12) -#define BRCR_PCBB (1 << 6) /* 1: after execution */ -#define BRCR_PCBA (1 << 5) /* 1: after execution */ -#define BRCR_PCTE 0 -#else -#define BRCR_PCTE (1 << 11) -#define BRCR_PCBA (1 << 10) /* 1: after execution */ -#define BRCR_DBEB (1 << 7) -#define BRCR_PCBB (1 << 6) -#define BRCR_SEQ (1 << 3) -#define BRCR_UBDE (1 << 0) -#endif - -#endif /* __KERNEL__ */ -#endif /* __ASM_SH_UBC_H */ diff --git a/arch/sh/include/asm/ucontext.h b/arch/sh/include/asm/ucontext.h deleted file mode 100644 index 9bc07b9f30f..00000000000 --- a/arch/sh/include/asm/ucontext.h +++ /dev/null @@ -1 +0,0 @@ -#include <asm-generic/ucontext.h> diff --git a/arch/sh/include/asm/unaligned-sh4a.h b/arch/sh/include/asm/unaligned-sh4a.h index 9f4dd252c98..95adc500cab 100644 --- a/arch/sh/include/asm/unaligned-sh4a.h +++ b/arch/sh/include/asm/unaligned-sh4a.h @@ -9,7 +9,7 @@ * struct. * * The same note as with the movli.l/movco.l pair applies here, as long - * as the load is gauranteed to be inlined, nothing else will hook in to + * as the load is guaranteed to be inlined, nothing else will hook in to * r0 and we get the return value for free. * * NOTE: Due to the fact we require r0 encoding, care should be taken to @@ -18,10 +18,20 @@ * of spill registers and blowing up when building at low optimization * levels. See http://gcc.gnu.org/bugzilla/show_bug.cgi?id=34777. */ +#include <linux/unaligned/packed_struct.h> #include <linux/types.h> #include <asm/byteorder.h> -static __always_inline u32 __get_unaligned_cpu32(const u8 *p) +static inline u16 sh4a_get_unaligned_cpu16(const u8 *p) +{ +#ifdef __LITTLE_ENDIAN + return p[0] | p[1] << 8; +#else + return p[0] << 8 | p[1]; +#endif +} + +static __always_inline u32 sh4a_get_unaligned_cpu32(const u8 *p) { unsigned long unaligned; @@ -34,218 +44,148 @@ static __always_inline u32 __get_unaligned_cpu32(const u8 *p) return unaligned; } -struct __una_u16 { u16 x __attribute__((packed)); }; -struct __una_u32 { u32 x __attribute__((packed)); }; -struct __una_u64 { u64 x __attribute__((packed)); }; - -static inline u16 __get_unaligned_cpu16(const u8 *p) -{ -#ifdef __LITTLE_ENDIAN - return p[0] | p[1] << 8; -#else - return p[0] << 8 | p[1]; -#endif -} - /* * Even though movua.l supports auto-increment on the read side, it can * only store to r0 due to instruction encoding constraints, so just let * the compiler sort it out on its own. */ -static inline u64 __get_unaligned_cpu64(const u8 *p) +static inline u64 sh4a_get_unaligned_cpu64(const u8 *p) { #ifdef __LITTLE_ENDIAN - return (u64)__get_unaligned_cpu32(p + 4) << 32 | - __get_unaligned_cpu32(p); + return (u64)sh4a_get_unaligned_cpu32(p + 4) << 32 | + sh4a_get_unaligned_cpu32(p); #else - return (u64)__get_unaligned_cpu32(p) << 32 | - __get_unaligned_cpu32(p + 4); + return (u64)sh4a_get_unaligned_cpu32(p) << 32 | + sh4a_get_unaligned_cpu32(p + 4); #endif } static inline u16 get_unaligned_le16(const void *p) { - return le16_to_cpu(__get_unaligned_cpu16(p)); + return le16_to_cpu(sh4a_get_unaligned_cpu16(p)); } static inline u32 get_unaligned_le32(const void *p) { - return le32_to_cpu(__get_unaligned_cpu32(p)); + return le32_to_cpu(sh4a_get_unaligned_cpu32(p)); } static inline u64 get_unaligned_le64(const void *p) { - return le64_to_cpu(__get_unaligned_cpu64(p)); + return le64_to_cpu(sh4a_get_unaligned_cpu64(p)); } static inline u16 get_unaligned_be16(const void *p) { - return be16_to_cpu(__get_unaligned_cpu16(p)); + return be16_to_cpu(sh4a_get_unaligned_cpu16(p)); } static inline u32 get_unaligned_be32(const void *p) { - return be32_to_cpu(__get_unaligned_cpu32(p)); + return be32_to_cpu(sh4a_get_unaligned_cpu32(p)); } static inline u64 get_unaligned_be64(const void *p) { - return be64_to_cpu(__get_unaligned_cpu64(p)); + return be64_to_cpu(sh4a_get_unaligned_cpu64(p)); } -static inline void __put_le16_noalign(u8 *p, u16 val) +static inline void nonnative_put_le16(u16 val, u8 *p) { *p++ = val; *p++ = val >> 8; } -static inline void __put_le32_noalign(u8 *p, u32 val) +static inline void nonnative_put_le32(u32 val, u8 *p) { - __put_le16_noalign(p, val); - __put_le16_noalign(p + 2, val >> 16); + nonnative_put_le16(val, p); + nonnative_put_le16(val >> 16, p + 2); } -static inline void __put_le64_noalign(u8 *p, u64 val) +static inline void nonnative_put_le64(u64 val, u8 *p) { - __put_le32_noalign(p, val); - __put_le32_noalign(p + 4, val >> 32); + nonnative_put_le32(val, p); + nonnative_put_le32(val >> 32, p + 4); } -static inline void __put_be16_noalign(u8 *p, u16 val) +static inline void nonnative_put_be16(u16 val, u8 *p) { *p++ = val >> 8; *p++ = val; } -static inline void __put_be32_noalign(u8 *p, u32 val) +static inline void nonnative_put_be32(u32 val, u8 *p) { - __put_be16_noalign(p, val >> 16); - __put_be16_noalign(p + 2, val); + nonnative_put_be16(val >> 16, p); + nonnative_put_be16(val, p + 2); } -static inline void __put_be64_noalign(u8 *p, u64 val) +static inline void nonnative_put_be64(u64 val, u8 *p) { - __put_be32_noalign(p, val >> 32); - __put_be32_noalign(p + 4, val); + nonnative_put_be32(val >> 32, p); + nonnative_put_be32(val, p + 4); } static inline void put_unaligned_le16(u16 val, void *p) { #ifdef __LITTLE_ENDIAN - ((struct __una_u16 *)p)->x = val; + __put_unaligned_cpu16(val, p); #else - __put_le16_noalign(p, val); + nonnative_put_le16(val, p); #endif } static inline void put_unaligned_le32(u32 val, void *p) { #ifdef __LITTLE_ENDIAN - ((struct __una_u32 *)p)->x = val; + __put_unaligned_cpu32(val, p); #else - __put_le32_noalign(p, val); + nonnative_put_le32(val, p); #endif } static inline void put_unaligned_le64(u64 val, void *p) { #ifdef __LITTLE_ENDIAN - ((struct __una_u64 *)p)->x = val; + __put_unaligned_cpu64(val, p); #else - __put_le64_noalign(p, val); + nonnative_put_le64(val, p); #endif } static inline void put_unaligned_be16(u16 val, void *p) { #ifdef __BIG_ENDIAN - ((struct __una_u16 *)p)->x = val; + __put_unaligned_cpu16(val, p); #else - __put_be16_noalign(p, val); + nonnative_put_be16(val, p); #endif } static inline void put_unaligned_be32(u32 val, void *p) { #ifdef __BIG_ENDIAN - ((struct __una_u32 *)p)->x = val; + __put_unaligned_cpu32(val, p); #else - __put_be32_noalign(p, val); + nonnative_put_be32(val, p); #endif } static inline void put_unaligned_be64(u64 val, void *p) { #ifdef __BIG_ENDIAN - ((struct __una_u64 *)p)->x = val; + __put_unaligned_cpu64(val, p); #else - __put_be64_noalign(p, val); + nonnative_put_be64(val, p); #endif } /* - * Cause a link-time error if we try an unaligned access other than - * 1,2,4 or 8 bytes long + * While it's a bit non-obvious, even though the generic le/be wrappers + * use the __get/put_xxx prefixing, they actually wrap in to the + * non-prefixed get/put_xxx variants as provided above. */ -extern void __bad_unaligned_access_size(void); - -#define __get_unaligned_le(ptr) ((__force typeof(*(ptr)))({ \ - __builtin_choose_expr(sizeof(*(ptr)) == 1, *(ptr), \ - __builtin_choose_expr(sizeof(*(ptr)) == 2, get_unaligned_le16((ptr)), \ - __builtin_choose_expr(sizeof(*(ptr)) == 4, get_unaligned_le32((ptr)), \ - __builtin_choose_expr(sizeof(*(ptr)) == 8, get_unaligned_le64((ptr)), \ - __bad_unaligned_access_size())))); \ - })) - -#define __get_unaligned_be(ptr) ((__force typeof(*(ptr)))({ \ - __builtin_choose_expr(sizeof(*(ptr)) == 1, *(ptr), \ - __builtin_choose_expr(sizeof(*(ptr)) == 2, get_unaligned_be16((ptr)), \ - __builtin_choose_expr(sizeof(*(ptr)) == 4, get_unaligned_be32((ptr)), \ - __builtin_choose_expr(sizeof(*(ptr)) == 8, get_unaligned_be64((ptr)), \ - __bad_unaligned_access_size())))); \ - })) - -#define __put_unaligned_le(val, ptr) ({ \ - void *__gu_p = (ptr); \ - switch (sizeof(*(ptr))) { \ - case 1: \ - *(u8 *)__gu_p = (__force u8)(val); \ - break; \ - case 2: \ - put_unaligned_le16((__force u16)(val), __gu_p); \ - break; \ - case 4: \ - put_unaligned_le32((__force u32)(val), __gu_p); \ - break; \ - case 8: \ - put_unaligned_le64((__force u64)(val), __gu_p); \ - break; \ - default: \ - __bad_unaligned_access_size(); \ - break; \ - } \ - (void)0; }) - -#define __put_unaligned_be(val, ptr) ({ \ - void *__gu_p = (ptr); \ - switch (sizeof(*(ptr))) { \ - case 1: \ - *(u8 *)__gu_p = (__force u8)(val); \ - break; \ - case 2: \ - put_unaligned_be16((__force u16)(val), __gu_p); \ - break; \ - case 4: \ - put_unaligned_be32((__force u32)(val), __gu_p); \ - break; \ - case 8: \ - put_unaligned_be64((__force u64)(val), __gu_p); \ - break; \ - default: \ - __bad_unaligned_access_size(); \ - break; \ - } \ - (void)0; }) +#include <linux/unaligned/generic.h> #ifdef __LITTLE_ENDIAN # define get_unaligned __get_unaligned_le diff --git a/arch/sh/include/asm/uncached.h b/arch/sh/include/asm/uncached.h new file mode 100644 index 00000000000..6f8816b79cf --- /dev/null +++ b/arch/sh/include/asm/uncached.h @@ -0,0 +1,58 @@ +#ifndef __ASM_SH_UNCACHED_H +#define __ASM_SH_UNCACHED_H + +#include <linux/bug.h> + +#ifdef CONFIG_UNCACHED_MAPPING +extern unsigned long cached_to_uncached; +extern unsigned long uncached_size; +extern unsigned long uncached_start, uncached_end; + +extern int virt_addr_uncached(unsigned long kaddr); +extern void uncached_init(void); +extern void uncached_resize(unsigned long size); + +/* + * Jump to uncached area. + * When handling TLB or caches, we need to do it from an uncached area. + */ +#define jump_to_uncached() \ +do { \ + unsigned long __dummy; \ + \ + __asm__ __volatile__( \ + "mova 1f, %0\n\t" \ + "add %1, %0\n\t" \ + "jmp @%0\n\t" \ + " nop\n\t" \ + ".balign 4\n" \ + "1:" \ + : "=&z" (__dummy) \ + : "r" (cached_to_uncached)); \ +} while (0) + +/* + * Back to cached area. + */ +#define back_to_cached() \ +do { \ + unsigned long __dummy; \ + ctrl_barrier(); \ + __asm__ __volatile__( \ + "mov.l 1f, %0\n\t" \ + "jmp @%0\n\t" \ + " nop\n\t" \ + ".balign 4\n" \ + "1: .long 2f\n" \ + "2:" \ + : "=&r" (__dummy)); \ +} while (0) +#else +#define virt_addr_uncached(kaddr) (0) +#define uncached_init() do { } while (0) +#define uncached_resize(size) BUG() +#define jump_to_uncached() do { } while (0) +#define back_to_cached() do { } while (0) +#endif + +#endif /* __ASM_SH_UNCACHED_H */ diff --git a/arch/sh/include/asm/unistd.h b/arch/sh/include/asm/unistd.h index 65be656ead7..126fe8340b2 100644 --- a/arch/sh/include/asm/unistd.h +++ b/arch/sh/include/asm/unistd.h @@ -1,13 +1,32 @@ -#ifdef __KERNEL__ # ifdef CONFIG_SUPERH32 -# include "unistd_32.h" +# include <asm/unistd_32.h> # else -# include "unistd_64.h" +# include <asm/unistd_64.h> # endif -#else -# ifdef __SH5__ -# include "unistd_64.h" -# else -# include "unistd_32.h" -# endif -#endif + +# define __ARCH_WANT_OLD_READDIR +# define __ARCH_WANT_OLD_STAT +# define __ARCH_WANT_STAT64 +# define __ARCH_WANT_SYS_ALARM +# define __ARCH_WANT_SYS_GETHOSTNAME +# define __ARCH_WANT_SYS_IPC +# define __ARCH_WANT_SYS_PAUSE +# define __ARCH_WANT_SYS_SIGNAL +# define __ARCH_WANT_SYS_TIME +# define __ARCH_WANT_SYS_UTIME +# define __ARCH_WANT_SYS_WAITPID +# define __ARCH_WANT_SYS_SOCKETCALL +# define __ARCH_WANT_SYS_FADVISE64 +# define __ARCH_WANT_SYS_GETPGRP +# define __ARCH_WANT_SYS_LLSEEK +# define __ARCH_WANT_SYS_NICE +# define __ARCH_WANT_SYS_OLD_GETRLIMIT +# define __ARCH_WANT_SYS_OLD_UNAME +# define __ARCH_WANT_SYS_OLDUMOUNT +# define __ARCH_WANT_SYS_SIGPENDING +# define __ARCH_WANT_SYS_SIGPROCMASK +# define __ARCH_WANT_SYS_FORK +# define __ARCH_WANT_SYS_VFORK +# define __ARCH_WANT_SYS_CLONE + +#include <uapi/asm/unistd.h> diff --git a/arch/sh/include/asm/vmlinux.lds.h b/arch/sh/include/asm/vmlinux.lds.h index 244ec4ad9a7..d58ad493b3a 100644 --- a/arch/sh/include/asm/vmlinux.lds.h +++ b/arch/sh/include/asm/vmlinux.lds.h @@ -14,4 +14,12 @@ #define DWARF_EH_FRAME #endif +#ifdef CONFIG_SUPERH64 +#define EXTRA_TEXT \ + *(.text64) \ + *(.text..SHmedia32) +#else +#define EXTRA_TEXT +#endif + #endif /* __ASM_SH_VMLINUX_LDS_H */ diff --git a/arch/sh/include/asm/watchdog.h b/arch/sh/include/asm/watchdog.h index 19dfff5c851..85a7aca7fb8 100644 --- a/arch/sh/include/asm/watchdog.h +++ b/arch/sh/include/asm/watchdog.h @@ -70,7 +70,7 @@ */ static inline __u32 sh_wdt_read_cnt(void) { - return ctrl_inl(WTCNT_R); + return __raw_readl(WTCNT_R); } /** @@ -82,7 +82,7 @@ static inline __u32 sh_wdt_read_cnt(void) */ static inline void sh_wdt_write_cnt(__u32 val) { - ctrl_outl((WTCNT_HIGH << 24) | (__u32)val, WTCNT); + __raw_writel((WTCNT_HIGH << 24) | (__u32)val, WTCNT); } /** @@ -94,7 +94,7 @@ static inline void sh_wdt_write_cnt(__u32 val) */ static inline void sh_wdt_write_bst(__u32 val) { - ctrl_outl((WTBST_HIGH << 24) | (__u32)val, WTBST); + __raw_writel((WTBST_HIGH << 24) | (__u32)val, WTBST); } /** * sh_wdt_read_csr - Read from Control/Status Register @@ -103,7 +103,7 @@ static inline void sh_wdt_write_bst(__u32 val) */ static inline __u32 sh_wdt_read_csr(void) { - return ctrl_inl(WTCSR_R); + return __raw_readl(WTCSR_R); } /** @@ -115,7 +115,7 @@ static inline __u32 sh_wdt_read_csr(void) */ static inline void sh_wdt_write_csr(__u32 val) { - ctrl_outl((WTCSR_HIGH << 24) | (__u32)val, WTCSR); + __raw_writel((WTCSR_HIGH << 24) | (__u32)val, WTCSR); } #else /** @@ -124,7 +124,7 @@ static inline void sh_wdt_write_csr(__u32 val) */ static inline __u8 sh_wdt_read_cnt(void) { - return ctrl_inb(WTCNT_R); + return __raw_readb(WTCNT_R); } /** @@ -136,7 +136,7 @@ static inline __u8 sh_wdt_read_cnt(void) */ static inline void sh_wdt_write_cnt(__u8 val) { - ctrl_outw((WTCNT_HIGH << 8) | (__u16)val, WTCNT); + __raw_writew((WTCNT_HIGH << 8) | (__u16)val, WTCNT); } /** @@ -146,7 +146,7 @@ static inline void sh_wdt_write_cnt(__u8 val) */ static inline __u8 sh_wdt_read_csr(void) { - return ctrl_inb(WTCSR_R); + return __raw_readb(WTCSR_R); } /** @@ -158,7 +158,7 @@ static inline __u8 sh_wdt_read_csr(void) */ static inline void sh_wdt_write_csr(__u8 val) { - ctrl_outw((WTCSR_HIGH << 8) | (__u16)val, WTCSR); + __raw_writew((WTCSR_HIGH << 8) | (__u16)val, WTCSR); } #endif /* CONFIG_CPU_SUBTYPE_SH7785 || CONFIG_CPU_SUBTYPE_SH7780 */ #endif /* __KERNEL__ */ diff --git a/arch/sh/include/asm/word-at-a-time.h b/arch/sh/include/asm/word-at-a-time.h new file mode 100644 index 00000000000..6e38953ff7f --- /dev/null +++ b/arch/sh/include/asm/word-at-a-time.h @@ -0,0 +1,53 @@ +#ifndef __ASM_SH_WORD_AT_A_TIME_H +#define __ASM_SH_WORD_AT_A_TIME_H + +#ifdef CONFIG_CPU_BIG_ENDIAN +# include <asm-generic/word-at-a-time.h> +#else +/* + * Little-endian version cribbed from x86. + */ +struct word_at_a_time { + const unsigned long one_bits, high_bits; +}; + +#define WORD_AT_A_TIME_CONSTANTS { REPEAT_BYTE(0x01), REPEAT_BYTE(0x80) } + +/* Carl Chatfield / Jan Achrenius G+ version for 32-bit */ +static inline long count_masked_bytes(long mask) +{ + /* (000000 0000ff 00ffff ffffff) -> ( 1 1 2 3 ) */ + long a = (0x0ff0001+mask) >> 23; + /* Fix the 1 for 00 case */ + return a & mask; +} + +/* Return nonzero if it has a zero */ +static inline unsigned long has_zero(unsigned long a, unsigned long *bits, const struct word_at_a_time *c) +{ + unsigned long mask = ((a - c->one_bits) & ~a) & c->high_bits; + *bits = mask; + return mask; +} + +static inline unsigned long prep_zero_mask(unsigned long a, unsigned long bits, const struct word_at_a_time *c) +{ + return bits; +} + +static inline unsigned long create_zero_mask(unsigned long bits) +{ + bits = (bits - 1) & ~bits; + return bits >> 7; +} + +/* The mask we created is directly usable as a bytemask */ +#define zero_bytemask(mask) (mask) + +static inline unsigned long find_zero(unsigned long mask) +{ + return count_masked_bytes(mask); +} +#endif + +#endif diff --git a/arch/sh/include/asm/xor.h b/arch/sh/include/asm/xor.h deleted file mode 100644 index c82eb12a5b1..00000000000 --- a/arch/sh/include/asm/xor.h +++ /dev/null @@ -1 +0,0 @@ -#include <asm-generic/xor.h> diff --git a/arch/sh/include/cpu-common/cpu/pfc.h b/arch/sh/include/cpu-common/cpu/pfc.h new file mode 100644 index 00000000000..e538813286a --- /dev/null +++ b/arch/sh/include/cpu-common/cpu/pfc.h @@ -0,0 +1,26 @@ +/* + * SH Pin Function Control Initialization + * + * Copyright (C) 2012 Renesas Solutions Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __ARCH_SH_CPU_PFC_H__ +#define __ARCH_SH_CPU_PFC_H__ + +#include <linux/types.h> + +struct resource; + +int sh_pfc_register(const char *name, + struct resource *resource, u32 num_resources); + +#endif /* __ARCH_SH_CPU_PFC_H__ */ diff --git a/arch/sh/include/cpu-sh2/cpu/cache.h b/arch/sh/include/cpu-sh2/cpu/cache.h index 673515bc413..aa1b2b9088a 100644 --- a/arch/sh/include/cpu-sh2/cpu/cache.h +++ b/arch/sh/include/cpu-sh2/cpu/cache.h @@ -18,7 +18,7 @@ #define SH_CACHE_ASSOC 8 #if defined(CONFIG_CPU_SUBTYPE_SH7619) -#define CCR 0xffffffec +#define SH_CCR 0xffffffec #define CCR_CACHE_CE 0x01 /* Cache enable */ #define CCR_CACHE_WT 0x02 /* CCR[bit1=1,bit2=1] */ diff --git a/arch/sh/include/cpu-sh2/cpu/dma.h b/arch/sh/include/cpu-sh2/cpu/dma.h deleted file mode 100644 index d66b43cdc63..00000000000 --- a/arch/sh/include/cpu-sh2/cpu/dma.h +++ /dev/null @@ -1,23 +0,0 @@ -/* - * Definitions for the SH-2 DMAC. - * - * Copyright (C) 2003 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_CPU_SH2_DMA_H -#define __ASM_CPU_SH2_DMA_H - -#define SH_MAX_DMA_CHANNELS 2 - -#define SAR ((unsigned long[]){ 0xffffff80, 0xffffff90 }) -#define DAR ((unsigned long[]){ 0xffffff84, 0xffffff94 }) -#define DMATCR ((unsigned long[]){ 0xffffff88, 0xffffff98 }) -#define CHCR ((unsigned long[]){ 0xfffffffc, 0xffffff9c }) - -#define DMAOR 0xffffffb0 - -#endif /* __ASM_CPU_SH2_DMA_H */ - diff --git a/arch/sh/include/cpu-sh2/cpu/ubc.h b/arch/sh/include/cpu-sh2/cpu/ubc.h deleted file mode 100644 index ba0e87f19c7..00000000000 --- a/arch/sh/include/cpu-sh2/cpu/ubc.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * include/asm-sh/cpu-sh2/ubc.h - * - * Copyright (C) 2003 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_CPU_SH2_UBC_H -#define __ASM_CPU_SH2_UBC_H - -#define UBC_BARA 0xffffff40 -#define UBC_BAMRA 0xffffff44 -#define UBC_BBRA 0xffffff48 -#define UBC_BARB 0xffffff60 -#define UBC_BAMRB 0xffffff64 -#define UBC_BBRB 0xffffff68 -#define UBC_BDRB 0xffffff70 -#define UBC_BDMRB 0xffffff74 -#define UBC_BRCR 0xffffff78 - -/* - * We don't have any ASID changes to make in the UBC on the SH-2. - * - * Make these purposely invalid to track misuse. - */ -#define UBC_BASRA 0x00000000 -#define UBC_BASRB 0x00000000 - -#endif /* __ASM_CPU_SH2_UBC_H */ - diff --git a/arch/sh/include/cpu-sh2/cpu/watchdog.h b/arch/sh/include/cpu-sh2/cpu/watchdog.h index 393161c9c6d..1eab8aa63a6 100644 --- a/arch/sh/include/cpu-sh2/cpu/watchdog.h +++ b/arch/sh/include/cpu-sh2/cpu/watchdog.h @@ -44,7 +44,7 @@ static inline __u8 sh_wdt_read_rstcsr(void) /* * Same read/write brain-damage as for WTCNT here.. */ - return ctrl_inb(RSTCSR_R); + return __raw_readb(RSTCSR_R); } /** @@ -62,7 +62,7 @@ static inline void sh_wdt_write_rstcsr(__u8 val) * we can't presently touch the WOVF bit, since the upper byte * has to be swapped for this. So just leave it alone.. */ - ctrl_outw((WTCNT_HIGH << 8) | (__u16)val, RSTCSR); + __raw_writeb((WTCNT_HIGH << 8) | (__u16)val, RSTCSR); } #endif /* __ASM_CPU_SH2_WATCHDOG_H */ diff --git a/arch/sh/include/cpu-sh2a/cpu/cache.h b/arch/sh/include/cpu-sh2a/cpu/cache.h index defb0baa5a0..b27ce92cb60 100644 --- a/arch/sh/include/cpu-sh2a/cpu/cache.h +++ b/arch/sh/include/cpu-sh2a/cpu/cache.h @@ -17,8 +17,8 @@ #define SH_CACHE_COMBINED 4 #define SH_CACHE_ASSOC 8 -#define CCR 0xfffc1000 /* CCR1 */ -#define CCR2 0xfffc1004 +#define SH_CCR 0xfffc1000 /* CCR1 */ +#define SH_CCR2 0xfffc1004 /* * Most of the SH-2A CCR1 definitions resemble the SH-4 ones. All others not diff --git a/arch/sh/include/cpu-sh2a/cpu/dma.h b/arch/sh/include/cpu-sh2a/cpu/dma.h deleted file mode 100644 index 27a13ef4fdf..00000000000 --- a/arch/sh/include/cpu-sh2a/cpu/dma.h +++ /dev/null @@ -1 +0,0 @@ -#include <cpu-sh2/cpu/dma.h> diff --git a/arch/sh/include/cpu-sh2a/cpu/sh7264.h b/arch/sh/include/cpu-sh2a/cpu/sh7264.h new file mode 100644 index 00000000000..4d1ef6d74bd --- /dev/null +++ b/arch/sh/include/cpu-sh2a/cpu/sh7264.h @@ -0,0 +1,176 @@ +#ifndef __ASM_SH7264_H__ +#define __ASM_SH7264_H__ + +enum { + /* Port A */ + GPIO_PA3, GPIO_PA2, GPIO_PA1, GPIO_PA0, + + /* Port B */ + GPIO_PB22, GPIO_PB21, GPIO_PB20, + GPIO_PB19, GPIO_PB18, GPIO_PB17, GPIO_PB16, + GPIO_PB15, GPIO_PB14, GPIO_PB13, GPIO_PB12, + GPIO_PB11, GPIO_PB10, GPIO_PB9, GPIO_PB8, + GPIO_PB7, GPIO_PB6, GPIO_PB5, GPIO_PB4, + GPIO_PB3, GPIO_PB2, GPIO_PB1, + + /* Port C */ + GPIO_PC10, GPIO_PC9, GPIO_PC8, + GPIO_PC7, GPIO_PC6, GPIO_PC5, GPIO_PC4, + GPIO_PC3, GPIO_PC2, GPIO_PC1, GPIO_PC0, + + /* Port D */ + GPIO_PD15, GPIO_PD14, GPIO_PD13, GPIO_PD12, + GPIO_PD11, GPIO_PD10, GPIO_PD9, GPIO_PD8, + GPIO_PD7, GPIO_PD6, GPIO_PD5, GPIO_PD4, + GPIO_PD3, GPIO_PD2, GPIO_PD1, GPIO_PD0, + + /* Port E */ + GPIO_PE5, GPIO_PE4, + GPIO_PE3, GPIO_PE2, GPIO_PE1, GPIO_PE0, + + /* Port F */ + GPIO_PF12, + GPIO_PF11, GPIO_PF10, GPIO_PF9, GPIO_PF8, + GPIO_PF7, GPIO_PF6, GPIO_PF5, GPIO_PF4, + GPIO_PF3, GPIO_PF2, GPIO_PF1, GPIO_PF0, + + /* Port G */ + GPIO_PG24, + GPIO_PG23, GPIO_PG22, GPIO_PG21, GPIO_PG20, + GPIO_PG19, GPIO_PG18, GPIO_PG17, GPIO_PG16, + GPIO_PG15, GPIO_PG14, GPIO_PG13, GPIO_PG12, + GPIO_PG11, GPIO_PG10, GPIO_PG9, GPIO_PG8, + GPIO_PG7, GPIO_PG6, GPIO_PG5, GPIO_PG4, + GPIO_PG3, GPIO_PG2, GPIO_PG1, GPIO_PG0, + + /* Port H */ + GPIO_PH7, GPIO_PH6, GPIO_PH5, GPIO_PH4, + GPIO_PH3, GPIO_PH2, GPIO_PH1, GPIO_PH0, + + /* Port I - not on device */ + + /* Port J */ + GPIO_PJ11, GPIO_PJ10, GPIO_PJ9, GPIO_PJ8, + GPIO_PJ7, GPIO_PJ6, GPIO_PJ5, GPIO_PJ4, + GPIO_PJ3, GPIO_PJ2, GPIO_PJ1, GPIO_PJ0, + + /* Port K */ + GPIO_PK11, GPIO_PK10, GPIO_PK9, GPIO_PK8, + GPIO_PK7, GPIO_PK6, GPIO_PK5, GPIO_PK4, + GPIO_PK3, GPIO_PK2, GPIO_PK1, GPIO_PK0, + + /* INTC: IRQ and PINT on PB/PD/PE */ + GPIO_FN_PINT7_PG, GPIO_FN_PINT6_PG, GPIO_FN_PINT5_PG, GPIO_FN_PINT4_PG, + GPIO_FN_PINT3_PG, GPIO_FN_PINT2_PG, GPIO_FN_PINT1_PG, + + GPIO_FN_IRQ7_PC, GPIO_FN_IRQ6_PC, GPIO_FN_IRQ5_PC, GPIO_FN_IRQ4_PC, + GPIO_FN_IRQ3_PG, GPIO_FN_IRQ2_PG, GPIO_FN_IRQ1_PJ, GPIO_FN_IRQ0_PJ, + GPIO_FN_IRQ3_PE, GPIO_FN_IRQ2_PE, GPIO_FN_IRQ1_PE, GPIO_FN_IRQ0_PE, + + /* WDT */ + GPIO_FN_WDTOVF, + + /* CAN */ + GPIO_FN_CTX1, GPIO_FN_CRX1, GPIO_FN_CTX0, GPIO_FN_CTX0_CTX1, + GPIO_FN_CRX0, GPIO_FN_CRX0_CRX1, + + /* DMAC */ + GPIO_FN_TEND0, GPIO_FN_DACK0, GPIO_FN_DREQ0, + GPIO_FN_TEND1, GPIO_FN_DACK1, GPIO_FN_DREQ1, + + /* ADC */ + GPIO_FN_ADTRG, + + /* BSC */ + + GPIO_FN_A25, GPIO_FN_A24, + GPIO_FN_A23, GPIO_FN_A22, GPIO_FN_A21, GPIO_FN_A20, + GPIO_FN_A19, GPIO_FN_A18, GPIO_FN_A17, GPIO_FN_A16, + GPIO_FN_A15, GPIO_FN_A14, GPIO_FN_A13, GPIO_FN_A12, + GPIO_FN_A11, GPIO_FN_A10, GPIO_FN_A9, GPIO_FN_A8, + GPIO_FN_A7, GPIO_FN_A6, GPIO_FN_A5, GPIO_FN_A4, + GPIO_FN_A3, GPIO_FN_A2, GPIO_FN_A1, GPIO_FN_A0, + GPIO_FN_D15, GPIO_FN_D14, GPIO_FN_D13, GPIO_FN_D12, + GPIO_FN_D11, GPIO_FN_D10, GPIO_FN_D9, GPIO_FN_D8, + GPIO_FN_D7, GPIO_FN_D6, GPIO_FN_D5, GPIO_FN_D4, + GPIO_FN_D3, GPIO_FN_D2, GPIO_FN_D1, GPIO_FN_D0, + + GPIO_FN_BS, + GPIO_FN_CS4, GPIO_FN_CS3, GPIO_FN_CS2, GPIO_FN_CS1, GPIO_FN_CS0, + GPIO_FN_CS6CE1B, GPIO_FN_CS5CE1A, + GPIO_FN_CE2A, GPIO_FN_CE2B, + GPIO_FN_RD, GPIO_FN_RDWR, + GPIO_FN_ICIOWRAH, GPIO_FN_ICIORD, + GPIO_FN_WE1DQMUWE, GPIO_FN_WE0DQML, + GPIO_FN_RAS, GPIO_FN_CAS, GPIO_FN_CKE, + GPIO_FN_WAIT, GPIO_FN_BREQ, GPIO_FN_BACK, + GPIO_FN_IOIS16, + + /* TMU */ + GPIO_FN_TIOC4D, GPIO_FN_TIOC4C, GPIO_FN_TIOC4B, GPIO_FN_TIOC4A, + GPIO_FN_TIOC3D, GPIO_FN_TIOC3C, GPIO_FN_TIOC3B, GPIO_FN_TIOC3A, + GPIO_FN_TIOC2B, GPIO_FN_TIOC1B, GPIO_FN_TIOC2A, GPIO_FN_TIOC1A, + GPIO_FN_TIOC0D, GPIO_FN_TIOC0C, GPIO_FN_TIOC0B, GPIO_FN_TIOC0A, + GPIO_FN_TCLKD, GPIO_FN_TCLKC, GPIO_FN_TCLKB, GPIO_FN_TCLKA, + + /* SSU */ + GPIO_FN_SCS0_PD, GPIO_FN_SSO0_PD, GPIO_FN_SSI0_PD, GPIO_FN_SSCK0_PD, + GPIO_FN_SCS0_PF, GPIO_FN_SSO0_PF, GPIO_FN_SSI0_PF, GPIO_FN_SSCK0_PF, + GPIO_FN_SCS1_PD, GPIO_FN_SSO1_PD, GPIO_FN_SSI1_PD, GPIO_FN_SSCK1_PD, + GPIO_FN_SCS1_PF, GPIO_FN_SSO1_PF, GPIO_FN_SSI1_PF, GPIO_FN_SSCK1_PF, + + /* SCIF */ + GPIO_FN_SCK0, GPIO_FN_SCK1, GPIO_FN_SCK2, GPIO_FN_SCK3, + GPIO_FN_RXD0, GPIO_FN_RXD1, GPIO_FN_RXD2, GPIO_FN_RXD3, + GPIO_FN_TXD0, GPIO_FN_TXD1, GPIO_FN_TXD2, GPIO_FN_TXD3, + GPIO_FN_RXD4, GPIO_FN_RXD5, GPIO_FN_RXD6, GPIO_FN_RXD7, + GPIO_FN_TXD4, GPIO_FN_TXD5, GPIO_FN_TXD6, GPIO_FN_TXD7, + GPIO_FN_RTS1, GPIO_FN_RTS3, GPIO_FN_CTS1, GPIO_FN_CTS3, + + /* RSPI */ + GPIO_FN_RSPCK0, GPIO_FN_MOSI0, + GPIO_FN_MISO0_PF12, GPIO_FN_MISO1, + GPIO_FN_SSL00, + GPIO_FN_RSPCK1, GPIO_FN_MOSI1, + GPIO_FN_MISO1_PG19, GPIO_FN_SSL10, + + /* IIC3 */ + GPIO_FN_SCL0, GPIO_FN_SCL1, GPIO_FN_SCL2, + GPIO_FN_SDA2, GPIO_FN_SDA1, GPIO_FN_SDA0, + + /* SSI */ + GPIO_FN_SSISCK0, GPIO_FN_SSIWS0, GPIO_FN_SSITXD0, GPIO_FN_SSIRXD0, + GPIO_FN_SSIWS1, GPIO_FN_SSIWS2, GPIO_FN_SSIWS3, + GPIO_FN_SSISCK1, GPIO_FN_SSISCK2, GPIO_FN_SSISCK3, + GPIO_FN_SSIDATA1, GPIO_FN_SSIDATA2, GPIO_FN_SSIDATA3, + GPIO_FN_AUDIO_CLK, + + /* SIOF */ + GPIO_FN_SIOFTXD, GPIO_FN_SIOFRXD, GPIO_FN_SIOFSYNC, GPIO_FN_SIOFSCK, + + /* SPDIF */ + GPIO_FN_SPDIF_IN, + GPIO_FN_SPDIF_OUT, + + /* NANDFMC */ /* NOTE Controller is not available in boot mode 0 */ + GPIO_FN_FCE, + GPIO_FN_FRB, + + /* VDC3 */ + GPIO_FN_DV_CLK, GPIO_FN_DV_VSYNC, GPIO_FN_DV_HSYNC, + GPIO_FN_DV_DATA7, GPIO_FN_DV_DATA6, GPIO_FN_DV_DATA5, GPIO_FN_DV_DATA4, + GPIO_FN_DV_DATA3, GPIO_FN_DV_DATA2, GPIO_FN_DV_DATA1, GPIO_FN_DV_DATA0, + GPIO_FN_LCD_CLK, GPIO_FN_LCD_EXTCLK, + GPIO_FN_LCD_VSYNC, GPIO_FN_LCD_HSYNC, GPIO_FN_LCD_DE, + GPIO_FN_LCD_DATA15, GPIO_FN_LCD_DATA14, + GPIO_FN_LCD_DATA13, GPIO_FN_LCD_DATA12, + GPIO_FN_LCD_DATA11, GPIO_FN_LCD_DATA10, + GPIO_FN_LCD_DATA9, GPIO_FN_LCD_DATA8, + GPIO_FN_LCD_DATA7, GPIO_FN_LCD_DATA6, + GPIO_FN_LCD_DATA5, GPIO_FN_LCD_DATA4, + GPIO_FN_LCD_DATA3, GPIO_FN_LCD_DATA2, + GPIO_FN_LCD_DATA1, GPIO_FN_LCD_DATA0, + GPIO_FN_LCD_M_DISP, +}; + +#endif /* __ASM_SH7264_H__ */ diff --git a/arch/sh/include/cpu-sh2a/cpu/sh7269.h b/arch/sh/include/cpu-sh2a/cpu/sh7269.h new file mode 100644 index 00000000000..2a0ca8780f0 --- /dev/null +++ b/arch/sh/include/cpu-sh2a/cpu/sh7269.h @@ -0,0 +1,213 @@ +#ifndef __ASM_SH7269_H__ +#define __ASM_SH7269_H__ + +enum { + /* Port A */ + GPIO_PA1, GPIO_PA0, + + /* Port B */ + GPIO_PB22, GPIO_PB21, GPIO_PB20, + GPIO_PB19, GPIO_PB18, GPIO_PB17, GPIO_PB16, + GPIO_PB15, GPIO_PB14, GPIO_PB13, GPIO_PB12, + GPIO_PB11, GPIO_PB10, GPIO_PB9, GPIO_PB8, + GPIO_PB7, GPIO_PB6, GPIO_PB5, GPIO_PB4, + GPIO_PB3, GPIO_PB2, GPIO_PB1, + + /* Port C */ + GPIO_PC8, + GPIO_PC7, GPIO_PC6, GPIO_PC5, GPIO_PC4, + GPIO_PC3, GPIO_PC2, GPIO_PC1, GPIO_PC0, + + /* Port D */ + GPIO_PD15, GPIO_PD14, GPIO_PD13, GPIO_PD12, + GPIO_PD11, GPIO_PD10, GPIO_PD9, GPIO_PD8, + GPIO_PD7, GPIO_PD6, GPIO_PD5, GPIO_PD4, + GPIO_PD3, GPIO_PD2, GPIO_PD1, GPIO_PD0, + + /* Port E */ + GPIO_PE7, GPIO_PE6, GPIO_PE5, GPIO_PE4, + GPIO_PE3, GPIO_PE2, GPIO_PE1, GPIO_PE0, + + /* Port F */ + GPIO_PF23, GPIO_PF22, GPIO_PF21, GPIO_PF20, + GPIO_PF19, GPIO_PF18, GPIO_PF17, GPIO_PF16, + GPIO_PF15, GPIO_PF14, GPIO_PF13, GPIO_PF12, + GPIO_PF11, GPIO_PF10, GPIO_PF9, GPIO_PF8, + GPIO_PF7, GPIO_PF6, GPIO_PF5, GPIO_PF4, + GPIO_PF3, GPIO_PF2, GPIO_PF1, GPIO_PF0, + + /* Port G */ + GPIO_PG27, GPIO_PG26, GPIO_PG25, GPIO_PG24, + GPIO_PG23, GPIO_PG22, GPIO_PG21, GPIO_PG20, + GPIO_PG19, GPIO_PG18, GPIO_PG17, GPIO_PG16, + GPIO_PG15, GPIO_PG14, GPIO_PG13, GPIO_PG12, + GPIO_PG11, GPIO_PG10, GPIO_PG9, GPIO_PG8, + GPIO_PG7, GPIO_PG6, GPIO_PG5, GPIO_PG4, + GPIO_PG3, GPIO_PG2, GPIO_PG1, GPIO_PG0, + + /* Port H */ + GPIO_PH7, GPIO_PH6, GPIO_PH5, GPIO_PH4, + GPIO_PH3, GPIO_PH2, GPIO_PH1, GPIO_PH0, + + /* Port I - not on device */ + + /* Port J */ + GPIO_PJ31, GPIO_PJ30, GPIO_PJ29, GPIO_PJ28, + GPIO_PJ27, GPIO_PJ26, GPIO_PJ25, GPIO_PJ24, + GPIO_PJ23, GPIO_PJ22, GPIO_PJ21, GPIO_PJ20, + GPIO_PJ19, GPIO_PJ18, GPIO_PJ17, GPIO_PJ16, + GPIO_PJ15, GPIO_PJ14, GPIO_PJ13, GPIO_PJ12, + GPIO_PJ11, GPIO_PJ10, GPIO_PJ9, GPIO_PJ8, + GPIO_PJ7, GPIO_PJ6, GPIO_PJ5, GPIO_PJ4, + GPIO_PJ3, GPIO_PJ2, GPIO_PJ1, GPIO_PJ0, + + /* INTC: IRQ and PINT */ + GPIO_FN_IRQ7_PG, GPIO_FN_IRQ6_PG, GPIO_FN_IRQ5_PG, GPIO_FN_IRQ4_PG, + GPIO_FN_IRQ3_PG, GPIO_FN_IRQ2_PG, GPIO_FN_IRQ1_PG, GPIO_FN_IRQ0_PG, + GPIO_FN_IRQ7_PF, GPIO_FN_IRQ6_PF, GPIO_FN_IRQ5_PF, GPIO_FN_IRQ4_PF, + GPIO_FN_IRQ3_PJ, GPIO_FN_IRQ2_PJ, GPIO_FN_IRQ1_PJ, GPIO_FN_IRQ0_PJ, + GPIO_FN_IRQ1_PC, GPIO_FN_IRQ0_PC, + + GPIO_FN_PINT7_PG, GPIO_FN_PINT6_PG, GPIO_FN_PINT5_PG, GPIO_FN_PINT4_PG, + GPIO_FN_PINT3_PG, GPIO_FN_PINT2_PG, GPIO_FN_PINT1_PG, GPIO_FN_PINT0_PG, + GPIO_FN_PINT7_PH, GPIO_FN_PINT6_PH, GPIO_FN_PINT5_PH, GPIO_FN_PINT4_PH, + GPIO_FN_PINT3_PH, GPIO_FN_PINT2_PH, GPIO_FN_PINT1_PH, GPIO_FN_PINT0_PH, + GPIO_FN_PINT7_PJ, GPIO_FN_PINT6_PJ, GPIO_FN_PINT5_PJ, GPIO_FN_PINT4_PJ, + GPIO_FN_PINT3_PJ, GPIO_FN_PINT2_PJ, GPIO_FN_PINT1_PJ, GPIO_FN_PINT0_PJ, + + /* WDT */ + GPIO_FN_WDTOVF, + + /* CAN */ + GPIO_FN_CTX1, GPIO_FN_CRX1, GPIO_FN_CTX0, GPIO_FN_CTX0_CTX1, + GPIO_FN_CRX0, GPIO_FN_CRX0_CRX1, GPIO_FN_CRX0_CRX1_CRX2, + + /* DMAC */ + GPIO_FN_TEND0, GPIO_FN_DACK0, GPIO_FN_DREQ0, + GPIO_FN_TEND1, GPIO_FN_DACK1, GPIO_FN_DREQ1, + + /* ADC */ + GPIO_FN_ADTRG, + + /* BSC */ + GPIO_FN_A25, GPIO_FN_A24, + GPIO_FN_A23, GPIO_FN_A22, GPIO_FN_A21, GPIO_FN_A20, + GPIO_FN_A19, GPIO_FN_A18, GPIO_FN_A17, GPIO_FN_A16, + GPIO_FN_A15, GPIO_FN_A14, GPIO_FN_A13, GPIO_FN_A12, + GPIO_FN_A11, GPIO_FN_A10, GPIO_FN_A9, GPIO_FN_A8, + GPIO_FN_A7, GPIO_FN_A6, GPIO_FN_A5, GPIO_FN_A4, + GPIO_FN_A3, GPIO_FN_A2, GPIO_FN_A1, GPIO_FN_A0, + GPIO_FN_D15, GPIO_FN_D14, GPIO_FN_D13, GPIO_FN_D12, + GPIO_FN_D11, GPIO_FN_D10, GPIO_FN_D9, GPIO_FN_D8, + GPIO_FN_D7, GPIO_FN_D6, GPIO_FN_D5, GPIO_FN_D4, + GPIO_FN_D3, GPIO_FN_D2, GPIO_FN_D1, GPIO_FN_D0, + + GPIO_FN_BS, + GPIO_FN_CS4, GPIO_FN_CS3, GPIO_FN_CS2, GPIO_FN_CS1, GPIO_FN_CS0, + GPIO_FN_CS5CE1A, + GPIO_FN_CE2A, GPIO_FN_CE2B, + GPIO_FN_RD, GPIO_FN_RDWR, + GPIO_FN_WE3ICIOWRAHDQMUU, GPIO_FN_WE2ICIORDDQMUL, + GPIO_FN_WE1DQMUWE, GPIO_FN_WE0DQML, + GPIO_FN_RAS, GPIO_FN_CAS, GPIO_FN_CKE, + GPIO_FN_WAIT, GPIO_FN_BREQ, GPIO_FN_BACK, + GPIO_FN_IOIS16, + + /* TMU */ + GPIO_FN_TIOC4D, GPIO_FN_TIOC4C, GPIO_FN_TIOC4B, GPIO_FN_TIOC4A, + GPIO_FN_TIOC3D, GPIO_FN_TIOC3C, GPIO_FN_TIOC3B, GPIO_FN_TIOC3A, + GPIO_FN_TIOC2B, GPIO_FN_TIOC1B, GPIO_FN_TIOC2A, GPIO_FN_TIOC1A, + GPIO_FN_TIOC0D, GPIO_FN_TIOC0C, GPIO_FN_TIOC0B, GPIO_FN_TIOC0A, + GPIO_FN_TCLKD, GPIO_FN_TCLKC, GPIO_FN_TCLKB, GPIO_FN_TCLKA, + + /* SSU */ + GPIO_FN_SCS0_PD, GPIO_FN_SSO0_PD, GPIO_FN_SSI0_PD, GPIO_FN_SSCK0_PD, + GPIO_FN_SCS0_PF, GPIO_FN_SSO0_PF, GPIO_FN_SSI0_PF, GPIO_FN_SSCK0_PF, + GPIO_FN_SCS1_PD, GPIO_FN_SSO1_PD, GPIO_FN_SSI1_PD, GPIO_FN_SSCK1_PD, + GPIO_FN_SCS1_PF, GPIO_FN_SSO1_PF, GPIO_FN_SSI1_PF, GPIO_FN_SSCK1_PF, + + /* SCIF */ + GPIO_FN_SCK0, GPIO_FN_RXD0, GPIO_FN_TXD0, + GPIO_FN_SCK1, GPIO_FN_RXD1, GPIO_FN_TXD1, GPIO_FN_RTS1, GPIO_FN_CTS1, + GPIO_FN_SCK2, GPIO_FN_RXD2, GPIO_FN_TXD2, + GPIO_FN_SCK3, GPIO_FN_RXD3, GPIO_FN_TXD3, + GPIO_FN_SCK4, GPIO_FN_RXD4, GPIO_FN_TXD4, + GPIO_FN_SCK5, GPIO_FN_RXD5, GPIO_FN_TXD5, GPIO_FN_RTS5, GPIO_FN_CTS5, + GPIO_FN_SCK6, GPIO_FN_RXD6, GPIO_FN_TXD6, + GPIO_FN_SCK7, GPIO_FN_RXD7, GPIO_FN_TXD7, GPIO_FN_RTS7, GPIO_FN_CTS7, + + /* RSPI */ + GPIO_FN_MISO0_PJ19, GPIO_FN_MISO0_PB20, + GPIO_FN_MOSI0_PJ18, GPIO_FN_MOSI0_PB19, + GPIO_FN_SSL00_PJ17, GPIO_FN_SSL00_PB18, + GPIO_FN_RSPCK0_PJ16, GPIO_FN_RSPCK0_PB17, + GPIO_FN_RSPCK1, GPIO_FN_MOSI1, + GPIO_FN_MISO1, GPIO_FN_SSL10, + + /* IIC3 */ + GPIO_FN_SCL0, GPIO_FN_SCL1, GPIO_FN_SCL2, + GPIO_FN_SDA2, GPIO_FN_SDA1, GPIO_FN_SDA0, + + /* SSI */ + GPIO_FN_SSISCK0, GPIO_FN_SSIWS0, GPIO_FN_SSITXD0, GPIO_FN_SSIRXD0, + GPIO_FN_SSIWS1, GPIO_FN_SSIWS2, GPIO_FN_SSIWS3, + GPIO_FN_SSISCK1, GPIO_FN_SSISCK2, GPIO_FN_SSISCK3, + GPIO_FN_SSIDATA1, GPIO_FN_SSIDATA2, GPIO_FN_SSIDATA3, + GPIO_FN_AUDIO_CLK, + GPIO_FN_AUDIO_XOUT, + + /* SIOF */ + GPIO_FN_SIOFTXD, GPIO_FN_SIOFRXD, GPIO_FN_SIOFSYNC, GPIO_FN_SIOFSCK, + + /* SPDIF */ + GPIO_FN_SPDIF_IN, + GPIO_FN_SPDIF_OUT, + + /* NANDFMC */ /* NOTE Controller is not available in boot mode 0 */ + GPIO_FN_FCE, + GPIO_FN_FRB, + + /* VDC */ + GPIO_FN_DV_CLK, GPIO_FN_DV_VSYNC, GPIO_FN_DV_HSYNC, + GPIO_FN_DV_DATA23, GPIO_FN_DV_DATA22, + GPIO_FN_DV_DATA21, GPIO_FN_DV_DATA20, + GPIO_FN_DV_DATA19, GPIO_FN_DV_DATA18, + GPIO_FN_DV_DATA17, GPIO_FN_DV_DATA16, + GPIO_FN_DV_DATA15, GPIO_FN_DV_DATA14, + GPIO_FN_DV_DATA13, GPIO_FN_DV_DATA12, + GPIO_FN_DV_DATA11, GPIO_FN_DV_DATA10, + GPIO_FN_DV_DATA9, GPIO_FN_DV_DATA8, + GPIO_FN_DV_DATA7, GPIO_FN_DV_DATA6, + GPIO_FN_DV_DATA5, GPIO_FN_DV_DATA4, + GPIO_FN_DV_DATA3, GPIO_FN_DV_DATA2, + GPIO_FN_DV_DATA1, GPIO_FN_DV_DATA0, + GPIO_FN_LCD_CLK, GPIO_FN_LCD_EXTCLK, + GPIO_FN_LCD_VSYNC, GPIO_FN_LCD_HSYNC, GPIO_FN_LCD_DE, + GPIO_FN_LCD_DATA23_PG23, GPIO_FN_LCD_DATA22_PG22, + GPIO_FN_LCD_DATA21_PG21, GPIO_FN_LCD_DATA20_PG20, + GPIO_FN_LCD_DATA19_PG19, GPIO_FN_LCD_DATA18_PG18, + GPIO_FN_LCD_DATA17_PG17, GPIO_FN_LCD_DATA16_PG16, + GPIO_FN_LCD_DATA15_PG15, GPIO_FN_LCD_DATA14_PG14, + GPIO_FN_LCD_DATA13_PG13, GPIO_FN_LCD_DATA12_PG12, + GPIO_FN_LCD_DATA11_PG11, GPIO_FN_LCD_DATA10_PG10, + GPIO_FN_LCD_DATA9_PG9, GPIO_FN_LCD_DATA8_PG8, + GPIO_FN_LCD_DATA7_PG7, GPIO_FN_LCD_DATA6_PG6, + GPIO_FN_LCD_DATA5_PG5, GPIO_FN_LCD_DATA4_PG4, + GPIO_FN_LCD_DATA3_PG3, GPIO_FN_LCD_DATA2_PG2, + GPIO_FN_LCD_DATA1_PG1, GPIO_FN_LCD_DATA0_PG0, + GPIO_FN_LCD_DATA23_PJ23, GPIO_FN_LCD_DATA22_PJ22, + GPIO_FN_LCD_DATA21_PJ21, GPIO_FN_LCD_DATA20_PJ20, + GPIO_FN_LCD_DATA19_PJ19, GPIO_FN_LCD_DATA18_PJ18, + GPIO_FN_LCD_DATA17_PJ17, GPIO_FN_LCD_DATA16_PJ16, + GPIO_FN_LCD_DATA15_PJ15, GPIO_FN_LCD_DATA14_PJ14, + GPIO_FN_LCD_DATA13_PJ13, GPIO_FN_LCD_DATA12_PJ12, + GPIO_FN_LCD_DATA11_PJ11, GPIO_FN_LCD_DATA10_PJ10, + GPIO_FN_LCD_DATA9_PJ9, GPIO_FN_LCD_DATA8_PJ8, + GPIO_FN_LCD_DATA7_PJ7, GPIO_FN_LCD_DATA6_PJ6, + GPIO_FN_LCD_DATA5_PJ5, GPIO_FN_LCD_DATA4_PJ4, + GPIO_FN_LCD_DATA3_PJ3, GPIO_FN_LCD_DATA2_PJ2, + GPIO_FN_LCD_DATA1_PJ1, GPIO_FN_LCD_DATA0_PJ0, + GPIO_FN_LCD_M_DISP, +}; + +#endif /* __ASM_SH7269_H__ */ diff --git a/arch/sh/include/cpu-sh2a/cpu/ubc.h b/arch/sh/include/cpu-sh2a/cpu/ubc.h deleted file mode 100644 index 1192e1c761a..00000000000 --- a/arch/sh/include/cpu-sh2a/cpu/ubc.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * SH-2A UBC definitions - * - * Copyright (C) 2008 Kieran Bingham - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ - -#ifndef __ASM_CPU_SH2A_UBC_H -#define __ASM_CPU_SH2A_UBC_H - -#define UBC_BARA 0xfffc0400 -#define UBC_BAMRA 0xfffc0404 -#define UBC_BBRA 0xfffc04a0 /* 16 bit access */ -#define UBC_BDRA 0xfffc0408 -#define UBC_BDMRA 0xfffc040c - -#define UBC_BARB 0xfffc0410 -#define UBC_BAMRB 0xfffc0414 -#define UBC_BBRB 0xfffc04b0 /* 16 bit access */ -#define UBC_BDRB 0xfffc0418 -#define UBC_BDMRB 0xfffc041c - -#define UBC_BRCR 0xfffc04c0 - -#endif /* __ASM_CPU_SH2A_UBC_H */ diff --git a/arch/sh/include/cpu-sh3/cpu/cache.h b/arch/sh/include/cpu-sh3/cpu/cache.h index bee2d81c56b..29700fd88c7 100644 --- a/arch/sh/include/cpu-sh3/cpu/cache.h +++ b/arch/sh/include/cpu-sh3/cpu/cache.h @@ -17,7 +17,7 @@ #define SH_CACHE_COMBINED 4 #define SH_CACHE_ASSOC 8 -#define CCR 0xffffffec /* Address of Cache Control Register */ +#define SH_CCR 0xffffffec /* Address of Cache Control Register */ #define CCR_CACHE_CE 0x01 /* Cache Enable */ #define CCR_CACHE_WT 0x02 /* Write-Through (for P0,U0,P3) (else writeback) */ diff --git a/arch/sh/include/cpu-sh3/cpu/dac.h b/arch/sh/include/cpu-sh3/cpu/dac.h index 05fda8316eb..98f1d15f0ab 100644 --- a/arch/sh/include/cpu-sh3/cpu/dac.h +++ b/arch/sh/include/cpu-sh3/cpu/dac.h @@ -17,25 +17,25 @@ static __inline__ void sh_dac_enable(int channel) { unsigned char v; - v = ctrl_inb(DACR); + v = __raw_readb(DACR); if(channel) v |= DACR_DAOE1; else v |= DACR_DAOE0; - ctrl_outb(v,DACR); + __raw_writeb(v,DACR); } static __inline__ void sh_dac_disable(int channel) { unsigned char v; - v = ctrl_inb(DACR); + v = __raw_readb(DACR); if(channel) v &= ~DACR_DAOE1; else v &= ~DACR_DAOE0; - ctrl_outb(v,DACR); + __raw_writeb(v,DACR); } static __inline__ void sh_dac_output(u8 value, int channel) { - if(channel) ctrl_outb(value,DADR1); - else ctrl_outb(value,DADR0); + if(channel) __raw_writeb(value,DADR1); + else __raw_writeb(value,DADR0); } #endif /* __ASM_CPU_SH3_DAC_H */ diff --git a/arch/sh/include/cpu-sh3/cpu/dma-register.h b/arch/sh/include/cpu-sh3/cpu/dma-register.h new file mode 100644 index 00000000000..2349e488c9a --- /dev/null +++ b/arch/sh/include/cpu-sh3/cpu/dma-register.h @@ -0,0 +1,41 @@ +/* + * SH3 CPU-specific DMA definitions, used by both DMA drivers + * + * Copyright (C) 2010 Guennadi Liakhovetski <g.liakhovetski@gmx.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#ifndef CPU_DMA_REGISTER_H +#define CPU_DMA_REGISTER_H + +#define CHCR_TS_LOW_MASK 0x18 +#define CHCR_TS_LOW_SHIFT 3 +#define CHCR_TS_HIGH_MASK 0 +#define CHCR_TS_HIGH_SHIFT 0 + +#define DMAOR_INIT DMAOR_DME + +/* + * The SuperH DMAC supports a number of transmit sizes, we list them here, + * with their respective values as they appear in the CHCR registers. + */ +enum { + XMIT_SZ_8BIT, + XMIT_SZ_16BIT, + XMIT_SZ_32BIT, + XMIT_SZ_128BIT, +}; + +/* log2(size / 8) - used to calculate number of transfers */ +#define TS_SHIFT { \ + [XMIT_SZ_8BIT] = 0, \ + [XMIT_SZ_16BIT] = 1, \ + [XMIT_SZ_32BIT] = 2, \ + [XMIT_SZ_128BIT] = 4, \ +} + +#define TS_INDEX2VAL(i) (((i) & 3) << CHCR_TS_LOW_SHIFT) + +#endif diff --git a/arch/sh/include/cpu-sh3/cpu/dma.h b/arch/sh/include/cpu-sh3/cpu/dma.h index 0ea15f3f236..bccb4144a5e 100644 --- a/arch/sh/include/cpu-sh3/cpu/dma.h +++ b/arch/sh/include/cpu-sh3/cpu/dma.h @@ -1,6 +1,8 @@ #ifndef __ASM_CPU_SH3_DMA_H #define __ASM_CPU_SH3_DMA_H +#include <linux/sh_intc.h> + #if defined(CONFIG_CPU_SUBTYPE_SH7720) || \ defined(CONFIG_CPU_SUBTYPE_SH7721) || \ defined(CONFIG_CPU_SUBTYPE_SH7710) || \ @@ -10,37 +12,7 @@ #define SH_DMAC_BASE0 0xa4000020 #endif -#define DMTE0_IRQ 48 -#define DMTE4_IRQ 76 - -/* Definitions for the SuperH DMAC */ -#define TM_BURST 0x00000020 -#define TS_8 0x00000000 -#define TS_16 0x00000008 -#define TS_32 0x00000010 -#define TS_128 0x00000018 - -#define CHCR_TS_MASK 0x18 -#define CHCR_TS_SHIFT 3 - -#define DMAOR_INIT DMAOR_DME - -/* - * The SuperH DMAC supports a number of transmit sizes, we list them here, - * with their respective values as they appear in the CHCR registers. - */ -enum { - XMIT_SZ_8BIT, - XMIT_SZ_16BIT, - XMIT_SZ_32BIT, - XMIT_SZ_128BIT, -}; - -static unsigned int ts_shift[] __maybe_unused = { - [XMIT_SZ_8BIT] = 0, - [XMIT_SZ_16BIT] = 1, - [XMIT_SZ_32BIT] = 2, - [XMIT_SZ_128BIT] = 4, -}; +#define DMTE0_IRQ evt2irq(0x800) +#define DMTE4_IRQ evt2irq(0xb80) #endif /* __ASM_CPU_SH3_DMA_H */ diff --git a/arch/sh/include/cpu-sh3/cpu/mmu_context.h b/arch/sh/include/cpu-sh3/cpu/mmu_context.h index ab09da73ce7..0c7c735ea82 100644 --- a/arch/sh/include/cpu-sh3/cpu/mmu_context.h +++ b/arch/sh/include/cpu-sh3/cpu/mmu_context.h @@ -16,6 +16,7 @@ #define MMU_TEA 0xFFFFFFFC /* TLB Exception Address */ #define MMUCR 0xFFFFFFE0 /* MMU Control Register */ +#define MMUCR_TI (1 << 2) /* TLB flush bit */ #define MMU_TLB_ADDRESS_ARRAY 0xF2000000 #define MMU_PAGE_ASSOC_BIT 0x80 diff --git a/arch/sh/include/cpu-sh3/cpu/serial.h b/arch/sh/include/cpu-sh3/cpu/serial.h new file mode 100644 index 00000000000..7766329bc10 --- /dev/null +++ b/arch/sh/include/cpu-sh3/cpu/serial.h @@ -0,0 +1,10 @@ +#ifndef __CPU_SH3_SERIAL_H +#define __CPU_SH3_SERIAL_H + +#include <linux/serial_sci.h> + +extern struct plat_sci_port_ops sh770x_sci_port_ops; +extern struct plat_sci_port_ops sh7710_sci_port_ops; +extern struct plat_sci_port_ops sh7720_sci_port_ops; + +#endif /* __CPU_SH3_SERIAL_H */ diff --git a/arch/sh/include/cpu-sh3/cpu/ubc.h b/arch/sh/include/cpu-sh3/cpu/ubc.h deleted file mode 100644 index 4e6381d5ff7..00000000000 --- a/arch/sh/include/cpu-sh3/cpu/ubc.h +++ /dev/null @@ -1,42 +0,0 @@ -/* - * include/asm-sh/cpu-sh3/ubc.h - * - * Copyright (C) 1999 Niibe Yutaka - * Copyright (C) 2003 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_CPU_SH3_UBC_H -#define __ASM_CPU_SH3_UBC_H - -#if defined(CONFIG_CPU_SUBTYPE_SH7710) || \ - defined(CONFIG_CPU_SUBTYPE_SH7720) || \ - defined(CONFIG_CPU_SUBTYPE_SH7721) -#define UBC_BARA 0xa4ffffb0 -#define UBC_BAMRA 0xa4ffffb4 -#define UBC_BBRA 0xa4ffffb8 -#define UBC_BASRA 0xffffffe4 -#define UBC_BARB 0xa4ffffa0 -#define UBC_BAMRB 0xa4ffffa4 -#define UBC_BBRB 0xa4ffffa8 -#define UBC_BASRB 0xffffffe8 -#define UBC_BDRB 0xa4ffff90 -#define UBC_BDMRB 0xa4ffff94 -#define UBC_BRCR 0xa4ffff98 -#else -#define UBC_BARA 0xffffffb0 -#define UBC_BAMRA 0xffffffb4 -#define UBC_BBRA 0xffffffb8 -#define UBC_BASRA 0xffffffe4 -#define UBC_BARB 0xffffffa0 -#define UBC_BAMRB 0xffffffa4 -#define UBC_BBRB 0xffffffa8 -#define UBC_BASRB 0xffffffe8 -#define UBC_BDRB 0xffffff90 -#define UBC_BDMRB 0xffffff94 -#define UBC_BRCR 0xffffff98 -#endif - -#endif /* __ASM_CPU_SH3_UBC_H */ diff --git a/arch/sh/include/cpu-sh4/cpu/addrspace.h b/arch/sh/include/cpu-sh4/cpu/addrspace.h index a3fa733c1c7..d51da25da72 100644 --- a/arch/sh/include/cpu-sh4/cpu/addrspace.h +++ b/arch/sh/include/cpu-sh4/cpu/addrspace.h @@ -28,6 +28,15 @@ #define P4SEG_TLB_DATA 0xf7000000 #define P4SEG_REG_BASE 0xff000000 +#define PA_AREA0 0x00000000 +#define PA_AREA1 0x04000000 +#define PA_AREA2 0x08000000 +#define PA_AREA3 0x0c000000 +#define PA_AREA4 0x10000000 +#define PA_AREA5 0x14000000 +#define PA_AREA6 0x18000000 +#define PA_AREA7 0x1c000000 + #define PA_AREA5_IO 0xb4000000 /* Area 5 IO Memory */ #define PA_AREA6_IO 0xb8000000 /* Area 6 IO Memory */ diff --git a/arch/sh/include/cpu-sh4/cpu/cache.h b/arch/sh/include/cpu-sh4/cpu/cache.h index 7bfb9e8b069..92c4cd119b6 100644 --- a/arch/sh/include/cpu-sh4/cpu/cache.h +++ b/arch/sh/include/cpu-sh4/cpu/cache.h @@ -17,7 +17,7 @@ #define SH_CACHE_COMBINED 4 #define SH_CACHE_ASSOC 8 -#define CCR 0xff00001c /* Address of Cache Control Register */ +#define SH_CCR 0xff00001c /* Address of Cache Control Register */ #define CCR_CACHE_OCE 0x0001 /* Operand Cache Enable */ #define CCR_CACHE_WT 0x0002 /* Write-Through (for P0,U0,P3) (else writeback)*/ #define CCR_CACHE_CB 0x0004 /* Copy-Back (for P1) (else writethrough) */ diff --git a/arch/sh/include/cpu-sh4/cpu/dma-register.h b/arch/sh/include/cpu-sh4/cpu/dma-register.h new file mode 100644 index 00000000000..02788b6a03b --- /dev/null +++ b/arch/sh/include/cpu-sh4/cpu/dma-register.h @@ -0,0 +1,102 @@ +/* + * SH4 CPU-specific DMA definitions, used by both DMA drivers + * + * Copyright (C) 2010 Guennadi Liakhovetski <g.liakhovetski@gmx.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#ifndef CPU_DMA_REGISTER_H +#define CPU_DMA_REGISTER_H + +/* SH7751/7760/7780 DMA IRQ sources */ + +#ifdef CONFIG_CPU_SH4A + +#define DMAOR_INIT DMAOR_DME + +#if defined(CONFIG_CPU_SUBTYPE_SH7343) +#define CHCR_TS_LOW_MASK 0x00000018 +#define CHCR_TS_LOW_SHIFT 3 +#define CHCR_TS_HIGH_MASK 0 +#define CHCR_TS_HIGH_SHIFT 0 +#elif defined(CONFIG_CPU_SUBTYPE_SH7722) || \ + defined(CONFIG_CPU_SUBTYPE_SH7723) || \ + defined(CONFIG_CPU_SUBTYPE_SH7724) || \ + defined(CONFIG_CPU_SUBTYPE_SH7730) || \ + defined(CONFIG_CPU_SUBTYPE_SH7786) +#define CHCR_TS_LOW_MASK 0x00000018 +#define CHCR_TS_LOW_SHIFT 3 +#define CHCR_TS_HIGH_MASK 0x00300000 +#define CHCR_TS_HIGH_SHIFT (20 - 2) /* 2 bits for shifted low TS */ +#elif defined(CONFIG_CPU_SUBTYPE_SH7757) || \ + defined(CONFIG_CPU_SUBTYPE_SH7763) || \ + defined(CONFIG_CPU_SUBTYPE_SH7764) || \ + defined(CONFIG_CPU_SUBTYPE_SH7780) || \ + defined(CONFIG_CPU_SUBTYPE_SH7785) +#define CHCR_TS_LOW_MASK 0x00000018 +#define CHCR_TS_LOW_SHIFT 3 +#define CHCR_TS_HIGH_MASK 0x00100000 +#define CHCR_TS_HIGH_SHIFT (20 - 2) /* 2 bits for shifted low TS */ +#endif + +/* Transmit sizes and respective CHCR register values */ +enum { + XMIT_SZ_8BIT = 0, + XMIT_SZ_16BIT = 1, + XMIT_SZ_32BIT = 2, + XMIT_SZ_64BIT = 7, + XMIT_SZ_128BIT = 3, + XMIT_SZ_256BIT = 4, + XMIT_SZ_128BIT_BLK = 0xb, + XMIT_SZ_256BIT_BLK = 0xc, +}; + +/* log2(size / 8) - used to calculate number of transfers */ +#define TS_SHIFT { \ + [XMIT_SZ_8BIT] = 0, \ + [XMIT_SZ_16BIT] = 1, \ + [XMIT_SZ_32BIT] = 2, \ + [XMIT_SZ_64BIT] = 3, \ + [XMIT_SZ_128BIT] = 4, \ + [XMIT_SZ_256BIT] = 5, \ + [XMIT_SZ_128BIT_BLK] = 4, \ + [XMIT_SZ_256BIT_BLK] = 5, \ +} + +#define TS_INDEX2VAL(i) ((((i) & 3) << CHCR_TS_LOW_SHIFT) | \ + (((i) & 0xc) << CHCR_TS_HIGH_SHIFT)) + +#else /* CONFIG_CPU_SH4A */ + +#define DMAOR_INIT (0x8000 | DMAOR_DME) + +#define CHCR_TS_LOW_MASK 0x70 +#define CHCR_TS_LOW_SHIFT 4 +#define CHCR_TS_HIGH_MASK 0 +#define CHCR_TS_HIGH_SHIFT 0 + +/* Transmit sizes and respective CHCR register values */ +enum { + XMIT_SZ_8BIT = 1, + XMIT_SZ_16BIT = 2, + XMIT_SZ_32BIT = 3, + XMIT_SZ_64BIT = 0, + XMIT_SZ_256BIT = 4, +}; + +/* log2(size / 8) - used to calculate number of transfers */ +#define TS_SHIFT { \ + [XMIT_SZ_8BIT] = 0, \ + [XMIT_SZ_16BIT] = 1, \ + [XMIT_SZ_32BIT] = 2, \ + [XMIT_SZ_64BIT] = 3, \ + [XMIT_SZ_256BIT] = 5, \ +} + +#define TS_INDEX2VAL(i) (((i) & 7) << CHCR_TS_LOW_SHIFT) + +#endif /* CONFIG_CPU_SH4A */ + +#endif diff --git a/arch/sh/include/cpu-sh4/cpu/dma-sh4a.h b/arch/sh/include/cpu-sh4/cpu/dma-sh4a.h deleted file mode 100644 index c4ed660c14c..00000000000 --- a/arch/sh/include/cpu-sh4/cpu/dma-sh4a.h +++ /dev/null @@ -1,95 +0,0 @@ -#ifndef __ASM_SH_CPU_SH4_DMA_SH7780_H -#define __ASM_SH_CPU_SH4_DMA_SH7780_H - -#if defined(CONFIG_CPU_SUBTYPE_SH7343) || \ - defined(CONFIG_CPU_SUBTYPE_SH7722) || \ - defined(CONFIG_CPU_SUBTYPE_SH7730) -#define DMTE0_IRQ 48 -#define DMTE4_IRQ 76 -#define DMAE0_IRQ 78 /* DMA Error IRQ*/ -#define SH_DMAC_BASE0 0xFE008020 -#define SH_DMARS_BASE 0xFE009000 -#elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \ - defined(CONFIG_CPU_SUBTYPE_SH7764) -#define DMTE0_IRQ 34 -#define DMTE4_IRQ 44 -#define DMAE0_IRQ 38 -#define SH_DMAC_BASE0 0xFF608020 -#define SH_DMARS_BASE 0xFF609000 -#elif defined(CONFIG_CPU_SUBTYPE_SH7723) || \ - defined(CONFIG_CPU_SUBTYPE_SH7724) -#define DMTE0_IRQ 48 /* DMAC0A*/ -#define DMTE4_IRQ 76 /* DMAC0B */ -#define DMTE6_IRQ 40 -#define DMTE8_IRQ 42 /* DMAC1A */ -#define DMTE9_IRQ 43 -#define DMTE10_IRQ 72 /* DMAC1B */ -#define DMTE11_IRQ 73 -#define DMAE0_IRQ 78 /* DMA Error IRQ*/ -#define DMAE1_IRQ 74 /* DMA Error IRQ*/ -#define SH_DMAC_BASE0 0xFE008020 -#define SH_DMAC_BASE1 0xFDC08020 -#define SH_DMARS_BASE 0xFDC09000 -#elif defined(CONFIG_CPU_SUBTYPE_SH7780) -#define DMTE0_IRQ 34 -#define DMTE4_IRQ 44 -#define DMTE6_IRQ 46 -#define DMTE8_IRQ 92 -#define DMTE9_IRQ 93 -#define DMTE10_IRQ 94 -#define DMTE11_IRQ 95 -#define DMAE0_IRQ 38 /* DMA Error IRQ */ -#define SH_DMAC_BASE0 0xFC808020 -#define SH_DMAC_BASE1 0xFC818020 -#define SH_DMARS_BASE 0xFC809000 -#else /* SH7785 */ -#define DMTE0_IRQ 33 -#define DMTE4_IRQ 37 -#define DMTE6_IRQ 52 -#define DMTE8_IRQ 54 -#define DMTE9_IRQ 55 -#define DMTE10_IRQ 56 -#define DMTE11_IRQ 57 -#define DMAE0_IRQ 39 /* DMA Error IRQ0 */ -#define DMAE1_IRQ 58 /* DMA Error IRQ1 */ -#define SH_DMAC_BASE0 0xFC808020 -#define SH_DMAC_BASE1 0xFCC08020 -#define SH_DMARS_BASE 0xFC809000 -#endif - -#define REQ_HE 0x000000C0 -#define REQ_H 0x00000080 -#define REQ_LE 0x00000040 -#define TM_BURST 0x0000020 -#define TS_8 0x00000000 -#define TS_16 0x00000008 -#define TS_32 0x00000010 -#define TS_16BLK 0x00000018 -#define TS_32BLK 0x00100000 - -/* - * The SuperH DMAC supports a number of transmit sizes, we list them here, - * with their respective values as they appear in the CHCR registers. - * - * Defaults to a 64-bit transfer size. - */ -enum { - XMIT_SZ_8BIT, - XMIT_SZ_16BIT, - XMIT_SZ_32BIT, - XMIT_SZ_128BIT, - XMIT_SZ_256BIT, -}; - -/* - * The DMA count is defined as the number of bytes to transfer. - */ -static unsigned int ts_shift[] __maybe_unused = { - [XMIT_SZ_8BIT] = 0, - [XMIT_SZ_16BIT] = 1, - [XMIT_SZ_32BIT] = 2, - [XMIT_SZ_128BIT] = 4, - [XMIT_SZ_256BIT] = 5, -}; - -#endif /* __ASM_SH_CPU_SH4_DMA_SH7780_H */ diff --git a/arch/sh/include/cpu-sh4/cpu/dma.h b/arch/sh/include/cpu-sh4/cpu/dma.h index bcb30246e85..a520eb21962 100644 --- a/arch/sh/include/cpu-sh4/cpu/dma.h +++ b/arch/sh/include/cpu-sh4/cpu/dma.h @@ -1,63 +1,17 @@ #ifndef __ASM_CPU_SH4_DMA_H #define __ASM_CPU_SH4_DMA_H -/* SH7751/7760/7780 DMA IRQ sources */ +#include <linux/sh_intc.h> -#ifdef CONFIG_CPU_SH4A - -#define DMAOR_INIT (DMAOR_DME) -#define CHCR_TS_MASK 0x18 -#define CHCR_TS_SHIFT 3 - -#include <cpu/dma-sh4a.h> -#else /* CONFIG_CPU_SH4A */ /* * SH7750/SH7751/SH7760 */ -#define DMTE0_IRQ 34 -#define DMTE4_IRQ 44 -#define DMTE6_IRQ 46 -#define DMAE0_IRQ 38 +#define DMTE0_IRQ evt2irq(0x640) +#define DMTE4_IRQ evt2irq(0x780) +#define DMTE6_IRQ evt2irq(0x7c0) +#define DMAE0_IRQ evt2irq(0x6c0) -#define DMAOR_INIT (0x8000|DMAOR_DME) #define SH_DMAC_BASE0 0xffa00000 #define SH_DMAC_BASE1 0xffa00070 -/* Definitions for the SuperH DMAC */ -#define TM_BURST 0x00000080 -#define TS_8 0x00000010 -#define TS_16 0x00000020 -#define TS_32 0x00000030 -#define TS_64 0x00000000 - -#define CHCR_TS_MASK 0x70 -#define CHCR_TS_SHIFT 4 - -#define DMAOR_COD 0x00000008 - -/* - * The SuperH DMAC supports a number of transmit sizes, we list them here, - * with their respective values as they appear in the CHCR registers. - * - * Defaults to a 64-bit transfer size. - */ -enum { - XMIT_SZ_64BIT, - XMIT_SZ_8BIT, - XMIT_SZ_16BIT, - XMIT_SZ_32BIT, - XMIT_SZ_256BIT, -}; - -/* - * The DMA count is defined as the number of bytes to transfer. - */ -static unsigned int ts_shift[] __maybe_unused = { - [XMIT_SZ_64BIT] = 3, - [XMIT_SZ_8BIT] = 0, - [XMIT_SZ_16BIT] = 1, - [XMIT_SZ_32BIT] = 2, - [XMIT_SZ_256BIT] = 5, -}; -#endif #endif /* __ASM_CPU_SH4_DMA_H */ diff --git a/arch/sh/include/cpu-sh4/cpu/freq.h b/arch/sh/include/cpu-sh4/cpu/freq.h index e1e90960ee9..1631fc238e6 100644 --- a/arch/sh/include/cpu-sh4/cpu/freq.h +++ b/arch/sh/include/cpu-sh4/cpu/freq.h @@ -47,6 +47,11 @@ #define MSTPCR1 0xa4150034 #define MSTPCR2 0xa4150038 +#elif defined(CONFIG_CPU_SUBTYPE_SH7734) +#define FRQCR0 0xffc80000 +#define FRQCR2 0xffc80008 +#define FRQMR1 0xffc80014 +#define FRQMR2 0xffc80018 #elif defined(CONFIG_CPU_SUBTYPE_SH7785) #define FRQCR0 0xffc80000 #define FRQCR1 0xffc80004 @@ -56,7 +61,9 @@ #define FRQCR1 0xffc40004 #define FRQMR1 0xffc40014 #elif defined(CONFIG_CPU_SUBTYPE_SHX3) -#define FRQCR 0xffc00014 +#define FRQCR0 0xffc00000 +#define FRQCR1 0xffc00004 +#define FRQMR1 0xffc00014 #else #define FRQCR 0xffc00000 #define FRQCR_PSTBY 0x0200 diff --git a/arch/sh/include/cpu-sh4/cpu/mmu_context.h b/arch/sh/include/cpu-sh4/cpu/mmu_context.h index 3ce7ef6c297..e46ec708105 100644 --- a/arch/sh/include/cpu-sh4/cpu/mmu_context.h +++ b/arch/sh/include/cpu-sh4/cpu/mmu_context.h @@ -19,11 +19,32 @@ #define MMUCR 0xFF000010 /* MMU Control Register */ +#define MMU_TLB_ENTRY_SHIFT 8 + +#define MMU_ITLB_ADDRESS_ARRAY 0xF2000000 +#define MMU_ITLB_ADDRESS_ARRAY2 0xF2800000 +#define MMU_ITLB_DATA_ARRAY 0xF3000000 +#define MMU_ITLB_DATA_ARRAY2 0xF3800000 + #define MMU_UTLB_ADDRESS_ARRAY 0xF6000000 #define MMU_UTLB_ADDRESS_ARRAY2 0xF6800000 +#define MMU_UTLB_DATA_ARRAY 0xF7000000 +#define MMU_UTLB_DATA_ARRAY2 0xF7800000 #define MMU_PAGE_ASSOC_BIT 0x80 -#define MMUCR_TI (1<<2) +#ifdef CONFIG_MMU +#define MMUCR_AT (1 << 0) +#else +#define MMUCR_AT (0) +#endif + +#define MMUCR_TI (1 << 2) + +#define MMUCR_URB 0x00FC0000 +#define MMUCR_URB_SHIFT 18 +#define MMUCR_URB_NENTRIES 64 +#define MMUCR_URC 0x0000FC00 +#define MMUCR_URC_SHIFT 10 #if defined(CONFIG_32BIT) && defined(CONFIG_CPU_SUBTYPE_ST40) #define MMUCR_SE (1 << 4) @@ -50,7 +71,8 @@ #endif #define MMU_NTLB_ENTRIES 64 -#define MMU_CONTROL_INIT (0x05|MMUCR_SQMD|MMUCR_ME|MMUCR_SE|MMUCR_AEX) +#define MMU_CONTROL_INIT (MMUCR_AT | MMUCR_TI | MMUCR_SQMD | \ + MMUCR_ME | MMUCR_SE | MMUCR_AEX) #define TRA 0xff000020 #define EXPEVT 0xff000024 diff --git a/arch/sh/include/cpu-sh4/cpu/sh7722.h b/arch/sh/include/cpu-sh4/cpu/sh7722.h index 48560407cbe..3bb74e534d0 100644 --- a/arch/sh/include/cpu-sh4/cpu/sh7722.h +++ b/arch/sh/include/cpu-sh4/cpu/sh7722.h @@ -222,17 +222,30 @@ enum { }; enum { - HWBLK_UNKNOWN = 0, - HWBLK_TLB, HWBLK_IC, HWBLK_OC, HWBLK_URAM, HWBLK_XYMEM, - HWBLK_INTC, HWBLK_DMAC, HWBLK_SHYWAY, HWBLK_HUDI, - HWBLK_UBC, HWBLK_TMU, HWBLK_CMT, HWBLK_RWDT, HWBLK_FLCTL, - HWBLK_SCIF0, HWBLK_SCIF1, HWBLK_SCIF2, HWBLK_SIO, - HWBLK_SIOF0, HWBLK_SIOF1, HWBLK_IIC, HWBLK_RTC, - HWBLK_TPU, HWBLK_IRDA, HWBLK_SDHI, HWBLK_SIM, HWBLK_KEYSC, - HWBLK_TSIF, HWBLK_USBF, HWBLK_2DG, HWBLK_SIU, HWBLK_VOU, + HWBLK_URAM, HWBLK_XYMEM, + HWBLK_TMU, HWBLK_CMT, HWBLK_RWDT, HWBLK_FLCTL, + HWBLK_SCIF0, HWBLK_SCIF1, HWBLK_SCIF2, HWBLK_IIC, HWBLK_RTC, + HWBLK_SDHI, HWBLK_KEYSC, + HWBLK_USBF, HWBLK_2DG, HWBLK_SIU, HWBLK_VOU, HWBLK_JPU, HWBLK_BEU, HWBLK_CEU, HWBLK_VEU, HWBLK_VPU, HWBLK_LCDC, HWBLK_NR, }; +enum { + SHDMA_SLAVE_INVALID, + SHDMA_SLAVE_SCIF0_TX, + SHDMA_SLAVE_SCIF0_RX, + SHDMA_SLAVE_SCIF1_TX, + SHDMA_SLAVE_SCIF1_RX, + SHDMA_SLAVE_SCIF2_TX, + SHDMA_SLAVE_SCIF2_RX, + SHDMA_SLAVE_SIUA_TX, + SHDMA_SLAVE_SIUA_RX, + SHDMA_SLAVE_SIUB_TX, + SHDMA_SLAVE_SIUB_RX, + SHDMA_SLAVE_SDHI0_TX, + SHDMA_SLAVE_SDHI0_RX, +}; + #endif /* __ASM_SH7722_H__ */ diff --git a/arch/sh/include/cpu-sh4/cpu/sh7723.h b/arch/sh/include/cpu-sh4/cpu/sh7723.h index 9b36fae7232..668da89bdac 100644 --- a/arch/sh/include/cpu-sh4/cpu/sh7723.h +++ b/arch/sh/include/cpu-sh4/cpu/sh7723.h @@ -184,7 +184,7 @@ enum { /* SIUA */ GPIO_FN_SIUAFCK, GPIO_FN_SIUAILR, GPIO_FN_SIUAIBT, GPIO_FN_SIUAISLD, GPIO_FN_SIUAOLR, GPIO_FN_SIUAOBT, GPIO_FN_SIUAOSLD, GPIO_FN_SIUAMCK, - GPIO_FN_SIUAISPD, GPIO_FN_SIUOSPD, + GPIO_FN_SIUAISPD, GPIO_FN_SIUAOSPD, /* SIUB */ GPIO_FN_SIUBFCK, GPIO_FN_SIUBILR, GPIO_FN_SIUBIBT, GPIO_FN_SIUBISLD, @@ -266,10 +266,9 @@ enum { }; enum { - HWBLK_UNKNOWN = 0, HWBLK_TLB, HWBLK_IC, HWBLK_OC, HWBLK_L2C, HWBLK_ILMEM, HWBLK_FPU, HWBLK_INTC, HWBLK_DMAC0, HWBLK_SHYWAY, - HWBLK_HUDI, HWBLK_DBG, HWBLK_UBC, HWBLK_SUBC, + HWBLK_HUDI, HWBLK_UBC, HWBLK_TMU0, HWBLK_CMT, HWBLK_RWDT, HWBLK_DMAC1, HWBLK_TMU1, HWBLK_FLCTL, HWBLK_SCIF0, HWBLK_SCIF1, HWBLK_SCIF2, diff --git a/arch/sh/include/cpu-sh4/cpu/sh7724.h b/arch/sh/include/cpu-sh4/cpu/sh7724.h index 0cd1f71a111..38859f96d4e 100644 --- a/arch/sh/include/cpu-sh4/cpu/sh7724.h +++ b/arch/sh/include/cpu-sh4/cpu/sh7724.h @@ -9,6 +9,7 @@ * MD3: BSC - Area0 Bus Width (16/32-bit) [CS0BCR.9,10] * MD5: BSC - Endian Mode (L: Big, H: Little) [CMNCR.3] * MD8: Test Mode + * BOOT: FBR - Boot Mode (L: MMCIF, H: Area0) */ /* Pin Function Controller: @@ -267,10 +268,9 @@ enum { }; enum { - HWBLK_UNKNOWN = 0, HWBLK_TLB, HWBLK_IC, HWBLK_OC, HWBLK_RSMEM, HWBLK_ILMEM, HWBLK_L2C, HWBLK_FPU, HWBLK_INTC, HWBLK_DMAC0, HWBLK_SHYWAY, - HWBLK_HUDI, HWBLK_DBG, HWBLK_UBC, + HWBLK_HUDI, HWBLK_UBC, HWBLK_TMU0, HWBLK_CMT, HWBLK_RWDT, HWBLK_DMAC1, HWBLK_TMU1, HWBLK_SCIF0, HWBLK_SCIF1, HWBLK_SCIF2, HWBLK_SCIF3, HWBLK_SCIF4, HWBLK_SCIF5, HWBLK_MSIOF0, HWBLK_MSIOF1, @@ -283,4 +283,36 @@ enum { HWBLK_NR, }; +enum { + SHDMA_SLAVE_INVALID, + SHDMA_SLAVE_SCIF0_TX, + SHDMA_SLAVE_SCIF0_RX, + SHDMA_SLAVE_SCIF1_TX, + SHDMA_SLAVE_SCIF1_RX, + SHDMA_SLAVE_SCIF2_TX, + SHDMA_SLAVE_SCIF2_RX, + SHDMA_SLAVE_SCIF3_TX, + SHDMA_SLAVE_SCIF3_RX, + SHDMA_SLAVE_SCIF4_TX, + SHDMA_SLAVE_SCIF4_RX, + SHDMA_SLAVE_SCIF5_TX, + SHDMA_SLAVE_SCIF5_RX, + SHDMA_SLAVE_USB0D0_TX, + SHDMA_SLAVE_USB0D0_RX, + SHDMA_SLAVE_USB0D1_TX, + SHDMA_SLAVE_USB0D1_RX, + SHDMA_SLAVE_USB1D0_TX, + SHDMA_SLAVE_USB1D0_RX, + SHDMA_SLAVE_USB1D1_TX, + SHDMA_SLAVE_USB1D1_RX, + SHDMA_SLAVE_SDHI0_TX, + SHDMA_SLAVE_SDHI0_RX, + SHDMA_SLAVE_SDHI1_TX, + SHDMA_SLAVE_SDHI1_RX, +}; + +extern struct clk sh7724_fsimcka_clk; +extern struct clk sh7724_fsimckb_clk; +extern struct clk sh7724_dv_clki; + #endif /* __ASM_SH7724_H__ */ diff --git a/arch/sh/include/cpu-sh4/cpu/sh7734.h b/arch/sh/include/cpu-sh4/cpu/sh7734.h new file mode 100644 index 00000000000..2fb9a7b71b4 --- /dev/null +++ b/arch/sh/include/cpu-sh4/cpu/sh7734.h @@ -0,0 +1,306 @@ +#ifndef __ASM_SH7734_H__ +#define __ASM_SH7734_H__ + +/* Pin Function Controller: + * GPIO_FN_xx - GPIO used to select pin function + * GPIO_GP_x_x - GPIO mapped to real I/O pin on CPU + */ +enum { + GPIO_GP_0_0, GPIO_GP_0_1, GPIO_GP_0_2, GPIO_GP_0_3, + GPIO_GP_0_4, GPIO_GP_0_5, GPIO_GP_0_6, GPIO_GP_0_7, + GPIO_GP_0_8, GPIO_GP_0_9, GPIO_GP_0_10, GPIO_GP_0_11, + GPIO_GP_0_12, GPIO_GP_0_13, GPIO_GP_0_14, GPIO_GP_0_15, + GPIO_GP_0_16, GPIO_GP_0_17, GPIO_GP_0_18, GPIO_GP_0_19, + GPIO_GP_0_20, GPIO_GP_0_21, GPIO_GP_0_22, GPIO_GP_0_23, + GPIO_GP_0_24, GPIO_GP_0_25, GPIO_GP_0_26, GPIO_GP_0_27, + GPIO_GP_0_28, GPIO_GP_0_29, GPIO_GP_0_30, GPIO_GP_0_31, + + GPIO_GP_1_0, GPIO_GP_1_1, GPIO_GP_1_2, GPIO_GP_1_3, + GPIO_GP_1_4, GPIO_GP_1_5, GPIO_GP_1_6, GPIO_GP_1_7, + GPIO_GP_1_8, GPIO_GP_1_9, GPIO_GP_1_10, GPIO_GP_1_11, + GPIO_GP_1_12, GPIO_GP_1_13, GPIO_GP_1_14, GPIO_GP_1_15, + GPIO_GP_1_16, GPIO_GP_1_17, GPIO_GP_1_18, GPIO_GP_1_19, + GPIO_GP_1_20, GPIO_GP_1_21, GPIO_GP_1_22, GPIO_GP_1_23, + GPIO_GP_1_24, GPIO_GP_1_25, GPIO_GP_1_26, GPIO_GP_1_27, + GPIO_GP_1_28, GPIO_GP_1_29, GPIO_GP_1_30, GPIO_GP_1_31, + + GPIO_GP_2_0, GPIO_GP_2_1, GPIO_GP_2_2, GPIO_GP_2_3, + GPIO_GP_2_4, GPIO_GP_2_5, GPIO_GP_2_6, GPIO_GP_2_7, + GPIO_GP_2_8, GPIO_GP_2_9, GPIO_GP_2_10, GPIO_GP_2_11, + GPIO_GP_2_12, GPIO_GP_2_13, GPIO_GP_2_14, GPIO_GP_2_15, + GPIO_GP_2_16, GPIO_GP_2_17, GPIO_GP_2_18, GPIO_GP_2_19, + GPIO_GP_2_20, GPIO_GP_2_21, GPIO_GP_2_22, GPIO_GP_2_23, + GPIO_GP_2_24, GPIO_GP_2_25, GPIO_GP_2_26, GPIO_GP_2_27, + GPIO_GP_2_28, GPIO_GP_2_29, GPIO_GP_2_30, GPIO_GP_2_31, + + GPIO_GP_3_0, GPIO_GP_3_1, GPIO_GP_3_2, GPIO_GP_3_3, + GPIO_GP_3_4, GPIO_GP_3_5, GPIO_GP_3_6, GPIO_GP_3_7, + GPIO_GP_3_8, GPIO_GP_3_9, GPIO_GP_3_10, GPIO_GP_3_11, + GPIO_GP_3_12, GPIO_GP_3_13, GPIO_GP_3_14, GPIO_GP_3_15, + GPIO_GP_3_16, GPIO_GP_3_17, GPIO_GP_3_18, GPIO_GP_3_19, + GPIO_GP_3_20, GPIO_GP_3_21, GPIO_GP_3_22, GPIO_GP_3_23, + GPIO_GP_3_24, GPIO_GP_3_25, GPIO_GP_3_26, GPIO_GP_3_27, + GPIO_GP_3_28, GPIO_GP_3_29, GPIO_GP_3_30, GPIO_GP_3_31, + + GPIO_GP_4_0, GPIO_GP_4_1, GPIO_GP_4_2, GPIO_GP_4_3, + GPIO_GP_4_4, GPIO_GP_4_5, GPIO_GP_4_6, GPIO_GP_4_7, + GPIO_GP_4_8, GPIO_GP_4_9, GPIO_GP_4_10, GPIO_GP_4_11, + GPIO_GP_4_12, GPIO_GP_4_13, GPIO_GP_4_14, GPIO_GP_4_15, + GPIO_GP_4_16, GPIO_GP_4_17, GPIO_GP_4_18, GPIO_GP_4_19, + GPIO_GP_4_20, GPIO_GP_4_21, GPIO_GP_4_22, GPIO_GP_4_23, + GPIO_GP_4_24, GPIO_GP_4_25, GPIO_GP_4_26, GPIO_GP_4_27, + GPIO_GP_4_28, GPIO_GP_4_29, GPIO_GP_4_30, GPIO_GP_4_31, + + GPIO_GP_5_0, GPIO_GP_5_1, GPIO_GP_5_2, GPIO_GP_5_3, + GPIO_GP_5_4, GPIO_GP_5_5, GPIO_GP_5_6, GPIO_GP_5_7, + GPIO_GP_5_8, GPIO_GP_5_9, GPIO_GP_5_10, GPIO_GP_5_11, + + GPIO_FN_CLKOUT, GPIO_FN_BS, GPIO_FN_CS0, GPIO_FN_EX_CS0, GPIO_FN_RD, + GPIO_FN_WE0, GPIO_FN_WE1, + + GPIO_FN_SCL0, GPIO_FN_PENC0, GPIO_FN_USB_OVC0, + + GPIO_FN_IRQ2_B, GPIO_FN_IRQ3_B, + + /* IPSR0 */ + GPIO_FN_A15, GPIO_FN_ST0_VCO_CLKIN, GPIO_FN_LCD_DATA15_A, + GPIO_FN_TIOC3D_C, + GPIO_FN_A14, GPIO_FN_LCD_DATA14_A, GPIO_FN_TIOC3C_C, + GPIO_FN_A13, GPIO_FN_LCD_DATA13_A, GPIO_FN_TIOC3B_C, + GPIO_FN_A12, GPIO_FN_LCD_DATA12_A, GPIO_FN_TIOC3A_C, + GPIO_FN_A11, GPIO_FN_ST0_D7, GPIO_FN_LCD_DATA11_A, + GPIO_FN_TIOC2B_C, + GPIO_FN_A10, GPIO_FN_ST0_D6, GPIO_FN_LCD_DATA10_A, + GPIO_FN_TIOC2A_C, + GPIO_FN_A9, GPIO_FN_ST0_D5, GPIO_FN_LCD_DATA9_A, + GPIO_FN_TIOC1B_C, + GPIO_FN_A8, GPIO_FN_ST0_D4, GPIO_FN_LCD_DATA8_A, + GPIO_FN_TIOC1A_C, + GPIO_FN_A7, GPIO_FN_ST0_D3, GPIO_FN_LCD_DATA7_A, GPIO_FN_TIOC0D_C, + GPIO_FN_A6, GPIO_FN_ST0_D2, GPIO_FN_LCD_DATA6_A, GPIO_FN_TIOC0C_C, + GPIO_FN_A5, GPIO_FN_ST0_D1, GPIO_FN_LCD_DATA5_A, GPIO_FN_TIOC0B_C, + GPIO_FN_A4, GPIO_FN_ST0_D0, GPIO_FN_LCD_DATA4_A, GPIO_FN_TIOC0A_C, + GPIO_FN_A3, GPIO_FN_ST0_VLD, GPIO_FN_LCD_DATA3_A, GPIO_FN_TCLKD_C, + GPIO_FN_A2, GPIO_FN_ST0_SYC, GPIO_FN_LCD_DATA2_A, GPIO_FN_TCLKC_C, + GPIO_FN_A1, GPIO_FN_ST0_REQ, GPIO_FN_LCD_DATA1_A, GPIO_FN_TCLKB_C, + GPIO_FN_A0, GPIO_FN_ST0_CLKIN, GPIO_FN_LCD_DATA0_A, GPIO_FN_TCLKA_C, + + /* IPSR1 */ + GPIO_FN_D3, GPIO_FN_SD0_DAT3_A, GPIO_FN_MMC_D3_A, GPIO_FN_ST1_D6, + GPIO_FN_FD3_A, + GPIO_FN_D2, GPIO_FN_SD0_DAT2_A, GPIO_FN_MMC_D2_A, GPIO_FN_ST1_D5, + GPIO_FN_FD2_A, + GPIO_FN_D1, GPIO_FN_SD0_DAT1_A, GPIO_FN_MMC_D1_A, GPIO_FN_ST1_D4, + GPIO_FN_FD1_A, + GPIO_FN_D0, GPIO_FN_SD0_DAT0_A, GPIO_FN_MMC_D0_A, GPIO_FN_ST1_D3, + GPIO_FN_FD0_A, + GPIO_FN_A25, GPIO_FN_TX2_D, GPIO_FN_ST1_D2, + GPIO_FN_A24, GPIO_FN_RX2_D, GPIO_FN_ST1_D1, + GPIO_FN_A23, GPIO_FN_ST1_D0, GPIO_FN_LCD_M_DISP_A, + GPIO_FN_A22, GPIO_FN_ST1_VLD, GPIO_FN_LCD_VEPWC_A, + GPIO_FN_A21, GPIO_FN_ST1_SYC, GPIO_FN_LCD_VCPWC_A, + GPIO_FN_A20, GPIO_FN_ST1_REQ, GPIO_FN_LCD_FLM_A, + GPIO_FN_A19, GPIO_FN_ST1_CLKIN, GPIO_FN_LCD_CLK_A, GPIO_FN_TIOC4D_C, + GPIO_FN_A18, GPIO_FN_ST1_PWM, GPIO_FN_LCD_CL2_A, GPIO_FN_TIOC4C_C, + GPIO_FN_A17, GPIO_FN_ST1_VCO_CLKIN, GPIO_FN_LCD_CL1_A, GPIO_FN_TIOC4B_C, + GPIO_FN_A16, GPIO_FN_ST0_PWM, GPIO_FN_LCD_DON_A, GPIO_FN_TIOC4A_C, + + /* IPSR2 */ + GPIO_FN_D14, GPIO_FN_TX2_B, GPIO_FN_FSE_A, GPIO_FN_ET0_TX_CLK_B, + GPIO_FN_D13, GPIO_FN_RX2_B, GPIO_FN_FRB_A, GPIO_FN_ET0_ETXD6_B, + GPIO_FN_D12, GPIO_FN_FWE_A, GPIO_FN_ET0_ETXD5_B, + GPIO_FN_D11, GPIO_FN_RSPI_MISO_A, GPIO_FN_QMI_QIO1_A, + GPIO_FN_FRE_A, GPIO_FN_ET0_ETXD3_B, + GPIO_FN_D10, GPIO_FN_RSPI_MOSI_A, GPIO_FN_QMO_QIO0_A, + GPIO_FN_FALE_A, GPIO_FN_ET0_ETXD2_B, + GPIO_FN_D9, GPIO_FN_SD0_CMD_A, GPIO_FN_MMC_CMD_A, GPIO_FN_QIO3_A, + GPIO_FN_FCLE_A, GPIO_FN_ET0_ETXD1_B, + GPIO_FN_D8, GPIO_FN_SD0_CLK_A, GPIO_FN_MMC_CLK_A, GPIO_FN_QIO2_A, + GPIO_FN_FCE_A, GPIO_FN_ET0_GTX_CLK_B, + GPIO_FN_D7, GPIO_FN_RSPI_SSL_A, GPIO_FN_MMC_D7_A, GPIO_FN_QSSL_A, + GPIO_FN_FD7_A, + GPIO_FN_D6, GPIO_FN_RSPI_RSPCK_A, GPIO_FN_MMC_D6_A, GPIO_FN_QSPCLK_A, + GPIO_FN_FD6_A, + GPIO_FN_D5, GPIO_FN_SD0_WP_A, GPIO_FN_MMC_D5_A, GPIO_FN_FD5_A, + GPIO_FN_D4, GPIO_FN_SD0_CD_A, GPIO_FN_MMC_D4_A, GPIO_FN_ST1_D7, + GPIO_FN_FD4_A, + + /* IPSR3 */ + GPIO_FN_DRACK0, GPIO_FN_SD1_DAT2_A, GPIO_FN_ATAG, GPIO_FN_TCLK1_A, + GPIO_FN_ET0_ETXD7, + GPIO_FN_EX_WAIT2, GPIO_FN_SD1_DAT1_A, GPIO_FN_DACK2, GPIO_FN_CAN1_RX_C, + GPIO_FN_ET0_MAGIC_C, GPIO_FN_ET0_ETXD6_A, + GPIO_FN_EX_WAIT1, GPIO_FN_SD1_DAT0_A, GPIO_FN_DREQ2, GPIO_FN_CAN1_TX_C, + GPIO_FN_ET0_LINK_C, GPIO_FN_ET0_ETXD5_A, + GPIO_FN_EX_WAIT0, GPIO_FN_TCLK1_B, + GPIO_FN_RD_WR, GPIO_FN_TCLK0, + GPIO_FN_EX_CS5, GPIO_FN_SD1_CMD_A, GPIO_FN_ATADIR, GPIO_FN_QSSL_B, + GPIO_FN_ET0_ETXD3_A, + GPIO_FN_EX_CS4, GPIO_FN_SD1_WP_A, GPIO_FN_ATAWR, GPIO_FN_QMI_QIO1_B, + GPIO_FN_ET0_ETXD2_A, + GPIO_FN_EX_CS3, GPIO_FN_SD1_CD_A, GPIO_FN_ATARD, GPIO_FN_QMO_QIO0_B, + GPIO_FN_ET0_ETXD1_A, + GPIO_FN_EX_CS2, GPIO_FN_TX3_B, GPIO_FN_ATACS1, GPIO_FN_QSPCLK_B, + GPIO_FN_ET0_GTX_CLK_A, + GPIO_FN_EX_CS1, GPIO_FN_RX3_B, GPIO_FN_ATACS0, GPIO_FN_QIO2_B, + GPIO_FN_ET0_ETXD0, + GPIO_FN_CS1_A26, GPIO_FN_QIO3_B, + GPIO_FN_D15, GPIO_FN_SCK2_B, + + /* IPSR4 */ + GPIO_FN_SCK2_A, GPIO_FN_VI0_G3, + GPIO_FN_RTS1_B, GPIO_FN_VI0_G2, + GPIO_FN_CTS1_B, GPIO_FN_VI0_DATA7_VI0_G1, + GPIO_FN_TX1_B, GPIO_FN_VI0_DATA6_VI0_G0, GPIO_FN_ET0_PHY_INT_A, + GPIO_FN_RX1_B, GPIO_FN_VI0_DATA5_VI0_B5, GPIO_FN_ET0_MAGIC_A, + GPIO_FN_SCK1_B, GPIO_FN_VI0_DATA4_VI0_B4, GPIO_FN_ET0_LINK_A, + GPIO_FN_RTS0_B, GPIO_FN_VI0_DATA3_VI0_B3, GPIO_FN_ET0_MDIO_A, + GPIO_FN_CTS0_B, GPIO_FN_VI0_DATA2_VI0_B2, GPIO_FN_RMII0_MDIO_A, + GPIO_FN_ET0_MDC, + GPIO_FN_HTX0_A, GPIO_FN_TX1_A, GPIO_FN_VI0_DATA1_VI0_B1, + GPIO_FN_RMII0_MDC_A, GPIO_FN_ET0_COL, + GPIO_FN_HRX0_A, GPIO_FN_RX1_A, GPIO_FN_VI0_DATA0_VI0_B0, + GPIO_FN_RMII0_CRS_DV_A, GPIO_FN_ET0_CRS, + GPIO_FN_HSCK0_A, GPIO_FN_SCK1_A, GPIO_FN_VI0_VSYNC, + GPIO_FN_RMII0_RX_ER_A, GPIO_FN_ET0_RX_ER, + GPIO_FN_HRTS0_A, GPIO_FN_RTS1_A, GPIO_FN_VI0_HSYNC, + GPIO_FN_RMII0_TXD_EN_A, GPIO_FN_ET0_RX_DV, + GPIO_FN_HCTS0_A, GPIO_FN_CTS1_A, GPIO_FN_VI0_FIELD, + GPIO_FN_RMII0_RXD1_A, GPIO_FN_ET0_ERXD7, + + /* IPSR5 */ + GPIO_FN_SD2_CLK_A, GPIO_FN_RX2_A, GPIO_FN_VI0_G4, GPIO_FN_ET0_RX_CLK_B, + GPIO_FN_SD2_CMD_A, GPIO_FN_TX2_A, GPIO_FN_VI0_G5, GPIO_FN_ET0_ERXD2_B, + GPIO_FN_SD2_DAT0_A, GPIO_FN_RX3_A, GPIO_FN_VI0_R0, GPIO_FN_ET0_ERXD3_B, + GPIO_FN_SD2_DAT1_A, GPIO_FN_TX3_A, GPIO_FN_VI0_R1, GPIO_FN_ET0_MDIO_B, + GPIO_FN_SD2_DAT2_A, GPIO_FN_RX4_A, GPIO_FN_VI0_R2, GPIO_FN_ET0_LINK_B, + GPIO_FN_SD2_DAT3_A, GPIO_FN_TX4_A, GPIO_FN_VI0_R3, GPIO_FN_ET0_MAGIC_B, + GPIO_FN_SD2_CD_A, GPIO_FN_RX5_A, GPIO_FN_VI0_R4, GPIO_FN_ET0_PHY_INT_B, + GPIO_FN_SD2_WP_A, GPIO_FN_TX5_A, GPIO_FN_VI0_R5, + GPIO_FN_REF125CK, GPIO_FN_ADTRG, GPIO_FN_RX5_C, + GPIO_FN_REF50CK, GPIO_FN_CTS1_E, GPIO_FN_HCTS0_D, + + /* IPSR6 */ + GPIO_FN_DU0_DR0, GPIO_FN_SCIF_CLK_B, GPIO_FN_HRX0_D, GPIO_FN_IETX_A, + GPIO_FN_TCLKA_A, GPIO_FN_HIFD00, + GPIO_FN_DU0_DR1, GPIO_FN_SCK0_B, GPIO_FN_HTX0_D, GPIO_FN_IERX_A, + GPIO_FN_TCLKB_A, GPIO_FN_HIFD01, + GPIO_FN_DU0_DR2, GPIO_FN_RX0_B, GPIO_FN_TCLKC_A, GPIO_FN_HIFD02, + GPIO_FN_DU0_DR3, GPIO_FN_TX0_B, GPIO_FN_TCLKD_A, GPIO_FN_HIFD03, + GPIO_FN_DU0_DR4, GPIO_FN_CTS0_C, GPIO_FN_TIOC0A_A, GPIO_FN_HIFD04, + GPIO_FN_DU0_DR5, GPIO_FN_RTS0_C, GPIO_FN_TIOC0B_A, GPIO_FN_HIFD05, + GPIO_FN_DU0_DR6, GPIO_FN_SCK1_C, GPIO_FN_TIOC0C_A, GPIO_FN_HIFD06, + GPIO_FN_DU0_DR7, GPIO_FN_RX1_C, GPIO_FN_TIOC0D_A, GPIO_FN_HIFD07, + GPIO_FN_DU0_DG0, GPIO_FN_TX1_C, GPIO_FN_HSCK0_D, GPIO_FN_IECLK_A, + GPIO_FN_TIOC1A_A, GPIO_FN_HIFD08, + GPIO_FN_DU0_DG1, GPIO_FN_CTS1_C, GPIO_FN_HRTS0_D, GPIO_FN_TIOC1B_A, + GPIO_FN_HIFD09, + + /* IPSR7 */ + GPIO_FN_DU0_DG2, GPIO_FN_RTS1_C, GPIO_FN_RMII0_MDC_B, GPIO_FN_TIOC2A_A, + GPIO_FN_HIFD10, + GPIO_FN_DU0_DG3, GPIO_FN_SCK2_C, GPIO_FN_RMII0_MDIO_B, GPIO_FN_TIOC2B_A, + GPIO_FN_HIFD11, + GPIO_FN_DU0_DG4, GPIO_FN_RX2_C, GPIO_FN_RMII0_CRS_DV_B, + GPIO_FN_TIOC3A_A, GPIO_FN_HIFD12, + GPIO_FN_DU0_DG5, GPIO_FN_TX2_C, GPIO_FN_RMII0_RX_ER_B, + GPIO_FN_TIOC3B_A, GPIO_FN_HIFD13, + GPIO_FN_DU0_DG6, GPIO_FN_RX3_C, GPIO_FN_RMII0_RXD0_B, + GPIO_FN_TIOC3C_A, GPIO_FN_HIFD14, + GPIO_FN_DU0_DG7, GPIO_FN_TX3_C, GPIO_FN_RMII0_RXD1_B, + GPIO_FN_TIOC3D_A, GPIO_FN_HIFD15, + GPIO_FN_DU0_DB0, GPIO_FN_RX4_C, GPIO_FN_RMII0_TXD_EN_B, + GPIO_FN_TIOC4A_A, GPIO_FN_HIFCS, + GPIO_FN_DU0_DB1, GPIO_FN_TX4_C, GPIO_FN_RMII0_TXD0_B, + GPIO_FN_TIOC4B_A, GPIO_FN_HIFRS, + GPIO_FN_DU0_DB2, GPIO_FN_RX5_B, GPIO_FN_RMII0_TXD1_B, + GPIO_FN_TIOC4C_A, GPIO_FN_HIFWR, + GPIO_FN_DU0_DB3, GPIO_FN_TX5_B, GPIO_FN_TIOC4D_A, GPIO_FN_HIFRD, + GPIO_FN_DU0_DB4, GPIO_FN_HIFINT, + + /* IPSR8 */ + GPIO_FN_DU0_DB5, GPIO_FN_HIFDREQ, + GPIO_FN_DU0_DB6, GPIO_FN_HIFRDY, + GPIO_FN_DU0_DB7, GPIO_FN_SSI_SCK0_B, GPIO_FN_HIFEBL_B, + GPIO_FN_DU0_DOTCLKIN, GPIO_FN_HSPI_CS0_C, GPIO_FN_SSI_WS0_B, + GPIO_FN_DU0_DOTCLKOUT, GPIO_FN_HSPI_CLK0_C, GPIO_FN_SSI_SDATA0_B, + GPIO_FN_DU0_EXHSYNC_DU0_HSYNC, GPIO_FN_HSPI_TX0_C, GPIO_FN_SSI_SCK1_B, + GPIO_FN_DU0_EXVSYNC_DU0_VSYNC, GPIO_FN_HSPI_RX0_C, GPIO_FN_SSI_WS1_B, + GPIO_FN_DU0_EXODDF_DU0_ODDF, GPIO_FN_CAN0_RX_B, GPIO_FN_HSCK0_B, + GPIO_FN_SSI_SDATA1_B, + GPIO_FN_DU0_DISP, GPIO_FN_CAN0_TX_B, GPIO_FN_HRX0_B, + GPIO_FN_AUDIO_CLKA_B, + GPIO_FN_DU0_CDE, GPIO_FN_HTX0_B, GPIO_FN_AUDIO_CLKB_B, + GPIO_FN_LCD_VCPWC_B, + GPIO_FN_IRQ0_A, GPIO_FN_HSPI_TX_B, GPIO_FN_RX3_E, GPIO_FN_ET0_ERXD0, + GPIO_FN_IRQ1_A, GPIO_FN_HSPI_RX_B, GPIO_FN_TX3_E, GPIO_FN_ET0_ERXD1, + GPIO_FN_IRQ2_A, GPIO_FN_CTS0_A, GPIO_FN_HCTS0_B, GPIO_FN_ET0_ERXD2_A, + GPIO_FN_IRQ3_A, GPIO_FN_RTS0_A, GPIO_FN_HRTS0_B, GPIO_FN_ET0_ERXD3_A, + + /* IPSR9 */ + GPIO_FN_VI1_CLK_A, GPIO_FN_FD0_B, GPIO_FN_LCD_DATA0_B, + GPIO_FN_VI1_0_A, GPIO_FN_FD1_B, GPIO_FN_LCD_DATA1_B, + GPIO_FN_VI1_1_A, GPIO_FN_FD2_B, GPIO_FN_LCD_DATA2_B, + GPIO_FN_VI1_2_A, GPIO_FN_FD3_B, GPIO_FN_LCD_DATA3_B, + GPIO_FN_VI1_3_A, GPIO_FN_FD4_B, GPIO_FN_LCD_DATA4_B, + GPIO_FN_VI1_4_A, GPIO_FN_FD5_B, GPIO_FN_LCD_DATA5_B, + GPIO_FN_VI1_5_A, GPIO_FN_FD6_B, GPIO_FN_LCD_DATA6_B, + GPIO_FN_VI1_6_A, GPIO_FN_FD7_B, GPIO_FN_LCD_DATA7_B, + GPIO_FN_VI1_7_A, GPIO_FN_FCE_B, GPIO_FN_LCD_DATA8_B, + GPIO_FN_SSI_SCK0_A, GPIO_FN_TIOC1A_B, GPIO_FN_LCD_DATA9_B, + GPIO_FN_SSI_WS0_A, GPIO_FN_TIOC1B_B, GPIO_FN_LCD_DATA10_B, + GPIO_FN_SSI_SDATA0_A, GPIO_FN_VI1_0_B, GPIO_FN_TIOC2A_B, + GPIO_FN_LCD_DATA11_B, + GPIO_FN_SSI_SCK1_A, GPIO_FN_VI1_1_B, GPIO_FN_TIOC2B_B, + GPIO_FN_LCD_DATA12_B, + GPIO_FN_SSI_WS1_A, GPIO_FN_VI1_2_B, GPIO_FN_LCD_DATA13_B, + GPIO_FN_SSI_SDATA1_A, GPIO_FN_VI1_3_B, GPIO_FN_LCD_DATA14_B, + + /* IPSR10 */ + GPIO_FN_SSI_SCK23, GPIO_FN_VI1_4_B, GPIO_FN_RX1_D, GPIO_FN_FCLE_B, + GPIO_FN_LCD_DATA15_B, + GPIO_FN_SSI_WS23, GPIO_FN_VI1_5_B, GPIO_FN_TX1_D, GPIO_FN_HSCK0_C, + GPIO_FN_FALE_B, GPIO_FN_LCD_DON_B, + GPIO_FN_SSI_SDATA2, GPIO_FN_VI1_6_B, GPIO_FN_HRX0_C, GPIO_FN_FRE_B, + GPIO_FN_LCD_CL1_B, + GPIO_FN_SSI_SDATA3, GPIO_FN_VI1_7_B, GPIO_FN_HTX0_C, GPIO_FN_FWE_B, + GPIO_FN_LCD_CL2_B, + GPIO_FN_AUDIO_CLKA_A, GPIO_FN_VI1_CLK_B, GPIO_FN_SCK1_D, + GPIO_FN_IECLK_B, GPIO_FN_LCD_FLM_B, + GPIO_FN_AUDIO_CLKB_A, GPIO_FN_LCD_CLK_B, + GPIO_FN_AUDIO_CLKC, GPIO_FN_SCK1_E, GPIO_FN_HCTS0_C, GPIO_FN_FRB_B, + GPIO_FN_LCD_VEPWC_B, + GPIO_FN_AUDIO_CLKOUT, GPIO_FN_TX1_E, GPIO_FN_HRTS0_C, GPIO_FN_FSE_B, + GPIO_FN_LCD_M_DISP_B, + GPIO_FN_CAN_CLK_A, GPIO_FN_RX4_D, + GPIO_FN_CAN0_TX_A, GPIO_FN_TX4_D, GPIO_FN_MLB_CLK, + GPIO_FN_CAN1_RX_A, GPIO_FN_IRQ1_B, + GPIO_FN_CAN0_RX_A, GPIO_FN_IRQ0_B, GPIO_FN_MLB_SIG, + GPIO_FN_CAN1_TX_A, GPIO_FN_TX5_C, GPIO_FN_MLB_DAT, + + /* IPSR11 */ + GPIO_FN_SCL1, GPIO_FN_SCIF_CLK_C, + GPIO_FN_SDA1, GPIO_FN_RX1_E, + GPIO_FN_SDA0, GPIO_FN_HIFEBL_A, + GPIO_FN_SDSELF, GPIO_FN_RTS1_E, + GPIO_FN_SCIF_CLK_A, GPIO_FN_HSPI_CLK_A, GPIO_FN_VI0_CLK, + GPIO_FN_RMII0_TXD0_A, GPIO_FN_ET0_ERXD4, + GPIO_FN_SCK0_A, GPIO_FN_HSPI_CS_A, GPIO_FN_VI0_CLKENB, + GPIO_FN_RMII0_TXD1_A, GPIO_FN_ET0_ERXD5, + GPIO_FN_RX0_A, GPIO_FN_HSPI_RX_A, GPIO_FN_RMII0_RXD0_A, + GPIO_FN_ET0_ERXD6, + GPIO_FN_TX0_A, GPIO_FN_HSPI_TX_A, + GPIO_FN_PENC1, GPIO_FN_TX3_D, GPIO_FN_CAN1_TX_B, GPIO_FN_TX5_D, + GPIO_FN_IETX_B, + GPIO_FN_USB_OVC1, GPIO_FN_RX3_D, GPIO_FN_CAN1_RX_B, GPIO_FN_RX5_D, + GPIO_FN_IERX_B, + GPIO_FN_DREQ0, GPIO_FN_SD1_CLK_A, GPIO_FN_ET0_TX_EN, + GPIO_FN_DACK0, GPIO_FN_SD1_DAT3_A, GPIO_FN_ET0_TX_ER, + GPIO_FN_DREQ1, GPIO_FN_HSPI_CLK_B, GPIO_FN_RX4_B, GPIO_FN_ET0_PHY_INT_C, + GPIO_FN_ET0_TX_CLK_A, + GPIO_FN_DACK1, GPIO_FN_HSPI_CS_B, GPIO_FN_TX4_B, GPIO_FN_ET0_RX_CLK_A, + GPIO_FN_PRESETOUT, GPIO_FN_ST_CLKOUT, + +}; + +#endif /* __ASM_SH7734_H__ */ diff --git a/arch/sh/include/cpu-sh4/cpu/sh7757.h b/arch/sh/include/cpu-sh4/cpu/sh7757.h index f4d267efad7..5340f3bc186 100644 --- a/arch/sh/include/cpu-sh4/cpu/sh7757.h +++ b/arch/sh/include/cpu-sh4/cpu/sh7757.h @@ -3,241 +3,287 @@ enum { /* PTA */ - GPIO_PTA7, GPIO_PTA6, GPIO_PTA5, GPIO_PTA4, - GPIO_PTA3, GPIO_PTA2, GPIO_PTA1, GPIO_PTA0, + GPIO_PTA0, GPIO_PTA1, GPIO_PTA2, GPIO_PTA3, + GPIO_PTA4, GPIO_PTA5, GPIO_PTA6, GPIO_PTA7, /* PTB */ - GPIO_PTB7, GPIO_PTB6, GPIO_PTB5, GPIO_PTB4, - GPIO_PTB3, GPIO_PTB2, GPIO_PTB1, GPIO_PTB0, + GPIO_PTB0, GPIO_PTB1, GPIO_PTB2, GPIO_PTB3, + GPIO_PTB4, GPIO_PTB5, GPIO_PTB6, GPIO_PTB7, /* PTC */ - GPIO_PTC7, GPIO_PTC6, GPIO_PTC5, GPIO_PTC4, - GPIO_PTC3, GPIO_PTC2, GPIO_PTC1, GPIO_PTC0, + GPIO_PTC0, GPIO_PTC1, GPIO_PTC2, GPIO_PTC3, + GPIO_PTC4, GPIO_PTC5, GPIO_PTC6, GPIO_PTC7, /* PTD */ - GPIO_PTD7, GPIO_PTD6, GPIO_PTD5, GPIO_PTD4, - GPIO_PTD3, GPIO_PTD2, GPIO_PTD1, GPIO_PTD0, + GPIO_PTD0, GPIO_PTD1, GPIO_PTD2, GPIO_PTD3, + GPIO_PTD4, GPIO_PTD5, GPIO_PTD6, GPIO_PTD7, /* PTE */ - GPIO_PTE7, GPIO_PTE6, GPIO_PTE5, GPIO_PTE4, - GPIO_PTE3, GPIO_PTE2, GPIO_PTE1, GPIO_PTE0, + GPIO_PTE0, GPIO_PTE1, GPIO_PTE2, GPIO_PTE3, + GPIO_PTE4, GPIO_PTE5, GPIO_PTE6, GPIO_PTE7, /* PTF */ - GPIO_PTF7, GPIO_PTF6, GPIO_PTF5, GPIO_PTF4, - GPIO_PTF3, GPIO_PTF2, GPIO_PTF1, GPIO_PTF0, + GPIO_PTF0, GPIO_PTF1, GPIO_PTF2, GPIO_PTF3, + GPIO_PTF4, GPIO_PTF5, GPIO_PTF6, GPIO_PTF7, /* PTG */ - GPIO_PTG7, GPIO_PTG6, GPIO_PTG5, GPIO_PTG4, - GPIO_PTG3, GPIO_PTG2, GPIO_PTG1, GPIO_PTG0, + GPIO_PTG0, GPIO_PTG1, GPIO_PTG2, GPIO_PTG3, + GPIO_PTG4, GPIO_PTG5, GPIO_PTG6, GPIO_PTG7, /* PTH */ - GPIO_PTH7, GPIO_PTH6, GPIO_PTH5, GPIO_PTH4, - GPIO_PTH3, GPIO_PTH2, GPIO_PTH1, GPIO_PTH0, + GPIO_PTH0, GPIO_PTH1, GPIO_PTH2, GPIO_PTH3, + GPIO_PTH4, GPIO_PTH5, GPIO_PTH6, GPIO_PTH7, /* PTI */ - GPIO_PTI7, GPIO_PTI6, GPIO_PTI5, GPIO_PTI4, - GPIO_PTI3, GPIO_PTI2, GPIO_PTI1, GPIO_PTI0, + GPIO_PTI0, GPIO_PTI1, GPIO_PTI2, GPIO_PTI3, + GPIO_PTI4, GPIO_PTI5, GPIO_PTI6, GPIO_PTI7, /* PTJ */ - GPIO_PTJ7, GPIO_PTJ6, GPIO_PTJ5, GPIO_PTJ4, - GPIO_PTJ3, GPIO_PTJ2, GPIO_PTJ1, GPIO_PTJ0, + GPIO_PTJ0, GPIO_PTJ1, GPIO_PTJ2, GPIO_PTJ3, + GPIO_PTJ4, GPIO_PTJ5, GPIO_PTJ6, GPIO_PTJ7_RESV, /* PTK */ - GPIO_PTK7, GPIO_PTK6, GPIO_PTK5, GPIO_PTK4, - GPIO_PTK3, GPIO_PTK2, GPIO_PTK1, GPIO_PTK0, + GPIO_PTK0, GPIO_PTK1, GPIO_PTK2, GPIO_PTK3, + GPIO_PTK4, GPIO_PTK5, GPIO_PTK6, GPIO_PTK7, /* PTL */ - GPIO_PTL7, GPIO_PTL6, GPIO_PTL5, GPIO_PTL4, - GPIO_PTL3, GPIO_PTL2, GPIO_PTL1, GPIO_PTL0, + GPIO_PTL0, GPIO_PTL1, GPIO_PTL2, GPIO_PTL3, + GPIO_PTL4, GPIO_PTL5, GPIO_PTL6, GPIO_PTL7_RESV, /* PTM */ - GPIO_PTM6, GPIO_PTM5, GPIO_PTM4, - GPIO_PTM3, GPIO_PTM2, GPIO_PTM1, GPIO_PTM0, + GPIO_PTM0, GPIO_PTM1, GPIO_PTM2, GPIO_PTM3, + GPIO_PTM4, GPIO_PTM5, GPIO_PTM6, GPIO_PTM7, /* PTN */ - GPIO_PTN7, GPIO_PTN6, GPIO_PTN5, GPIO_PTN4, - GPIO_PTN3, GPIO_PTN2, GPIO_PTN1, GPIO_PTN0, + GPIO_PTN0, GPIO_PTN1, GPIO_PTN2, GPIO_PTN3, + GPIO_PTN4, GPIO_PTN5, GPIO_PTN6, GPIO_PTN7_RESV, /* PTO */ - GPIO_PTO7, GPIO_PTO6, GPIO_PTO5, GPIO_PTO4, - GPIO_PTO3, GPIO_PTO2, GPIO_PTO1, GPIO_PTO0, + GPIO_PTO0, GPIO_PTO1, GPIO_PTO2, GPIO_PTO3, + GPIO_PTO4, GPIO_PTO5, GPIO_PTO6, GPIO_PTO7, /* PTP */ - GPIO_PTP6, GPIO_PTP5, GPIO_PTP4, - GPIO_PTP3, GPIO_PTP2, GPIO_PTP1, GPIO_PTP0, + GPIO_PTP0, GPIO_PTP1, GPIO_PTP2, GPIO_PTP3, + GPIO_PTP4, GPIO_PTP5, GPIO_PTP6, GPIO_PTP7, /* PTQ */ - GPIO_PTQ6, GPIO_PTQ5, GPIO_PTQ4, - GPIO_PTQ3, GPIO_PTQ2, GPIO_PTQ1, GPIO_PTQ0, + GPIO_PTQ0, GPIO_PTQ1, GPIO_PTQ2, GPIO_PTQ3, + GPIO_PTQ4, GPIO_PTQ5, GPIO_PTQ6, GPIO_PTQ7_RESV, /* PTR */ - GPIO_PTR7, GPIO_PTR6, GPIO_PTR5, GPIO_PTR4, - GPIO_PTR3, GPIO_PTR2, GPIO_PTR1, GPIO_PTR0, + GPIO_PTR0, GPIO_PTR1, GPIO_PTR2, GPIO_PTR3, + GPIO_PTR4, GPIO_PTR5, GPIO_PTR6, GPIO_PTR7, /* PTS */ - GPIO_PTS7, GPIO_PTS6, GPIO_PTS5, GPIO_PTS4, - GPIO_PTS3, GPIO_PTS2, GPIO_PTS1, GPIO_PTS0, + GPIO_PTS0, GPIO_PTS1, GPIO_PTS2, GPIO_PTS3, + GPIO_PTS4, GPIO_PTS5, GPIO_PTS6, GPIO_PTS7, /* PTT */ - GPIO_PTT5, GPIO_PTT4, - GPIO_PTT3, GPIO_PTT2, GPIO_PTT1, GPIO_PTT0, + GPIO_PTT0, GPIO_PTT1, GPIO_PTT2, GPIO_PTT3, + GPIO_PTT4, GPIO_PTT5, GPIO_PTT6, GPIO_PTT7, /* PTU */ - GPIO_PTU7, GPIO_PTU6, GPIO_PTU5, GPIO_PTU4, - GPIO_PTU3, GPIO_PTU2, GPIO_PTU1, GPIO_PTU0, + GPIO_PTU0, GPIO_PTU1, GPIO_PTU2, GPIO_PTU3, + GPIO_PTU4, GPIO_PTU5, GPIO_PTU6, GPIO_PTU7, /* PTV */ - GPIO_PTV7, GPIO_PTV6, GPIO_PTV5, GPIO_PTV4, - GPIO_PTV3, GPIO_PTV2, GPIO_PTV1, GPIO_PTV0, + GPIO_PTV0, GPIO_PTV1, GPIO_PTV2, GPIO_PTV3, + GPIO_PTV4, GPIO_PTV5, GPIO_PTV6, GPIO_PTV7, /* PTW */ - GPIO_PTW7, GPIO_PTW6, GPIO_PTW5, GPIO_PTW4, - GPIO_PTW3, GPIO_PTW2, GPIO_PTW1, GPIO_PTW0, + GPIO_PTW0, GPIO_PTW1, GPIO_PTW2, GPIO_PTW3, + GPIO_PTW4, GPIO_PTW5, GPIO_PTW6, GPIO_PTW7, /* PTX */ - GPIO_PTX7, GPIO_PTX6, GPIO_PTX5, GPIO_PTX4, - GPIO_PTX3, GPIO_PTX2, GPIO_PTX1, GPIO_PTX0, + GPIO_PTX0, GPIO_PTX1, GPIO_PTX2, GPIO_PTX3, + GPIO_PTX4, GPIO_PTX5, GPIO_PTX6, GPIO_PTX7, /* PTY */ - GPIO_PTY7, GPIO_PTY6, GPIO_PTY5, GPIO_PTY4, - GPIO_PTY3, GPIO_PTY2, GPIO_PTY1, GPIO_PTY0, + GPIO_PTY0, GPIO_PTY1, GPIO_PTY2, GPIO_PTY3, + GPIO_PTY4, GPIO_PTY5, GPIO_PTY6, GPIO_PTY7, /* PTZ */ - GPIO_PTZ7, GPIO_PTZ6, GPIO_PTZ5, GPIO_PTZ4, - GPIO_PTZ3, GPIO_PTZ2, GPIO_PTZ1, GPIO_PTZ0, + GPIO_PTZ0, GPIO_PTZ1, GPIO_PTZ2, GPIO_PTZ3, + GPIO_PTZ4, GPIO_PTZ5, GPIO_PTZ6, GPIO_PTZ7, - /* PTA (mobule: LBSC, CPG, LPC) */ + /* PTA (mobule: LBSC, RGMII) */ GPIO_FN_BS, GPIO_FN_RDWR, GPIO_FN_WE1, GPIO_FN_RDY, - GPIO_FN_MD10, GPIO_FN_MD9, GPIO_FN_MD8, - GPIO_FN_LGPIO7, GPIO_FN_LGPIO6, GPIO_FN_LGPIO5, GPIO_FN_LGPIO4, - GPIO_FN_LGPIO3, GPIO_FN_LGPIO2, GPIO_FN_LGPIO1, GPIO_FN_LGPIO0, - - /* PTB (mobule: LBSC, EtherC, SIM, LPC) */ - GPIO_FN_D15, GPIO_FN_D14, GPIO_FN_D13, GPIO_FN_D12, - GPIO_FN_D11, GPIO_FN_D10, GPIO_FN_D9, GPIO_FN_D8, - GPIO_FN_ET0_MDC, GPIO_FN_ET0_MDIO, - GPIO_FN_ET1_MDC, GPIO_FN_ET1_MDIO, - GPIO_FN_SIM_D, GPIO_FN_SIM_CLK, GPIO_FN_SIM_RST, - GPIO_FN_WPSZ1, GPIO_FN_WPSZ0, GPIO_FN_FWID, GPIO_FN_FLSHSZ, - GPIO_FN_LPC_SPIEN, GPIO_FN_BASEL, + GPIO_FN_ET0_MDC, GPIO_FN_ET0_MDIO, + GPIO_FN_ET1_MDC, GPIO_FN_ET1_MDIO, - /* PTC (mobule: SD) */ - GPIO_FN_SD_WP, GPIO_FN_SD_CD, GPIO_FN_SD_CLK, GPIO_FN_SD_CMD, - GPIO_FN_SD_D3, GPIO_FN_SD_D2, GPIO_FN_SD_D1, GPIO_FN_SD_D0, + /* PTB (mobule: INTC, ONFI, TMU) */ + GPIO_FN_IRQ15, GPIO_FN_IRQ14, GPIO_FN_IRQ13, GPIO_FN_IRQ12, + GPIO_FN_IRQ11, GPIO_FN_IRQ10, GPIO_FN_IRQ9, GPIO_FN_IRQ8, + GPIO_FN_ON_NRE, GPIO_FN_ON_NWE, GPIO_FN_ON_NWP, GPIO_FN_ON_NCE0, + GPIO_FN_ON_R_B0, GPIO_FN_ON_ALE, GPIO_FN_ON_CLE, + GPIO_FN_TCLK, - /* PTD (mobule: INTC, SPI0, LBSC, CPG, ADC) */ + /* PTC (mobule: IRQ, PWMU) */ GPIO_FN_IRQ7, GPIO_FN_IRQ6, GPIO_FN_IRQ5, GPIO_FN_IRQ4, GPIO_FN_IRQ3, GPIO_FN_IRQ2, GPIO_FN_IRQ1, GPIO_FN_IRQ0, - GPIO_FN_MD6, GPIO_FN_MD5, GPIO_FN_MD3, GPIO_FN_MD2, - GPIO_FN_MD1, GPIO_FN_MD0, GPIO_FN_ADTRG1, GPIO_FN_ADTRG0, - - /* PTE (mobule: EtherC) */ - GPIO_FN_ET0_CRS_DV, GPIO_FN_ET0_TXD1, - GPIO_FN_ET0_TXD0, GPIO_FN_ET0_TX_EN, - GPIO_FN_ET0_REF_CLK, GPIO_FN_ET0_RXD1, - GPIO_FN_ET0_RXD0, GPIO_FN_ET0_RX_ER, - - /* PTF (mobule: EtherC) */ - GPIO_FN_ET1_CRS_DV, GPIO_FN_ET1_TXD1, - GPIO_FN_ET1_TXD0, GPIO_FN_ET1_TX_EN, - GPIO_FN_ET1_REF_CLK, GPIO_FN_ET1_RXD1, - GPIO_FN_ET1_RXD0, GPIO_FN_ET1_RX_ER, - - /* PTG (mobule: SYSTEM, PWMX, LPC) */ - GPIO_FN_STATUS0, GPIO_FN_STATUS1, - GPIO_FN_PWX0, GPIO_FN_PWX1, GPIO_FN_PWX2, GPIO_FN_PWX3, - GPIO_FN_SERIRQ, GPIO_FN_CLKRUN, GPIO_FN_LPCPD, GPIO_FN_LDRQ, - - /* PTH (mobule: TMU, SCIF234, SPI1, SPI0) */ - GPIO_FN_TCLK, GPIO_FN_RXD4, GPIO_FN_TXD4, + GPIO_FN_PWMU0, GPIO_FN_PWMU1, GPIO_FN_PWMU2, GPIO_FN_PWMU3, + GPIO_FN_PWMU4, GPIO_FN_PWMU5, + + /* PTD (mobule: SPI0, DMAC) */ + GPIO_FN_SP0_MOSI, GPIO_FN_SP0_MISO, GPIO_FN_SP0_SCK, + GPIO_FN_SP0_SCK_FB, GPIO_FN_SP0_SS0, GPIO_FN_SP0_SS1, + GPIO_FN_SP0_SS2, GPIO_FN_SP0_SS3, GPIO_FN_DREQ0, + GPIO_FN_DACK0, GPIO_FN_TEND0, + + /* PTE (mobule: RMII) */ + GPIO_FN_RMII0_CRS_DV, GPIO_FN_RMII0_TXD1, GPIO_FN_RMII0_TXD0, + GPIO_FN_RMII0_TXEN, GPIO_FN_RMII0_REFCLK, GPIO_FN_RMII0_RXD1, + GPIO_FN_RMII0_RXD0, GPIO_FN_RMII0_RX_ER, + + /* PTF (mobule: RMII, SerMux) */ + GPIO_FN_RMII1_CRS_DV, GPIO_FN_RMII1_TXD1, GPIO_FN_RMII1_TXD0, + GPIO_FN_RMII1_TXEN, GPIO_FN_RMII1_REFCLK, GPIO_FN_RMII1_RXD1, + GPIO_FN_RMII1_RXD0, GPIO_FN_RMII1_RX_ER, GPIO_FN_RAC_RI, + + /* PTG (mobule: system, LBSC, LPC, WDT, LPC, eMMC) */ + GPIO_FN_BOOTFMS, GPIO_FN_BOOTWP, + GPIO_FN_A25, GPIO_FN_A24, GPIO_FN_SERIRQ, GPIO_FN_WDTOVF, + GPIO_FN_LPCPD, GPIO_FN_LDRQ, GPIO_FN_MMCCLK, GPIO_FN_MMCCMD, + + /* PTH (mobule: SPI1, LPC, DMAC, ADC) */ GPIO_FN_SP1_MOSI, GPIO_FN_SP1_MISO, GPIO_FN_SP1_SCK, GPIO_FN_SP1_SCK_FB, GPIO_FN_SP1_SS0, GPIO_FN_SP1_SS1, - GPIO_FN_SP0_SS1, - - /* PTI (mobule: INTC) */ - GPIO_FN_IRQ15, GPIO_FN_IRQ14, GPIO_FN_IRQ13, GPIO_FN_IRQ12, - GPIO_FN_IRQ11, GPIO_FN_IRQ10, GPIO_FN_IRQ9, GPIO_FN_IRQ8, + GPIO_FN_WP, GPIO_FN_FMS0, GPIO_FN_TEND1, GPIO_FN_DREQ1, + GPIO_FN_DACK1, GPIO_FN_ADTRG1, GPIO_FN_ADTRG0, - /* PTJ (mobule: SCIF234, SERMUX) */ - GPIO_FN_RXD3, GPIO_FN_TXD3, GPIO_FN_RXD2, GPIO_FN_TXD2, - GPIO_FN_COM1_TXD, GPIO_FN_COM1_RXD, - GPIO_FN_COM1_RTS, GPIO_FN_COM1_CTS, - - /* PTK (mobule: SERMUX) */ - GPIO_FN_COM2_TXD, GPIO_FN_COM2_RXD, - GPIO_FN_COM2_RTS, GPIO_FN_COM2_CTS, - GPIO_FN_COM2_DTR, GPIO_FN_COM2_DSR, - GPIO_FN_COM2_DCD, GPIO_FN_COM2_RI, - - /* PTL (mobule: SERMUX) */ - GPIO_FN_RAC_TXD, GPIO_FN_RAC_RXD, - GPIO_FN_RAC_RTS, GPIO_FN_RAC_CTS, - GPIO_FN_RAC_DTR, GPIO_FN_RAC_DSR, - GPIO_FN_RAC_DCD, GPIO_FN_RAC_RI, + /* PTI (mobule: LBSC, SDHI) */ + GPIO_FN_D15, GPIO_FN_D14, GPIO_FN_D13, GPIO_FN_D12, + GPIO_FN_D11, GPIO_FN_D10, GPIO_FN_D9, GPIO_FN_D8, + GPIO_FN_SD_WP, GPIO_FN_SD_CD, GPIO_FN_SD_CLK, GPIO_FN_SD_CMD, + GPIO_FN_SD_D3, GPIO_FN_SD_D2, GPIO_FN_SD_D1, GPIO_FN_SD_D0, - /* PTM (mobule: IIC, LPC) */ + /* PTJ (mobule: SCIF234) */ + GPIO_FN_RTS3, GPIO_FN_CTS3, GPIO_FN_TXD3, GPIO_FN_RXD3, + GPIO_FN_RTS4, GPIO_FN_RXD4, GPIO_FN_TXD4, + + /* PTK (mobule: SERMUX, LBSC, SCIF) */ + GPIO_FN_COM2_TXD, GPIO_FN_COM2_RXD, GPIO_FN_COM2_RTS, + GPIO_FN_COM2_CTS, GPIO_FN_COM2_DTR, GPIO_FN_COM2_DSR, + GPIO_FN_COM2_DCD, GPIO_FN_CLKOUT, + GPIO_FN_SCK2, GPIO_FN_SCK4, GPIO_FN_SCK3, + + /* PTL (mobule: SERMUX, SCIF, LBSC, AUD) */ + GPIO_FN_RAC_RXD, GPIO_FN_RAC_RTS, GPIO_FN_RAC_CTS, + GPIO_FN_RAC_DTR, GPIO_FN_RAC_DSR, GPIO_FN_RAC_DCD, + GPIO_FN_RAC_TXD, GPIO_FN_RXD2, GPIO_FN_CS5, + GPIO_FN_CS6, GPIO_FN_AUDSYNC, GPIO_FN_AUDCK, + GPIO_FN_TXD2, + + /* PTM (mobule: LBSC, IIC) */ + GPIO_FN_CS4, GPIO_FN_RD, GPIO_FN_WE0, GPIO_FN_CS0, GPIO_FN_SDA6, GPIO_FN_SCL6, GPIO_FN_SDA7, GPIO_FN_SCL7, - GPIO_FN_WP, GPIO_FN_FMS0, GPIO_FN_FMS1, - /* PTN (mobule: SCIF234, EVC) */ - GPIO_FN_SCK2, GPIO_FN_RTS4, GPIO_FN_RTS3, GPIO_FN_RTS2, - GPIO_FN_CTS4, GPIO_FN_CTS3, GPIO_FN_CTS2, - GPIO_FN_EVENT7, GPIO_FN_EVENT6, GPIO_FN_EVENT5, GPIO_FN_EVENT4, - GPIO_FN_EVENT3, GPIO_FN_EVENT2, GPIO_FN_EVENT1, GPIO_FN_EVENT0, + /* PTN (mobule: USB, JMC, SGPIO, WDT) */ + GPIO_FN_VBUS_EN, GPIO_FN_VBUS_OC, GPIO_FN_JMCTCK, + GPIO_FN_JMCTMS, GPIO_FN_JMCTDO, GPIO_FN_JMCTDI, + GPIO_FN_JMCTRST, + GPIO_FN_SGPIO1_CLK, GPIO_FN_SGPIO1_LOAD, GPIO_FN_SGPIO1_DI, + GPIO_FN_SGPIO1_DO, GPIO_FN_SUB_CLKIN, - /* PTO (mobule: SGPIO) */ - GPIO_FN_SGPIO0_CLK, GPIO_FN_SGPIO0_LOAD, - GPIO_FN_SGPIO0_DI, GPIO_FN_SGPIO0_DO, - GPIO_FN_SGPIO1_CLK, GPIO_FN_SGPIO1_LOAD, - GPIO_FN_SGPIO1_DI, GPIO_FN_SGPIO1_DO, - - /* PTP (mobule: JMC, SCIF234) */ - GPIO_FN_JMCTCK, GPIO_FN_JMCTMS, GPIO_FN_JMCTDO, GPIO_FN_JMCTDI, - GPIO_FN_JMCRST, GPIO_FN_SCK4, GPIO_FN_SCK3, + /* PTO (mobule: SGPIO, SerMux) */ + GPIO_FN_SGPIO0_CLK, GPIO_FN_SGPIO0_LOAD, GPIO_FN_SGPIO0_DI, + GPIO_FN_SGPIO0_DO, GPIO_FN_SGPIO2_CLK, GPIO_FN_SGPIO2_LOAD, + GPIO_FN_SGPIO2_DI, GPIO_FN_SGPIO2_DO, GPIO_FN_COM1_TXD, + GPIO_FN_COM1_RXD, GPIO_FN_COM1_RTS, GPIO_FN_COM1_CTS, /* PTQ (mobule: LPC) */ GPIO_FN_LAD3, GPIO_FN_LAD2, GPIO_FN_LAD1, GPIO_FN_LAD0, GPIO_FN_LFRAME, GPIO_FN_LRESET, GPIO_FN_LCLK, /* PTR (mobule: GRA, IIC) */ - GPIO_FN_DDC3, GPIO_FN_DDC2, - GPIO_FN_SDA8, GPIO_FN_SCL8, GPIO_FN_SDA2, GPIO_FN_SCL2, + GPIO_FN_DDC3, GPIO_FN_DDC2, GPIO_FN_SDA2, GPIO_FN_SCL2, GPIO_FN_SDA1, GPIO_FN_SCL1, GPIO_FN_SDA0, GPIO_FN_SCL0, + GPIO_FN_SDA8, GPIO_FN_SCL8, /* PTS (mobule: GRA, IIC) */ - GPIO_FN_DDC1, GPIO_FN_DDC0, - GPIO_FN_SDA9, GPIO_FN_SCL9, GPIO_FN_SDA5, GPIO_FN_SCL5, + GPIO_FN_DDC1, GPIO_FN_DDC0, GPIO_FN_SDA5, GPIO_FN_SCL5, GPIO_FN_SDA4, GPIO_FN_SCL4, GPIO_FN_SDA3, GPIO_FN_SCL3, + GPIO_FN_SDA9, GPIO_FN_SCL9, - /* PTT (mobule: SYSTEM, PWMX) */ - GPIO_FN_AUDSYNC, GPIO_FN_AUDCK, - GPIO_FN_AUDATA3, GPIO_FN_AUDATA2, - GPIO_FN_AUDATA1, GPIO_FN_AUDATA0, - GPIO_FN_PWX7, GPIO_FN_PWX6, GPIO_FN_PWX5, GPIO_FN_PWX4, + /* PTT (mobule: PWMX, AUD) */ + GPIO_FN_PWMX7, GPIO_FN_PWMX6, GPIO_FN_PWMX5, GPIO_FN_PWMX4, + GPIO_FN_PWMX3, GPIO_FN_PWMX2, GPIO_FN_PWMX1, GPIO_FN_PWMX0, + GPIO_FN_AUDATA3, GPIO_FN_AUDATA2, GPIO_FN_AUDATA1, + GPIO_FN_AUDATA0, GPIO_FN_STATUS1, GPIO_FN_STATUS0, - /* PTU (mobule: LBSC, DMAC) */ - GPIO_FN_CS6, GPIO_FN_CS5, GPIO_FN_CS4, GPIO_FN_CS0, - GPIO_FN_RD, GPIO_FN_WE0, GPIO_FN_A25, GPIO_FN_A24, - GPIO_FN_DREQ0, GPIO_FN_DACK0, + /* PTU (mobule: LPC, APM) */ + GPIO_FN_LGPIO7, GPIO_FN_LGPIO6, GPIO_FN_LGPIO5, GPIO_FN_LGPIO4, + GPIO_FN_LGPIO3, GPIO_FN_LGPIO2, GPIO_FN_LGPIO1, GPIO_FN_LGPIO0, + GPIO_FN_APMONCTL_O, GPIO_FN_APMPWBTOUT_O, GPIO_FN_APMSCI_O, + GPIO_FN_APMVDDON, GPIO_FN_APMSLPBTN, GPIO_FN_APMPWRBTN, + GPIO_FN_APMS5N, GPIO_FN_APMS3N, - /* PTV (mobule: LBSC, DMAC) */ + /* PTV (mobule: LBSC, SerMux, R-SPI, EVC, GRA) */ GPIO_FN_A23, GPIO_FN_A22, GPIO_FN_A21, GPIO_FN_A20, GPIO_FN_A19, GPIO_FN_A18, GPIO_FN_A17, GPIO_FN_A16, - GPIO_FN_TEND0, GPIO_FN_DREQ1, GPIO_FN_DACK1, GPIO_FN_TEND1, + GPIO_FN_COM2_RI, GPIO_FN_R_SPI_MOSI, GPIO_FN_R_SPI_MISO, + GPIO_FN_R_SPI_RSPCK, GPIO_FN_R_SPI_SSL0, GPIO_FN_R_SPI_SSL1, + GPIO_FN_EVENT7, GPIO_FN_EVENT6, GPIO_FN_VBIOS_DI, + GPIO_FN_VBIOS_DO, GPIO_FN_VBIOS_CLK, GPIO_FN_VBIOS_CS, - /* PTW (mobule: LBSC) */ + /* PTW (mobule: LBSC, EVC, SCIF) */ GPIO_FN_A15, GPIO_FN_A14, GPIO_FN_A13, GPIO_FN_A12, GPIO_FN_A11, GPIO_FN_A10, GPIO_FN_A9, GPIO_FN_A8, + GPIO_FN_EVENT5, GPIO_FN_EVENT4, GPIO_FN_EVENT3, GPIO_FN_EVENT2, + GPIO_FN_EVENT1, GPIO_FN_EVENT0, GPIO_FN_CTS4, GPIO_FN_CTS2, - /* PTX (mobule: LBSC) */ + /* PTX (mobule: LBSC, SCIF, SIM) */ GPIO_FN_A7, GPIO_FN_A6, GPIO_FN_A5, GPIO_FN_A4, GPIO_FN_A3, GPIO_FN_A2, GPIO_FN_A1, GPIO_FN_A0, + GPIO_FN_RTS2, GPIO_FN_SIM_D, GPIO_FN_SIM_CLK, GPIO_FN_SIM_RST, /* PTY (mobule: LBSC) */ GPIO_FN_D7, GPIO_FN_D6, GPIO_FN_D5, GPIO_FN_D4, GPIO_FN_D3, GPIO_FN_D2, GPIO_FN_D1, GPIO_FN_D0, + + /* PTZ (mobule: eMMC, ONFI) */ + GPIO_FN_MMCDAT7, GPIO_FN_MMCDAT6, GPIO_FN_MMCDAT5, + GPIO_FN_MMCDAT4, GPIO_FN_MMCDAT3, GPIO_FN_MMCDAT2, + GPIO_FN_MMCDAT1, GPIO_FN_MMCDAT0, + GPIO_FN_ON_DQ7, GPIO_FN_ON_DQ6, GPIO_FN_ON_DQ5, GPIO_FN_ON_DQ4, + GPIO_FN_ON_DQ3, GPIO_FN_ON_DQ2, GPIO_FN_ON_DQ1, GPIO_FN_ON_DQ0, }; +enum { + SHDMA_SLAVE_INVALID, + SHDMA_SLAVE_SDHI_TX, + SHDMA_SLAVE_SDHI_RX, + SHDMA_SLAVE_MMCIF_TX, + SHDMA_SLAVE_MMCIF_RX, + SHDMA_SLAVE_SCIF2_TX, + SHDMA_SLAVE_SCIF2_RX, + SHDMA_SLAVE_SCIF3_TX, + SHDMA_SLAVE_SCIF3_RX, + SHDMA_SLAVE_SCIF4_TX, + SHDMA_SLAVE_SCIF4_RX, + SHDMA_SLAVE_RIIC0_TX, + SHDMA_SLAVE_RIIC0_RX, + SHDMA_SLAVE_RIIC1_TX, + SHDMA_SLAVE_RIIC1_RX, + SHDMA_SLAVE_RIIC2_TX, + SHDMA_SLAVE_RIIC2_RX, + SHDMA_SLAVE_RIIC3_TX, + SHDMA_SLAVE_RIIC3_RX, + SHDMA_SLAVE_RIIC4_TX, + SHDMA_SLAVE_RIIC4_RX, + SHDMA_SLAVE_RIIC5_TX, + SHDMA_SLAVE_RIIC5_RX, + SHDMA_SLAVE_RIIC6_TX, + SHDMA_SLAVE_RIIC6_RX, + SHDMA_SLAVE_RIIC7_TX, + SHDMA_SLAVE_RIIC7_RX, + SHDMA_SLAVE_RIIC8_TX, + SHDMA_SLAVE_RIIC8_RX, + SHDMA_SLAVE_RIIC9_TX, + SHDMA_SLAVE_RIIC9_RX, + SHDMA_SLAVE_RSPI_TX, + SHDMA_SLAVE_RSPI_RX, +}; #endif /* __ASM_SH7757_H__ */ diff --git a/arch/sh/include/cpu-sh4/cpu/sh7786.h b/arch/sh/include/cpu-sh4/cpu/sh7786.h index 977862f9072..0df09e638f0 100644 --- a/arch/sh/include/cpu-sh4/cpu/sh7786.h +++ b/arch/sh/include/cpu-sh4/cpu/sh7786.h @@ -32,16 +32,14 @@ enum { GPIO_PD3, GPIO_PD2, GPIO_PD1, GPIO_PD0, /* PE */ - GPIO_PE5, GPIO_PE4, GPIO_PE3, GPIO_PE2, - GPIO_PE1, GPIO_PE0, + GPIO_PE7, GPIO_PE6, /* PF */ GPIO_PF7, GPIO_PF6, GPIO_PF5, GPIO_PF4, GPIO_PF3, GPIO_PF2, GPIO_PF1, GPIO_PF0, /* PG */ - GPIO_PG7, GPIO_PG6, GPIO_PG5, GPIO_PG4, - GPIO_PG3, GPIO_PG2, GPIO_PG1, GPIO_PG0, + GPIO_PG7, GPIO_PG6, GPIO_PG5, /* PH */ GPIO_PH7, GPIO_PH6, GPIO_PH5, GPIO_PH4, @@ -49,7 +47,7 @@ enum { /* PJ */ GPIO_PJ7, GPIO_PJ6, GPIO_PJ5, GPIO_PJ4, - GPIO_PJ3, GPIO_PJ2, GPIO_PJ1, GPIO_PJ0, + GPIO_PJ3, GPIO_PJ2, GPIO_PJ1, /* DU */ GPIO_FN_DCLKIN, GPIO_FN_DCLKOUT, GPIO_FN_ODDF, diff --git a/arch/sh/include/cpu-sh4/cpu/shx3.h b/arch/sh/include/cpu-sh4/cpu/shx3.h new file mode 100644 index 00000000000..68d9080a8da --- /dev/null +++ b/arch/sh/include/cpu-sh4/cpu/shx3.h @@ -0,0 +1,64 @@ +#ifndef __CPU_SHX3_H +#define __CPU_SHX3_H + +enum { + /* PA */ + GPIO_PA7, GPIO_PA6, GPIO_PA5, GPIO_PA4, + GPIO_PA3, GPIO_PA2, GPIO_PA1, GPIO_PA0, + + /* PB */ + GPIO_PB7, GPIO_PB6, GPIO_PB5, GPIO_PB4, + GPIO_PB3, GPIO_PB2, GPIO_PB1, GPIO_PB0, + + /* PC */ + GPIO_PC7, GPIO_PC6, GPIO_PC5, GPIO_PC4, + GPIO_PC3, GPIO_PC2, GPIO_PC1, GPIO_PC0, + + /* PD */ + GPIO_PD7, GPIO_PD6, GPIO_PD5, GPIO_PD4, + GPIO_PD3, GPIO_PD2, GPIO_PD1, GPIO_PD0, + + /* PE */ + GPIO_PE7, GPIO_PE6, GPIO_PE5, GPIO_PE4, + GPIO_PE3, GPIO_PE2, GPIO_PE1, GPIO_PE0, + + /* PF */ + GPIO_PF7, GPIO_PF6, GPIO_PF5, GPIO_PF4, + GPIO_PF3, GPIO_PF2, GPIO_PF1, GPIO_PF0, + + /* PG */ + GPIO_PG7, GPIO_PG6, GPIO_PG5, GPIO_PG4, + GPIO_PG3, GPIO_PG2, GPIO_PG1, GPIO_PG0, + + /* PH */ + GPIO_PH5, GPIO_PH4, + GPIO_PH3, GPIO_PH2, GPIO_PH1, GPIO_PH0, + + /* SCIF */ + GPIO_FN_SCK3, GPIO_FN_TXD3, GPIO_FN_RXD3, + GPIO_FN_SCK2, GPIO_FN_TXD2, GPIO_FN_RXD2, + GPIO_FN_SCK1, GPIO_FN_TXD1, GPIO_FN_RXD1, + GPIO_FN_SCK0, GPIO_FN_TXD0, GPIO_FN_RXD0, + + /* LBSC */ + GPIO_FN_D31, GPIO_FN_D30, GPIO_FN_D29, GPIO_FN_D28, + GPIO_FN_D27, GPIO_FN_D26, GPIO_FN_D25, GPIO_FN_D24, + GPIO_FN_D23, GPIO_FN_D22, GPIO_FN_D21, GPIO_FN_D20, + GPIO_FN_D19, GPIO_FN_D18, GPIO_FN_D17, GPIO_FN_D16, + GPIO_FN_WE3, GPIO_FN_WE2, GPIO_FN_CS6, GPIO_FN_CS5, + GPIO_FN_CS4, GPIO_FN_CLKOUTENB, GPIO_FN_BREQ, + GPIO_FN_IOIS16, GPIO_FN_CE2B, GPIO_FN_CE2A, GPIO_FN_BACK, + + /* DMAC */ + GPIO_FN_DACK0, GPIO_FN_DREQ0, GPIO_FN_DRAK0, + GPIO_FN_DACK1, GPIO_FN_DREQ1, GPIO_FN_DRAK1, + GPIO_FN_DACK2, GPIO_FN_DREQ2, GPIO_FN_DRAK2, + GPIO_FN_DACK3, GPIO_FN_DREQ3, GPIO_FN_DRAK3, + + /* INTC */ + GPIO_FN_IRQ3, GPIO_FN_IRQ2, GPIO_FN_IRQ1, GPIO_FN_IRQ0, + GPIO_FN_IRL3, GPIO_FN_IRL2, GPIO_FN_IRL1, GPIO_FN_IRL0, + GPIO_FN_IRQOUT, GPIO_FN_STATUS1, GPIO_FN_STATUS0, +}; + +#endif /* __CPU_SHX3_H */ diff --git a/arch/sh/include/cpu-sh4/cpu/sq.h b/arch/sh/include/cpu-sh4/cpu/sq.h index 586d6491816..74716ba2dc3 100644 --- a/arch/sh/include/cpu-sh4/cpu/sq.h +++ b/arch/sh/include/cpu-sh4/cpu/sq.h @@ -12,6 +12,7 @@ #define __ASM_CPU_SH4_SQ_H #include <asm/addrspace.h> +#include <asm/page.h> /* * Store queues range from e0000000-e3fffffc, allowing approx. 64MB to be @@ -28,7 +29,7 @@ /* arch/sh/kernel/cpu/sh4/sq.c */ unsigned long sq_remap(unsigned long phys, unsigned int size, - const char *name, unsigned long flags); + const char *name, pgprot_t prot); void sq_unmap(unsigned long vaddr); void sq_flush_range(unsigned long start, unsigned int len); diff --git a/arch/sh/include/cpu-sh4/cpu/ubc.h b/arch/sh/include/cpu-sh4/cpu/ubc.h deleted file mode 100644 index c86e1705093..00000000000 --- a/arch/sh/include/cpu-sh4/cpu/ubc.h +++ /dev/null @@ -1,64 +0,0 @@ -/* - * include/asm-sh/cpu-sh4/ubc.h - * - * Copyright (C) 1999 Niibe Yutaka - * Copyright (C) 2003 Paul Mundt - * Copyright (C) 2006 Lineo Solutions Inc. support SH4A UBC - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_CPU_SH4_UBC_H -#define __ASM_CPU_SH4_UBC_H - -#if defined(CONFIG_CPU_SH4A) -#define UBC_CBR0 0xff200000 -#define UBC_CRR0 0xff200004 -#define UBC_CAR0 0xff200008 -#define UBC_CAMR0 0xff20000c -#define UBC_CBR1 0xff200020 -#define UBC_CRR1 0xff200024 -#define UBC_CAR1 0xff200028 -#define UBC_CAMR1 0xff20002c -#define UBC_CDR1 0xff200030 -#define UBC_CDMR1 0xff200034 -#define UBC_CETR1 0xff200038 -#define UBC_CCMFR 0xff200600 -#define UBC_CBCR 0xff200620 - -/* CBR */ -#define UBC_CBR_AIE (0x01<<30) -#define UBC_CBR_ID_INST (0x01<<4) -#define UBC_CBR_RW_READ (0x01<<1) -#define UBC_CBR_CE (0x01) - -#define UBC_CBR_AIV_MASK (0x00FF0000) -#define UBC_CBR_AIV_SHIFT (16) -#define UBC_CBR_AIV_SET(asid) (((asid)<<UBC_CBR_AIV_SHIFT) & UBC_CBR_AIV_MASK) - -#define UBC_CBR_INIT 0x20000000 - -/* CRR */ -#define UBC_CRR_RES (0x01<<13) -#define UBC_CRR_PCB (0x01<<1) -#define UBC_CRR_BIE (0x01) - -#define UBC_CRR_INIT 0x00002000 - -#else /* CONFIG_CPU_SH4 */ -#define UBC_BARA 0xff200000 -#define UBC_BAMRA 0xff200004 -#define UBC_BBRA 0xff200008 -#define UBC_BASRA 0xff000014 -#define UBC_BARB 0xff20000c -#define UBC_BAMRB 0xff200010 -#define UBC_BBRB 0xff200014 -#define UBC_BASRB 0xff000018 -#define UBC_BDRB 0xff200018 -#define UBC_BDMRB 0xff20001c -#define UBC_BRCR 0xff200020 -#endif /* CONFIG_CPU_SH4 */ - -#endif /* __ASM_CPU_SH4_UBC_H */ - diff --git a/arch/sh/include/cpu-sh4/cpu/watchdog.h b/arch/sh/include/cpu-sh4/cpu/watchdog.h index 7672301d0c7..7f62b938093 100644 --- a/arch/sh/include/cpu-sh4/cpu/watchdog.h +++ b/arch/sh/include/cpu-sh4/cpu/watchdog.h @@ -21,6 +21,12 @@ #define WTCNT 0xffcc0000 /*WDTST*/ #define WTST WTCNT #define WTBST 0xffcc0008 /*WDTBST*/ +/* Register definitions */ +#elif defined(CONFIG_CPU_SUBTYPE_SH7722) || \ + defined(CONFIG_CPU_SUBTYPE_SH7723) || \ + defined(CONFIG_CPU_SUBTYPE_SH7724) +#define WTCNT 0xa4520000 +#define WTCSR 0xa4520004 #else /* Register definitions */ #define WTCNT 0xffc00008 diff --git a/arch/sh/include/cpu-sh4a/cpu/dma.h b/arch/sh/include/cpu-sh4a/cpu/dma.h new file mode 100644 index 00000000000..89afb650ce2 --- /dev/null +++ b/arch/sh/include/cpu-sh4a/cpu/dma.h @@ -0,0 +1,72 @@ +#ifndef __ASM_SH_CPU_SH4_DMA_SH7780_H +#define __ASM_SH_CPU_SH4_DMA_SH7780_H + +#include <linux/sh_intc.h> + +#if defined(CONFIG_CPU_SUBTYPE_SH7343) || \ + defined(CONFIG_CPU_SUBTYPE_SH7730) +#define DMTE0_IRQ evt2irq(0x800) +#define DMTE4_IRQ evt2irq(0xb80) +#define DMAE0_IRQ evt2irq(0xbc0) /* DMA Error IRQ*/ +#define SH_DMAC_BASE0 0xFE008020 +#elif defined(CONFIG_CPU_SUBTYPE_SH7722) +#define DMTE0_IRQ evt2irq(0x800) +#define DMTE4_IRQ evt2irq(0xb80) +#define DMAE0_IRQ evt2irq(0xbc0) /* DMA Error IRQ*/ +#define SH_DMAC_BASE0 0xFE008020 +#elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \ + defined(CONFIG_CPU_SUBTYPE_SH7764) +#define DMTE0_IRQ evt2irq(0x640) +#define DMTE4_IRQ evt2irq(0x780) +#define DMAE0_IRQ evt2irq(0x6c0) +#define SH_DMAC_BASE0 0xFF608020 +#elif defined(CONFIG_CPU_SUBTYPE_SH7723) +#define DMTE0_IRQ evt2irq(0x800) /* DMAC0A*/ +#define DMTE4_IRQ evt2irq(0xb80) /* DMAC0B */ +#define DMTE6_IRQ evt2irq(0x700) +#define DMTE8_IRQ evt2irq(0x740) /* DMAC1A */ +#define DMTE9_IRQ evt2irq(0x760) +#define DMTE10_IRQ evt2irq(0xb00) /* DMAC1B */ +#define DMTE11_IRQ evt2irq(0xb20) +#define DMAE0_IRQ evt2irq(0xbc0) /* DMA Error IRQ*/ +#define DMAE1_IRQ evt2irq(0xb40) /* DMA Error IRQ*/ +#define SH_DMAC_BASE0 0xFE008020 +#define SH_DMAC_BASE1 0xFDC08020 +#elif defined(CONFIG_CPU_SUBTYPE_SH7724) +#define DMTE0_IRQ evt2irq(0x800) /* DMAC0A*/ +#define DMTE4_IRQ evt2irq(0xb80) /* DMAC0B */ +#define DMTE6_IRQ evt2irq(0x700) +#define DMTE8_IRQ evt2irq(0x740) /* DMAC1A */ +#define DMTE9_IRQ evt2irq(0x760) +#define DMTE10_IRQ evt2irq(0xb00) /* DMAC1B */ +#define DMTE11_IRQ evt2irq(0xb20) +#define DMAE0_IRQ evt2irq(0xbc0) /* DMA Error IRQ*/ +#define DMAE1_IRQ evt2irq(0xb40) /* DMA Error IRQ*/ +#define SH_DMAC_BASE0 0xFE008020 +#define SH_DMAC_BASE1 0xFDC08020 +#elif defined(CONFIG_CPU_SUBTYPE_SH7780) +#define DMTE0_IRQ evt2irq(0x640) +#define DMTE4_IRQ evt2irq(0x780) +#define DMTE6_IRQ evt2irq(0x7c0) +#define DMTE8_IRQ evt2irq(0xd80) +#define DMTE9_IRQ evt2irq(0xda0) +#define DMTE10_IRQ evt2irq(0xdc0) +#define DMTE11_IRQ evt2irq(0xde0) +#define DMAE0_IRQ evt2irq(0x6c0) /* DMA Error IRQ */ +#define SH_DMAC_BASE0 0xFC808020 +#define SH_DMAC_BASE1 0xFC818020 +#else /* SH7785 */ +#define DMTE0_IRQ evt2irq(0x620) +#define DMTE4_IRQ evt2irq(0x6a0) +#define DMTE6_IRQ evt2irq(0x880) +#define DMTE8_IRQ evt2irq(0x8c0) +#define DMTE9_IRQ evt2irq(0x8e0) +#define DMTE10_IRQ evt2irq(0x900) +#define DMTE11_IRQ evt2irq(0x920) +#define DMAE0_IRQ evt2irq(0x6e0) /* DMA Error IRQ0 */ +#define DMAE1_IRQ evt2irq(0x940) /* DMA Error IRQ1 */ +#define SH_DMAC_BASE0 0xFC808020 +#define SH_DMAC_BASE1 0xFCC08020 +#endif + +#endif /* __ASM_SH_CPU_SH4_DMA_SH7780_H */ diff --git a/arch/sh/include/cpu-sh4a/cpu/serial.h b/arch/sh/include/cpu-sh4a/cpu/serial.h new file mode 100644 index 00000000000..ff1bc275d21 --- /dev/null +++ b/arch/sh/include/cpu-sh4a/cpu/serial.h @@ -0,0 +1,7 @@ +#ifndef __CPU_SH4A_SERIAL_H +#define __CPU_SH4A_SERIAL_H + +/* arch/sh/kernel/cpu/sh4a/serial-sh7722.c */ +extern struct plat_sci_port_ops sh7722_sci_port_ops; + +#endif /* __CPU_SH4A_SERIAL_H */ diff --git a/arch/sh/include/cpu-sh5/cpu/dma.h b/arch/sh/include/cpu-sh5/cpu/dma.h deleted file mode 100644 index 7bf6bb3d35e..00000000000 --- a/arch/sh/include/cpu-sh5/cpu/dma.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __ASM_SH_CPU_SH5_DMA_H -#define __ASM_SH_CPU_SH5_DMA_H - -/* Nothing yet */ - -#endif /* __ASM_SH_CPU_SH5_DMA_H */ diff --git a/arch/sh/include/mach-common/mach/edosk7705.h b/arch/sh/include/mach-common/mach/edosk7705.h deleted file mode 100644 index efc43b32346..00000000000 --- a/arch/sh/include/mach-common/mach/edosk7705.h +++ /dev/null @@ -1,7 +0,0 @@ -#ifndef __ASM_SH_EDOSK7705_H -#define __ASM_SH_EDOSK7705_H - -#define __IO_PREFIX sh_edosk7705 -#include <asm/io_generic.h> - -#endif /* __ASM_SH_EDOSK7705_H */ diff --git a/arch/sh/include/mach-common/mach/highlander.h b/arch/sh/include/mach-common/mach/highlander.h index 5d9d4d5154b..6ce944e33e5 100644 --- a/arch/sh/include/mach-common/mach/highlander.h +++ b/arch/sh/include/mach-common/mach/highlander.h @@ -24,7 +24,7 @@ #define PA_OBLED (PA_BCR+0x001c) /* On Board LED control */ #define PA_OBSW (PA_BCR+0x001e) /* On Board Switch control */ #define PA_AUDIOSEL (PA_BCR+0x0020) /* Sound Interface Select control */ -#define PA_EXTPLR (PA_BCR+0x001e) /* Extention Pin Polarity control */ +#define PA_EXTPLR (PA_BCR+0x001e) /* Extension Pin Polarity control */ #define PA_TPCTL (PA_BCR+0x0100) /* Touch Panel Access control */ #define PA_TPDCKCTL (PA_BCR+0x0102) /* Touch Panel Access data control */ #define PA_TPCTLCLR (PA_BCR+0x0104) /* Touch Panel Access control */ @@ -89,7 +89,7 @@ #define PA_OBLED (PA_BCR+0x0018) /* On Board LED control */ #define PA_OBSW (PA_BCR+0x001a) /* On Board Switch control */ #define PA_AUDIOSEL (PA_BCR+0x001c) /* Sound Interface Select control */ -#define PA_EXTPLR (PA_BCR+0x001e) /* Extention Pin Polarity control */ +#define PA_EXTPLR (PA_BCR+0x001e) /* Extension Pin Polarity control */ #define PA_TPCTL (PA_BCR+0x0100) /* Touch Panel Access control */ #define PA_TPDCKCTL (PA_BCR+0x0102) /* Touch Panel Access data control */ #define PA_TPCTLCLR (PA_BCR+0x0104) /* Touch Panel Access control */ diff --git a/arch/sh/include/mach-common/mach/hp6xx.h b/arch/sh/include/mach-common/mach/hp6xx.h index bcc301ac12f..6aaaf8596e6 100644 --- a/arch/sh/include/mach-common/mach/hp6xx.h +++ b/arch/sh/include/mach-common/mach/hp6xx.h @@ -9,10 +9,11 @@ * for more details. * */ +#include <linux/sh_intc.h> -#define HP680_BTN_IRQ 32 /* IRQ0_IRQ */ -#define HP680_TS_IRQ 35 /* IRQ3_IRQ */ -#define HP680_HD64461_IRQ 36 /* IRQ4_IRQ */ +#define HP680_BTN_IRQ evt2irq(0x600) /* IRQ0_IRQ */ +#define HP680_TS_IRQ evt2irq(0x660) /* IRQ3_IRQ */ +#define HP680_HD64461_IRQ evt2irq(0x680) /* IRQ4_IRQ */ #define DAC_LCD_BRIGHTNESS 0 #define DAC_SPEAKER_VOLUME 1 diff --git a/arch/sh/include/mach-common/mach/lboxre2.h b/arch/sh/include/mach-common/mach/lboxre2.h index e6d16050492..3a4dcc5c74e 100644 --- a/arch/sh/include/mach-common/mach/lboxre2.h +++ b/arch/sh/include/mach-common/mach/lboxre2.h @@ -11,13 +11,14 @@ * for more details. * */ +#include <linux/sh_intc.h> -#define IRQ_CF1 9 /* CF1 */ -#define IRQ_CF0 10 /* CF0 */ -#define IRQ_INTD 11 /* INTD */ -#define IRQ_ETH1 12 /* Ether1 */ -#define IRQ_ETH0 13 /* Ether0 */ -#define IRQ_INTA 14 /* INTA */ +#define IRQ_CF1 evt2irq(0x320) /* CF1 */ +#define IRQ_CF0 evt2irq(0x340) /* CF0 */ +#define IRQ_INTD evt2irq(0x360) /* INTD */ +#define IRQ_ETH1 evt2irq(0x380) /* Ether1 */ +#define IRQ_ETH0 evt2irq(0x3a0) /* Ether0 */ +#define IRQ_INTA evt2irq(0x3c0) /* INTA */ void init_lboxre2_IRQ(void); diff --git a/arch/sh/include/mach-common/mach/magicpanelr2.h b/arch/sh/include/mach-common/mach/magicpanelr2.h index c644a77ee35..183a2f74425 100644 --- a/arch/sh/include/mach-common/mach/magicpanelr2.h +++ b/arch/sh/include/mach-common/mach/magicpanelr2.h @@ -19,12 +19,12 @@ #include <asm/io_generic.h> -#define SETBITS_OUTB(mask, reg) ctrl_outb(ctrl_inb(reg) | mask, reg) -#define SETBITS_OUTW(mask, reg) ctrl_outw(ctrl_inw(reg) | mask, reg) -#define SETBITS_OUTL(mask, reg) ctrl_outl(ctrl_inl(reg) | mask, reg) -#define CLRBITS_OUTB(mask, reg) ctrl_outb(ctrl_inb(reg) & ~mask, reg) -#define CLRBITS_OUTW(mask, reg) ctrl_outw(ctrl_inw(reg) & ~mask, reg) -#define CLRBITS_OUTL(mask, reg) ctrl_outl(ctrl_inl(reg) & ~mask, reg) +#define SETBITS_OUTB(mask, reg) __raw_writeb(__raw_readb(reg) | mask, reg) +#define SETBITS_OUTW(mask, reg) __raw_writew(__raw_readw(reg) | mask, reg) +#define SETBITS_OUTL(mask, reg) __raw_writel(__raw_readl(reg) | mask, reg) +#define CLRBITS_OUTB(mask, reg) __raw_writeb(__raw_readb(reg) & ~mask, reg) +#define CLRBITS_OUTW(mask, reg) __raw_writew(__raw_readw(reg) & ~mask, reg) +#define CLRBITS_OUTL(mask, reg) __raw_writel(__raw_readl(reg) & ~mask, reg) #define PA_LED PORT_PADR /* LED */ diff --git a/arch/sh/include/mach-common/mach/mangle-port.h b/arch/sh/include/mach-common/mach/mangle-port.h new file mode 100644 index 00000000000..4ca1769a0f1 --- /dev/null +++ b/arch/sh/include/mach-common/mach/mangle-port.h @@ -0,0 +1,49 @@ +/* + * SH version cribbed from the MIPS copy: + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2003, 2004 Ralf Baechle + */ +#ifndef __MACH_COMMON_MANGLE_PORT_H +#define __MACH_COMMON_MANGLE_PORT_H + +/* + * Sane hardware offers swapping of PCI/ISA I/O space accesses in hardware; + * less sane hardware forces software to fiddle with this... + * + * Regardless, if the host bus endianness mismatches that of PCI/ISA, then + * you can't have the numerical value of data and byte addresses within + * multibyte quantities both preserved at the same time. Hence two + * variations of functions: non-prefixed ones that preserve the value + * and prefixed ones that preserve byte addresses. The latters are + * typically used for moving raw data between a peripheral and memory (cf. + * string I/O functions), hence the "__mem_" prefix. + */ +#if defined(CONFIG_SWAP_IO_SPACE) + +# define ioswabb(x) (x) +# define __mem_ioswabb(x) (x) +# define ioswabw(x) le16_to_cpu(x) +# define __mem_ioswabw(x) (x) +# define ioswabl(x) le32_to_cpu(x) +# define __mem_ioswabl(x) (x) +# define ioswabq(x) le64_to_cpu(x) +# define __mem_ioswabq(x) (x) + +#else + +# define ioswabb(x) (x) +# define __mem_ioswabb(x) (x) +# define ioswabw(x) (x) +# define __mem_ioswabw(x) cpu_to_le16(x) +# define ioswabl(x) (x) +# define __mem_ioswabl(x) cpu_to_le32(x) +# define ioswabq(x) (x) +# define __mem_ioswabq(x) cpu_to_le32(x) + +#endif + +#endif /* __MACH_COMMON_MANGLE_PORT_H */ diff --git a/arch/sh/include/mach-common/mach/microdev.h b/arch/sh/include/mach-common/mach/microdev.h index 1aed15856e1..dcb05fa8c16 100644 --- a/arch/sh/include/mach-common/mach/microdev.h +++ b/arch/sh/include/mach-common/mach/microdev.h @@ -68,13 +68,4 @@ extern void microdev_print_fpga_intc_status(void); #define __IO_PREFIX microdev #include <asm/io_generic.h> -#if defined(CONFIG_PCI) -unsigned char microdev_pci_inb(unsigned long port); -unsigned short microdev_pci_inw(unsigned long port); -unsigned long microdev_pci_inl(unsigned long port); -void microdev_pci_outb(unsigned char data, unsigned long port); -void microdev_pci_outw(unsigned short data, unsigned long port); -void microdev_pci_outl(unsigned long data, unsigned long port); -#endif - #endif /* __ASM_SH_MICRODEV_H */ diff --git a/arch/sh/include/mach-common/mach/r2d.h b/arch/sh/include/mach-common/mach/r2d.h index 0a800157b82..e04f75eaa15 100644 --- a/arch/sh/include/mach-common/mach/r2d.h +++ b/arch/sh/include/mach-common/mach/r2d.h @@ -18,18 +18,18 @@ #define PA_DISPCTL 0xa4000008 /* Display Timing control */ #define PA_SDMPOW 0xa400000a /* SD Power control */ #define PA_RTCCE 0xa400000c /* RTC(9701) Enable control */ -#define PA_PCICD 0xa400000e /* PCI Extention detect control */ +#define PA_PCICD 0xa400000e /* PCI Extension detect control */ #define PA_VOYAGERRTS 0xa4000020 /* VOYAGER Reset control */ #define PA_R2D1_AXRST 0xa4000022 /* AX_LAN Reset control */ #define PA_R2D1_CFRST 0xa4000024 /* CF Reset control */ #define PA_R2D1_ADMRTS 0xa4000026 /* SD Reset control */ -#define PA_R2D1_EXTRST 0xa4000028 /* Extention Reset control */ +#define PA_R2D1_EXTRST 0xa4000028 /* Extension Reset control */ #define PA_R2D1_CFCDINTCLR 0xa400002a /* CF Insert Interrupt clear */ #define PA_R2DPLUS_CFRST 0xa4000022 /* CF Reset control */ #define PA_R2DPLUS_ADMRTS 0xa4000024 /* SD Reset control */ -#define PA_R2DPLUS_EXTRST 0xa4000026 /* Extention Reset control */ +#define PA_R2DPLUS_EXTRST 0xa4000026 /* Extension Reset control */ #define PA_R2DPLUS_CFCDINTCLR 0xa4000028 /* CF Insert Interrupt clear */ #define PA_R2DPLUS_KEYCTLCLR 0xa400002a /* Key Interrupt clear */ diff --git a/arch/sh/include/mach-common/mach/romimage.h b/arch/sh/include/mach-common/mach/romimage.h index 267e24112d8..3670455faaa 100644 --- a/arch/sh/include/mach-common/mach/romimage.h +++ b/arch/sh/include/mach-common/mach/romimage.h @@ -1 +1,11 @@ +#ifdef __ASSEMBLY__ + /* do nothing here by default */ + +#else /* __ASSEMBLY__ */ + +static inline void mmcif_update_progress(int nr) +{ +} + +#endif /* __ASSEMBLY__ */ diff --git a/arch/sh/include/mach-common/mach/sdk7780.h b/arch/sh/include/mach-common/mach/sdk7780.h index 697dc865f21..ce64e02e9b5 100644 --- a/arch/sh/include/mach-common/mach/sdk7780.h +++ b/arch/sh/include/mach-common/mach/sdk7780.h @@ -11,6 +11,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. */ +#include <linux/sh_intc.h> #include <asm/addrspace.h> /* Box specific addresses. */ @@ -67,9 +68,9 @@ #define SDK7780_NR_IRL 15 /* IDE/ATA interrupt */ -#define IRQ_CFCARD 14 +#define IRQ_CFCARD evt2irq(0x3c0) /* SMC interrupt */ -#define IRQ_ETHERNET 6 +#define IRQ_ETHERNET evt2irq(0x2c0) /* arch/sh/boards/renesas/sdk7780/irq.c */ diff --git a/arch/sh/include/mach-common/mach/snapgear.h b/arch/sh/include/mach-common/mach/secureedge5410.h index 042d95f51c4..3653b9a4bac 100644 --- a/arch/sh/include/mach-common/mach/snapgear.h +++ b/arch/sh/include/mach-common/mach/secureedge5410.h @@ -12,30 +12,9 @@ #ifndef _ASM_SH_IO_SNAPGEAR_H #define _ASM_SH_IO_SNAPGEAR_H -#if defined(CONFIG_CPU_SH4) -/* - * The external interrupt lines, these take up ints 0 - 15 inclusive - * depending on the priority for the interrupt. In fact the priority - * is the interrupt :-) - */ - -#define IRL0_IRQ 2 -#define IRL0_PRIORITY 13 - -#define IRL1_IRQ 5 -#define IRL1_PRIORITY 10 - -#define IRL2_IRQ 8 -#define IRL2_PRIORITY 7 - -#define IRL3_IRQ 11 -#define IRL3_PRIORITY 4 -#endif - #define __IO_PREFIX snapgear #include <asm/io_generic.h> -#ifdef CONFIG_SH_SECUREEDGE5410 /* * We need to remember what was written to the ioport as some bits * are shared with other functions and you cannot read back what was @@ -66,6 +45,5 @@ extern unsigned short secureedge5410_ioport; ((secureedge5410_ioport & ~(mask)) | ((val) & (mask))))) #define SECUREEDGE_READ_IOPORT() \ ((*SECUREEDGE_IOPORT_ADDR&0x0817) | (secureedge5410_ioport&~0x0817)) -#endif #endif /* _ASM_SH_IO_SNAPGEAR_H */ diff --git a/arch/sh/include/mach-common/mach/sh2007.h b/arch/sh/include/mach-common/mach/sh2007.h new file mode 100644 index 00000000000..48180b9aa03 --- /dev/null +++ b/arch/sh/include/mach-common/mach/sh2007.h @@ -0,0 +1,117 @@ +#ifndef __MACH_SH2007_H +#define __MACH_SH2007_H + +#define CS5BCR 0xff802050 +#define CS5WCR 0xff802058 +#define CS5PCR 0xff802070 + +#define BUS_SZ8 1 +#define BUS_SZ16 2 +#define BUS_SZ32 3 + +#define PCMCIA_IODYN 1 +#define PCMCIA_ATA 0 +#define PCMCIA_IO8 2 +#define PCMCIA_IO16 3 +#define PCMCIA_COMM8 4 +#define PCMCIA_COMM16 5 +#define PCMCIA_ATTR8 6 +#define PCMCIA_ATTR16 7 + +#define TYPE_SRAM 0 +#define TYPE_PCMCIA 4 + +/* write-read/write-write delay (0-7:0,1,2,3,4,5,6,7) */ +#define IWW5 0 +#define IWW6 3 +/* different area, read-write delay (0-7:0,1,2,3,4,5,6,7) */ +#define IWRWD5 2 +#define IWRWD6 2 +/* same area, read-write delay (0-7:0,1,2,3,4,5,6,7) */ +#define IWRWS5 2 +#define IWRWS6 2 +/* different area, read-read delay (0-7:0,1,2,3,4,5,6,7) */ +#define IWRRD5 2 +#define IWRRD6 2 +/* same area, read-read delay (0-7:0,1,2,3,4,5,6,7) */ +#define IWRRS5 0 +#define IWRRS6 2 +/* burst count (0-3:4,8,16,32) */ +#define BST5 0 +#define BST6 0 +/* bus size */ +#define SZ5 BUS_SZ16 +#define SZ6 BUS_SZ16 +/* RD hold for SRAM (0-1:0,1) */ +#define RDSPL5 0 +#define RDSPL6 0 +/* Burst pitch (0-7:0,1,2,3,4,5,6,7) */ +#define BW5 0 +#define BW6 0 +/* Multiplex (0-1:0,1) */ +#define MPX5 0 +#define MPX6 0 +/* device type */ +#define TYPE5 TYPE_PCMCIA +#define TYPE6 TYPE_PCMCIA +/* address setup before assert CSn for SRAM (0-7:0,1,2,3,4,5,6,7) */ +#define ADS5 0 +#define ADS6 0 +/* address hold after negate CSn for SRAM (0-7:0,1,2,3,4,5,6,7) */ +#define ADH5 0 +#define ADH6 0 +/* CSn assert to RD assert delay for SRAM (0-7:0,1,2,3,4,5,6,7) */ +#define RDS5 0 +#define RDS6 0 +/* RD negate to CSn negate delay for SRAM (0-7:0,1,2,3,4,5,6,7) */ +#define RDH5 0 +#define RDH6 0 +/* CSn assert to WE assert delay for SRAM (0-7:0,1,2,3,4,5,6,7) */ +#define WTS5 0 +#define WTS6 0 +/* WE negate to CSn negate delay for SRAM (0-7:0,1,2,3,4,5,6,7) */ +#define WTH5 0 +#define WTH6 0 +/* BS hold (0-1:1,2) */ +#define BSH5 0 +#define BSH6 0 +/* wait cycle (0-15:0,1,2,3,4,5,6,7,8,9,11,13,15,17,21,25) */ +#define IW5 6 /* 60ns PIO mode 4 */ +#define IW6 15 /* 250ns */ + +#define SAA5 PCMCIA_IODYN /* IDE area b4000000-b5ffffff */ +#define SAB5 PCMCIA_IODYN /* CF area b6000000-b7ffffff */ +#define PCWA5 0 /* additional wait A (0-3:0,15,30,50) */ +#define PCWB5 0 /* additional wait B (0-3:0,15,30,50) */ +/* wait B (0-15:0,1,2,3,4,5,6,7,8,9,11,13,15,17,21,25) */ +#define PCIW5 12 +/* Address->OE/WE assert delay A (0-7:0,1,2,3,6,9,12,15) */ +#define TEDA5 2 +/* Address->OE/WE assert delay B (0-7:0,1,2,3,6,9,12,15) */ +#define TEDB5 4 +/* OE/WE negate->Address delay A (0-7:0,1,2,3,6,9,12,15) */ +#define TEHA5 2 +/* OE/WE negate->Address delay B (0-7:0,1,2,3,6,9,12,15) */ +#define TEHB5 3 + +#define CS5BCR_D ((IWW5<<28)|(IWRWD5<<24)|(IWRWS5<<20)| \ + (IWRRD5<<16)|(IWRRS5<<12)|(BST5<<10)| \ + (SZ5<<8)|(RDSPL5<<7)|(BW5<<4)|(MPX5<<3)|TYPE5) +#define CS5WCR_D ((ADS5<<28)|(ADH5<<24)|(RDS5<<20)| \ + (RDH5<<16)|(WTS5<<12)|(WTH5<<8)|(BSH5<<4)|IW5) +#define CS5PCR_D ((SAA5<<28)|(SAB5<<24)|(PCWA5<<22)| \ + (PCWB5<<20)|(PCIW5<<16)|(TEDA5<<12)| \ + (TEDB5<<8)|(TEHA5<<4)|TEHB5) + +#define SMC0_BASE 0xb0800000 /* eth0 */ +#define SMC1_BASE 0xb0900000 /* eth1 */ +#define CF_BASE 0xb6100000 /* Compact Flash (I/O area) */ +#define IDE_BASE 0xb4000000 /* IDE */ +#define PC104_IO_BASE 0xb8000000 +#define PC104_MEM_BASE 0xba000000 +#define SMC_IO_SIZE 0x100 + +#define CF_OFFSET 0x1f0 +#define IDE_OFFSET 0x170 + +#endif /* __MACH_SH2007_H */ diff --git a/arch/sh/include/mach-common/mach/systemh7751.h b/arch/sh/include/mach-common/mach/systemh7751.h deleted file mode 100644 index 4161122c84e..00000000000 --- a/arch/sh/include/mach-common/mach/systemh7751.h +++ /dev/null @@ -1,71 +0,0 @@ -#ifndef __ASM_SH_SYSTEMH_7751SYSTEMH_H -#define __ASM_SH_SYSTEMH_7751SYSTEMH_H - -/* - * linux/include/asm-sh/systemh/7751systemh.h - * - * Copyright (C) 2000 Kazumoto Kojima - * - * Hitachi SystemH support - - * Modified for 7751 SystemH by - * Jonathan Short, 2002. - */ - -/* Box specific addresses. */ - -#define PA_ROM 0x00000000 /* EPROM */ -#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte */ -#define PA_FROM 0x01000000 /* EPROM */ -#define PA_FROM_SIZE 0x00400000 /* EPROM size 4M byte */ -#define PA_EXT1 0x04000000 -#define PA_EXT1_SIZE 0x04000000 -#define PA_EXT2 0x08000000 -#define PA_EXT2_SIZE 0x04000000 -#define PA_SDRAM 0x0c000000 -#define PA_SDRAM_SIZE 0x04000000 - -#define PA_EXT4 0x12000000 -#define PA_EXT4_SIZE 0x02000000 -#define PA_EXT5 0x14000000 -#define PA_EXT5_SIZE 0x04000000 -#define PA_PCIC 0x18000000 /* MR-SHPC-01 PCMCIA */ - -#define PA_DIPSW0 0xb9000000 /* Dip switch 5,6 */ -#define PA_DIPSW1 0xb9000002 /* Dip switch 7,8 */ -#define PA_LED 0xba000000 /* LED */ -#define PA_BCR 0xbb000000 /* FPGA on the MS7751SE01 */ - -#define PA_MRSHPC 0xb83fffe0 /* MR-SHPC-01 PCMCIA controller */ -#define PA_MRSHPC_MW1 0xb8400000 /* MR-SHPC-01 memory window base */ -#define PA_MRSHPC_MW2 0xb8500000 /* MR-SHPC-01 attribute window base */ -#define PA_MRSHPC_IO 0xb8600000 /* MR-SHPC-01 I/O window base */ -#define MRSHPC_MODE (PA_MRSHPC + 4) -#define MRSHPC_OPTION (PA_MRSHPC + 6) -#define MRSHPC_CSR (PA_MRSHPC + 8) -#define MRSHPC_ISR (PA_MRSHPC + 10) -#define MRSHPC_ICR (PA_MRSHPC + 12) -#define MRSHPC_CPWCR (PA_MRSHPC + 14) -#define MRSHPC_MW0CR1 (PA_MRSHPC + 16) -#define MRSHPC_MW1CR1 (PA_MRSHPC + 18) -#define MRSHPC_IOWCR1 (PA_MRSHPC + 20) -#define MRSHPC_MW0CR2 (PA_MRSHPC + 22) -#define MRSHPC_MW1CR2 (PA_MRSHPC + 24) -#define MRSHPC_IOWCR2 (PA_MRSHPC + 26) -#define MRSHPC_CDCR (PA_MRSHPC + 28) -#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) - -#define BCR_ILCRA (PA_BCR + 0) -#define BCR_ILCRB (PA_BCR + 2) -#define BCR_ILCRC (PA_BCR + 4) -#define BCR_ILCRD (PA_BCR + 6) -#define BCR_ILCRE (PA_BCR + 8) -#define BCR_ILCRF (PA_BCR + 10) -#define BCR_ILCRG (PA_BCR + 12) - -#define IRQ_79C973 13 - -#define __IO_PREFIX sh7751systemh -#include <asm/io_generic.h> - -#endif /* __ASM_SH_SYSTEMH_7751SYSTEMH_H */ diff --git a/arch/sh/include/mach-common/mach/titan.h b/arch/sh/include/mach-common/mach/titan.h index 4a674d27cbb..fa3cd801cf2 100644 --- a/arch/sh/include/mach-common/mach/titan.h +++ b/arch/sh/include/mach-common/mach/titan.h @@ -4,14 +4,16 @@ #ifndef _ASM_SH_TITAN_H #define _ASM_SH_TITAN_H +#include <linux/sh_intc.h> + #define __IO_PREFIX titan #include <asm/io_generic.h> /* IRQ assignments */ -#define TITAN_IRQ_WAN 2 /* eth0 (WAN) */ -#define TITAN_IRQ_LAN 5 /* eth1 (LAN) */ -#define TITAN_IRQ_MPCIA 8 /* mPCI A */ -#define TITAN_IRQ_MPCIB 11 /* mPCI B */ -#define TITAN_IRQ_USB 11 /* USB */ +#define TITAN_IRQ_WAN evt2irq(0x240) /* eth0 (WAN) */ +#define TITAN_IRQ_LAN evt2irq(0x2a0) /* eth1 (LAN) */ +#define TITAN_IRQ_MPCIA evt2irq(0x300) /* mPCI A */ +#define TITAN_IRQ_MPCIB evt2irq(0x360) /* mPCI B */ +#define TITAN_IRQ_USB evt2irq(0x360) /* USB */ #endif /* __ASM_SH_TITAN_H */ diff --git a/arch/sh/include/mach-dreamcast/mach/dma.h b/arch/sh/include/mach-dreamcast/mach/dma.h index ddd68e78870..1dbfdf701c9 100644 --- a/arch/sh/include/mach-dreamcast/mach/dma.h +++ b/arch/sh/include/mach-dreamcast/mach/dma.h @@ -11,9 +11,7 @@ #define __ASM_SH_DREAMCAST_DMA_H /* Number of DMA channels */ -#define ONCHIP_NR_DMA_CHANNELS 4 #define G2_NR_DMA_CHANNELS 4 -#define PVR2_NR_DMA_CHANNELS 1 /* Channels for cascading */ #define PVR2_CASCADE_CHAN 2 diff --git a/arch/sh/include/mach-dreamcast/mach/sysasic.h b/arch/sh/include/mach-dreamcast/mach/sysasic.h index f33426608a8..58f710e1ebc 100644 --- a/arch/sh/include/mach-dreamcast/mach/sysasic.h +++ b/arch/sh/include/mach-dreamcast/mach/sysasic.h @@ -39,5 +39,10 @@ #define HW_EVENT_IRQ_MAX (HW_EVENT_IRQ_BASE + 95) +/* arch/sh/boards/mach-dreamcast/irq.c */ +extern int systemasic_irq_demux(int); +extern void systemasic_irq_init(void); +extern void aica_time_init(void); + #endif /* __ASM_SH_DREAMCAST_SYSASIC_H */ diff --git a/arch/sh/include/mach-ecovec24/mach/romimage.h b/arch/sh/include/mach-ecovec24/mach/romimage.h index 1c8787ecb1c..60f3e8af05f 100644 --- a/arch/sh/include/mach-ecovec24/mach/romimage.h +++ b/arch/sh/include/mach-ecovec24/mach/romimage.h @@ -1,10 +1,12 @@ +#ifdef __ASSEMBLY__ + /* EcoVec board specific boot code: * converts the "partner-jet-script.txt" script into assembly * the assembly code is the first code to be executed in the romImage */ #include <asm/romimage-macros.h> -#include "partner-jet-setup.txt" +#include <mach/partner-jet-setup.txt> /* execute icbi after enabling cache */ mov.l 1f, r0 @@ -18,3 +20,28 @@ .align 2 1 : .long 0xa8000000 2 : + +#else /* __ASSEMBLY__ */ + +/* Ecovec board specific information: + * + * Set the following to enable MMCIF boot from the MMC card in CN12: + * + * DS1.5 = OFF (SH BOOT pin set to L) + * DS2.6 = OFF (Select MMCIF on CN12 instead of SDHI1) + * DS2.7 = ON (Select MMCIF on CN12 instead of SDHI1) + * + */ +#define HIZCRA 0xa4050158 +#define PGDR 0xa405012c + +static inline void mmcif_update_progress(int nr) +{ + /* disable Hi-Z for LED pins */ + __raw_writew(__raw_readw(HIZCRA) & ~(1 << 1), HIZCRA); + + /* update progress on LED4, LED5, LED6 and LED7 */ + __raw_writeb(1 << (nr - 1), PGDR); +} + +#endif /* __ASSEMBLY__ */ diff --git a/arch/sh/include/mach-kfr2r09/mach/kfr2r09.h b/arch/sh/include/mach-kfr2r09/mach/kfr2r09.h index 484ef42c2fb..79f154e5cb9 100644 --- a/arch/sh/include/mach-kfr2r09/mach/kfr2r09.h +++ b/arch/sh/include/mach-kfr2r09/mach/kfr2r09.h @@ -3,23 +3,19 @@ #include <video/sh_mobile_lcdc.h> -#ifdef CONFIG_FB_SH_MOBILE_LCDC -void kfr2r09_lcd_on(void *board_data); -void kfr2r09_lcd_off(void *board_data); -int kfr2r09_lcd_setup(void *board_data, void *sys_ops_handle, +#if defined(CONFIG_FB_SH_MOBILE_LCDC) || defined(CONFIG_FB_SH_MOBILE_LCDC_MODULE) +int kfr2r09_lcd_setup(void *sys_ops_handle, struct sh_mobile_lcdc_sys_bus_ops *sys_ops); -void kfr2r09_lcd_start(void *board_data, void *sys_ops_handle, +void kfr2r09_lcd_start(void *sys_ops_handle, struct sh_mobile_lcdc_sys_bus_ops *sys_ops); #else -static inline void kfr2r09_lcd_on(void *board_data) {} -static inline void kfr2r09_lcd_off(void *board_data) {} -static inline int kfr2r09_lcd_setup(void *board_data, void *sys_ops_handle, - struct sh_mobile_lcdc_sys_bus_ops *sys_ops) +static int kfr2r09_lcd_setup(void *sys_ops_handle, + struct sh_mobile_lcdc_sys_bus_ops *sys_ops) { return -ENODEV; } -static inline void kfr2r09_lcd_start(void *board_data, void *sys_ops_handle, - struct sh_mobile_lcdc_sys_bus_ops *sys_ops) +static void kfr2r09_lcd_start(void *sys_ops_handle, + struct sh_mobile_lcdc_sys_bus_ops *sys_ops) { } #endif diff --git a/arch/sh/include/mach-kfr2r09/mach/romimage.h b/arch/sh/include/mach-kfr2r09/mach/romimage.h index a110823f2bd..1afae21ced5 100644 --- a/arch/sh/include/mach-kfr2r09/mach/romimage.h +++ b/arch/sh/include/mach-kfr2r09/mach/romimage.h @@ -1,10 +1,12 @@ +#ifdef __ASSEMBLY__ + /* kfr2r09 board specific boot code: * converts the "partner-jet-script.txt" script into assembly * the assembly code is the first code to be executed in the romImage */ #include <asm/romimage-macros.h> -#include "partner-jet-setup.txt" +#include <mach/partner-jet-setup.txt> /* execute icbi after enabling cache */ mov.l 1f, r0 @@ -18,3 +20,11 @@ .align 2 1: .long 0xa8000000 2: + +#else /* __ASSEMBLY__ */ + +static inline void mmcif_update_progress(int nr) +{ +} + +#endif /* __ASSEMBLY__ */ diff --git a/arch/sh/include/mach-landisk/mach/iodata_landisk.h b/arch/sh/include/mach-landisk/mach/iodata_landisk.h index 6fb04ab38b9..ceeea48cc7a 100644 --- a/arch/sh/include/mach-landisk/mach/iodata_landisk.h +++ b/arch/sh/include/mach-landisk/mach/iodata_landisk.h @@ -2,12 +2,13 @@ #define __ASM_SH_IODATA_LANDISK_H /* - * linux/include/asm-sh/landisk/iodata_landisk.h + * arch/sh/include/mach-landisk/mach/iodata_landisk.h * * Copyright (C) 2000 Atom Create Engineering Co., Ltd. * * IO-DATA LANDISK support */ +#include <linux/sh_intc.h> /* Box specific addresses. */ @@ -25,15 +26,17 @@ #define PA_PIDE_OFFSET 0x40 /* CF IDE Offset */ #define PA_SIDE_OFFSET 0x40 /* HDD IDE Offset */ -#define IRQ_PCIINTA 5 /* PCI INTA IRQ */ -#define IRQ_PCIINTB 6 /* PCI INTB IRQ */ -#define IRQ_PCIINDC 7 /* PCI INTC IRQ */ -#define IRQ_PCIINTD 8 /* PCI INTD IRQ */ -#define IRQ_ATA 9 /* ATA IRQ */ -#define IRQ_FATA 10 /* FATA IRQ */ -#define IRQ_POWER 11 /* Power Switch IRQ */ -#define IRQ_BUTTON 12 /* USL-5P Button IRQ */ -#define IRQ_FAULT 13 /* USL-5P Fault IRQ */ +#define IRQ_PCIINTA evt2irq(0x2a0) /* PCI INTA IRQ */ +#define IRQ_PCIINTB evt2irq(0x2c0) /* PCI INTB IRQ */ +#define IRQ_PCIINTC evt2irq(0x2e0) /* PCI INTC IRQ */ +#define IRQ_PCIINTD evt2irq(0x300) /* PCI INTD IRQ */ +#define IRQ_ATA evt2irq(0x320) /* ATA IRQ */ +#define IRQ_FATA evt2irq(0x340) /* FATA IRQ */ +#define IRQ_POWER evt2irq(0x360) /* Power Switch IRQ */ +#define IRQ_BUTTON evt2irq(0x380) /* USL-5P Button IRQ */ +#define IRQ_FAULT evt2irq(0x3a0) /* USL-5P Fault IRQ */ + +void init_landisk_IRQ(void); #define __IO_PREFIX landisk #include <asm/io_generic.h> diff --git a/arch/sh/include/mach-migor/mach/migor.h b/arch/sh/include/mach-migor/mach/migor.h index cee6cb88e02..7de7bb74c29 100644 --- a/arch/sh/include/mach-migor/mach/migor.h +++ b/arch/sh/include/mach-migor/mach/migor.h @@ -1,6 +1,7 @@ #ifndef __ASM_SH_MIGOR_H #define __ASM_SH_MIGOR_H +#define PORT_MSELCRA 0xa4050180 #define PORT_MSELCRB 0xa4050182 #define BSC_CS4BCR 0xfec10010 #define BSC_CS6ABCR 0xfec1001c @@ -8,7 +9,7 @@ #include <video/sh_mobile_lcdc.h> -int migor_lcd_qvga_setup(void *board_data, void *sys_ops_handle, +int migor_lcd_qvga_setup(void *sys_ops_handle, struct sh_mobile_lcdc_sys_bus_ops *sys_ops); #endif /* __ASM_SH_MIGOR_H */ diff --git a/arch/sh/include/mach-sdk7786/mach/fpga.h b/arch/sh/include/mach-sdk7786/mach/fpga.h new file mode 100644 index 00000000000..a9cdac46992 --- /dev/null +++ b/arch/sh/include/mach-sdk7786/mach/fpga.h @@ -0,0 +1,155 @@ +#ifndef __MACH_SDK7786_FPGA_H +#define __MACH_SDK7786_FPGA_H + +#include <linux/io.h> +#include <linux/types.h> +#include <linux/bitops.h> + +#define SRSTR 0x000 +#define SRSTR_MAGIC 0x1971 /* Fixed magical read value */ + +#define INTASR 0x010 +#define INTAMR 0x020 +#define MODSWR 0x030 +#define INTTESTR 0x040 +#define SYSSR 0x050 +#define NRGPR 0x060 + +#define NMISR 0x070 +#define NMISR_MAN_NMI BIT(0) +#define NMISR_AUX_NMI BIT(1) +#define NMISR_MASK (NMISR_MAN_NMI | NMISR_AUX_NMI) + +#define NMIMR 0x080 +#define NMIMR_MAN_NMIM BIT(0) /* Manual NMI mask */ +#define NMIMR_AUX_NMIM BIT(1) /* Auxiliary NMI mask */ +#define NMIMR_MASK (NMIMR_MAN_NMIM | NMIMR_AUX_NMIM) + +#define INTBSR 0x090 +#define INTBMR 0x0a0 +#define USRLEDR 0x0b0 +#define MAPSWR 0x0c0 +#define FPGAVR 0x0d0 +#define FPGADR 0x0e0 +#define PCBRR 0x0f0 +#define RSR 0x100 +#define EXTASR 0x110 +#define SPCAR 0x120 +#define INTMSR 0x130 + +#define PCIECR 0x140 +#define PCIECR_PCIEMUX1 BIT(15) +#define PCIECR_PCIEMUX0 BIT(14) +#define PCIECR_PRST4 BIT(12) /* slot 4 card present */ +#define PCIECR_PRST3 BIT(11) /* slot 3 card present */ +#define PCIECR_PRST2 BIT(10) /* slot 2 card present */ +#define PCIECR_PRST1 BIT(9) /* slot 1 card present */ +#define PCIECR_CLKEN BIT(4) /* oscillator enable */ + +#define FAER 0x150 +#define USRGPIR 0x160 + +/* 0x170 reserved */ + +#define LCLASR 0x180 +#define LCLASR_FRAMEN BIT(15) + +#define LCLASR_FPGA_SEL_SHIFT 12 +#define LCLASR_NAND_SEL_SHIFT 8 +#define LCLASR_NORB_SEL_SHIFT 4 +#define LCLASR_NORA_SEL_SHIFT 0 + +#define LCLASR_AREA_MASK 0x7 + +#define LCLASR_FPGA_SEL_MASK (LCLASR_AREA_MASK << LCLASR_FPGA_SEL_SHIFT) +#define LCLASR_NAND_SEL_MASK (LCLASR_AREA_MASK << LCLASR_NAND_SEL_SHIFT) +#define LCLASR_NORB_SEL_MASK (LCLASR_AREA_MASK << LCLASR_NORB_SEL_SHIFT) +#define LCLASR_NORA_SEL_MASK (LCLASR_AREA_MASK << LCLASR_NORA_SEL_SHIFT) + +#define SBCR 0x190 +#define SCBR_I2CMEN BIT(0) /* FPGA I2C master enable */ +#define SCBR_I2CCEN BIT(1) /* CPU I2C master enable */ + +#define PWRCR 0x1a0 +#define PWRCR_SCISEL0 BIT(0) +#define PWRCR_SCISEL1 BIT(1) +#define PWRCR_SCIEN BIT(2) /* Serial port enable */ +#define PWRCR_PDWNACK BIT(5) /* Power down acknowledge */ +#define PWRCR_PDWNREQ BIT(7) /* Power down request */ +#define PWRCR_INT2 BIT(11) /* INT2 connection to power manager */ +#define PWRCR_BUPINIT BIT(13) /* DDR backup initialize */ +#define PWRCR_BKPRST BIT(15) /* Backup power reset */ + +#define SPCBR 0x1b0 +#define SPICR 0x1c0 +#define SPIDR 0x1d0 +#define I2CCR 0x1e0 +#define I2CDR 0x1f0 +#define FPGACR 0x200 +#define IASELR1 0x210 +#define IASELR2 0x220 +#define IASELR3 0x230 +#define IASELR4 0x240 +#define IASELR5 0x250 +#define IASELR6 0x260 +#define IASELR7 0x270 +#define IASELR8 0x280 +#define IASELR9 0x290 +#define IASELR10 0x2a0 +#define IASELR11 0x2b0 +#define IASELR12 0x2c0 +#define IASELR13 0x2d0 +#define IASELR14 0x2e0 +#define IASELR15 0x2f0 +/* 0x300 reserved */ +#define IBSELR1 0x310 +#define IBSELR2 0x320 +#define IBSELR3 0x330 +#define IBSELR4 0x340 +#define IBSELR5 0x350 +#define IBSELR6 0x360 +#define IBSELR7 0x370 +#define IBSELR8 0x380 +#define IBSELR9 0x390 +#define IBSELR10 0x3a0 +#define IBSELR11 0x3b0 +#define IBSELR12 0x3c0 +#define IBSELR13 0x3d0 +#define IBSELR14 0x3e0 +#define IBSELR15 0x3f0 +#define USRACR 0x400 +#define BEEPR 0x410 +#define USRLCDR 0x420 +#define SMBCR 0x430 +#define SMBDR 0x440 +#define USBCR 0x450 +#define AMSR 0x460 +#define ACCR 0x470 +#define SDIFCR 0x480 + +/* arch/sh/boards/mach-sdk7786/fpga.c */ +extern void __iomem *sdk7786_fpga_base; +extern void sdk7786_fpga_init(void); + +/* arch/sh/boards/mach-sdk7786/nmi.c */ +extern void sdk7786_nmi_init(void); + +#define SDK7786_FPGA_REGADDR(reg) (sdk7786_fpga_base + (reg)) + +/* + * A convenience wrapper from register offset to internal I2C address, + * when the FPGA is in I2C slave mode. + */ +#define SDK7786_FPGA_I2CADDR(reg) ((reg) >> 3) + +static inline u16 fpga_read_reg(unsigned int reg) +{ + return ioread16(sdk7786_fpga_base + reg); +} + +static inline void fpga_write_reg(u16 val, unsigned int reg) +{ + iowrite16(val, sdk7786_fpga_base + reg); +} + +#endif /* __MACH_SDK7786_FPGA_H */ diff --git a/arch/sh/include/mach-sdk7786/mach/irq.h b/arch/sh/include/mach-sdk7786/mach/irq.h new file mode 100644 index 00000000000..0f584635e6e --- /dev/null +++ b/arch/sh/include/mach-sdk7786/mach/irq.h @@ -0,0 +1,7 @@ +#ifndef __MACH_SDK7786_IRQ_H +#define __MACH_SDK7786_IRQ_H + +/* arch/sh/boards/mach-sdk7786/irq.c */ +extern void sdk7786_init_irq(void); + +#endif /* __MACH_SDK7786_IRQ_H */ diff --git a/arch/sh/include/mach-se/mach/se.h b/arch/sh/include/mach-se/mach/se.h index 14be91c5a2f..8a6d44b4987 100644 --- a/arch/sh/include/mach-se/mach/se.h +++ b/arch/sh/include/mach-se/mach/se.h @@ -8,6 +8,7 @@ * * Hitachi SolutionEngine support */ +#include <linux/sh_intc.h> /* Box specific addresses. */ @@ -82,16 +83,16 @@ #define INTC_IPRD 0xa4000018UL #define INTC_IPRE 0xa400001aUL -#define IRQ0_IRQ 32 -#define IRQ1_IRQ 33 +#define IRQ0_IRQ evt2irq(0x600) +#define IRQ1_IRQ evt2irq(0x620) #endif #if defined(CONFIG_CPU_SUBTYPE_SH7705) -#define IRQ_STNIC 12 -#define IRQ_CFCARD 14 +#define IRQ_STNIC evt2irq(0x380) +#define IRQ_CFCARD evt2irq(0x3c0) #else -#define IRQ_STNIC 10 -#define IRQ_CFCARD 7 +#define IRQ_STNIC evt2irq(0x340) +#define IRQ_CFCARD evt2irq(0x2e0) #endif /* SH Ether support (SH7710/SH7712) */ @@ -105,9 +106,9 @@ # define PHY_ID 0x01 #endif /* Ether IRQ */ -#define SH_ETH0_IRQ 80 -#define SH_ETH1_IRQ 81 -#define SH_TSU_IRQ 82 +#define SH_ETH0_IRQ evt2irq(0xc00) +#define SH_ETH1_IRQ evt2irq(0xc20) +#define SH_TSU_IRQ evt2irq(0xc40) void init_se_IRQ(void); diff --git a/arch/sh/include/mach-se/mach/se7343.h b/arch/sh/include/mach-se/mach/se7343.h index 749914b400f..542521c970c 100644 --- a/arch/sh/include/mach-se/mach/se7343.h +++ b/arch/sh/include/mach-se/mach/se7343.h @@ -8,6 +8,7 @@ * * SH-Mobile SolutionEngine 7343 support */ +#include <linux/sh_intc.h> /* Box specific addresses. */ @@ -49,9 +50,6 @@ #define PA_LED 0xb0C00000 /* LED */ #define LED_SHIFT 0 #define PA_DIPSW 0xb0900000 /* Dip switch 31 */ -#define PA_CPLD_MODESET 0xb1400004 /* CPLD Mode set register */ -#define PA_CPLD_ST 0xb1400008 /* CPLD Interrupt status register */ -#define PA_CPLD_IMSK 0xb140000a /* CPLD Interrupt mask register */ /* Area 5 */ #define PA_EXT5 0x14000000 #define PA_EXT5_SIZE 0x04000000 @@ -94,34 +92,34 @@ #define PORT_DRVCR 0xA4050180 -#define PORT_PADR 0xA4050120 -#define PORT_PBDR 0xA4050122 -#define PORT_PCDR 0xA4050124 -#define PORT_PDDR 0xA4050126 -#define PORT_PEDR 0xA4050128 -#define PORT_PFDR 0xA405012A -#define PORT_PGDR 0xA405012C -#define PORT_PHDR 0xA405012E -#define PORT_PJDR 0xA4050130 -#define PORT_PKDR 0xA4050132 -#define PORT_PLDR 0xA4050134 -#define PORT_PMDR 0xA4050136 -#define PORT_PNDR 0xA4050138 -#define PORT_PQDR 0xA405013A -#define PORT_PRDR 0xA405013C -#define PORT_PTDR 0xA4050160 -#define PORT_PUDR 0xA4050162 -#define PORT_PVDR 0xA4050164 -#define PORT_PWDR 0xA4050166 -#define PORT_PYDR 0xA4050168 +#define PORT_PADR 0xA4050120 +#define PORT_PBDR 0xA4050122 +#define PORT_PCDR 0xA4050124 +#define PORT_PDDR 0xA4050126 +#define PORT_PEDR 0xA4050128 +#define PORT_PFDR 0xA405012A +#define PORT_PGDR 0xA405012C +#define PORT_PHDR 0xA405012E +#define PORT_PJDR 0xA4050130 +#define PORT_PKDR 0xA4050132 +#define PORT_PLDR 0xA4050134 +#define PORT_PMDR 0xA4050136 +#define PORT_PNDR 0xA4050138 +#define PORT_PQDR 0xA405013A +#define PORT_PRDR 0xA405013C +#define PORT_PTDR 0xA4050160 +#define PORT_PUDR 0xA4050162 +#define PORT_PVDR 0xA4050164 +#define PORT_PWDR 0xA4050166 +#define PORT_PYDR 0xA4050168 #define FPGA_IN 0xb1400000 #define FPGA_OUT 0xb1400002 -#define IRQ0_IRQ 32 -#define IRQ1_IRQ 33 -#define IRQ4_IRQ 36 -#define IRQ5_IRQ 37 +#define IRQ0_IRQ evt2irq(0x600) +#define IRQ1_IRQ evt2irq(0x620) +#define IRQ4_IRQ evt2irq(0x680) +#define IRQ5_IRQ evt2irq(0x6a0) #define SE7343_FPGA_IRQ_MRSHPC0 0 #define SE7343_FPGA_IRQ_MRSHPC1 1 @@ -133,18 +131,12 @@ #define SE7343_FPGA_IRQ_UARTB 11 #define SE7343_FPGA_IRQ_NR 12 -#define SE7343_FPGA_IRQ_BASE 120 -#define MRSHPC_IRQ3 (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_MRSHPC3) -#define MRSHPC_IRQ2 (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_MRSHPC2) -#define MRSHPC_IRQ1 (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_MRSHPC1) -#define MRSHPC_IRQ0 (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_MRSHPC0) -#define SMC_IRQ (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_SMC) -#define USB_IRQ (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_USB) -#define UARTA_IRQ (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_UARTA) -#define UARTB_IRQ (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_UARTB) +struct irq_domain; /* arch/sh/boards/se/7343/irq.c */ +extern struct irq_domain *se7343_irq_domain; + void init_7343se_IRQ(void); #endif /* __ASM_SH_HITACHI_SE7343_H */ diff --git a/arch/sh/include/mach-se/mach/se7721.h b/arch/sh/include/mach-se/mach/se7721.h index b957f604119..eabd0538de4 100644 --- a/arch/sh/include/mach-se/mach/se7721.h +++ b/arch/sh/include/mach-se/mach/se7721.h @@ -11,6 +11,8 @@ #ifndef __ASM_SH_SE7721_H #define __ASM_SH_SE7721_H + +#include <linux/sh_intc.h> #include <asm/addrspace.h> /* Box specific addresses. */ @@ -49,9 +51,9 @@ #define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) #define PA_LED 0xB6800000 /* 8bit LED */ -#define PA_FPGA 0xB7000000 /* FPGA base address */ +#define PA_FPGA 0xB7000000 /* FPGA base address */ -#define MRSHPC_IRQ0 10 +#define MRSHPC_IRQ0 evt2irq(0x340) #define FPGA_ILSR1 (PA_FPGA + 0x02) #define FPGA_ILSR2 (PA_FPGA + 0x03) diff --git a/arch/sh/include/mach-se/mach/se7722.h b/arch/sh/include/mach-se/mach/se7722.h index 16505bfb8a9..637e7ac753f 100644 --- a/arch/sh/include/mach-se/mach/se7722.h +++ b/arch/sh/include/mach-se/mach/se7722.h @@ -13,6 +13,7 @@ * for more details. * */ +#include <linux/sh_intc.h> #include <asm/addrspace.h> /* Box specific addresses. */ @@ -31,7 +32,7 @@ #define PA_PERIPHERAL 0xB0000000 -#define PA_PCIC PA_PERIPHERAL /* MR-SHPC-01 PCMCIA */ +#define PA_PCIC PA_PERIPHERAL /* MR-SHPC-01 PCMCIA */ #define PA_MRSHPC (PA_PERIPHERAL + 0x003fffe0) /* MR-SHPC-01 PCMCIA controller */ #define PA_MRSHPC_MW1 (PA_PERIPHERAL + 0x00400000) /* MR-SHPC-01 memory window base */ #define PA_MRSHPC_MW2 (PA_PERIPHERAL + 0x00500000) /* MR-SHPC-01 attribute window base */ @@ -51,7 +52,7 @@ #define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) #define PA_LED (PA_PERIPHERAL + 0x00800000) /* 8bit LED */ -#define PA_FPGA (PA_PERIPHERAL + 0x01800000) /* FPGA base address */ +#define PA_FPGA (PA_PERIPHERAL + 0x01800000) /* FPGA base address */ #define PA_LAN (PA_AREA6_IO + 0) /* SMC LAN91C111 */ /* GPIO */ @@ -77,14 +78,8 @@ #define PORT_HIZCRC 0xA405015CUL /* IRQ */ -#define IRQ0_IRQ 32 -#define IRQ1_IRQ 33 - -#define IRQ01_MODE 0xb1800000 -#define IRQ01_STS 0xb1800004 -#define IRQ01_MASK 0xb1800008 - -/* Bits in IRQ01_* registers */ +#define IRQ0_IRQ evt2irq(0x600) +#define IRQ1_IRQ evt2irq(0x620) #define SE7722_FPGA_IRQ_USB 0 /* IRQ0 */ #define SE7722_FPGA_IRQ_SMC 1 /* IRQ0 */ @@ -94,8 +89,10 @@ #define SE7722_FPGA_IRQ_MRSHPC3 5 /* IRQ1 */ #define SE7722_FPGA_IRQ_NR 6 +struct irq_domain; + /* arch/sh/boards/se/7722/irq.c */ -extern unsigned int se7722_fpga_irq[]; +extern struct irq_domain *se7722_irq_domain; void init_se7722_IRQ(void); diff --git a/arch/sh/include/mach-se/mach/se7724.h b/arch/sh/include/mach-se/mach/se7724.h index 29514a39d0f..be842dd1ca0 100644 --- a/arch/sh/include/mach-se/mach/se7724.h +++ b/arch/sh/include/mach-se/mach/se7724.h @@ -18,6 +18,7 @@ * for more details. * */ +#include <linux/sh_intc.h> #include <asm/addrspace.h> /* SH Eth */ @@ -35,9 +36,9 @@ #define IRQ2_MR (0xba200028) /* IRQ */ -#define IRQ0_IRQ 32 -#define IRQ1_IRQ 33 -#define IRQ2_IRQ 34 +#define IRQ0_IRQ evt2irq(0x600) +#define IRQ1_IRQ evt2irq(0x620) +#define IRQ2_IRQ evt2irq(0x640) /* Bits in IRQ012 registers */ #define SE7724_FPGA_IRQ_BASE 220 diff --git a/arch/sh/include/mach-se/mach/se7751.h b/arch/sh/include/mach-se/mach/se7751.h index b36792ac5d6..271871793d5 100644 --- a/arch/sh/include/mach-se/mach/se7751.h +++ b/arch/sh/include/mach-se/mach/se7751.h @@ -11,6 +11,7 @@ * Modified for 7751 Solution Engine by * Ian da Silva and Jeremy Siegel, 2001. */ +#include <linux/sh_intc.h> /* Box specific addresses. */ @@ -63,7 +64,7 @@ #define BCR_ILCRF (PA_BCR + 10) #define BCR_ILCRG (PA_BCR + 12) -#define IRQ_79C973 13 +#define IRQ_79C973 evt2irq(0x3a0) void init_7751se_IRQ(void); diff --git a/arch/sh/include/mach-se/mach/se7780.h b/arch/sh/include/mach-se/mach/se7780.h index 40e9b41458c..bde357cf81b 100644 --- a/arch/sh/include/mach-se/mach/se7780.h +++ b/arch/sh/include/mach-se/mach/se7780.h @@ -12,6 +12,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. */ +#include <linux/sh_intc.h> #include <asm/addrspace.h> /* Box specific addresses. */ @@ -80,13 +81,13 @@ #define IRQPOS_PCCPW (0 * 4) /* IDE interrupt */ -#define IRQ_IDE0 67 /* iVDR */ +#define IRQ_IDE0 evt2irq(0xa60) /* iVDR */ /* SMC interrupt */ -#define SMC_IRQ 8 +#define SMC_IRQ evt2irq(0x300) /* SM501 interrupt */ -#define SM501_IRQ 0 +#define SM501_IRQ evt2irq(0x200) /* interrupt pin */ #define IRQPIN_EXTINT1 0 /* IRQ0 pin */ diff --git a/arch/sh/include/mach-x3proto/mach/hardware.h b/arch/sh/include/mach-x3proto/mach/hardware.h new file mode 100644 index 00000000000..52bca57bfeb --- /dev/null +++ b/arch/sh/include/mach-x3proto/mach/hardware.h @@ -0,0 +1,12 @@ +#ifndef __MACH_X3PROTO_HARDWARE_H +#define __MACH_X3PROTO_HARDWARE_H + +struct gpio_chip; + +/* arch/sh/boards/mach-x3proto/gpio.c */ +int x3proto_gpio_setup(void); +extern struct gpio_chip x3proto_gpio_chip; + +#define NR_BASEBOARD_GPIOS 16 + +#endif /* __MACH_X3PROTO_HARDWARE_H */ diff --git a/arch/sh/include/asm/ilsel.h b/arch/sh/include/mach-x3proto/mach/ilsel.h index e3d304b280f..e3d304b280f 100644 --- a/arch/sh/include/asm/ilsel.h +++ b/arch/sh/include/mach-x3proto/mach/ilsel.h diff --git a/arch/sh/include/uapi/asm/Kbuild b/arch/sh/include/uapi/asm/Kbuild new file mode 100644 index 00000000000..60613ae7851 --- /dev/null +++ b/arch/sh/include/uapi/asm/Kbuild @@ -0,0 +1,25 @@ +# UAPI Header export list +include include/uapi/asm-generic/Kbuild.asm + +header-y += auxvec.h +header-y += byteorder.h +header-y += cachectl.h +header-y += cpu-features.h +header-y += hw_breakpoint.h +header-y += ioctls.h +header-y += posix_types.h +header-y += posix_types_32.h +header-y += posix_types_64.h +header-y += ptrace.h +header-y += ptrace_32.h +header-y += ptrace_64.h +header-y += setup.h +header-y += sigcontext.h +header-y += signal.h +header-y += sockios.h +header-y += stat.h +header-y += swab.h +header-y += types.h +header-y += unistd.h +header-y += unistd_32.h +header-y += unistd_64.h diff --git a/arch/sh/include/asm/auxvec.h b/arch/sh/include/uapi/asm/auxvec.h index 483effd65e0..8bcc51af936 100644 --- a/arch/sh/include/asm/auxvec.h +++ b/arch/sh/include/uapi/asm/auxvec.h @@ -33,4 +33,6 @@ #define AT_L1D_CACHESHAPE 35 #define AT_L2_CACHESHAPE 36 +#define AT_VECTOR_SIZE_ARCH 5 /* entries in ARCH_DLINFO */ + #endif /* __ASM_SH_AUXVEC_H */ diff --git a/arch/sh/include/asm/byteorder.h b/arch/sh/include/uapi/asm/byteorder.h index db2f5d7cb17..db2f5d7cb17 100644 --- a/arch/sh/include/asm/byteorder.h +++ b/arch/sh/include/uapi/asm/byteorder.h diff --git a/arch/sh/include/asm/cachectl.h b/arch/sh/include/uapi/asm/cachectl.h index 6ffb4b7a212..6ffb4b7a212 100644 --- a/arch/sh/include/asm/cachectl.h +++ b/arch/sh/include/uapi/asm/cachectl.h diff --git a/arch/sh/include/asm/cpu-features.h b/arch/sh/include/uapi/asm/cpu-features.h index 694abe490ed..694abe490ed 100644 --- a/arch/sh/include/asm/cpu-features.h +++ b/arch/sh/include/uapi/asm/cpu-features.h diff --git a/arch/sh/include/uapi/asm/hw_breakpoint.h b/arch/sh/include/uapi/asm/hw_breakpoint.h new file mode 100644 index 00000000000..ae5704fa77a --- /dev/null +++ b/arch/sh/include/uapi/asm/hw_breakpoint.h @@ -0,0 +1,4 @@ +/* + * There isn't anything here anymore, but the file must not be empty or patch + * will delete it. + */ diff --git a/arch/sh/include/asm/ioctls.h b/arch/sh/include/uapi/asm/ioctls.h index c212c371a4a..34224107976 100644 --- a/arch/sh/include/asm/ioctls.h +++ b/arch/sh/include/uapi/asm/ioctls.h @@ -69,6 +69,7 @@ # define TIOCPKT_START 8 # define TIOCPKT_NOSTOP 16 # define TIOCPKT_DOSTOP 32 +# define TIOCPKT_IOCTL 64 #define TIOCNOTTY _IO('T', 34) /* 0x5422 */ @@ -84,6 +85,12 @@ #define TCSETSF2 _IOW('T', 45, struct termios2) #define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */ #define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */ +#define TIOCGDEV _IOR('T',0x32, unsigned int) /* Get primary device node of /dev/console */ +#define TIOCSIG _IOW('T',0x36, int) /* Generate signal on Pty slave */ +#define TIOCVHANGUP _IO('T', 0x37) +#define TIOCGPKT _IOR('T', 0x38, int) /* Get packet mode state */ +#define TIOCGPTLCK _IOR('T', 0x39, int) /* Get Pty lock state */ +#define TIOCGEXCL _IOR('T', 0x40, int) /* Get exclusive mode state */ #define TIOCSERCONFIG _IO('T', 83) /* 0x5453 */ #define TIOCSERGWILD _IOR('T', 84, int) /* 0x5454 */ diff --git a/arch/sh/include/uapi/asm/posix_types.h b/arch/sh/include/uapi/asm/posix_types.h new file mode 100644 index 00000000000..dc55e5adfe1 --- /dev/null +++ b/arch/sh/include/uapi/asm/posix_types.h @@ -0,0 +1,7 @@ +#ifndef __KERNEL__ +# ifdef __SH5__ +# include <asm/posix_types_64.h> +# else +# include <asm/posix_types_32.h> +# endif +#endif /* __KERNEL__ */ diff --git a/arch/sh/include/asm/posix_types_32.h b/arch/sh/include/uapi/asm/posix_types_32.h index 6a9ceaaf1ae..ba0bdc423b0 100644 --- a/arch/sh/include/asm/posix_types_32.h +++ b/arch/sh/include/uapi/asm/posix_types_32.h @@ -3,8 +3,6 @@ typedef unsigned short __kernel_mode_t; #define __kernel_mode_t __kernel_mode_t -typedef unsigned short __kernel_nlink_t; -#define __kernel_nlink_t __kernel_nlink_t typedef unsigned short __kernel_ipc_pid_t; #define __kernel_ipc_pid_t __kernel_ipc_pid_t typedef unsigned short __kernel_uid_t; @@ -12,11 +10,6 @@ typedef unsigned short __kernel_uid_t; typedef unsigned short __kernel_gid_t; #define __kernel_gid_t __kernel_gid_t -typedef unsigned int __kernel_uid32_t; -#define __kernel_uid32_t __kernel_uid32_t -typedef unsigned int __kernel_gid32_t; -#define __kernel_gid32_t __kernel_gid32_t - typedef unsigned short __kernel_old_uid_t; #define __kernel_old_uid_t __kernel_old_uid_t typedef unsigned short __kernel_old_gid_t; diff --git a/arch/sh/include/asm/posix_types_64.h b/arch/sh/include/uapi/asm/posix_types_64.h index 8cd11485c06..244f7e950e1 100644 --- a/arch/sh/include/asm/posix_types_64.h +++ b/arch/sh/include/uapi/asm/posix_types_64.h @@ -3,8 +3,6 @@ typedef unsigned short __kernel_mode_t; #define __kernel_mode_t __kernel_mode_t -typedef unsigned short __kernel_nlink_t; -#define __kernel_nlink_t __kernel_nlink_t typedef unsigned short __kernel_ipc_pid_t; #define __kernel_ipc_pid_t __kernel_ipc_pid_t typedef unsigned short __kernel_uid_t; @@ -17,10 +15,6 @@ typedef int __kernel_ssize_t; #define __kernel_ssize_t __kernel_ssize_t typedef int __kernel_ptrdiff_t; #define __kernel_ptrdiff_t __kernel_ptrdiff_t -typedef unsigned int __kernel_uid32_t; -#define __kernel_uid32_t __kernel_uid32_t -typedef unsigned int __kernel_gid32_t; -#define __kernel_gid32_t __kernel_gid32_t typedef unsigned short __kernel_old_uid_t; #define __kernel_old_uid_t __kernel_old_uid_t diff --git a/arch/sh/include/uapi/asm/ptrace.h b/arch/sh/include/uapi/asm/ptrace.h new file mode 100644 index 00000000000..8b8c5aca9c2 --- /dev/null +++ b/arch/sh/include/uapi/asm/ptrace.h @@ -0,0 +1,34 @@ +/* + * Copyright (C) 1999, 2000 Niibe Yutaka + */ +#ifndef _UAPI__ASM_SH_PTRACE_H +#define _UAPI__ASM_SH_PTRACE_H + + +#define PTRACE_GETREGS 12 /* General registers */ +#define PTRACE_SETREGS 13 + +#define PTRACE_GETFPREGS 14 /* FPU registers */ +#define PTRACE_SETFPREGS 15 + +#define PTRACE_GETFDPIC 31 /* get the ELF fdpic loadmap address */ + +#define PTRACE_GETFDPIC_EXEC 0 /* [addr] request the executable loadmap */ +#define PTRACE_GETFDPIC_INTERP 1 /* [addr] request the interpreter loadmap */ + +#define PTRACE_GETDSPREGS 55 /* DSP registers */ +#define PTRACE_SETDSPREGS 56 + +#define PT_TEXT_END_ADDR 240 +#define PT_TEXT_ADDR 244 /* &(struct user)->start_code */ +#define PT_DATA_ADDR 248 /* &(struct user)->start_data */ +#define PT_TEXT_LEN 252 + +#if defined(__SH5__) || defined(CONFIG_CPU_SH5) +#include <asm/ptrace_64.h> +#else +#include <asm/ptrace_32.h> +#endif + + +#endif /* _UAPI__ASM_SH_PTRACE_H */ diff --git a/arch/sh/include/uapi/asm/ptrace_32.h b/arch/sh/include/uapi/asm/ptrace_32.h new file mode 100644 index 00000000000..926e0cefc2b --- /dev/null +++ b/arch/sh/include/uapi/asm/ptrace_32.h @@ -0,0 +1,77 @@ +#ifndef _UAPI__ASM_SH_PTRACE_32_H +#define _UAPI__ASM_SH_PTRACE_32_H + +/* + * GCC defines register number like this: + * ----------------------------- + * 0 - 15 are integer registers + * 17 - 22 are control/special registers + * 24 - 39 fp registers + * 40 - 47 xd registers + * 48 - fpscr register + * ----------------------------- + * + * We follows above, except: + * 16 --- program counter (PC) + * 22 --- syscall # + * 23 --- floating point communication register + */ +#define REG_REG0 0 +#define REG_REG15 15 + +#define REG_PC 16 + +#define REG_PR 17 +#define REG_SR 18 +#define REG_GBR 19 +#define REG_MACH 20 +#define REG_MACL 21 + +#define REG_SYSCALL 22 + +#define REG_FPREG0 23 +#define REG_FPREG15 38 +#define REG_XFREG0 39 +#define REG_XFREG15 54 + +#define REG_FPSCR 55 +#define REG_FPUL 56 + +/* + * This struct defines the way the registers are stored on the + * kernel stack during a system call or other kernel entry. + */ +struct pt_regs { + unsigned long regs[16]; + unsigned long pc; + unsigned long pr; + unsigned long sr; + unsigned long gbr; + unsigned long mach; + unsigned long macl; + long tra; +}; + +/* + * This struct defines the way the DSP registers are stored on the + * kernel stack during a system call or other kernel entry. + */ +struct pt_dspregs { + unsigned long a1; + unsigned long a0g; + unsigned long a1g; + unsigned long m0; + unsigned long m1; + unsigned long a0; + unsigned long x0; + unsigned long x1; + unsigned long y0; + unsigned long y1; + unsigned long dsr; + unsigned long rs; + unsigned long re; + unsigned long mod; +}; + + +#endif /* _UAPI__ASM_SH_PTRACE_32_H */ diff --git a/arch/sh/include/uapi/asm/ptrace_64.h b/arch/sh/include/uapi/asm/ptrace_64.h new file mode 100644 index 00000000000..0e52ee83e94 --- /dev/null +++ b/arch/sh/include/uapi/asm/ptrace_64.h @@ -0,0 +1,14 @@ +#ifndef _UAPI__ASM_SH_PTRACE_64_H +#define _UAPI__ASM_SH_PTRACE_64_H + +struct pt_regs { + unsigned long long pc; + unsigned long long sr; + long long syscall_nr; + unsigned long long regs[63]; + unsigned long long tregs[8]; + unsigned long long pad[2]; +}; + + +#endif /* _UAPI__ASM_SH_PTRACE_64_H */ diff --git a/arch/sh/include/uapi/asm/setup.h b/arch/sh/include/uapi/asm/setup.h new file mode 100644 index 00000000000..552df83f1a4 --- /dev/null +++ b/arch/sh/include/uapi/asm/setup.h @@ -0,0 +1 @@ +#include <asm-generic/setup.h> diff --git a/arch/sh/include/asm/sigcontext.h b/arch/sh/include/uapi/asm/sigcontext.h index 8ce1435bc0b..8ce1435bc0b 100644 --- a/arch/sh/include/asm/sigcontext.h +++ b/arch/sh/include/uapi/asm/sigcontext.h diff --git a/arch/sh/include/asm/signal.h b/arch/sh/include/uapi/asm/signal.h index 9ac530a90bc..cb96d02f55a 100644 --- a/arch/sh/include/asm/signal.h +++ b/arch/sh/include/uapi/asm/signal.h @@ -5,11 +5,13 @@ #include <asm-generic/signal.h> +#ifndef __KERNEL__ struct old_sigaction { __sighandler_t sa_handler; old_sigset_t sa_mask; unsigned long sa_flags; void (*sa_restorer)(void); }; +#endif #endif /* __ASM_SH_SIGNAL_H */ diff --git a/arch/sh/include/asm/sockios.h b/arch/sh/include/uapi/asm/sockios.h index cf8b96b1f9a..cf8b96b1f9a 100644 --- a/arch/sh/include/asm/sockios.h +++ b/arch/sh/include/uapi/asm/sockios.h diff --git a/arch/sh/include/asm/stat.h b/arch/sh/include/uapi/asm/stat.h index e1810cc6e3d..e1810cc6e3d 100644 --- a/arch/sh/include/asm/stat.h +++ b/arch/sh/include/uapi/asm/stat.h diff --git a/arch/sh/include/asm/swab.h b/arch/sh/include/uapi/asm/swab.h index 1cd09767a7a..1cd09767a7a 100644 --- a/arch/sh/include/asm/swab.h +++ b/arch/sh/include/uapi/asm/swab.h diff --git a/arch/sh/include/uapi/asm/types.h b/arch/sh/include/uapi/asm/types.h new file mode 100644 index 00000000000..b9e79bc580d --- /dev/null +++ b/arch/sh/include/uapi/asm/types.h @@ -0,0 +1 @@ +#include <asm-generic/types.h> diff --git a/arch/sh/include/uapi/asm/unistd.h b/arch/sh/include/uapi/asm/unistd.h new file mode 100644 index 00000000000..eeef88dd53c --- /dev/null +++ b/arch/sh/include/uapi/asm/unistd.h @@ -0,0 +1,7 @@ +#ifndef __KERNEL__ +# ifdef __SH5__ +# include <asm/unistd_64.h> +# else +# include <asm/unistd_32.h> +# endif +#endif diff --git a/arch/sh/include/asm/unistd_32.h b/arch/sh/include/uapi/asm/unistd_32.h index f18c4f9baf2..d13a1d62373 100644 --- a/arch/sh/include/asm/unistd_32.h +++ b/arch/sh/include/uapi/asm/unistd_32.h @@ -1,5 +1,5 @@ -#ifndef __ASM_SH_UNISTD_H -#define __ASM_SH_UNISTD_H +#ifndef __ASM_SH_UNISTD_32_H +#define __ASM_SH_UNISTD_32_H /* * Copyright (C) 1999 Niibe Yutaka @@ -26,7 +26,7 @@ #define __NR_mknod 14 #define __NR_chmod 15 #define __NR_lchown 16 -#define __NR_break 17 + /* 17 was sys_break */ #define __NR_oldstat 18 #define __NR_lseek 19 #define __NR_getpid 20 @@ -40,11 +40,11 @@ #define __NR_oldfstat 28 #define __NR_pause 29 #define __NR_utime 30 -#define __NR_stty 31 -#define __NR_gtty 32 + /* 31 was sys_stty */ + /* 32 was sys_gtty */ #define __NR_access 33 #define __NR_nice 34 -#define __NR_ftime 35 + /* 35 was sys_ftime */ #define __NR_sync 36 #define __NR_kill 37 #define __NR_rename 38 @@ -53,7 +53,7 @@ #define __NR_dup 41 #define __NR_pipe 42 #define __NR_times 43 -#define __NR_prof 44 + /* 44 was sys_prof */ #define __NR_brk 45 #define __NR_setgid 46 #define __NR_getgid 47 @@ -62,13 +62,13 @@ #define __NR_getegid 50 #define __NR_acct 51 #define __NR_umount2 52 -#define __NR_lock 53 + /* 53 was sys_lock */ #define __NR_ioctl 54 #define __NR_fcntl 55 -#define __NR_mpx 56 + /* 56 was sys_mpx */ #define __NR_setpgid 57 -#define __NR_ulimit 58 -#define __NR_oldolduname 59 + /* 58 was sys_ulimit */ + /* 59 was sys_olduname */ #define __NR_umask 60 #define __NR_chroot 61 #define __NR_ustat 62 @@ -91,7 +91,7 @@ #define __NR_settimeofday 79 #define __NR_getgroups 80 #define __NR_setgroups 81 -#define __NR_select 82 + /* 82 was sys_oldselect */ #define __NR_symlink 83 #define __NR_oldlstat 84 #define __NR_readlink 85 @@ -107,10 +107,10 @@ #define __NR_fchown 95 #define __NR_getpriority 96 #define __NR_setpriority 97 -#define __NR_profil 98 + /* 98 was sys_profil */ #define __NR_statfs 99 #define __NR_fstatfs 100 -#define __NR_ioperm 101 + /* 101 was sys_ioperm */ #define __NR_socketcall 102 #define __NR_syslog 103 #define __NR_setitimer 104 @@ -119,10 +119,10 @@ #define __NR_lstat 107 #define __NR_fstat 108 #define __NR_olduname 109 -#define __NR_iopl 110 + /* 110 was sys_iopl */ #define __NR_vhangup 111 -#define __NR_idle 112 -#define __NR_vm86old 113 + /* 112 was sys_idle */ + /* 113 was sys_vm86old */ #define __NR_wait4 114 #define __NR_swapoff 115 #define __NR_sysinfo 116 @@ -136,17 +136,17 @@ #define __NR_adjtimex 124 #define __NR_mprotect 125 #define __NR_sigprocmask 126 -#define __NR_create_module 127 + /* 127 was sys_create_module */ #define __NR_init_module 128 #define __NR_delete_module 129 -#define __NR_get_kernel_syms 130 + /* 130 was sys_get_kernel_syms */ #define __NR_quotactl 131 #define __NR_getpgid 132 #define __NR_fchdir 133 #define __NR_bdflush 134 #define __NR_sysfs 135 #define __NR_personality 136 -#define __NR_afs_syscall 137 /* Syscall for Andrew File System */ + /* 137 was sys_afs_syscall */ #define __NR_setfsuid 138 #define __NR_setfsgid 139 #define __NR__llseek 140 @@ -175,8 +175,8 @@ #define __NR_mremap 163 #define __NR_setresuid 164 #define __NR_getresuid 165 -#define __NR_vm86 166 -#define __NR_query_module 167 + /* 166 was sys_vm86 */ + /* 167 was sys_query_module */ #define __NR_poll 168 #define __NR_nfsservctl 169 #define __NR_setresgid 170 @@ -197,8 +197,8 @@ #define __NR_capset 185 #define __NR_sigaltstack 186 #define __NR_sendfile 187 -#define __NR_streams1 188 /* some people actually want it */ -#define __NR_streams2 189 /* some people actually want it */ + /* 188 reserved for sys_getpmsg */ + /* 189 reserved for sys_putpmsg */ #define __NR_vfork 190 #define __NR_ugetrlimit 191 /* SuS compliant getrlimit */ #define __NR_mmap2 192 @@ -231,7 +231,8 @@ #define __NR_madvise 219 #define __NR_getdents64 220 #define __NR_fcntl64 221 -/* 223 is unused */ + /* 222 is reserved for tux */ + /* 223 is unused */ #define __NR_gettid 224 #define __NR_readahead 225 #define __NR_setxattr 226 @@ -251,15 +252,15 @@ #define __NR_futex 240 #define __NR_sched_setaffinity 241 #define __NR_sched_getaffinity 242 -#define __NR_set_thread_area 243 -#define __NR_get_thread_area 244 + /* 243 is reserved for set_thread_area */ + /* 244 is reserved for get_thread_area */ #define __NR_io_setup 245 #define __NR_io_destroy 246 #define __NR_io_getevents 247 #define __NR_io_submit 248 #define __NR_io_cancel 249 #define __NR_fadvise64 250 - + /* 251 is unused */ #define __NR_exit_group 252 #define __NR_lookup_dcookie 253 #define __NR_epoll_create 254 @@ -281,7 +282,7 @@ #define __NR_tgkill 270 #define __NR_utimes 271 #define __NR_fadvise64_64 272 -#define __NR_vserver 273 + /* 273 is reserved for vserver */ #define __NR_mbind 274 #define __NR_get_mempolicy 275 #define __NR_set_mempolicy 276 @@ -301,7 +302,7 @@ #define __NR_inotify_init 290 #define __NR_inotify_add_watch 291 #define __NR_inotify_rm_watch 292 -/* 293 is unused */ + /* 293 is unused */ #define __NR_migrate_pages 294 #define __NR_openat 295 #define __NR_mkdirat 296 @@ -345,45 +346,41 @@ #define __NR_pwritev 334 #define __NR_rt_tgsigqueueinfo 335 #define __NR_perf_event_open 336 -#define __NR_recvmmsg 337 - -#define NR_syscalls 338 - -#ifdef __KERNEL__ +#define __NR_fanotify_init 337 +#define __NR_fanotify_mark 338 +#define __NR_prlimit64 339 -#define __ARCH_WANT_IPC_PARSE_VERSION -#define __ARCH_WANT_OLD_READDIR -#define __ARCH_WANT_OLD_STAT -#define __ARCH_WANT_STAT64 -#define __ARCH_WANT_SYS_ALARM -#define __ARCH_WANT_SYS_GETHOSTNAME -#define __ARCH_WANT_SYS_PAUSE -#define __ARCH_WANT_SYS_SGETMASK -#define __ARCH_WANT_SYS_SIGNAL -#define __ARCH_WANT_SYS_TIME -#define __ARCH_WANT_SYS_UTIME -#define __ARCH_WANT_SYS_WAITPID -#define __ARCH_WANT_SYS_SOCKETCALL -#define __ARCH_WANT_SYS_FADVISE64 -#define __ARCH_WANT_SYS_GETPGRP -#define __ARCH_WANT_SYS_LLSEEK -#define __ARCH_WANT_SYS_NICE -#define __ARCH_WANT_SYS_OLD_GETRLIMIT -#define __ARCH_WANT_SYS_OLDUMOUNT -#define __ARCH_WANT_SYS_SIGPENDING -#define __ARCH_WANT_SYS_SIGPROCMASK -#define __ARCH_WANT_SYS_RT_SIGACTION -#define __ARCH_WANT_SYS_RT_SIGSUSPEND +/* Non-multiplexed socket family */ +#define __NR_socket 340 +#define __NR_bind 341 +#define __NR_connect 342 +#define __NR_listen 343 +#define __NR_accept 344 +#define __NR_getsockname 345 +#define __NR_getpeername 346 +#define __NR_socketpair 347 +#define __NR_send 348 +#define __NR_sendto 349 +#define __NR_recv 350 +#define __NR_recvfrom 351 +#define __NR_shutdown 352 +#define __NR_setsockopt 353 +#define __NR_getsockopt 354 +#define __NR_sendmsg 355 +#define __NR_recvmsg 356 +#define __NR_recvmmsg 357 +#define __NR_accept4 358 +#define __NR_name_to_handle_at 359 +#define __NR_open_by_handle_at 360 +#define __NR_clock_adjtime 361 +#define __NR_syncfs 362 +#define __NR_sendmmsg 363 +#define __NR_setns 364 +#define __NR_process_vm_readv 365 +#define __NR_process_vm_writev 366 +#define __NR_kcmp 367 +#define __NR_finit_module 368 -/* - * "Conditional" syscalls - * - * What we want is __attribute__((weak,alias("sys_ni_syscall"))), - * but it doesn't work on all toolchains, so we just do it by hand - */ -#ifndef cond_syscall -#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall") -#endif +#define NR_syscalls 369 -#endif /* __KERNEL__ */ -#endif /* __ASM_SH_UNISTD_H */ +#endif /* __ASM_SH_UNISTD_32_H */ diff --git a/arch/sh/include/asm/unistd_64.h b/arch/sh/include/uapi/asm/unistd_64.h index 3e7645d1113..e6820c86e8c 100644 --- a/arch/sh/include/asm/unistd_64.h +++ b/arch/sh/include/uapi/asm/unistd_64.h @@ -31,7 +31,7 @@ #define __NR_mknod 14 #define __NR_chmod 15 #define __NR_lchown 16 -#define __NR_break 17 + /* 17 was sys_break */ #define __NR_oldstat 18 #define __NR_lseek 19 #define __NR_getpid 20 @@ -45,11 +45,11 @@ #define __NR_oldfstat 28 #define __NR_pause 29 #define __NR_utime 30 -#define __NR_stty 31 -#define __NR_gtty 32 + /* 31 was sys_stty */ + /* 32 was sys_gtty */ #define __NR_access 33 #define __NR_nice 34 -#define __NR_ftime 35 + /* 35 was sys_ftime */ #define __NR_sync 36 #define __NR_kill 37 #define __NR_rename 38 @@ -58,7 +58,7 @@ #define __NR_dup 41 #define __NR_pipe 42 #define __NR_times 43 -#define __NR_prof 44 + /* 44 was sys_prof */ #define __NR_brk 45 #define __NR_setgid 46 #define __NR_getgid 47 @@ -67,13 +67,13 @@ #define __NR_getegid 50 #define __NR_acct 51 #define __NR_umount2 52 -#define __NR_lock 53 + /* 53 was sys_lock */ #define __NR_ioctl 54 #define __NR_fcntl 55 -#define __NR_mpx 56 + /* 56 was sys_mpx */ #define __NR_setpgid 57 -#define __NR_ulimit 58 -#define __NR_oldolduname 59 + /* 58 was sys_ulimit */ + /* 59 was sys_olduname */ #define __NR_umask 60 #define __NR_chroot 61 #define __NR_ustat 62 @@ -96,7 +96,7 @@ #define __NR_settimeofday 79 #define __NR_getgroups 80 #define __NR_setgroups 81 -#define __NR_select 82 + /* 82 was sys_select */ #define __NR_symlink 83 #define __NR_oldlstat 84 #define __NR_readlink 85 @@ -112,10 +112,10 @@ #define __NR_fchown 95 #define __NR_getpriority 96 #define __NR_setpriority 97 -#define __NR_profil 98 + /* 98 was sys_profil */ #define __NR_statfs 99 #define __NR_fstatfs 100 -#define __NR_ioperm 101 + /* 101 was sys_ioperm */ #define __NR_socketcall 102 /* old implementation of socket systemcall */ #define __NR_syslog 103 #define __NR_setitimer 104 @@ -124,10 +124,10 @@ #define __NR_lstat 107 #define __NR_fstat 108 #define __NR_olduname 109 -#define __NR_iopl 110 + /* 110 was sys_iopl */ #define __NR_vhangup 111 -#define __NR_idle 112 -#define __NR_vm86old 113 + /* 112 was sys_idle */ + /* 113 was sys_vm86old */ #define __NR_wait4 114 #define __NR_swapoff 115 #define __NR_sysinfo 116 @@ -141,17 +141,17 @@ #define __NR_adjtimex 124 #define __NR_mprotect 125 #define __NR_sigprocmask 126 -#define __NR_create_module 127 + /* 127 was sys_create_module */ #define __NR_init_module 128 #define __NR_delete_module 129 -#define __NR_get_kernel_syms 130 + /* 130 was sys_get_kernel_syms */ #define __NR_quotactl 131 #define __NR_getpgid 132 #define __NR_fchdir 133 #define __NR_bdflush 134 #define __NR_sysfs 135 #define __NR_personality 136 -#define __NR_afs_syscall 137 /* Syscall for Andrew File System */ + /* 137 was sys_afs_syscall */ #define __NR_setfsuid 138 #define __NR_setfsgid 139 #define __NR__llseek 140 @@ -180,8 +180,8 @@ #define __NR_mremap 163 #define __NR_setresuid 164 #define __NR_getresuid 165 -#define __NR_vm86 166 -#define __NR_query_module 167 + /* 166 was sys_vm86 */ + /* 167 was sys_query_module */ #define __NR_poll 168 #define __NR_nfsservctl 169 #define __NR_setresgid 170 @@ -202,8 +202,8 @@ #define __NR_capset 185 #define __NR_sigaltstack 186 #define __NR_sendfile 187 -#define __NR_streams1 188 /* some people actually want it */ -#define __NR_streams2 189 /* some people actually want it */ + /* 188 reserved for getpmsg */ + /* 189 reserved for putpmsg */ #define __NR_vfork 190 #define __NR_ugetrlimit 191 /* SuS compliant getrlimit */ #define __NR_mmap2 192 @@ -262,16 +262,15 @@ #define __NR_msgrcv 241 #define __NR_msgget 242 #define __NR_msgctl 243 -#if 0 -#define __NR_shmatcall 244 -#endif +#define __NR_shmat 244 #define __NR_shmdt 245 #define __NR_shmget 246 #define __NR_shmctl 247 #define __NR_getdents64 248 #define __NR_fcntl64 249 -/* 223 is unused */ + /* 250 is reserved for tux */ + /* 251 is unused */ #define __NR_gettid 252 #define __NR_readahead 253 #define __NR_setxattr 254 @@ -291,14 +290,15 @@ #define __NR_futex 268 #define __NR_sched_setaffinity 269 #define __NR_sched_getaffinity 270 -#define __NR_set_thread_area 271 -#define __NR_get_thread_area 272 + /* 271 is reserved for set_thread_area */ + /* 272 is reserved for get_thread_area */ #define __NR_io_setup 273 #define __NR_io_destroy 274 #define __NR_io_getevents 275 #define __NR_io_submit 276 #define __NR_io_cancel 277 #define __NR_fadvise64 278 + /* 279 is unused */ #define __NR_exit_group 280 #define __NR_lookup_dcookie 281 @@ -321,17 +321,17 @@ #define __NR_tgkill 298 #define __NR_utimes 299 #define __NR_fadvise64_64 300 -#define __NR_vserver 301 -#define __NR_mbind 302 -#define __NR_get_mempolicy 303 -#define __NR_set_mempolicy 304 + /* 301 is reserved for vserver */ + /* 302 is reserved for mbind */ + /* 303 is reserved for get_mempolicy */ + /* 304 is reserved for set_mempolicy */ #define __NR_mq_open 305 #define __NR_mq_unlink (__NR_mq_open+1) #define __NR_mq_timedsend (__NR_mq_open+2) #define __NR_mq_timedreceive (__NR_mq_open+3) #define __NR_mq_notify (__NR_mq_open+4) #define __NR_mq_getsetattr (__NR_mq_open+5) -#define __NR_kexec_load 311 + /* 311 is reserved for kexec */ #define __NR_waitid 312 #define __NR_add_key 313 #define __NR_request_key 314 @@ -341,7 +341,7 @@ #define __NR_inotify_init 318 #define __NR_inotify_add_watch 319 #define __NR_inotify_rm_watch 320 -/* 321 is unused */ + /* 321 is unused */ #define __NR_migrate_pages 322 #define __NR_openat 323 #define __NR_mkdirat 324 @@ -386,43 +386,21 @@ #define __NR_rt_tgsigqueueinfo 363 #define __NR_perf_event_open 364 #define __NR_recvmmsg 365 +#define __NR_accept4 366 +#define __NR_fanotify_init 367 +#define __NR_fanotify_mark 368 +#define __NR_prlimit64 369 +#define __NR_name_to_handle_at 370 +#define __NR_open_by_handle_at 371 +#define __NR_clock_adjtime 372 +#define __NR_syncfs 373 +#define __NR_sendmmsg 374 +#define __NR_setns 375 +#define __NR_process_vm_readv 376 +#define __NR_process_vm_writev 377 +#define __NR_kcmp 378 +#define __NR_finit_module 379 -#ifdef __KERNEL__ +#define NR_syscalls 380 -#define NR_syscalls 366 - -#define __ARCH_WANT_IPC_PARSE_VERSION -#define __ARCH_WANT_OLD_READDIR -#define __ARCH_WANT_OLD_STAT -#define __ARCH_WANT_STAT64 -#define __ARCH_WANT_SYS_ALARM -#define __ARCH_WANT_SYS_GETHOSTNAME -#define __ARCH_WANT_SYS_PAUSE -#define __ARCH_WANT_SYS_SGETMASK -#define __ARCH_WANT_SYS_SIGNAL -#define __ARCH_WANT_SYS_TIME -#define __ARCH_WANT_SYS_UTIME -#define __ARCH_WANT_SYS_WAITPID -#define __ARCH_WANT_SYS_SOCKETCALL -#define __ARCH_WANT_SYS_FADVISE64 -#define __ARCH_WANT_SYS_GETPGRP -#define __ARCH_WANT_SYS_LLSEEK -#define __ARCH_WANT_SYS_NICE -#define __ARCH_WANT_SYS_OLD_GETRLIMIT -#define __ARCH_WANT_SYS_OLDUMOUNT -#define __ARCH_WANT_SYS_SIGPENDING -#define __ARCH_WANT_SYS_SIGPROCMASK -#define __ARCH_WANT_SYS_RT_SIGACTION - -/* - * "Conditional" syscalls - * - * What we want is __attribute__((weak,alias("sys_ni_syscall"))), - * but it doesn't work on all toolchains, so we just do it by hand - */ -#ifndef cond_syscall -#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall") -#endif - -#endif /* __KERNEL__ */ #endif /* __ASM_SH_UNISTD_64_H */ |