diff options
Diffstat (limited to 'arch/sh/include/asm/io.h')
| -rw-r--r-- | arch/sh/include/asm/io.h | 94 |
1 files changed, 25 insertions, 69 deletions
diff --git a/arch/sh/include/asm/io.h b/arch/sh/include/asm/io.h index 89ab2c57a4c..728c4c571f4 100644 --- a/arch/sh/include/asm/io.h +++ b/arch/sh/include/asm/io.h @@ -11,15 +11,9 @@ * * While read{b,w,l,q} and write{b,w,l,q} contain memory barriers * automatically, there are also __raw versions, which do not. - * - * Historically, we have also had ctrl_in{b,w,l,q}/ctrl_out{b,w,l,q} for - * SuperH specific I/O (raw I/O to on-chip CPU peripherals). In practice - * these have the same semantics as the __raw variants, and as such, all - * new code should be using the __raw versions. */ #include <linux/errno.h> #include <asm/cache.h> -#include <asm/system.h> #include <asm/addrspace.h> #include <asm/machvec.h> #include <asm/pgtable.h> @@ -29,6 +23,7 @@ #define __IO_PREFIX generic #include <asm/io_generic.h> #include <asm/io_trapped.h> +#include <mach/mangle-port.h> #define __raw_writeb(v,a) (__chk_io_ptr(a), *(volatile u8 __force *)(a) = (v)) #define __raw_writew(v,a) (__chk_io_ptr(a), *(volatile u16 __force *)(a) = (v)) @@ -40,21 +35,15 @@ #define __raw_readl(a) (__chk_io_ptr(a), *(volatile u32 __force *)(a)) #define __raw_readq(a) (__chk_io_ptr(a), *(volatile u64 __force *)(a)) -#define readb_relaxed(c) ({ u8 __v = __raw_readb(c); __v; }) -#define readw_relaxed(c) ({ u16 __v = le16_to_cpu((__force __le16) \ - __raw_readw(c)); __v; }) -#define readl_relaxed(c) ({ u32 __v = le32_to_cpu((__force __le32) \ - __raw_readl(c)); __v; }) -#define readq_relaxed(c) ({ u64 __v = le64_to_cpu((__force __le64) \ - __raw_readq(c)); __v; }) - -#define writeb_relaxed(v,c) ((void)__raw_writeb(v,c)) -#define writew_relaxed(v,c) ((void)__raw_writew((__force u16) \ - cpu_to_le16(v),c)) -#define writel_relaxed(v,c) ((void)__raw_writel((__force u32) \ - cpu_to_le32(v),c)) -#define writeq_relaxed(v,c) ((void)__raw_writeq((__force u64) \ - cpu_to_le64(v),c)) +#define readb_relaxed(c) ({ u8 __v = ioswabb(__raw_readb(c)); __v; }) +#define readw_relaxed(c) ({ u16 __v = ioswabw(__raw_readw(c)); __v; }) +#define readl_relaxed(c) ({ u32 __v = ioswabl(__raw_readl(c)); __v; }) +#define readq_relaxed(c) ({ u64 __v = ioswabq(__raw_readq(c)); __v; }) + +#define writeb_relaxed(v,c) ((void)__raw_writeb((__force u8)ioswabb(v),c)) +#define writew_relaxed(v,c) ((void)__raw_writew((__force u16)ioswabw(v),c)) +#define writel_relaxed(v,c) ((void)__raw_writel((__force u32)ioswabl(v),c)) +#define writeq_relaxed(v,c) ((void)__raw_writeq((__force u64)ioswabq(v),c)) #define readb(a) ({ u8 r_ = readb_relaxed(a); rmb(); r_; }) #define readw(a) ({ u16 r_ = readw_relaxed(a); rmb(); r_; }) @@ -133,7 +122,7 @@ __BUILD_MEMORY_STRING(__raw_, l, u32) __BUILD_MEMORY_STRING(__raw_, q, u64) -#ifdef CONFIG_HAS_IOPORT +#ifdef CONFIG_HAS_IOPORT_MAP /* * Slowdown I/O port space accesses for antique hardware. @@ -145,7 +134,7 @@ __BUILD_MEMORY_STRING(__raw_, q, u64) * load/store instructions. sh_io_port_base is the virtual address to * which all ports are being mapped. */ -extern const unsigned long sh_io_port_base; +extern unsigned long sh_io_port_base; static inline void __set_io_port_base(unsigned long pbase) { @@ -229,53 +218,12 @@ __BUILD_IOPORT_STRING(w, u16) __BUILD_IOPORT_STRING(l, u32) __BUILD_IOPORT_STRING(q, u64) -#endif - -/* - * Legacy SuperH on-chip I/O functions - * - * These are all deprecated, all new (and especially cross-platform) code - * should be using the __raw_xxx() routines directly. - */ -static inline u8 __deprecated ctrl_inb(unsigned long addr) -{ - return __raw_readb(addr); -} - -static inline u16 __deprecated ctrl_inw(unsigned long addr) -{ - return __raw_readw(addr); -} - -static inline u32 __deprecated ctrl_inl(unsigned long addr) -{ - return __raw_readl(addr); -} - -static inline u64 __deprecated ctrl_inq(unsigned long addr) -{ - return __raw_readq(addr); -} - -static inline void __deprecated ctrl_outb(u8 v, unsigned long addr) -{ - __raw_writeb(v, addr); -} +#else /* !CONFIG_HAS_IOPORT_MAP */ -static inline void __deprecated ctrl_outw(u16 v, unsigned long addr) -{ - __raw_writew(v, addr); -} +#include <asm/io_noioport.h> -static inline void __deprecated ctrl_outl(u32 v, unsigned long addr) -{ - __raw_writel(v, addr); -} +#endif -static inline void __deprecated ctrl_outq(u64 v, unsigned long addr) -{ - __raw_writeq(v, addr); -} #define IO_SPACE_LIMIT 0xffffffff @@ -341,7 +289,15 @@ __ioremap_29bit(phys_addr_t offset, unsigned long size, pgprot_t prot) * mapping must be done by the PMB or by using page tables. */ if (likely(PXSEG(offset) < P3SEG && PXSEG(last_addr) < P3SEG)) { - if (unlikely(pgprot_val(prot) & _PAGE_CACHABLE)) + u64 flags = pgprot_val(prot); + + /* + * Anything using the legacy PTEA space attributes needs + * to be kicked down to page table mappings. + */ + if (unlikely(flags & _PAGE_PCC_MASK)) + return NULL; + if (unlikely(flags & _PAGE_CACHABLE)) return (void __iomem *)P1SEGADDR(offset); return (void __iomem *)P2SEGADDR(offset); @@ -426,7 +382,7 @@ static inline int iounmap_fixed(void __iomem *addr) { return -EINVAL; } #define xlate_dev_kmem_ptr(p) p #define ARCH_HAS_VALID_PHYS_ADDR_RANGE -int valid_phys_addr_range(unsigned long addr, size_t size); +int valid_phys_addr_range(phys_addr_t addr, size_t size); int valid_mmap_phys_addr_range(unsigned long pfn, size_t size); #endif /* __KERNEL__ */ |