diff options
Diffstat (limited to 'arch/powerpc/sysdev/qe_lib')
| -rw-r--r-- | arch/powerpc/sysdev/qe_lib/Kconfig | 2 | ||||
| -rw-r--r-- | arch/powerpc/sysdev/qe_lib/gpio.c | 43 | ||||
| -rw-r--r-- | arch/powerpc/sysdev/qe_lib/qe.c | 36 | ||||
| -rw-r--r-- | arch/powerpc/sysdev/qe_lib/qe_ic.c | 81 | ||||
| -rw-r--r-- | arch/powerpc/sysdev/qe_lib/qe_ic.h | 4 | ||||
| -rw-r--r-- | arch/powerpc/sysdev/qe_lib/qe_io.c | 5 | ||||
| -rw-r--r-- | arch/powerpc/sysdev/qe_lib/ucc.c | 5 | ||||
| -rw-r--r-- | arch/powerpc/sysdev/qe_lib/ucc_fast.c | 5 | ||||
| -rw-r--r-- | arch/powerpc/sysdev/qe_lib/ucc_slow.c | 5 | ||||
| -rw-r--r-- | arch/powerpc/sysdev/qe_lib/usb.c | 3 | 
10 files changed, 85 insertions, 104 deletions
diff --git a/arch/powerpc/sysdev/qe_lib/Kconfig b/arch/powerpc/sysdev/qe_lib/Kconfig index 41ac3dfac98..3c251993bac 100644 --- a/arch/powerpc/sysdev/qe_lib/Kconfig +++ b/arch/powerpc/sysdev/qe_lib/Kconfig @@ -22,6 +22,6 @@ config UCC  config QE_USB  	bool -	default y if USB_GADGET_FSL_QE +	default y if USB_FSL_QE  	help  	  QE USB Controller support diff --git a/arch/powerpc/sysdev/qe_lib/gpio.c b/arch/powerpc/sysdev/qe_lib/gpio.c index 36bf845df12..521e67a49dc 100644 --- a/arch/powerpc/sysdev/qe_lib/gpio.c +++ b/arch/powerpc/sysdev/qe_lib/gpio.c @@ -20,6 +20,7 @@  #include <linux/of_gpio.h>  #include <linux/gpio.h>  #include <linux/slab.h> +#include <linux/export.h>  #include <asm/qe.h>  struct qe_gpio_chip { @@ -138,14 +139,10 @@ struct qe_pin {  struct qe_pin *qe_pin_request(struct device_node *np, int index)  {  	struct qe_pin *qe_pin; -	struct device_node *gpio_np;  	struct gpio_chip *gc;  	struct of_mm_gpio_chip *mm_gc;  	struct qe_gpio_chip *qe_gc;  	int err; -	int size; -	const void *gpio_spec; -	const u32 *gpio_cells;  	unsigned long flags;  	qe_pin = kzalloc(sizeof(*qe_pin), GFP_KERNEL); @@ -154,45 +151,25 @@ struct qe_pin *qe_pin_request(struct device_node *np, int index)  		return ERR_PTR(-ENOMEM);  	} -	err = of_parse_phandles_with_args(np, "gpios", "#gpio-cells", index, -					  &gpio_np, &gpio_spec); -	if (err) { -		pr_debug("%s: can't parse gpios property\n", __func__); +	err = of_get_gpio(np, index); +	if (err < 0) +		goto err0; +	gc = gpio_to_chip(err); +	if (WARN_ON(!gc))  		goto err0; -	} -	if (!of_device_is_compatible(gpio_np, "fsl,mpc8323-qe-pario-bank")) { +	if (!of_device_is_compatible(gc->of_node, "fsl,mpc8323-qe-pario-bank")) {  		pr_debug("%s: tried to get a non-qe pin\n", __func__);  		err = -EINVAL; -		goto err1; -	} - -	gc = of_node_to_gpiochip(gpio_np); -	if (!gc) { -		pr_debug("%s: gpio controller %s isn't registered\n", -			 np->full_name, gpio_np->full_name); -		err = -ENODEV; -		goto err1; -	} - -	gpio_cells = of_get_property(gpio_np, "#gpio-cells", &size); -	if (!gpio_cells || size != sizeof(*gpio_cells) || -			*gpio_cells != gc->of_gpio_n_cells) { -		pr_debug("%s: wrong #gpio-cells for %s\n", -			 np->full_name, gpio_np->full_name); -		err = -EINVAL; -		goto err1; +		goto err0;  	} -	err = gc->of_xlate(gc, np, gpio_spec, NULL); -	if (err < 0) -		goto err1; -  	mm_gc = to_of_mm_gpio_chip(gc);  	qe_gc = to_qe_gpio_chip(mm_gc);  	spin_lock_irqsave(&qe_gc->lock, flags); +	err -= gc->base;  	if (test_and_set_bit(QE_PIN_REQUESTED, &qe_gc->pin_flags[err]) == 0) {  		qe_pin->controller = qe_gc;  		qe_pin->num = err; @@ -205,8 +182,6 @@ struct qe_pin *qe_pin_request(struct device_node *np, int index)  	if (!err)  		return qe_pin; -err1: -	of_node_put(gpio_np);  err0:  	kfree(qe_pin);  	pr_debug("%s failed with status %d\n", __func__, err); diff --git a/arch/powerpc/sysdev/qe_lib/qe.c b/arch/powerpc/sysdev/qe_lib/qe.c index 90020de4dcf..238a07b97f2 100644 --- a/arch/powerpc/sysdev/qe_lib/qe.c +++ b/arch/powerpc/sysdev/qe_lib/qe.c @@ -1,5 +1,5 @@  /* - * Copyright (C) 2006 Freescale Semicondutor, Inc. All rights reserved. + * Copyright (C) 2006-2010 Freescale Semiconductor, Inc. All rights reserved.   *   * Authors: 	Shlomi Gridish <gridish@freescale.com>   * 		Li Yang <leoli@freescale.com> @@ -216,7 +216,7 @@ int qe_setbrg(enum qe_clock brg, unsigned int rate, unsigned int multiplier)  	/* Errata QE_General4, which affects some MPC832x and MPC836x SOCs, says  	   that the BRG divisor must be even if you're not using divide-by-16  	   mode. */ -	if (!div16 && (divisor & 1)) +	if (!div16 && (divisor & 1) && (divisor > 3))  		divisor++;  	tempval = ((divisor - 1) << QE_BRGC_DIVISOR_SHIFT) | @@ -266,7 +266,19 @@ EXPORT_SYMBOL(qe_clock_source);  static void qe_snums_init(void)  {  	int i; -	static const u8 snum_init[] = { +	static const u8 snum_init_76[] = { +		0x04, 0x05, 0x0C, 0x0D, 0x14, 0x15, 0x1C, 0x1D, +		0x24, 0x25, 0x2C, 0x2D, 0x34, 0x35, 0x88, 0x89, +		0x98, 0x99, 0xA8, 0xA9, 0xB8, 0xB9, 0xC8, 0xC9, +		0xD8, 0xD9, 0xE8, 0xE9, 0x44, 0x45, 0x4C, 0x4D, +		0x54, 0x55, 0x5C, 0x5D, 0x64, 0x65, 0x6C, 0x6D, +		0x74, 0x75, 0x7C, 0x7D, 0x84, 0x85, 0x8C, 0x8D, +		0x94, 0x95, 0x9C, 0x9D, 0xA4, 0xA5, 0xAC, 0xAD, +		0xB4, 0xB5, 0xBC, 0xBD, 0xC4, 0xC5, 0xCC, 0xCD, +		0xD4, 0xD5, 0xDC, 0xDD, 0xE4, 0xE5, 0xEC, 0xED, +		0xF4, 0xF5, 0xFC, 0xFD, +	}; +	static const u8 snum_init_46[] = {  		0x04, 0x05, 0x0C, 0x0D, 0x14, 0x15, 0x1C, 0x1D,  		0x24, 0x25, 0x2C, 0x2D, 0x34, 0x35, 0x88, 0x89,  		0x98, 0x99, 0xA8, 0xA9, 0xB8, 0xB9, 0xC8, 0xC9, @@ -274,9 +286,15 @@ static void qe_snums_init(void)  		0x28, 0x29, 0x38, 0x39, 0x48, 0x49, 0x58, 0x59,  		0x68, 0x69, 0x78, 0x79, 0x80, 0x81,  	}; +	static const u8 *snum_init;  	qe_num_of_snum = qe_get_num_of_snums(); +	if (qe_num_of_snum == 76) +		snum_init = snum_init_76; +	else +		snum_init = snum_init_46; +  	for (i = 0; i < qe_num_of_snum; i++) {  		snums[i].num = snum_init[i];  		snums[i].state = QE_SNUM_STATE_FREE; @@ -377,12 +395,15 @@ static void qe_upload_microcode(const void *base,  	for (i = 0; i < be32_to_cpu(ucode->count); i++)  		out_be32(&qe_immr->iram.idata, be32_to_cpu(code[i])); +	 +	/* Set I-RAM Ready Register */ +	out_be32(&qe_immr->iram.iready, be32_to_cpu(QE_IRAM_READY));  }  /*   * Upload a microcode to the I-RAM at a specific address.   * - * See Documentation/powerpc/qe-firmware.txt for information on QE microcode + * See Documentation/powerpc/qe_firmware.txt for information on QE microcode   * uploading.   *   * Currently, only version 1 is supported, so the 'version' field must be @@ -659,8 +680,7 @@ static int qe_resume(struct platform_device *ofdev)  	return 0;  } -static int qe_probe(struct platform_device *ofdev, -		    const struct of_device_id *id) +static int qe_probe(struct platform_device *ofdev)  {  	return 0;  } @@ -670,7 +690,7 @@ static const struct of_device_id qe_ids[] = {  	{ },  }; -static struct of_platform_driver qe_driver = { +static struct platform_driver qe_driver = {  	.driver = {  		.name = "fsl-qe",  		.owner = THIS_MODULE, @@ -682,7 +702,7 @@ static struct of_platform_driver qe_driver = {  static int __init qe_drv_init(void)  { -	return of_register_platform_driver(&qe_driver); +	return platform_driver_register(&qe_driver);  }  device_initcall(qe_drv_init);  #endif /* defined(CONFIG_SUSPEND) && defined(CONFIG_PPC_85xx) */ diff --git a/arch/powerpc/sysdev/qe_lib/qe_ic.c b/arch/powerpc/sysdev/qe_lib/qe_ic.c index 541ba986364..b2b87c30e26 100644 --- a/arch/powerpc/sysdev/qe_lib/qe_ic.c +++ b/arch/powerpc/sysdev/qe_lib/qe_ic.c @@ -1,7 +1,7 @@  /*   * arch/powerpc/sysdev/qe_lib/qe_ic.c   * - * Copyright (C) 2006 Freescale Semicondutor, Inc.  All rights reserved. + * Copyright (C) 2006 Freescale Semiconductor, Inc.  All rights reserved.   *   * Author: Li Yang <leoli@freescale.com>   * Based on code from Shlomi Gridish <gridish@freescale.com> @@ -22,7 +22,6 @@  #include <linux/stddef.h>  #include <linux/sched.h>  #include <linux/signal.h> -#include <linux/sysdev.h>  #include <linux/device.h>  #include <linux/bootmem.h>  #include <linux/spinlock.h> @@ -189,15 +188,18 @@ static inline void qe_ic_write(volatile __be32  __iomem * base, unsigned int reg  static inline struct qe_ic *qe_ic_from_irq(unsigned int virq)  { -	return irq_to_desc(virq)->chip_data; +	return irq_get_chip_data(virq);  } -#define virq_to_hw(virq)	((unsigned int)irq_map[virq].hwirq) +static inline struct qe_ic *qe_ic_from_irq_data(struct irq_data *d) +{ +	return irq_data_get_irq_chip_data(d); +} -static void qe_ic_unmask_irq(unsigned int virq) +static void qe_ic_unmask_irq(struct irq_data *d)  { -	struct qe_ic *qe_ic = qe_ic_from_irq(virq); -	unsigned int src = virq_to_hw(virq); +	struct qe_ic *qe_ic = qe_ic_from_irq_data(d); +	unsigned int src = irqd_to_hwirq(d);  	unsigned long flags;  	u32 temp; @@ -210,10 +212,10 @@ static void qe_ic_unmask_irq(unsigned int virq)  	raw_spin_unlock_irqrestore(&qe_ic_lock, flags);  } -static void qe_ic_mask_irq(unsigned int virq) +static void qe_ic_mask_irq(struct irq_data *d)  { -	struct qe_ic *qe_ic = qe_ic_from_irq(virq); -	unsigned int src = virq_to_hw(virq); +	struct qe_ic *qe_ic = qe_ic_from_irq_data(d); +	unsigned int src = irqd_to_hwirq(d);  	unsigned long flags;  	u32 temp; @@ -238,18 +240,18 @@ static void qe_ic_mask_irq(unsigned int virq)  static struct irq_chip qe_ic_irq_chip = {  	.name = "QEIC", -	.unmask = qe_ic_unmask_irq, -	.mask = qe_ic_mask_irq, -	.mask_ack = qe_ic_mask_irq, +	.irq_unmask = qe_ic_unmask_irq, +	.irq_mask = qe_ic_mask_irq, +	.irq_mask_ack = qe_ic_mask_irq,  }; -static int qe_ic_host_match(struct irq_host *h, struct device_node *node) +static int qe_ic_host_match(struct irq_domain *h, struct device_node *node)  {  	/* Exact match, unless qe_ic node is NULL */  	return h->of_node == NULL || h->of_node == node;  } -static int qe_ic_host_map(struct irq_host *h, unsigned int virq, +static int qe_ic_host_map(struct irq_domain *h, unsigned int virq,  			  irq_hw_number_t hw)  {  	struct qe_ic *qe_ic = h->host_data; @@ -262,31 +264,18 @@ static int qe_ic_host_map(struct irq_host *h, unsigned int virq,  	/* Default chip */  	chip = &qe_ic->hc_irq; -	set_irq_chip_data(virq, qe_ic); -	irq_to_desc(virq)->status |= IRQ_LEVEL; +	irq_set_chip_data(virq, qe_ic); +	irq_set_status_flags(virq, IRQ_LEVEL); -	set_irq_chip_and_handler(virq, chip, handle_level_irq); +	irq_set_chip_and_handler(virq, chip, handle_level_irq);  	return 0;  } -static int qe_ic_host_xlate(struct irq_host *h, struct device_node *ct, -			    const u32 * intspec, unsigned int intsize, -			    irq_hw_number_t * out_hwirq, -			    unsigned int *out_flags) -{ -	*out_hwirq = intspec[0]; -	if (intsize > 1) -		*out_flags = intspec[1]; -	else -		*out_flags = IRQ_TYPE_NONE; -	return 0; -} - -static struct irq_host_ops qe_ic_host_ops = { +static struct irq_domain_ops qe_ic_host_ops = {  	.match = qe_ic_host_match,  	.map = qe_ic_host_map, -	.xlate = qe_ic_host_xlate, +	.xlate = irq_domain_xlate_onetwocell,  };  /* Return an interrupt vector or NO_IRQ if no interrupt is pending. */ @@ -337,16 +326,15 @@ void __init qe_ic_init(struct device_node *node, unsigned int flags,  	if (qe_ic == NULL)  		return; -	qe_ic->irqhost = irq_alloc_host(node, IRQ_HOST_MAP_LINEAR, -					NR_QE_IC_INTS, &qe_ic_host_ops, 0); +	qe_ic->irqhost = irq_domain_add_linear(node, NR_QE_IC_INTS, +					       &qe_ic_host_ops, qe_ic);  	if (qe_ic->irqhost == NULL) {  		kfree(qe_ic);  		return;  	} -	qe_ic->regs = ioremap(res.start, res.end - res.start + 1); +	qe_ic->regs = ioremap(res.start, resource_size(&res)); -	qe_ic->irqhost->host_data = qe_ic;  	qe_ic->hc_irq = qe_ic_irq_chip;  	qe_ic->virq_high = irq_of_parse_and_map(node, 0); @@ -381,13 +369,13 @@ void __init qe_ic_init(struct device_node *node, unsigned int flags,  	qe_ic_write(qe_ic->regs, QEIC_CICR, temp); -	set_irq_data(qe_ic->virq_low, qe_ic); -	set_irq_chained_handler(qe_ic->virq_low, low_handler); +	irq_set_handler_data(qe_ic->virq_low, qe_ic); +	irq_set_chained_handler(qe_ic->virq_low, low_handler);  	if (qe_ic->virq_high != NO_IRQ &&  			qe_ic->virq_high != qe_ic->virq_low) { -		set_irq_data(qe_ic->virq_high, qe_ic); -		set_irq_chained_handler(qe_ic->virq_high, high_handler); +		irq_set_handler_data(qe_ic->virq_high, qe_ic); +		irq_set_chained_handler(qe_ic->virq_high, high_handler);  	}  } @@ -481,13 +469,14 @@ int qe_ic_set_high_priority(unsigned int virq, unsigned int priority, int high)  	return 0;  } -static struct sysdev_class qe_ic_sysclass = { +static struct bus_type qe_ic_subsys = {  	.name = "qe_ic", +	.dev_name = "qe_ic",  }; -static struct sys_device device_qe_ic = { +static struct device device_qe_ic = {  	.id = 0, -	.cls = &qe_ic_sysclass, +	.bus = &qe_ic_subsys,  };  static int __init init_qe_ic_sysfs(void) @@ -496,12 +485,12 @@ static int __init init_qe_ic_sysfs(void)  	printk(KERN_DEBUG "Registering qe_ic with sysfs...\n"); -	rc = sysdev_class_register(&qe_ic_sysclass); +	rc = subsys_system_register(&qe_ic_subsys, NULL);  	if (rc) {  		printk(KERN_ERR "Failed registering qe_ic sys class\n");  		return -ENODEV;  	} -	rc = sysdev_register(&device_qe_ic); +	rc = device_register(&device_qe_ic);  	if (rc) {  		printk(KERN_ERR "Failed registering qe_ic sys device\n");  		return -ENODEV; diff --git a/arch/powerpc/sysdev/qe_lib/qe_ic.h b/arch/powerpc/sysdev/qe_lib/qe_ic.h index c1361d005a8..efef7ab9b75 100644 --- a/arch/powerpc/sysdev/qe_lib/qe_ic.h +++ b/arch/powerpc/sysdev/qe_lib/qe_ic.h @@ -3,7 +3,7 @@   *   * QUICC ENGINE Interrupt Controller Header   * - * Copyright (C) 2006 Freescale Semicondutor, Inc. All rights reserved. + * Copyright (C) 2006 Freescale Semiconductor, Inc. All rights reserved.   *   * Author: Li Yang <leoli@freescale.com>   * Based on code from Shlomi Gridish <gridish@freescale.com> @@ -79,7 +79,7 @@ struct qe_ic {  	volatile u32 __iomem *regs;  	/* The remapper for this QEIC */ -	struct irq_host *irqhost; +	struct irq_domain *irqhost;  	/* The "linux" controller struct */  	struct irq_chip hc_irq; diff --git a/arch/powerpc/sysdev/qe_lib/qe_io.c b/arch/powerpc/sysdev/qe_lib/qe_io.c index 77e4934b88c..d09994164da 100644 --- a/arch/powerpc/sysdev/qe_lib/qe_io.c +++ b/arch/powerpc/sysdev/qe_lib/qe_io.c @@ -3,7 +3,7 @@   *   * QE Parallel I/O ports configuration routines   * - * Copyright (C) Freescale Semicondutor, Inc. 2006. All rights reserved. + * Copyright 2006 Freescale Semiconductor, Inc. All rights reserved.   *   * Author: Li Yang <LeoLi@freescale.com>   * Based on code from Shlomi Gridish <gridish@freescale.com> @@ -16,7 +16,6 @@  #include <linux/stddef.h>  #include <linux/kernel.h> -#include <linux/init.h>  #include <linux/errno.h>  #include <linux/module.h>  #include <linux/ioport.h> @@ -41,7 +40,7 @@ int par_io_init(struct device_node *np)  	ret = of_address_to_resource(np, 0, &res);  	if (ret)  		return ret; -	par_io = ioremap(res.start, res.end - res.start + 1); +	par_io = ioremap(res.start, resource_size(&res));  	num_ports = of_get_property(np, "num-ports", NULL);  	if (num_ports) diff --git a/arch/powerpc/sysdev/qe_lib/ucc.c b/arch/powerpc/sysdev/qe_lib/ucc.c index fa589b21dbc..621575b7e84 100644 --- a/arch/powerpc/sysdev/qe_lib/ucc.c +++ b/arch/powerpc/sysdev/qe_lib/ucc.c @@ -3,7 +3,7 @@   *   * QE UCC API Set - UCC specific routines implementations.   * - * Copyright (C) 2006 Freescale Semicondutor, Inc. All rights reserved. + * Copyright (C) 2006 Freescale Semiconductor, Inc. All rights reserved.   *   * Authors: 	Shlomi Gridish <gridish@freescale.com>   * 		Li Yang <leoli@freescale.com> @@ -14,11 +14,10 @@   * option) any later version.   */  #include <linux/kernel.h> -#include <linux/init.h>  #include <linux/errno.h>  #include <linux/stddef.h>  #include <linux/spinlock.h> -#include <linux/module.h> +#include <linux/export.h>  #include <asm/irq.h>  #include <asm/io.h> diff --git a/arch/powerpc/sysdev/qe_lib/ucc_fast.c b/arch/powerpc/sysdev/qe_lib/ucc_fast.c index 25fbbfaa837..65aaf15032a 100644 --- a/arch/powerpc/sysdev/qe_lib/ucc_fast.c +++ b/arch/powerpc/sysdev/qe_lib/ucc_fast.c @@ -1,5 +1,5 @@  /* - * Copyright (C) 2006 Freescale Semicondutor, Inc. All rights reserved. + * Copyright (C) 2006 Freescale Semiconductor, Inc. All rights reserved.   *   * Authors: 	Shlomi Gridish <gridish@freescale.com>   * 		Li Yang <leoli@freescale.com> @@ -13,13 +13,12 @@   * option) any later version.   */  #include <linux/kernel.h> -#include <linux/init.h>  #include <linux/errno.h>  #include <linux/slab.h>  #include <linux/stddef.h>  #include <linux/interrupt.h>  #include <linux/err.h> -#include <linux/module.h> +#include <linux/export.h>  #include <asm/io.h>  #include <asm/immap_qe.h> diff --git a/arch/powerpc/sysdev/qe_lib/ucc_slow.c b/arch/powerpc/sysdev/qe_lib/ucc_slow.c index e1d6a134015..befaf1123f7 100644 --- a/arch/powerpc/sysdev/qe_lib/ucc_slow.c +++ b/arch/powerpc/sysdev/qe_lib/ucc_slow.c @@ -1,5 +1,5 @@  /* - * Copyright (C) 2006 Freescale Semicondutor, Inc. All rights reserved. + * Copyright (C) 2006 Freescale Semiconductor, Inc. All rights reserved.   *   * Authors: 	Shlomi Gridish <gridish@freescale.com>   * 		Li Yang <leoli@freescale.com> @@ -13,13 +13,12 @@   * option) any later version.   */  #include <linux/kernel.h> -#include <linux/init.h>  #include <linux/errno.h>  #include <linux/slab.h>  #include <linux/stddef.h>  #include <linux/interrupt.h>  #include <linux/err.h> -#include <linux/module.h> +#include <linux/export.h>  #include <asm/io.h>  #include <asm/immap_qe.h> diff --git a/arch/powerpc/sysdev/qe_lib/usb.c b/arch/powerpc/sysdev/qe_lib/usb.c index 8105462078e..27f23bd15eb 100644 --- a/arch/powerpc/sysdev/qe_lib/usb.c +++ b/arch/powerpc/sysdev/qe_lib/usb.c @@ -1,7 +1,7 @@  /*   * QE USB routines   * - * Copyright (c) Freescale Semicondutor, Inc. 2006. + * Copyright 2006 Freescale Semiconductor, Inc.   *               Shlomi Gridish <gridish@freescale.com>   *               Jerry Huang <Chang-Ming.Huang@freescale.com>   * Copyright (c) MontaVista Software, Inc. 2008. @@ -15,6 +15,7 @@  #include <linux/kernel.h>  #include <linux/errno.h> +#include <linux/export.h>  #include <linux/io.h>  #include <asm/immap_qe.h>  #include <asm/qe.h>  | 
