diff options
Diffstat (limited to 'arch/powerpc/platforms/85xx/mpc85xx_ds.c')
| -rw-r--r-- | arch/powerpc/platforms/85xx/mpc85xx_ds.c | 161 |
1 files changed, 74 insertions, 87 deletions
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c b/arch/powerpc/platforms/85xx/mpc85xx_ds.c index de66de7a9ca..ffdf02121a7 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c @@ -21,7 +21,6 @@ #include <linux/interrupt.h> #include <linux/of_platform.h> -#include <asm/system.h> #include <asm/time.h> #include <asm/machdep.h> #include <asm/pci-bridge.h> @@ -30,9 +29,13 @@ #include <asm/udbg.h> #include <asm/mpic.h> #include <asm/i8259.h> +#include <asm/swiotlb.h> #include <sysdev/fsl_soc.h> #include <sysdev/fsl_pci.h> +#include "smp.h" + +#include "mpc85xx.h" #undef DEBUG @@ -45,54 +48,40 @@ #ifdef CONFIG_PPC_I8259 static void mpc85xx_8259_cascade(unsigned int irq, struct irq_desc *desc) { + struct irq_chip *chip = irq_desc_get_chip(desc); unsigned int cascade_irq = i8259_irq(); if (cascade_irq != NO_IRQ) { generic_handle_irq(cascade_irq); } - desc->chip->eoi(irq); + chip->irq_eoi(&desc->irq_data); } #endif /* CONFIG_PPC_I8259 */ void __init mpc85xx_ds_pic_init(void) { struct mpic *mpic; - struct resource r; - struct device_node *np; #ifdef CONFIG_PPC_I8259 + struct device_node *np; struct device_node *cascade_node = NULL; int cascade_irq; #endif unsigned long root = of_get_flat_dt_root(); - np = of_find_node_by_type(NULL, "open-pic"); - if (np == NULL) { - printk(KERN_ERR "Could not find open-pic node\n"); - return; - } - - if (of_address_to_resource(np, 0, &r)) { - printk(KERN_ERR "Failed to map mpic register space\n"); - of_node_put(np); - return; - } - if (of_flat_dt_is_compatible(root, "fsl,MPC8572DS-CAMP")) { - mpic = mpic_alloc(np, r.start, - MPIC_PRIMARY | - MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS, + mpic = mpic_alloc(NULL, 0, + MPIC_NO_RESET | + MPIC_BIG_ENDIAN | + MPIC_SINGLE_DEST_CPU, 0, 256, " OpenPIC "); } else { - mpic = mpic_alloc(np, r.start, - MPIC_PRIMARY | MPIC_WANTS_RESET | - MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS | + mpic = mpic_alloc(NULL, 0, + MPIC_BIG_ENDIAN | MPIC_SINGLE_DEST_CPU, 0, 256, " OpenPIC "); } BUG_ON(mpic == NULL); - of_node_put(np); - mpic_init(mpic); #ifdef CONFIG_PPC_I8259 @@ -119,66 +108,58 @@ void __init mpc85xx_ds_pic_init(void) i8259_init(cascade_node, 0); of_node_put(cascade_node); - set_irq_chained_handler(cascade_irq, mpc85xx_8259_cascade); + irq_set_chained_handler(cascade_irq, mpc85xx_8259_cascade); #endif /* CONFIG_PPC_I8259 */ } #ifdef CONFIG_PCI -static int primary_phb_addr; extern int uli_exclude_device(struct pci_controller *hose, u_char bus, u_char devfn); +static struct device_node *pci_with_uli; + static int mpc85xx_exclude_device(struct pci_controller *hose, u_char bus, u_char devfn) { - struct device_node* node; - struct resource rsrc; - - node = hose->dn; - of_address_to_resource(node, 0, &rsrc); - - if ((rsrc.start & 0xfffff) == primary_phb_addr) { + if (hose->dn == pci_with_uli) return uli_exclude_device(hose, bus, devfn); - } return PCIBIOS_SUCCESSFUL; } #endif /* CONFIG_PCI */ -/* - * Setup the architecture - */ -#ifdef CONFIG_SMP -extern void __init mpc85xx_smp_init(void); -#endif -static void __init mpc85xx_ds_setup_arch(void) +static void __init mpc85xx_ds_uli_init(void) { #ifdef CONFIG_PCI - struct device_node *np; -#endif + struct device_node *node; - if (ppc_md.progress) - ppc_md.progress("mpc85xx_ds_setup_arch()", 0); + /* See if we have a ULI under the primary */ -#ifdef CONFIG_PCI - for_each_node_by_type(np, "pci") { - if (of_device_is_compatible(np, "fsl,mpc8540-pci") || - of_device_is_compatible(np, "fsl,mpc8548-pcie")) { - struct resource rsrc; - of_address_to_resource(np, 0, &rsrc); - if ((rsrc.start & 0xfffff) == primary_phb_addr) - fsl_add_bridge(np, 1); - else - fsl_add_bridge(np, 0); + node = of_find_node_by_name(NULL, "uli1575"); + while ((pci_with_uli = of_get_parent(node))) { + of_node_put(node); + node = pci_with_uli; + + if (pci_with_uli == fsl_pci_primary) { + ppc_md.pci_exclude_device = mpc85xx_exclude_device; + break; } } - - ppc_md.pci_exclude_device = mpc85xx_exclude_device; #endif +} + +/* + * Setup the architecture + */ +static void __init mpc85xx_ds_setup_arch(void) +{ + if (ppc_md.progress) + ppc_md.progress("mpc85xx_ds_setup_arch()", 0); -#ifdef CONFIG_SMP + swiotlb_detect_4g(); + fsl_pci_assign_primary(); + mpc85xx_ds_uli_init(); mpc85xx_smp_init(); -#endif printk("MPC85xx DS board from Freescale Semiconductor\n"); } @@ -190,46 +171,35 @@ static int __init mpc8544_ds_probe(void) { unsigned long root = of_get_flat_dt_root(); - if (of_flat_dt_is_compatible(root, "MPC8544DS")) { -#ifdef CONFIG_PCI - primary_phb_addr = 0xb000; -#endif - return 1; - } else { - return 0; - } + return !!of_flat_dt_is_compatible(root, "MPC8544DS"); } -static struct of_device_id __initdata mpc85xxds_ids[] = { - { .type = "soc", }, - { .compatible = "soc", }, - { .compatible = "simple-bus", }, - { .compatible = "gianfar", }, - {}, -}; +machine_arch_initcall(mpc8544_ds, mpc85xx_common_publish_devices); +machine_arch_initcall(mpc8572_ds, mpc85xx_common_publish_devices); +machine_arch_initcall(p2020_ds, mpc85xx_common_publish_devices); + +machine_arch_initcall(mpc8544_ds, swiotlb_setup_bus_notifier); +machine_arch_initcall(mpc8572_ds, swiotlb_setup_bus_notifier); +machine_arch_initcall(p2020_ds, swiotlb_setup_bus_notifier); -static int __init mpc85xxds_publish_devices(void) +/* + * Called very early, device-tree isn't unflattened + */ +static int __init mpc8572_ds_probe(void) { - return of_platform_bus_probe(NULL, mpc85xxds_ids, NULL); + unsigned long root = of_get_flat_dt_root(); + + return !!of_flat_dt_is_compatible(root, "fsl,MPC8572DS"); } -machine_device_initcall(mpc8544_ds, mpc85xxds_publish_devices); -machine_device_initcall(mpc8572_ds, mpc85xxds_publish_devices); /* * Called very early, device-tree isn't unflattened */ -static int __init mpc8572_ds_probe(void) +static int __init p2020_ds_probe(void) { unsigned long root = of_get_flat_dt_root(); - if (of_flat_dt_is_compatible(root, "fsl,MPC8572DS")) { -#ifdef CONFIG_PCI - primary_phb_addr = 0x8000; -#endif - return 1; - } else { - return 0; - } + return !!of_flat_dt_is_compatible(root, "fsl,P2020DS"); } define_machine(mpc8544_ds) { @@ -239,6 +209,7 @@ define_machine(mpc8544_ds) { .init_IRQ = mpc85xx_ds_pic_init, #ifdef CONFIG_PCI .pcibios_fixup_bus = fsl_pcibios_fixup_bus, + .pcibios_fixup_phb = fsl_pcibios_fixup_phb, #endif .get_irq = mpic_get_irq, .restart = fsl_rstcr_restart, @@ -253,6 +224,22 @@ define_machine(mpc8572_ds) { .init_IRQ = mpc85xx_ds_pic_init, #ifdef CONFIG_PCI .pcibios_fixup_bus = fsl_pcibios_fixup_bus, + .pcibios_fixup_phb = fsl_pcibios_fixup_phb, +#endif + .get_irq = mpic_get_irq, + .restart = fsl_rstcr_restart, + .calibrate_decr = generic_calibrate_decr, + .progress = udbg_progress, +}; + +define_machine(p2020_ds) { + .name = "P2020 DS", + .probe = p2020_ds_probe, + .setup_arch = mpc85xx_ds_setup_arch, + .init_IRQ = mpc85xx_ds_pic_init, +#ifdef CONFIG_PCI + .pcibios_fixup_bus = fsl_pcibios_fixup_bus, + .pcibios_fixup_phb = fsl_pcibios_fixup_phb, #endif .get_irq = mpic_get_irq, .restart = fsl_rstcr_restart, |