diff options
Diffstat (limited to 'arch/powerpc/boot/dts/lite5200b.dts')
| -rw-r--r-- | arch/powerpc/boot/dts/lite5200b.dts | 385 |
1 files changed, 99 insertions, 286 deletions
diff --git a/arch/powerpc/boot/dts/lite5200b.dts b/arch/powerpc/boot/dts/lite5200b.dts index 5185625a941..5abb46c5cc9 100644 --- a/arch/powerpc/boot/dts/lite5200b.dts +++ b/arch/powerpc/boot/dts/lite5200b.dts @@ -10,339 +10,152 @@ * option) any later version. */ -/* - * WARNING: Do not depend on this tree layout remaining static just yet. - * The MPC5200 device tree conventions are still in flux - * Keep an eye on the linuxppc-dev mailing list for more details - */ +/include/ "mpc5200b.dtsi" + +&gpt0 { fsl,has-wdt; }; +&gpt2 { gpio-controller; }; +&gpt3 { gpio-controller; }; / { model = "fsl,lite5200b"; - // revision = "1.0"; - compatible = "fsl,lite5200b\0generic-mpc5200"; - #address-cells = <1>; - #size-cells = <1>; - - cpus { - #address-cells = <1>; - #size-cells = <0>; + compatible = "fsl,lite5200b"; - PowerPC,5200@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <20>; - i-cache-line-size = <20>; - d-cache-size = <4000>; // L1, 16K - i-cache-size = <4000>; // L1, 16K - timebase-frequency = <0>; // from bootloader - bus-frequency = <0>; // from bootloader - clock-frequency = <0>; // from bootloader - 32-bit; + leds { + compatible = "gpio-leds"; + tmr2 { + gpios = <&gpt2 0 1>; }; + tmr3 { + gpios = <&gpt3 0 1>; + linux,default-trigger = "heartbeat"; + }; + led1 { gpios = <&gpio_wkup 2 1>; }; + led2 { gpios = <&gpio_simple 3 1>; }; + led3 { gpios = <&gpio_wkup 3 1>; }; + led4 { gpios = <&gpio_simple 2 1>; }; }; memory { - device_type = "memory"; - reg = <00000000 10000000>; // 256MB + reg = <0x00000000 0x10000000>; // 256MB }; soc5200@f0000000 { - model = "fsl,mpc5200b"; - compatible = "mpc5200"; - revision = ""; // from bootloader - #interrupt-cells = <3>; - device_type = "soc"; - ranges = <0 f0000000 f0010000>; - reg = <f0000000 00010000>; - bus-frequency = <0>; // from bootloader - system-frequency = <0>; // from bootloader - - cdm@200 { - compatible = "mpc5200b-cdm\0mpc5200-cdm"; - reg = <200 38>; - }; - - mpc5200_pic: pic@500 { - // 5200 interrupts are encoded into two levels; - interrupt-controller; - #interrupt-cells = <3>; - device_type = "interrupt-controller"; - compatible = "mpc5200b-pic\0mpc5200_pic"; - reg = <500 80>; - built-in; - }; - - gpt@600 { // General Purpose Timer - compatible = "mpc5200b-gpt\0mpc5200-gpt"; - device_type = "gpt"; + psc@2000 { // PSC1 + compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; cell-index = <0>; - reg = <600 10>; - interrupts = <1 9 0>; - interrupt-parent = <&mpc5200_pic>; - has-wdt; - }; - - gpt@610 { // General Purpose Timer - compatible = "mpc5200b-gpt\0mpc5200-gpt"; - device_type = "gpt"; - cell-index = <1>; - reg = <610 10>; - interrupts = <1 a 0>; - interrupt-parent = <&mpc5200_pic>; - }; - - gpt@620 { // General Purpose Timer - compatible = "mpc5200b-gpt\0mpc5200-gpt"; - device_type = "gpt"; - cell-index = <2>; - reg = <620 10>; - interrupts = <1 b 0>; - interrupt-parent = <&mpc5200_pic>; }; - gpt@630 { // General Purpose Timer - compatible = "mpc5200b-gpt\0mpc5200-gpt"; - device_type = "gpt"; - cell-index = <3>; - reg = <630 10>; - interrupts = <1 c 0>; - interrupt-parent = <&mpc5200_pic>; + psc@2200 { // PSC2 + status = "disabled"; }; - gpt@640 { // General Purpose Timer - compatible = "mpc5200b-gpt\0mpc5200-gpt"; - device_type = "gpt"; - cell-index = <4>; - reg = <640 10>; - interrupts = <1 d 0>; - interrupt-parent = <&mpc5200_pic>; + psc@2400 { // PSC3 + status = "disabled"; }; - gpt@650 { // General Purpose Timer - compatible = "mpc5200b-gpt\0mpc5200-gpt"; - device_type = "gpt"; - cell-index = <5>; - reg = <650 10>; - interrupts = <1 e 0>; - interrupt-parent = <&mpc5200_pic>; + psc@2600 { // PSC4 + status = "disabled"; }; - gpt@660 { // General Purpose Timer - compatible = "mpc5200b-gpt\0mpc5200-gpt"; - device_type = "gpt"; - cell-index = <6>; - reg = <660 10>; - interrupts = <1 f 0>; - interrupt-parent = <&mpc5200_pic>; + psc@2800 { // PSC5 + status = "disabled"; }; - gpt@670 { // General Purpose Timer - compatible = "mpc5200b-gpt\0mpc5200-gpt"; - device_type = "gpt"; - cell-index = <7>; - reg = <670 10>; - interrupts = <1 10 0>; - interrupt-parent = <&mpc5200_pic>; - }; - - rtc@800 { // Real time clock - compatible = "mpc5200b-rtc\0mpc5200-rtc"; - device_type = "rtc"; - reg = <800 100>; - interrupts = <1 5 0 1 6 0>; - interrupt-parent = <&mpc5200_pic>; - }; - - mscan@900 { - device_type = "mscan"; - compatible = "mpc5200b-mscan\0mpc5200-mscan"; - cell-index = <0>; - interrupts = <2 11 0>; - interrupt-parent = <&mpc5200_pic>; - reg = <900 80>; - }; - - mscan@980 { - device_type = "mscan"; - compatible = "mpc5200b-mscan\0mpc5200-mscan"; - cell-index = <1>; - interrupts = <2 12 0>; - interrupt-parent = <&mpc5200_pic>; - reg = <980 80>; - }; - - gpio@b00 { - compatible = "mpc5200b-gpio\0mpc5200-gpio"; - reg = <b00 40>; - interrupts = <1 7 0>; - interrupt-parent = <&mpc5200_pic>; - }; - - gpio-wkup@c00 { - compatible = "mpc5200b-gpio-wkup\0mpc5200-gpio-wkup"; - reg = <c00 40>; - interrupts = <1 8 0 0 3 0>; - interrupt-parent = <&mpc5200_pic>; - }; - - pci@0d00 { - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - compatible = "mpc5200b-pci\0mpc5200-pci"; - reg = <d00 100>; - interrupt-map-mask = <f800 0 0 7>; - interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot - c000 0 0 2 &mpc5200_pic 1 1 3 - c000 0 0 3 &mpc5200_pic 1 2 3 - c000 0 0 4 &mpc5200_pic 1 3 3 - - c800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot - c800 0 0 2 &mpc5200_pic 1 2 3 - c800 0 0 3 &mpc5200_pic 1 3 3 - c800 0 0 4 &mpc5200_pic 0 0 3>; - clock-frequency = <0>; // From boot loader - interrupts = <2 8 0 2 9 0 2 a 0>; - interrupt-parent = <&mpc5200_pic>; - bus-range = <0 0>; - ranges = <42000000 0 80000000 80000000 0 20000000 - 02000000 0 a0000000 a0000000 0 10000000 - 01000000 0 00000000 b0000000 0 01000000>; - }; - - spi@f00 { - device_type = "spi"; - compatible = "mpc5200b-spi\0mpc5200-spi"; - reg = <f00 20>; - interrupts = <2 d 0 2 e 0>; - interrupt-parent = <&mpc5200_pic>; - }; - - usb@1000 { - device_type = "usb-ohci-be"; - compatible = "mpc5200b-ohci\0mpc5200-ohci\0ohci-be"; - reg = <1000 ff>; - interrupts = <2 6 0>; - interrupt-parent = <&mpc5200_pic>; - }; - - bestcomm@1200 { - device_type = "dma-controller"; - compatible = "mpc5200b-bestcomm\0mpc5200-bestcomm"; - reg = <1200 80>; - interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 - 3 4 0 3 5 0 3 6 0 3 7 0 - 3 8 0 3 9 0 3 a 0 3 b 0 - 3 c 0 3 d 0 3 e 0 3 f 0>; - interrupt-parent = <&mpc5200_pic>; - }; - - xlb@1f00 { - compatible = "mpc5200b-xlb\0mpc5200-xlb"; - reg = <1f00 100>; - }; - - serial@2000 { // PSC1 - device_type = "serial"; - compatible = "mpc5200b-psc-uart\0mpc5200-psc-uart"; - port-number = <0>; // Logical port assignment - cell-index = <0>; - reg = <2000 100>; - interrupts = <2 1 0>; - interrupt-parent = <&mpc5200_pic>; + psc@2c00 { // PSC6 + status = "disabled"; }; // PSC2 in ac97 mode example //ac97@2200 { // PSC2 - // device_type = "sound"; - // compatible = "mpc5200b-psc-ac97\0mpc5200-psc-ac97"; + // compatible = "fsl,mpc5200b-psc-ac97","fsl,mpc5200-psc-ac97"; // cell-index = <1>; - // reg = <2200 100>; - // interrupts = <2 2 0>; - // interrupt-parent = <&mpc5200_pic>; //}; // PSC3 in CODEC mode example //i2s@2400 { // PSC3 - // device_type = "sound"; - // compatible = "mpc5200b-psc-i2s"; //not 5200 compatible + // compatible = "fsl,mpc5200b-psc-i2s"; //not 5200 compatible // cell-index = <2>; - // reg = <2400 100>; - // interrupts = <2 3 0>; - // interrupt-parent = <&mpc5200_pic>; - //}; - - // PSC4 in uart mode example - //serial@2600 { // PSC4 - // device_type = "serial"; - // compatible = "mpc5200b-psc-uart\0mpc5200-psc-uart"; - // cell-index = <3>; - // reg = <2600 100>; - // interrupts = <2 b 0>; - // interrupt-parent = <&mpc5200_pic>; - //}; - - // PSC5 in uart mode example - //serial@2800 { // PSC5 - // device_type = "serial"; - // compatible = "mpc5200b-psc-uart\0mpc5200-psc-uart"; - // cell-index = <4>; - // reg = <2800 100>; - // interrupts = <2 c 0>; - // interrupt-parent = <&mpc5200_pic>; //}; // PSC6 in spi mode example //spi@2c00 { // PSC6 - // device_type = "spi"; - // compatible = "mpc5200b-psc-spi\0mpc5200-psc-spi"; + // compatible = "fsl,mpc5200b-psc-spi","fsl,mpc5200-psc-spi"; // cell-index = <5>; - // reg = <2c00 100>; - // interrupts = <2 4 0>; - // interrupt-parent = <&mpc5200_pic>; //}; ethernet@3000 { - device_type = "network"; - compatible = "mpc5200b-fec\0mpc5200-fec"; - reg = <3000 800>; - mac-address = [ 02 03 04 05 06 07 ]; // Bad! - interrupts = <2 5 0>; - interrupt-parent = <&mpc5200_pic>; + phy-handle = <&phy0>; }; - ata@3a00 { - device_type = "ata"; - compatible = "mpc5200b-ata\0mpc5200-ata"; - reg = <3a00 100>; - interrupts = <2 7 0>; - interrupt-parent = <&mpc5200_pic>; - }; - - i2c@3d00 { - device_type = "i2c"; - compatible = "mpc5200b-i2c\0mpc5200-i2c\0fsl-i2c"; - cell-index = <0>; - reg = <3d00 40>; - interrupts = <2 f 0>; - interrupt-parent = <&mpc5200_pic>; - fsl5200-clocking; + mdio@3000 { + phy0: ethernet-phy@0 { + reg = <0>; + }; }; i2c@3d40 { - device_type = "i2c"; - compatible = "mpc5200b-i2c\0mpc5200-i2c\0fsl-i2c"; - cell-index = <1>; - reg = <3d40 40>; - interrupts = <2 10 0>; - interrupt-parent = <&mpc5200_pic>; - fsl5200-clocking; + eeprom@50 { + compatible = "atmel,24c02"; + reg = <0x50>; + }; }; + sram@8000 { - device_type = "sram"; - compatible = "mpc5200b-sram\0mpc5200-sram\0sram"; - reg = <8000 4000>; + compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram"; + reg = <0x8000 0x4000>; }; }; + + pci@f0000d00 { + interrupt-map-mask = <0xf800 0 0 7>; + interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot + 0xc000 0 0 2 &mpc5200_pic 1 1 3 + 0xc000 0 0 3 &mpc5200_pic 1 2 3 + 0xc000 0 0 4 &mpc5200_pic 1 3 3 + + 0xc800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot + 0xc800 0 0 2 &mpc5200_pic 1 2 3 + 0xc800 0 0 3 &mpc5200_pic 1 3 3 + 0xc800 0 0 4 &mpc5200_pic 0 0 3>; + clock-frequency = <0>; // From boot loader + interrupts = <2 8 0 2 9 0 2 10 0>; + bus-range = <0 0>; + ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000 + 0x02000000 0 0xa0000000 0xa0000000 0 0x10000000 + 0x01000000 0 0x00000000 0xb0000000 0 0x01000000>; + }; + + localbus { + ranges = <0 0 0xfe000000 0x02000000>; + + flash@0,0 { + compatible = "cfi-flash"; + reg = <0 0 0x02000000>; + bank-width = <1>; + #size-cells = <1>; + #address-cells = <1>; + + partition@0 { + label = "kernel"; + reg = <0x00000000 0x00200000>; + }; + partition@200000 { + label = "rootfs"; + reg = <0x00200000 0x01d00000>; + }; + partition@1f00000 { + label = "u-boot"; + reg = <0x01f00000 0x00060000>; + }; + partition@1f60000 { + label = "u-boot-env"; + reg = <0x01f60000 0x00020000>; + }; + partition@1f80000 { + label = "dtb"; + reg = <0x01f80000 0x00080000>; + }; + }; + }; + }; |