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-rw-r--r--arch/powerpc/boot/dts/cm5200.dts234
1 files changed, 27 insertions, 207 deletions
diff --git a/arch/powerpc/boot/dts/cm5200.dts b/arch/powerpc/boot/dts/cm5200.dts
index c6ca6319e4f..fb580dd84dd 100644
--- a/arch/powerpc/boot/dts/cm5200.dts
+++ b/arch/powerpc/boot/dts/cm5200.dts
@@ -10,256 +10,76 @@
* option) any later version.
*/
-/*
- * WARNING: Do not depend on this tree layout remaining static just yet.
- * The MPC5200 device tree conventions are still in flux
- * Keep an eye on the linuxppc-dev mailing list for more details
- */
+/include/ "mpc5200b.dtsi"
+
+&gpt0 { fsl,has-wdt; };
/ {
model = "schindler,cm5200";
compatible = "schindler,cm5200";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- PowerPC,5200@0 {
- device_type = "cpu";
- reg = <0>;
- d-cache-line-size = <20>;
- i-cache-line-size = <20>;
- d-cache-size = <4000>; // L1, 16K
- i-cache-size = <4000>; // L1, 16K
- timebase-frequency = <0>; // from bootloader
- bus-frequency = <0>; // from bootloader
- clock-frequency = <0>; // from bootloader
- };
- };
-
- memory {
- device_type = "memory";
- reg = <00000000 04000000>; // 64MB
- };
soc5200@f0000000 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "fsl,mpc5200b-immr";
- ranges = <0 f0000000 0000c000>;
- reg = <f0000000 00000100>;
- bus-frequency = <0>; // from bootloader
- system-frequency = <0>; // from bootloader
-
- cdm@200 {
- compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
- reg = <200 38>;
- };
-
- mpc5200_pic: pic@500 {
- // 5200 interrupts are encoded into two levels;
- interrupt-controller;
- #interrupt-cells = <3>;
- compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
- reg = <500 80>;
- };
-
- timer@600 { // General Purpose Timer
- compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
- reg = <600 10>;
- interrupts = <1 9 0>;
- interrupt-parent = <&mpc5200_pic>;
- fsl,has-wdt;
- };
-
- timer@610 { // General Purpose Timer
- compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
- reg = <610 10>;
- interrupts = <1 a 0>;
- interrupt-parent = <&mpc5200_pic>;
- };
-
- timer@620 { // General Purpose Timer
- compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
- reg = <620 10>;
- interrupts = <1 b 0>;
- interrupt-parent = <&mpc5200_pic>;
- };
-
- timer@630 { // General Purpose Timer
- compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
- reg = <630 10>;
- interrupts = <1 c 0>;
- interrupt-parent = <&mpc5200_pic>;
- };
-
- timer@640 { // General Purpose Timer
- compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
- reg = <640 10>;
- interrupts = <1 d 0>;
- interrupt-parent = <&mpc5200_pic>;
+ can@900 {
+ status = "disabled";
};
- timer@650 { // General Purpose Timer
- compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
- reg = <650 10>;
- interrupts = <1 e 0>;
- interrupt-parent = <&mpc5200_pic>;
+ can@980 {
+ status = "disabled";
};
- timer@660 { // General Purpose Timer
- compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
- reg = <660 10>;
- interrupts = <1 f 0>;
- interrupt-parent = <&mpc5200_pic>;
- };
-
- timer@670 { // General Purpose Timer
- compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
- reg = <670 10>;
- interrupts = <1 10 0>;
- interrupt-parent = <&mpc5200_pic>;
- };
-
- rtc@800 { // Real time clock
- compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
- reg = <800 100>;
- interrupts = <1 5 0 1 6 0>;
- interrupt-parent = <&mpc5200_pic>;
- };
-
- gpio@b00 {
- compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
- reg = <b00 40>;
- interrupts = <1 7 0>;
- interrupt-parent = <&mpc5200_pic>;
- };
-
- gpio@c00 {
- compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
- reg = <c00 40>;
- interrupts = <1 8 0 0 3 0>;
- interrupt-parent = <&mpc5200_pic>;
- };
-
- spi@f00 {
- compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
- reg = <f00 20>;
- interrupts = <2 d 0 2 e 0>;
- interrupt-parent = <&mpc5200_pic>;
- };
-
- usb@1000 {
- compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
- reg = <1000 ff>;
- interrupts = <2 6 0>;
- interrupt-parent = <&mpc5200_pic>;
- };
-
- dma-controller@1200 {
- compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
- reg = <1200 80>;
- interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
- 3 4 0 3 5 0 3 6 0 3 7 0
- 3 8 0 3 9 0 3 a 0 3 b 0
- 3 c 0 3 d 0 3 e 0 3 f 0>;
- interrupt-parent = <&mpc5200_pic>;
+ psc@2000 { // PSC1
+ compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
};
- xlb@1f00 {
- compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
- reg = <1f00 100>;
+ psc@2200 { // PSC2
+ compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
};
- serial@2000 { // PSC1
- device_type = "serial";
+ psc@2400 { // PSC3
compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
- port-number = <0>; // Logical port assignment
- reg = <2000 100>;
- interrupts = <2 1 0>;
- interrupt-parent = <&mpc5200_pic>;
};
- serial@2200 { // PSC2
- device_type = "serial";
- compatible = "fsl,mpc5200-psc-uart";
- port-number = <1>; // Logical port assignment
- reg = <2200 100>;
- interrupts = <2 2 0>;
- interrupt-parent = <&mpc5200_pic>;
+ psc@2600 { // PSC4
+ status = "disabled";
};
- serial@2400 { // PSC3
- device_type = "serial";
- compatible = "fsl,mpc5200-psc-uart";
- port-number = <2>; // Logical port assignment
- reg = <2400 100>;
- interrupts = <2 3 0>;
- interrupt-parent = <&mpc5200_pic>;
+ psc@2800 { // PSC5
+ status = "disabled";
};
- serial@2c00 { // PSC6
- device_type = "serial";
+ psc@2c00 { // PSC6
compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
- port-number = <5>; // Logical port assignment
- reg = <2c00 100>;
- interrupts = <2 4 0>;
- interrupt-parent = <&mpc5200_pic>;
};
ethernet@3000 {
- device_type = "network";
- compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
- reg = <3000 400>;
- local-mac-address = [ 00 00 00 00 00 00 ];
- interrupts = <2 5 0>;
- interrupt-parent = <&mpc5200_pic>;
phy-handle = <&phy0>;
};
mdio@3000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
- reg = <3000 400>; // fec range, since we need to setup fec interrupts
- interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
- interrupt-parent = <&mpc5200_pic>;
-
phy0: ethernet-phy@0 {
- device_type = "ethernet-phy";
reg = <0>;
};
};
- i2c@3d40 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
- reg = <3d40 40>;
- interrupts = <2 10 0>;
- interrupt-parent = <&mpc5200_pic>;
- fsl5200-clocking;
+ ata@3a00 {
+ status = "disabled";
};
- sram@8000 {
- compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
- reg = <8000 4000>;
+ i2c@3d00 {
+ status = "disabled";
};
+
};
- lpb {
- model = "fsl,lpb";
- compatible = "fsl,lpb";
- #address-cells = <2>;
- #size-cells = <1>;
- ranges = <0 0 fc000000 2000000>;
+ pci@f0000d00 {
+ status = "disabled";
+ };
+ localbus {
// 16-bit flash device at LocalPlus Bus CS0
flash@0,0 {
compatible = "cfi-flash";
- reg = <0 0 2000000>;
+ reg = <0 0 0x2000000>;
bank-width = <2>;
device-width = <2>;
#size-cells = <1>;
generated by cgit v1.2.3-70-g09d2 (git 2.46.0) at 2025-11-10 17:28:53 +0000