diff options
Diffstat (limited to 'arch/parisc/math-emu')
| -rw-r--r-- | arch/parisc/math-emu/Makefile | 2 | ||||
| -rw-r--r-- | arch/parisc/math-emu/cnv_float.h | 11 | ||||
| -rw-r--r-- | arch/parisc/math-emu/dbl_float.h | 4 | ||||
| -rw-r--r-- | arch/parisc/math-emu/decode_exc.c | 6 | ||||
| -rw-r--r-- | arch/parisc/math-emu/dfadd.c | 2 | ||||
| -rw-r--r-- | arch/parisc/math-emu/dfsqrt.c | 2 | ||||
| -rw-r--r-- | arch/parisc/math-emu/dfsub.c | 2 | ||||
| -rw-r--r-- | arch/parisc/math-emu/float.h | 1 | ||||
| -rw-r--r-- | arch/parisc/math-emu/fmpyfadd.c | 8 | ||||
| -rw-r--r-- | arch/parisc/math-emu/fpudispatch.c | 1 | ||||
| -rw-r--r-- | arch/parisc/math-emu/sfadd.c | 2 | ||||
| -rw-r--r-- | arch/parisc/math-emu/sfsqrt.c | 2 | ||||
| -rw-r--r-- | arch/parisc/math-emu/sfsub.c | 2 | ||||
| -rw-r--r-- | arch/parisc/math-emu/sgl_float.h | 4 |
14 files changed, 25 insertions, 24 deletions
diff --git a/arch/parisc/math-emu/Makefile b/arch/parisc/math-emu/Makefile index affd4c80e3b..0bd63b08a79 100644 --- a/arch/parisc/math-emu/Makefile +++ b/arch/parisc/math-emu/Makefile @@ -3,7 +3,7 @@ # # See arch/parisc/math-emu/README -CFLAGS += -Wno-parentheses -Wno-implicit-function-declaration \ +ccflags-y := -Wno-parentheses -Wno-implicit-function-declaration \ -Wno-uninitialized -Wno-strict-prototypes -Wno-return-type \ -Wno-implicit-int diff --git a/arch/parisc/math-emu/cnv_float.h b/arch/parisc/math-emu/cnv_float.h index 9071e093164..933423fa514 100644 --- a/arch/parisc/math-emu/cnv_float.h +++ b/arch/parisc/math-emu/cnv_float.h @@ -347,16 +347,15 @@ Sgl_isinexact_to_fix(sgl_value,exponent) #define Duint_from_sgl_mantissa(sgl_value,exponent,dresultA,dresultB) \ - {Sall(sgl_value) <<= SGL_EXP_LENGTH; /* left-justify */ \ + {unsigned int val = Sall(sgl_value) << SGL_EXP_LENGTH; \ if (exponent <= 31) { \ - Dintp1(dresultA) = 0; \ - Dintp2(dresultB) = (unsigned)Sall(sgl_value) >> (31 - exponent); \ + Dintp1(dresultA) = 0; \ + Dintp2(dresultB) = val >> (31 - exponent); \ } \ else { \ - Dintp1(dresultA) = Sall(sgl_value) >> (63 - exponent); \ - Dintp2(dresultB) = Sall(sgl_value) << (exponent - 31); \ + Dintp1(dresultA) = val >> (63 - exponent); \ + Dintp2(dresultB) = exponent <= 62 ? val << (exponent - 31) : 0; \ } \ - Sall(sgl_value) >>= SGL_EXP_LENGTH; /* return to original */ \ } #define Duint_setzero(dresultA,dresultB) \ diff --git a/arch/parisc/math-emu/dbl_float.h b/arch/parisc/math-emu/dbl_float.h index 1570e2e0a32..0c2fa9a951b 100644 --- a/arch/parisc/math-emu/dbl_float.h +++ b/arch/parisc/math-emu/dbl_float.h @@ -22,7 +22,7 @@ PA header file -- do not include this header file for non-PA builds. #endif -/* 32-bit word grabing functions */ +/* 32-bit word grabbing functions */ #define Dbl_firstword(value) Dallp1(value) #define Dbl_secondword(value) Dallp2(value) #define Dbl_thirdword(value) dummy_location @@ -37,7 +37,7 @@ #define Dbl_allp1(object) Dallp1(object) #define Dbl_allp2(object) Dallp2(object) -/* dbl_and_signs ands the sign bits of each argument and puts the result +/* dbl_and_signs ANDs the sign bits of each argument and puts the result * into the first argument. dbl_or_signs ors those same sign bits */ #define Dbl_and_signs( src1dst, src2) \ Dallp1(src1dst) = (Dallp1(src2)|~((unsigned int)1<<31)) & Dallp1(src1dst) diff --git a/arch/parisc/math-emu/decode_exc.c b/arch/parisc/math-emu/decode_exc.c index f84f2586672..04e550e76ae 100644 --- a/arch/parisc/math-emu/decode_exc.c +++ b/arch/parisc/math-emu/decode_exc.c @@ -40,7 +40,7 @@ * END_DESC */ - +#include <linux/kernel.h> #include "float.h" #include "sgl_float.h" #include "dbl_float.h" @@ -56,7 +56,7 @@ /* General definitions */ #define DOESTRAP 1 #define NOTRAP 0 -#define SIGNALCODE(signal, code) ((signal) << 24 | (code)); +#define SIGNALCODE(signal, code) ((signal) << 24 | (code)) #define copropbit 1<<31-2 /* bit position 2 */ #define opclass 9 /* bits 21 & 22 */ #define fmt 11 /* bits 19 & 20 */ @@ -337,10 +337,12 @@ decode_fpu(unsigned int Fpu_register[], unsigned int trap_counts[]) } break; case INVALIDEXCEPTION: + case OPC_2E_INVALIDEXCEPTION: update_trap_counts(Fpu_register, aflags, bflags, trap_counts); return SIGNALCODE(SIGFPE, FPE_FLTINV); case DIVISIONBYZEROEXCEPTION: update_trap_counts(Fpu_register, aflags, bflags, trap_counts); + Clear_excp_register(exception_index); return SIGNALCODE(SIGFPE, FPE_FLTDIV); case INEXACTEXCEPTION: update_trap_counts(Fpu_register, aflags, bflags, trap_counts); diff --git a/arch/parisc/math-emu/dfadd.c b/arch/parisc/math-emu/dfadd.c index e147d7d3b0f..d37e2d2cb6f 100644 --- a/arch/parisc/math-emu/dfadd.c +++ b/arch/parisc/math-emu/dfadd.c @@ -303,7 +303,7 @@ dbl_fadd( if(Dbl_iszero_hidden(resultp1)) { /* Handle normalization */ - /* A straight foward algorithm would now shift the result + /* A straight forward algorithm would now shift the result * and extension left until the hidden bit becomes one. Not * all of the extension bits need participate in the shift. * Only the two most significant bits (round and guard) are diff --git a/arch/parisc/math-emu/dfsqrt.c b/arch/parisc/math-emu/dfsqrt.c index b6ed1066f1e..9542c6d281a 100644 --- a/arch/parisc/math-emu/dfsqrt.c +++ b/arch/parisc/math-emu/dfsqrt.c @@ -76,7 +76,7 @@ dbl_fsqrt( } /* * Return quiet NaN or positive infinity. - * Fall thru to negative test if negative infinity. + * Fall through to negative test if negative infinity. */ if (Dbl_iszero_sign(srcp1) || Dbl_isnotzero_mantissa(srcp1,srcp2)) { diff --git a/arch/parisc/math-emu/dfsub.c b/arch/parisc/math-emu/dfsub.c index 87ebc60d465..2e8b5a79bff 100644 --- a/arch/parisc/math-emu/dfsub.c +++ b/arch/parisc/math-emu/dfsub.c @@ -306,7 +306,7 @@ dbl_fsub( if(Dbl_iszero_hidden(resultp1)) { /* Handle normalization */ - /* A straight foward algorithm would now shift the result + /* A straight forward algorithm would now shift the result * and extension left until the hidden bit becomes one. Not * all of the extension bits need participate in the shift. * Only the two most significant bits (round and guard) are diff --git a/arch/parisc/math-emu/float.h b/arch/parisc/math-emu/float.h index ce76f6dfa25..7a51f97e72e 100644 --- a/arch/parisc/math-emu/float.h +++ b/arch/parisc/math-emu/float.h @@ -484,7 +484,6 @@ typedef int VOID; * | |G|L|E|U|X| * +-------+-------+-------+-------+-------+-------+-------+-------+ */ -#define Allexception(object) (object) #define Greaterthanbit(object) Bitfield_extract( 27, 1,object) #define Lessthanbit(object) Bitfield_extract( 28, 1,object) #define Equalbit(object) Bitfield_extract( 29, 1,object) diff --git a/arch/parisc/math-emu/fmpyfadd.c b/arch/parisc/math-emu/fmpyfadd.c index 5dd7f93a89b..b067c45c872 100644 --- a/arch/parisc/math-emu/fmpyfadd.c +++ b/arch/parisc/math-emu/fmpyfadd.c @@ -531,7 +531,7 @@ dbl_fmpyfadd( sign_save = Dbl_signextendedsign(resultp1); if (Dbl_iszero_hidden(resultp1)) { /* Handle normalization */ - /* A straight foward algorithm would now shift the + /* A straightforward algorithm would now shift the * result and extension left until the hidden bit * becomes one. Not all of the extension bits need * participate in the shift. Only the two most @@ -1191,7 +1191,7 @@ unsigned int *status; sign_save = Dbl_signextendedsign(resultp1); if (Dbl_iszero_hidden(resultp1)) { /* Handle normalization */ - /* A straight foward algorithm would now shift the + /* A straightforward algorithm would now shift the * result and extension left until the hidden bit * becomes one. Not all of the extension bits need * participate in the shift. Only the two most @@ -1841,7 +1841,7 @@ unsigned int *status; sign_save = Sgl_signextendedsign(resultp1); if (Sgl_iszero_hidden(resultp1)) { /* Handle normalization */ - /* A straight foward algorithm would now shift the + /* A straightforward algorithm would now shift the * result and extension left until the hidden bit * becomes one. Not all of the extension bits need * participate in the shift. Only the two most @@ -2483,7 +2483,7 @@ unsigned int *status; sign_save = Sgl_signextendedsign(resultp1); if (Sgl_iszero_hidden(resultp1)) { /* Handle normalization */ - /* A straight foward algorithm would now shift the + /* A straightforward algorithm would now shift the * result and extension left until the hidden bit * becomes one. Not all of the extension bits need * participate in the shift. Only the two most diff --git a/arch/parisc/math-emu/fpudispatch.c b/arch/parisc/math-emu/fpudispatch.c index 6e28f9f4c62..673b73e8420 100644 --- a/arch/parisc/math-emu/fpudispatch.c +++ b/arch/parisc/math-emu/fpudispatch.c @@ -50,6 +50,7 @@ #define FPUDEBUG 0 #include "float.h" +#include <linux/bug.h> #include <linux/kernel.h> #include <asm/processor.h> /* #include <sys/debug.h> */ diff --git a/arch/parisc/math-emu/sfadd.c b/arch/parisc/math-emu/sfadd.c index 008d721b5d2..f802cd6c786 100644 --- a/arch/parisc/math-emu/sfadd.c +++ b/arch/parisc/math-emu/sfadd.c @@ -298,7 +298,7 @@ sgl_fadd( if(Sgl_iszero_hidden(result)) { /* Handle normalization */ - /* A straight foward algorithm would now shift the result + /* A straightforward algorithm would now shift the result * and extension left until the hidden bit becomes one. Not * all of the extension bits need participate in the shift. * Only the two most significant bits (round and guard) are diff --git a/arch/parisc/math-emu/sfsqrt.c b/arch/parisc/math-emu/sfsqrt.c index cd3f6db1f6f..4657a12c910 100644 --- a/arch/parisc/math-emu/sfsqrt.c +++ b/arch/parisc/math-emu/sfsqrt.c @@ -76,7 +76,7 @@ sgl_fsqrt( } /* * Return quiet NaN or positive infinity. - * Fall thru to negative test if negative infinity. + * Fall through to negative test if negative infinity. */ if (Sgl_iszero_sign(src) || Sgl_isnotzero_mantissa(src)) { *dstptr = src; diff --git a/arch/parisc/math-emu/sfsub.c b/arch/parisc/math-emu/sfsub.c index 24eef61c8e3..5f90d0f31a5 100644 --- a/arch/parisc/math-emu/sfsub.c +++ b/arch/parisc/math-emu/sfsub.c @@ -301,7 +301,7 @@ sgl_fsub( if(Sgl_iszero_hidden(result)) { /* Handle normalization */ - /* A straight foward algorithm would now shift the result + /* A straightforward algorithm would now shift the result * and extension left until the hidden bit becomes one. Not * all of the extension bits need participate in the shift. * Only the two most significant bits (round and guard) are diff --git a/arch/parisc/math-emu/sgl_float.h b/arch/parisc/math-emu/sgl_float.h index 82519a5c2ba..4ee4cc95e4b 100644 --- a/arch/parisc/math-emu/sgl_float.h +++ b/arch/parisc/math-emu/sgl_float.h @@ -23,7 +23,7 @@ PA header file -- do not include this header file for non-PA builds. #endif -/* 32-bit word grabing functions */ +/* 32-bit word grabbing functions */ #define Sgl_firstword(value) Sall(value) #define Sgl_secondword(value) dummy_location #define Sgl_thirdword(value) dummy_location @@ -36,7 +36,7 @@ #define Sgl_exponentmantissa(object) Sexponentmantissa(object) #define Sgl_all(object) Sall(object) -/* sgl_and_signs ands the sign bits of each argument and puts the result +/* sgl_and_signs ANDs the sign bits of each argument and puts the result * into the first argument. sgl_or_signs ors those same sign bits */ #define Sgl_and_signs( src1dst, src2) \ Sall(src1dst) = (Sall(src2)|~((unsigned int)1<<31)) & Sall(src1dst) |
