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-rw-r--r--arch/parisc/kernel/time.c292
1 files changed, 115 insertions, 177 deletions
diff --git a/arch/parisc/kernel/time.c b/arch/parisc/kernel/time.c
index bad7d1eb62b..70e105d6242 100644
--- a/arch/parisc/kernel/time.c
+++ b/arch/parisc/kernel/time.c
@@ -22,10 +22,14 @@
#include <linux/init.h>
#include <linux/smp.h>
#include <linux/profile.h>
+#include <linux/clocksource.h>
+#include <linux/platform_device.h>
+#include <linux/ftrace.h>
#include <asm/uaccess.h>
#include <asm/io.h>
#include <asm/irq.h>
+#include <asm/page.h>
#include <asm/param.h>
#include <asm/pdc.h>
#include <asm/led.h>
@@ -51,14 +55,14 @@ static unsigned long clocktick __read_mostly; /* timer cycles per tick */
* held off for an arbitrarily long period of time by interrupts being
* disabled, so we may miss one or more ticks.
*/
-irqreturn_t timer_interrupt(int irq, void *dev_id)
+irqreturn_t __irq_entry timer_interrupt(int irq, void *dev_id)
{
- unsigned long now;
+ unsigned long now, now2;
unsigned long next_tick;
- unsigned long cycles_elapsed, ticks_elapsed;
+ unsigned long cycles_elapsed, ticks_elapsed = 1;
unsigned long cycles_remainder;
unsigned int cpu = smp_processor_id();
- struct cpuinfo_parisc *cpuinfo = &cpu_data[cpu];
+ struct cpuinfo_parisc *cpuinfo = &per_cpu(cpu_data, cpu);
/* gcc can optimize for "read-only" case with a local clocktick */
unsigned long cpt = clocktick;
@@ -68,44 +72,24 @@ irqreturn_t timer_interrupt(int irq, void *dev_id)
/* Initialize next_tick to the expected tick time. */
next_tick = cpuinfo->it_value;
- /* Get current interval timer.
- * CR16 reads as 64 bits in CPU wide mode.
- * CR16 reads as 32 bits in CPU narrow mode.
- */
+ /* Get current cycle counter (Control Register 16). */
now = mfctl(16);
cycles_elapsed = now - next_tick;
- if ((cycles_elapsed >> 5) < cpt) {
+ if ((cycles_elapsed >> 6) < cpt) {
/* use "cheap" math (add/subtract) instead
* of the more expensive div/mul method
*/
cycles_remainder = cycles_elapsed;
- ticks_elapsed = 1;
while (cycles_remainder > cpt) {
cycles_remainder -= cpt;
ticks_elapsed++;
}
} else {
+ /* TODO: Reduce this to one fdiv op */
cycles_remainder = cycles_elapsed % cpt;
- ticks_elapsed = 1 + cycles_elapsed / cpt;
- }
-
- /* Can we differentiate between "early CR16" (aka Scenario 1) and
- * "long delay" (aka Scenario 3)? I don't think so.
- *
- * We expected timer_interrupt to be delivered at least a few hundred
- * cycles after the IT fires. But it's arbitrary how much time passes
- * before we call it "late". I've picked one second.
- */
- if (ticks_elapsed > HZ) {
- /* Scenario 3: very long delay? bad in any case */
- printk (KERN_CRIT "timer_interrupt(CPU %d): delayed!"
- " cycles %lX rem %lX "
- " next/now %lX/%lX\n",
- cpu,
- cycles_elapsed, cycles_remainder,
- next_tick, now );
+ ticks_elapsed += cycles_elapsed / cpt;
}
/* convert from "division remainder" to "remainder of clock tick" */
@@ -119,18 +103,56 @@ irqreturn_t timer_interrupt(int irq, void *dev_id)
cpuinfo->it_value = next_tick;
- /* Skip one clocktick on purpose if we are likely to miss next_tick.
- * We want to avoid the new next_tick being less than CR16.
- * If that happened, itimer wouldn't fire until CR16 wrapped.
- * We'll catch the tick we missed on the tick after that.
+ /* Program the IT when to deliver the next interrupt.
+ * Only bottom 32-bits of next_tick are writable in CR16!
*/
- if (!(cycles_remainder >> 13))
- next_tick += cpt;
-
- /* Program the IT when to deliver the next interrupt. */
- /* Only bottom 32-bits of next_tick are written to cr16. */
mtctl(next_tick, 16);
+ /* Skip one clocktick on purpose if we missed next_tick.
+ * The new CR16 must be "later" than current CR16 otherwise
+ * itimer would not fire until CR16 wrapped - e.g 4 seconds
+ * later on a 1Ghz processor. We'll account for the missed
+ * tick on the next timer interrupt.
+ *
+ * "next_tick - now" will always give the difference regardless
+ * if one or the other wrapped. If "now" is "bigger" we'll end up
+ * with a very large unsigned number.
+ */
+ now2 = mfctl(16);
+ if (next_tick - now2 > cpt)
+ mtctl(next_tick+cpt, 16);
+
+#if 1
+/*
+ * GGG: DEBUG code for how many cycles programming CR16 used.
+ */
+ if (unlikely(now2 - now > 0x3000)) /* 12K cycles */
+ printk (KERN_CRIT "timer_interrupt(CPU %d): SLOW! 0x%lx cycles!"
+ " cyc %lX rem %lX "
+ " next/now %lX/%lX\n",
+ cpu, now2 - now, cycles_elapsed, cycles_remainder,
+ next_tick, now );
+#endif
+
+ /* Can we differentiate between "early CR16" (aka Scenario 1) and
+ * "long delay" (aka Scenario 3)? I don't think so.
+ *
+ * Timer_interrupt will be delivered at least a few hundred cycles
+ * after the IT fires. But it's arbitrary how much time passes
+ * before we call it "late". I've picked one second.
+ *
+ * It's important NO printk's are between reading CR16 and
+ * setting up the next value. May introduce huge variance.
+ */
+ if (unlikely(ticks_elapsed > HZ)) {
+ /* Scenario 3: very long delay? bad in any case */
+ printk (KERN_CRIT "timer_interrupt(CPU %d): delayed!"
+ " cycles %lX rem %lX "
+ " next/now %lX/%lX\n",
+ cpu,
+ cycles_elapsed, cycles_remainder,
+ next_tick, now );
+ }
/* Done mucking with unreliable delivery of interrupts.
* Go do system house keeping.
@@ -141,15 +163,8 @@ irqreturn_t timer_interrupt(int irq, void *dev_id)
update_process_times(user_mode(get_irq_regs()));
}
- if (cpu == 0) {
- write_seqlock(&xtime_lock);
- do_timer(ticks_elapsed);
- write_sequnlock(&xtime_lock);
- }
-
- /* check soft power switch status */
- if (cpu == 0 && !atomic_read(&power_tasklet.count))
- tasklet_schedule(&power_tasklet);
+ if (cpu == 0)
+ xtime_update(ticks_elapsed);
return IRQ_HANDLED;
}
@@ -172,132 +187,39 @@ unsigned long profile_pc(struct pt_regs *regs)
EXPORT_SYMBOL(profile_pc);
-/*
- * Return the number of micro-seconds that elapsed since the last
- * update to wall time (aka xtime). The xtime_lock
- * must be at least read-locked when calling this routine.
- */
-static inline unsigned long gettimeoffset (void)
-{
-#ifndef CONFIG_SMP
- /*
- * FIXME: This won't work on smp because jiffies are updated by cpu 0.
- * Once parisc-linux learns the cr16 difference between processors,
- * this could be made to work.
- */
- unsigned long now;
- unsigned long prev_tick;
- unsigned long next_tick;
- unsigned long elapsed_cycles;
- unsigned long usec;
- unsigned long cpuid = smp_processor_id();
- unsigned long cpt = clocktick;
-
- next_tick = cpu_data[cpuid].it_value;
- now = mfctl(16); /* Read the hardware interval timer. */
-
- prev_tick = next_tick - cpt;
-
- /* Assume Scenario 1: "now" is later than prev_tick. */
- elapsed_cycles = now - prev_tick;
-
-/* aproximate HZ with shifts. Intended math is "(elapsed/clocktick) > HZ" */
-#if HZ == 1000
- if (elapsed_cycles > (cpt << 10) )
-#elif HZ == 250
- if (elapsed_cycles > (cpt << 8) )
-#elif HZ == 100
- if (elapsed_cycles > (cpt << 7) )
-#else
-#warn WTF is HZ set to anyway?
- if (elapsed_cycles > (HZ * cpt) )
-#endif
- {
- /* Scenario 3: clock ticks are missing. */
- printk (KERN_CRIT "gettimeoffset(CPU %ld): missing %ld ticks!"
- " cycles %lX prev/now/next %lX/%lX/%lX clock %lX\n",
- cpuid, elapsed_cycles / cpt,
- elapsed_cycles, prev_tick, now, next_tick, cpt);
- }
+/* clock source code */
- /* FIXME: Can we improve the precision? Not with PAGE0. */
- usec = (elapsed_cycles * 10000) / PAGE0->mem_10msec;
- return usec;
-#else
- return 0;
-#endif
-}
-
-void
-do_gettimeofday (struct timeval *tv)
+static cycle_t read_cr16(struct clocksource *cs)
{
- unsigned long flags, seq, usec, sec;
-
- /* Hold xtime_lock and adjust timeval. */
- do {
- seq = read_seqbegin_irqsave(&xtime_lock, flags);
- usec = gettimeoffset();
- sec = xtime.tv_sec;
- usec += (xtime.tv_nsec / 1000);
- } while (read_seqretry_irqrestore(&xtime_lock, seq, flags));
-
- /* Move adjusted usec's into sec's. */
- while (usec >= USEC_PER_SEC) {
- usec -= USEC_PER_SEC;
- ++sec;
- }
-
- /* Return adjusted result. */
- tv->tv_sec = sec;
- tv->tv_usec = usec;
+ return get_cycles();
}
-EXPORT_SYMBOL(do_gettimeofday);
+static struct clocksource clocksource_cr16 = {
+ .name = "cr16",
+ .rating = 300,
+ .read = read_cr16,
+ .mask = CLOCKSOURCE_MASK(BITS_PER_LONG),
+ .flags = CLOCK_SOURCE_IS_CONTINUOUS,
+};
-int
-do_settimeofday (struct timespec *tv)
+#ifdef CONFIG_SMP
+int update_cr16_clocksource(void)
{
- time_t wtm_sec, sec = tv->tv_sec;
- long wtm_nsec, nsec = tv->tv_nsec;
-
- if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC)
- return -EINVAL;
-
- write_seqlock_irq(&xtime_lock);
- {
- /*
- * This is revolting. We need to set "xtime"
- * correctly. However, the value in this location is
- * the value at the most recent update of wall time.
- * Discover what correction gettimeofday would have
- * done, and then undo it!
- */
- nsec -= gettimeoffset() * 1000;
-
- wtm_sec = wall_to_monotonic.tv_sec + (xtime.tv_sec - sec);
- wtm_nsec = wall_to_monotonic.tv_nsec + (xtime.tv_nsec - nsec);
-
- set_normalized_timespec(&xtime, sec, nsec);
- set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec);
-
- ntp_clear();
+ /* since the cr16 cycle counters are not synchronized across CPUs,
+ we'll check if we should switch to a safe clocksource: */
+ if (clocksource_cr16.rating != 0 && num_online_cpus() > 1) {
+ clocksource_change_rating(&clocksource_cr16, 0);
+ return 1;
}
- write_sequnlock_irq(&xtime_lock);
- clock_was_set();
+
return 0;
}
-EXPORT_SYMBOL(do_settimeofday);
-
-/*
- * XXX: We can do better than this.
- * Returns nanoseconds
- */
-
-unsigned long long sched_clock(void)
+#else
+int update_cr16_clocksource(void)
{
- return (unsigned long long)jiffies * (1000000000 / HZ);
+ return 0; /* no change */
}
-
+#endif /*CONFIG_SMP*/
void __init start_cpu_itimer(void)
{
@@ -306,30 +228,46 @@ void __init start_cpu_itimer(void)
mtctl(next_tick, 16); /* kick off Interval Timer (CR16) */
- cpu_data[cpu].it_value = next_tick;
+ per_cpu(cpu_data, cpu).it_value = next_tick;
}
-void __init time_init(void)
-{
- static struct pdc_tod tod_data;
+static struct platform_device rtc_generic_dev = {
+ .name = "rtc-generic",
+ .id = -1,
+};
- clocktick = (100 * PAGE0->mem_10msec) / HZ;
+static int __init rtc_init(void)
+{
+ if (platform_device_register(&rtc_generic_dev) < 0)
+ printk(KERN_ERR "unable to register rtc device...\n");
- start_cpu_itimer(); /* get CPU 0 started */
+ /* not necessarily an error */
+ return 0;
+}
+module_init(rtc_init);
+void read_persistent_clock(struct timespec *ts)
+{
+ static struct pdc_tod tod_data;
if (pdc_tod_read(&tod_data) == 0) {
- unsigned long flags;
-
- write_seqlock_irqsave(&xtime_lock, flags);
- xtime.tv_sec = tod_data.tod_sec;
- xtime.tv_nsec = tod_data.tod_usec * 1000;
- set_normalized_timespec(&wall_to_monotonic,
- -xtime.tv_sec, -xtime.tv_nsec);
- write_sequnlock_irqrestore(&xtime_lock, flags);
+ ts->tv_sec = tod_data.tod_sec;
+ ts->tv_nsec = tod_data.tod_usec * 1000;
} else {
printk(KERN_ERR "Error reading tod clock\n");
- xtime.tv_sec = 0;
- xtime.tv_nsec = 0;
+ ts->tv_sec = 0;
+ ts->tv_nsec = 0;
}
}
+void __init time_init(void)
+{
+ unsigned long current_cr16_khz;
+
+ clocktick = (100 * PAGE0->mem_10msec) / HZ;
+
+ start_cpu_itimer(); /* get CPU 0 started */
+
+ /* register at clocksource framework */
+ current_cr16_khz = PAGE0->mem_10msec/10; /* kHz */
+ clocksource_register_khz(&clocksource_cr16, current_cr16_khz);
+}