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-rw-r--r--arch/parisc/kernel/head.S128
1 files changed, 51 insertions, 77 deletions
diff --git a/arch/parisc/kernel/head.S b/arch/parisc/kernel/head.S
index ddf7e914f15..d4dc588c0dc 100644
--- a/arch/parisc/kernel/head.S
+++ b/arch/parisc/kernel/head.S
@@ -2,7 +2,7 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1999 by Helge Deller
+ * Copyright (C) 1999-2007 by Helge Deller <deller@gmx.de>
* Copyright 1999 SuSE GmbH (Philipp Rumpf)
* Copyright 1999 Philipp Rumpf (prumpf@tux.org)
* Copyright 2000 Hewlett Packard (Paul Bame, bame@puffin.external.hp.com)
@@ -12,38 +12,36 @@
* Initial Version 04-23-1999 by Helge Deller <deller@gmx.de>
*/
-#include <linux/autoconf.h> /* for CONFIG_SMP */
-
-#include <asm/offsets.h>
+#include <asm/asm-offsets.h>
#include <asm/psw.h>
#include <asm/pdc.h>
#include <asm/assembly.h>
#include <asm/pgtable.h>
- .level LEVEL
+#include <linux/linkage.h>
+#include <linux/init.h>
- .data
+ .level LEVEL
- .export boot_args
-boot_args:
+ __INITDATA
+ENTRY(boot_args)
.word 0 /* arg0 */
.word 0 /* arg1 */
.word 0 /* arg2 */
.word 0 /* arg3 */
+END(boot_args)
+
+ __HEAD
- .text
.align 4
.import init_thread_union,data
.import fault_vector_20,code /* IVA parisc 2.0 32 bit */
-#ifndef __LP64__
+#ifndef CONFIG_64BIT
.import fault_vector_11,code /* IVA parisc 1.1 32 bit */
.import $global$ /* forward declaration */
-#endif /*!LP64*/
- .export stext
- .export _stext,data /* Kernel want it this way! */
-_stext:
-stext:
+#endif /*!CONFIG_64BIT*/
+ENTRY(parisc_kernel_start)
.proc
.callinfo
@@ -76,16 +74,16 @@ $bss_loop:
mtctl %r4,%cr24 /* Initialize kernel root pointer */
mtctl %r4,%cr25 /* Initialize user root pointer */
-#ifdef __LP64__
+#if PT_NLEVELS == 3
/* Set pmd in pgd */
load32 PA(pmd0),%r5
shrd %r5,PxD_VALUE_SHIFT,%r3
- ldo (PxD_FLAG_PRESENT+PxD_FLAG_VALID)(%r3),%r3
+ ldo (PxD_FLAG_PRESENT+PxD_FLAG_VALID)(%r3),%r3
stw %r3,ASM_PGD_ENTRY*ASM_PGD_ENTRY_SIZE(%r4)
ldo ASM_PMD_ENTRY*ASM_PMD_ENTRY_SIZE(%r5),%r4
#else
/* 2-level page table, so pmd == pgd */
- ldo ASM_PGD_ENTRY*ASM_PGD_ENTRY_SIZE(%r4),%r4
+ ldo ASM_PGD_ENTRY*ASM_PGD_ENTRY_SIZE(%r4),%r4
#endif
/* Fill in pmd with enough pte directories */
@@ -97,30 +95,32 @@ $bss_loop:
1:
stw %r3,0(%r4)
- ldo (ASM_PAGE_SIZE >> PxD_VALUE_SHIFT)(%r3),%r3
+ ldo (PAGE_SIZE >> PxD_VALUE_SHIFT)(%r3),%r3
addib,> -1,%r1,1b
-#ifdef __LP64__
+#if PT_NLEVELS == 3
ldo ASM_PMD_ENTRY_SIZE(%r4),%r4
#else
ldo ASM_PGD_ENTRY_SIZE(%r4),%r4
#endif
- /* Now initialize the PTEs themselves */
- ldo _PAGE_KERNEL(%r0),%r3 /* Hardwired 0 phys addr start */
+ /* Now initialize the PTEs themselves. We use RWX for
+ * everything ... it will get remapped correctly later */
+ ldo 0+_PAGE_KERNEL_RWX(%r0),%r3 /* Hardwired 0 phys addr start */
+ ldi (1<<(KERNEL_INITIAL_ORDER-PAGE_SHIFT)),%r11 /* PFN count */
load32 PA(pg0),%r1
$pgt_fill_loop:
STREGM %r3,ASM_PTE_ENTRY_SIZE(%r1)
- ldo ASM_PAGE_SIZE(%r3),%r3
- bb,>= %r3,31-KERNEL_INITIAL_ORDER,$pgt_fill_loop
+ ldo (1<<PFN_PTE_SHIFT)(%r3),%r3 /* add one PFN */
+ addib,> -1,%r11,$pgt_fill_loop
nop
/* Load the return address...er...crash 'n burn */
copy %r0,%r2
/* And the RFI Target address too */
- load32 start_kernel,%r11
+ load32 start_parisc,%r11
/* And the initial task pointer */
load32 init_thread_union,%r6
@@ -129,12 +129,8 @@ $pgt_fill_loop:
/* And the stack pointer too */
ldo THREAD_SZ_ALGN(%r6),%sp
- /* And the interrupt stack */
- load32 interrupt_stack,%r6
- mtctl %r6,%cr31
-
#ifdef CONFIG_SMP
- /* Set the smp rendevous address into page zero.
+ /* Set the smp rendezvous address into page zero.
** It would be safer to do this in init_smp_config() but
** it's just way easier to deal with here because
** of 64-bit function ptrs and the address is local to this file.
@@ -170,7 +166,7 @@ common_stext:
stw %r0,0x28(%r0) /* MEM_RENDEZ_HI */
#endif /*CONFIG_SMP*/
-#ifdef __LP64__
+#ifdef CONFIG_64BIT
tophys_r1 %sp
/* Save the rfi target address */
@@ -197,6 +193,8 @@ common_stext:
ldw MEM_PDC_HI(%r0),%r6
depd %r6, 31, 32, %r3 /* move to upper word */
+ mfctl %cr30,%r6 /* PCX-W2 firmware bug */
+
ldo PDC_PSW(%r0),%arg0 /* 21 */
ldo PDC_PSW_SET_DEFAULTS(%r0),%arg1 /* 2 */
ldo PDC_PSW_WIDE_BIT(%r0),%arg2 /* 2 */
@@ -205,6 +203,8 @@ common_stext:
copy %r0,%arg3
stext_pdc_ret:
+ mtctl %r6,%cr30 /* restore task thread info */
+
/* restore rfi target address*/
ldd TI_TASK-THREAD_SZ_ALGN(%sp), %r10
tophys_r1 %r10
@@ -224,8 +224,6 @@ stext_pdc_ret:
mtctl %r0,%cr12
mtctl %r0,%cr13
- /* Prepare to RFI! Man all the cannons! */
-
/* Initialize the global data pointer */
loadgp
@@ -235,7 +233,7 @@ stext_pdc_ret:
* following short sequence of instructions can determine this
* (without being illegal on a PA1.1 machine).
*/
-#ifndef __LP64__
+#ifndef CONFIG_64BIT
ldi 32,%r10
mtctl %r10,%cr11
.level 2.0
@@ -248,52 +246,22 @@ stext_pdc_ret:
$is_pa20:
.level LEVEL /* restore 1.1 || 2.0w */
-#endif /*!LP64*/
+#endif /*!CONFIG_64BIT*/
load32 PA(fault_vector_20),%r10
$install_iva:
mtctl %r10,%cr14
-#ifdef __LP64__
- b aligned_rfi
+ b aligned_rfi /* Prepare to RFI! Man all the cannons! */
nop
- .align 256
+ .align 128
aligned_rfi:
- ssm 0,0
- nop /* 1 */
- nop /* 2 */
- nop /* 3 */
- nop /* 4 */
- nop /* 5 */
- nop /* 6 */
- nop /* 7 */
- nop /* 8 */
-#endif
+ pcxt_ssm_bug
-#ifdef __LP64__ /* move to psw.h? */
-#define PSW_BITS PSW_Q+PSW_I+PSW_D+PSW_P+PSW_R
-#else
-#define PSW_BITS PSW_SM_Q
-#endif
+ rsm PSW_SM_QUIET,%r0 /* off troublesome PSW bits */
+ /* Don't need NOPs, have 8 compliant insn before rfi */
-$rfi:
- /* turn off troublesome PSW bits */
- rsm PSW_BITS,%r0
-
- /* kernel PSW:
- * - no interruptions except HPMC and TOC (which are handled by PDC)
- * - Q bit set (IODC / PDC interruptions)
- * - big-endian
- * - virtually mapped
- */
- load32 KERNEL_PSW,%r10
- mtctl %r10,%ipsw
-
- /* Set the space pointers for the post-RFI world
- ** Clear the two-level IIA Space Queue, effectively setting
- ** Kernel space.
- */
mtctl %r0,%cr17 /* Clear IIASQ tail */
mtctl %r0,%cr17 /* Clear IIASQ head */
@@ -301,8 +269,11 @@ $rfi:
mtctl %r11,%cr18 /* IIAOQ head */
ldo 4(%r11),%r11
mtctl %r11,%cr18 /* IIAOQ tail */
+
+ load32 KERNEL_PSW,%r10
+ mtctl %r10,%ipsw
- /* Jump to hyperspace */
+ /* Jump through hyperspace to Virt Mode */
rfi
nop
@@ -313,7 +284,7 @@ $rfi:
.import smp_init_current_idle_task,data
.import smp_callin,code
-#ifndef __LP64__
+#ifndef CONFIG_64BIT
smp_callin_rtn:
.proc
.callinfo
@@ -321,7 +292,7 @@ smp_callin_rtn:
nop
nop
.procend
-#endif /*!LP64*/
+#endif /*!CONFIG_64BIT*/
/***************************************************************************
* smp_slave_stext is executed by all non-monarch Processors when the Monarch
@@ -356,7 +327,7 @@ smp_slave_stext:
mtctl %r4,%cr24 /* Initialize kernel root pointer */
mtctl %r4,%cr25 /* Initialize user root pointer */
-#ifdef __LP64__
+#ifdef CONFIG_64BIT
/* Setup PDCE_PROC entry */
copy %arg0,%r3
#else
@@ -373,8 +344,11 @@ smp_slave_stext:
.procend
#endif /* CONFIG_SMP */
-#ifndef __LP64__
- .data
+
+ENDPROC(parisc_kernel_start)
+
+#ifndef CONFIG_64BIT
+ .section .data..read_mostly
.align 4
.export $global$,data
@@ -383,4 +357,4 @@ smp_slave_stext:
.size $global$,4
$global$:
.word 0
-#endif /*!LP64*/
+#endif /*!CONFIG_64BIT*/
generated by cgit v1.2.3-70-g09d2 (git 2.46.0) at 2025-12-14 07:22:35 +0000