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Diffstat (limited to 'arch/openrisc/kernel/head.S')
-rw-r--r--arch/openrisc/kernel/head.S30
1 files changed, 22 insertions, 8 deletions
diff --git a/arch/openrisc/kernel/head.S b/arch/openrisc/kernel/head.S
index c75018d2264..1d3c9c28ac2 100644
--- a/arch/openrisc/kernel/head.S
+++ b/arch/openrisc/kernel/head.S
@@ -19,6 +19,7 @@
#include <linux/threads.h>
#include <linux/errno.h>
#include <linux/init.h>
+#include <linux/serial_reg.h>
#include <asm/processor.h>
#include <asm/page.h>
#include <asm/mmu.h>
@@ -26,6 +27,7 @@
#include <asm/cache.h>
#include <asm/spr_defs.h>
#include <asm/asm-offsets.h>
+#include <linux/of_fdt.h>
#define tophys(rd,rs) \
l.movhi rd,hi(-KERNELBASE) ;\
@@ -290,9 +292,9 @@
/* Jump to .init code at _start which lives in the .head section
* and will be discarded after boot.
*/
- LOAD_SYMBOL_2_GPR(r4, _start)
- tophys (r3,r4) /* MMU disabled */
- l.jr r3
+ LOAD_SYMBOL_2_GPR(r15, _start)
+ tophys (r13,r15) /* MMU disabled */
+ l.jr r13
l.nop
/* ---[ 0x200: BUS exception ]------------------------------------------- */
@@ -440,6 +442,9 @@ _dispatch_do_ipage_fault:
__HEAD
.global _start
_start:
+ /* save kernel parameters */
+ l.or r25,r0,r3 /* pointer to fdt */
+
/*
* ensure a deterministic start
*/
@@ -471,7 +476,6 @@ _start:
CLEAR_GPR(r22)
CLEAR_GPR(r23)
CLEAR_GPR(r24)
- CLEAR_GPR(r25)
CLEAR_GPR(r26)
CLEAR_GPR(r27)
CLEAR_GPR(r28)
@@ -565,6 +569,18 @@ enable_mmu:
// reset the simulation counters
l.nop 5
+ /* check fdt header magic word */
+ l.lwz r3,0(r25) /* load magic from fdt into r3 */
+ l.movhi r4,hi(OF_DT_HEADER)
+ l.ori r4,r4,lo(OF_DT_HEADER)
+ l.sfeq r3,r4
+ l.bf _fdt_found
+ l.nop
+ /* magic number mismatch, set fdt pointer to null */
+ l.or r25,r0,r0
+_fdt_found:
+ /* pass fdt pointer to or32_early_setup in r3 */
+ l.or r3,r0,r25
LOAD_SYMBOL_2_GPR(r24, or32_early_setup)
l.jalr r24
l.nop
@@ -1054,8 +1070,7 @@ d_pte_not_present:
EXCEPTION_LOAD_GPR4
EXCEPTION_LOAD_GPR5
EXCEPTION_LOAD_GPR6
- l.j _dispatch_do_dpage_fault
- l.nop
+ EXCEPTION_HANDLE(_dtlb_miss_page_fault_handler)
/* ==============================================[ ITLB miss handler ]=== */
ENTRY(itlb_miss_handler)
@@ -1177,8 +1192,7 @@ i_pte_not_present:
EXCEPTION_LOAD_GPR4
EXCEPTION_LOAD_GPR5
EXCEPTION_LOAD_GPR6
- l.j _dispatch_do_ipage_fault
- l.nop
+ EXCEPTION_HANDLE(_itlb_miss_page_fault_handler)
/* ==============================================[ boot tlb handlers ]=== */