diff options
Diffstat (limited to 'arch/mn10300/kernel/irq.c')
| -rw-r--r-- | arch/mn10300/kernel/irq.c | 67 |
1 files changed, 11 insertions, 56 deletions
diff --git a/arch/mn10300/kernel/irq.c b/arch/mn10300/kernel/irq.c index 86af0d7d077..6ab3b73efcf 100644 --- a/arch/mn10300/kernel/irq.c +++ b/arch/mn10300/kernel/irq.c @@ -87,7 +87,7 @@ static void mn10300_cpupic_mask_ack(struct irq_data *d) tmp2 = GxICR(irq); irq_affinity_online[irq] = - any_online_cpu(*d->affinity); + cpumask_any_and(d->affinity, cpu_online_mask); CROSS_GxICR(irq, irq_affinity_online[irq]) = (tmp & (GxICR_LEVEL | GxICR_ENABLE)) | GxICR_DETECT; tmp = CROSS_GxICR(irq, irq_affinity_online[irq]); @@ -124,7 +124,8 @@ static void mn10300_cpupic_unmask_clear(struct irq_data *d) } else { tmp = GxICR(irq); - irq_affinity_online[irq] = any_online_cpu(*d->affinity); + irq_affinity_online[irq] = cpumask_any_and(d->affinity, + cpu_online_mask); CROSS_GxICR(irq, irq_affinity_online[irq]) = (tmp & GxICR_LEVEL) | GxICR_ENABLE | GxICR_DETECT; tmp = CROSS_GxICR(irq, irq_affinity_online[irq]); } @@ -141,57 +142,11 @@ mn10300_cpupic_setaffinity(struct irq_data *d, const struct cpumask *mask, bool force) { unsigned long flags; - int err; flags = arch_local_cli_save(); - - /* check irq no */ - switch (d->irq) { - case TMJCIRQ: - case RESCHEDULE_IPI: - case CALL_FUNC_SINGLE_IPI: - case LOCAL_TIMER_IPI: - case FLUSH_CACHE_IPI: - case CALL_FUNCTION_NMI_IPI: - case DEBUGGER_NMI_IPI: -#ifdef CONFIG_MN10300_TTYSM0 - case SC0RXIRQ: - case SC0TXIRQ: -#ifdef CONFIG_MN10300_TTYSM0_TIMER8 - case TM8IRQ: -#elif CONFIG_MN10300_TTYSM0_TIMER2 - case TM2IRQ: -#endif /* CONFIG_MN10300_TTYSM0_TIMER8 */ -#endif /* CONFIG_MN10300_TTYSM0 */ - -#ifdef CONFIG_MN10300_TTYSM1 - case SC1RXIRQ: - case SC1TXIRQ: -#ifdef CONFIG_MN10300_TTYSM1_TIMER12 - case TM12IRQ: -#elif CONFIG_MN10300_TTYSM1_TIMER9 - case TM9IRQ: -#elif CONFIG_MN10300_TTYSM1_TIMER3 - case TM3IRQ: -#endif /* CONFIG_MN10300_TTYSM1_TIMER12 */ -#endif /* CONFIG_MN10300_TTYSM1 */ - -#ifdef CONFIG_MN10300_TTYSM2 - case SC2RXIRQ: - case SC2TXIRQ: - case TM10IRQ: -#endif /* CONFIG_MN10300_TTYSM2 */ - err = -1; - break; - - default: - set_bit(d->irq, irq_affinity_request); - err = 0; - break; - } - + set_bit(d->irq, irq_affinity_request); arch_local_irq_restore(flags); - return err; + return 0; } #endif /* CONFIG_SMP */ @@ -259,7 +214,6 @@ void set_intr_level(int irq, u16 level) /* * mark an interrupt to be ACK'd after interrupt handlers have been run rather * than before - * - see Documentation/mn10300/features.txt */ void mn10300_set_lateack_irq_type(int irq) { @@ -366,11 +320,11 @@ void migrate_irqs(void) if (irqd_is_per_cpu(data)) continue; - if (cpu_isset(self, data->affinity) && - !cpus_intersects(irq_affinity[irq], cpu_online_map)) { + if (cpumask_test_cpu(self, &data->affinity) && + !cpumask_intersects(&irq_affinity[irq], cpu_online_mask)) { int cpu_id; - cpu_id = first_cpu(cpu_online_map); - cpu_set(cpu_id, data->affinity); + cpu_id = cpumask_first(cpu_online_mask); + cpumask_set_cpu(cpu_id, &data->affinity); } /* We need to operate irq_affinity_online atomically. */ arch_local_cli_save(flags); @@ -381,7 +335,8 @@ void migrate_irqs(void) GxICR(irq) = x & GxICR_LEVEL; tmp = GxICR(irq); - new = any_online_cpu(data->affinity); + new = cpumask_any_and(&data->affinity, + cpu_online_mask); irq_affinity_online[irq] = new; CROSS_GxICR(irq, new) = |
