diff options
Diffstat (limited to 'arch/mips/pci/pci-ip27.c')
| -rw-r--r-- | arch/mips/pci/pci-ip27.c | 20 | 
1 files changed, 11 insertions, 9 deletions
diff --git a/arch/mips/pci/pci-ip27.c b/arch/mips/pci/pci-ip27.c index a0e726eb039..0f09eafa5e3 100644 --- a/arch/mips/pci/pci-ip27.c +++ b/arch/mips/pci/pci-ip27.c @@ -7,8 +7,8 @@   * Copyright (C) 1999, 2000, 04 Ralf Baechle (ralf@linux-mips.org)   * Copyright (C) 1999, 2000 Silicon Graphics, Inc.   */ -#include <linux/init.h>  #include <linux/kernel.h> +#include <linux/export.h>  #include <linux/pci.h>  #include <linux/smp.h>  #include <asm/sn/arch.h> @@ -29,7 +29,7 @@  /*   * XXX: No kmalloc available when we do our crosstalk scan, - * 	we should try to move it later in the boot process. + *	we should try to move it later in the boot process.   */  static struct bridge_controller bridges[MAX_PCI_BUSSES]; @@ -41,7 +41,7 @@ int irq_to_slot[MAX_PCI_BUSSES * MAX_DEVICES_PER_PCIBUS];  extern struct pci_ops bridge_pci_ops; -int __cpuinit bridge_probe(nasid_t nasid, int widget_id, int masterwid) +int bridge_probe(nasid_t nasid, int widget_id, int masterwid)  {  	unsigned long offset = NODE_OFFSET(nasid);  	struct bridge_controller *bc; @@ -49,7 +49,7 @@ int __cpuinit bridge_probe(nasid_t nasid, int widget_id, int masterwid)  	bridge_t *bridge;  	int slot; -	pci_probe_only = 1; +	pci_set_flags(PCI_PROBE_ONLY);  	printk("a bridge\n"); @@ -102,7 +102,7 @@ int __cpuinit bridge_probe(nasid_t nasid, int widget_id, int masterwid)  	 * swap pio's to pci mem and io space (big windows)  	 */  	bridge->b_wid_control |= BRIDGE_CTRL_IO_SWAP | -	                         BRIDGE_CTRL_MEM_SWAP; +				 BRIDGE_CTRL_MEM_SWAP;  #ifdef CONFIG_PAGE_SIZE_4KB  	bridge->b_wid_control &= ~BRIDGE_CTRL_PAGE_SIZE;  #else /* 16kB or larger */ @@ -122,7 +122,7 @@ int __cpuinit bridge_probe(nasid_t nasid, int widget_id, int masterwid)  		bridge->b_device[slot].reg |= BRIDGE_DEV_SWAP_DIR;  		bc->pci_int[slot] = -1;  	} -	bridge->b_wid_tflush;     /* wait until Bridge PIO complete */ +	bridge->b_wid_tflush;	  /* wait until Bridge PIO complete */  	bc->base = bridge; @@ -142,7 +142,7 @@ int __cpuinit bridge_probe(nasid_t nasid, int widget_id, int masterwid)   * A given PCI device, in general, should be able to intr any of the cpus   * on any one of the hubs connected to its xbow.   */ -int __devinit pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) +int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)  {  	return 0;  } @@ -183,7 +183,7 @@ int pcibios_plat_dev_init(struct pci_dev *dev)  }  /* - * Device might live on a subordinate PCI bus.  XXX Walk up the chain of buses + * Device might live on a subordinate PCI bus.	XXX Walk up the chain of buses   * to find the slot number in sense of the bridge device register.   * XXX This also means multiple devices might rely on conflicting bridge   * settings. @@ -211,11 +211,12 @@ static inline void pci_enable_swapping(struct pci_dev *dev)  	bridge->b_widget.w_tflush;	/* Flush */  } -static void __init pci_fixup_ioc3(struct pci_dev *d) +static void pci_fixup_ioc3(struct pci_dev *d)  {  	pci_disable_swapping(d);  } +#ifdef CONFIG_NUMA  int pcibus_to_node(struct pci_bus *bus)  {  	struct bridge_controller *bc = BRIDGE_CONTROLLER(bus); @@ -223,6 +224,7 @@ int pcibus_to_node(struct pci_bus *bus)  	return bc->nasid;  }  EXPORT_SYMBOL(pcibus_to_node); +#endif /* CONFIG_NUMA */  DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_IOC3,  	pci_fixup_ioc3);  | 
