diff options
Diffstat (limited to 'arch/mips/pci/pci-bcm1480.c')
| -rw-r--r-- | arch/mips/pci/pci-bcm1480.c | 53 |
1 files changed, 28 insertions, 25 deletions
diff --git a/arch/mips/pci/pci-bcm1480.c b/arch/mips/pci/pci-bcm1480.c index f194b4e4f86..5ec2a7bae02 100644 --- a/arch/mips/pci/pci-bcm1480.c +++ b/arch/mips/pci/pci-bcm1480.c @@ -32,7 +32,6 @@ * * XXX: AT THIS TIME, ONLY the NATIVE PCI-X INTERFACE IS SUPPORTED. */ -#include <linux/config.h> #include <linux/types.h> #include <linux/pci.h> #include <linux/kernel.h> @@ -40,6 +39,7 @@ #include <linux/mm.h> #include <linux/console.h> #include <linux/tty.h> +#include <linux/vt.h> #include <asm/sibyte/bcm1480_regs.h> #include <asm/sibyte/bcm1480_scd.h> @@ -50,15 +50,15 @@ * Macros for calculating offsets into config space given a device * structure or dev/fun/reg */ -#define CFGOFFSET(bus,devfn,where) (((bus)<<16)+((devfn)<<8)+(where)) -#define CFGADDR(bus,devfn,where) CFGOFFSET((bus)->number,(devfn),where) +#define CFGOFFSET(bus, devfn, where) (((bus)<<16)+((devfn)<<8)+(where)) +#define CFGADDR(bus, devfn, where) CFGOFFSET((bus)->number, (devfn), where) static void *cfg_space; -#define PCI_BUS_ENABLED 1 -#define PCI_DEVICE_MODE 2 +#define PCI_BUS_ENABLED 1 +#define PCI_DEVICE_MODE 2 -static int bcm1480_bus_status = 0; +static int bcm1480_bus_status; #define PCI_BRIDGE_DEVICE 0 @@ -75,9 +75,12 @@ static inline void WRITECFG32(u32 addr, u32 data) *(u32 *)(cfg_space + (addr & ~3)) = data; } -int pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { - return dev->irq; + if (pin == 0) + return -1; + + return K_BCM1480_INT_PCI_INTA - 1 + pin; } /* Do platform specific device initialization at pci_enable_device() time */ @@ -100,7 +103,7 @@ static int bcm1480_pci_can_access(struct pci_bus *bus, int devfn) if (bus->number == 0) { devno = PCI_SLOT(devfn); - if (bcm1480_bus_status & PCI_DEVICE_MODE) + if (bcm1480_bus_status & PCI_DEVICE_MODE) return 0; else return 1; @@ -176,15 +179,15 @@ struct pci_ops bcm1480_pci_ops = { static struct resource bcm1480_mem_resource = { .name = "BCM1480 PCI MEM", - .start = 0x30000000UL, - .end = 0x3fffffffUL, + .start = A_BCM1480_PHYS_PCI_MEM_MATCH_BYTES, + .end = A_BCM1480_PHYS_PCI_MEM_MATCH_BYTES + 0xfffffffUL, .flags = IORESOURCE_MEM, }; static struct resource bcm1480_io_resource = { .name = "BCM1480 PCI I/O", - .start = 0x2c000000UL, - .end = 0x2dffffffUL, + .start = A_BCM1480_PHYS_PCI_IO_MATCH_BYTES, + .end = A_BCM1480_PHYS_PCI_IO_MATCH_BYTES + 0x1ffffffUL, .flags = IORESOURCE_IO, }; @@ -192,6 +195,7 @@ struct pci_controller bcm1480_controller = { .pci_ops = &bcm1480_pci_ops, .mem_resource = &bcm1480_mem_resource, .io_resource = &bcm1480_io_resource, + .io_offset = A_BCM1480_PHYS_PCI_IO_MATCH_BYTES, }; @@ -199,16 +203,15 @@ static int __init bcm1480_pcibios_init(void) { uint32_t cmdreg; uint64_t reg; - extern int pci_probe_only; /* CFE will assign PCI resources */ - pci_probe_only = 1; + pci_set_flags(PCI_PROBE_ONLY); /* Avoid ISA compat ranges. */ PCIBIOS_MIN_IO = 0x00008000UL; PCIBIOS_MIN_MEM = 0x01000000UL; - /* Set I/O resource limits. - unlimited for now to accomodate HT */ + /* Set I/O resource limits. - unlimited for now to accommodate HT */ ioport_resource.end = 0xffffffffUL; iomem_resource.end = 0xffffffffUL; @@ -217,7 +220,7 @@ static int __init bcm1480_pcibios_init(void) /* * See if the PCI bus has been configured by the firmware. */ - reg = *((volatile uint64_t *) IOADDR(A_SCD_SYSTEM_CFG)); + reg = __raw_readq(IOADDR(A_SCD_SYSTEM_CFG)); if (!(reg & M_BCM1480_SYS_PCI_HOST)) { bcm1480_bus_status |= PCI_DEVICE_MODE; } else { @@ -225,7 +228,7 @@ static int __init bcm1480_pcibios_init(void) PCI_COMMAND)); if (!(cmdreg & PCI_COMMAND_MASTER)) { printk - ("PCI: Skipping PCI probe. Bus is not initialized.\n"); + ("PCI: Skipping PCI probe. Bus is not initialized.\n"); iounmap(cfg_space); return 1; /* XXX */ } @@ -234,11 +237,9 @@ static int __init bcm1480_pcibios_init(void) /* turn on ExpMemEn */ cmdreg = READCFG32(CFGOFFSET(0, PCI_DEVFN(PCI_BRIDGE_DEVICE, 0), 0x40)); - printk("PCIFeatureCtrl = %x\n", cmdreg); WRITECFG32(CFGOFFSET(0, PCI_DEVFN(PCI_BRIDGE_DEVICE, 0), 0x40), cmdreg | 0x10); cmdreg = READCFG32(CFGOFFSET(0, PCI_DEVFN(PCI_BRIDGE_DEVICE, 0), 0x40)); - printk("PCIFeatureCtrl = %x\n", cmdreg); /* * Establish mappings in KSEG2 (kernel virtual) to PCI I/O @@ -249,15 +250,17 @@ static int __init bcm1480_pcibios_init(void) * XXX ehs: Should this happen in PCI Device mode? */ - set_io_port_base((unsigned long) - ioremap(A_BCM1480_PHYS_PCI_IO_MATCH_BYTES, 65536)); - isa_slot_offset = (unsigned long) - ioremap(A_BCM1480_PHYS_PCI_MEM_MATCH_BYTES, 1024*1024); + bcm1480_controller.io_map_base = (unsigned long) + ioremap(A_BCM1480_PHYS_PCI_IO_MATCH_BYTES, 65536); + bcm1480_controller.io_map_base -= bcm1480_controller.io_offset; + set_io_port_base(bcm1480_controller.io_map_base); register_pci_controller(&bcm1480_controller); #ifdef CONFIG_VGA_CONSOLE - take_over_console(&vga_con,0,MAX_NR_CONSOLES-1,1); + console_lock(); + do_take_over_console(&vga_con, 0, MAX_NR_CONSOLES-1, 1); + console_unlock(); #endif return 0; } |