diff options
Diffstat (limited to 'arch/mips/include/uapi/asm')
| -rw-r--r-- | arch/mips/include/uapi/asm/Kbuild | 1 | ||||
| -rw-r--r-- | arch/mips/include/uapi/asm/bitfield.h | 29 | ||||
| -rw-r--r-- | arch/mips/include/uapi/asm/errno.h | 2 | ||||
| -rw-r--r-- | arch/mips/include/uapi/asm/inst.h | 465 | ||||
| -rw-r--r-- | arch/mips/include/uapi/asm/kvm.h | 35 | ||||
| -rw-r--r-- | arch/mips/include/uapi/asm/kvm_para.h | 6 | ||||
| -rw-r--r-- | arch/mips/include/uapi/asm/siginfo.h | 9 | ||||
| -rw-r--r-- | arch/mips/include/uapi/asm/socket.h | 4 | ||||
| -rw-r--r-- | arch/mips/include/uapi/asm/types.h | 5 | ||||
| -rw-r--r-- | arch/mips/include/uapi/asm/unistd.h | 21 | 
10 files changed, 349 insertions, 228 deletions
diff --git a/arch/mips/include/uapi/asm/Kbuild b/arch/mips/include/uapi/asm/Kbuild index be7196eacb8..96fe7395ed8 100644 --- a/arch/mips/include/uapi/asm/Kbuild +++ b/arch/mips/include/uapi/asm/Kbuild @@ -4,6 +4,7 @@ include include/uapi/asm-generic/Kbuild.asm  generic-y += auxvec.h  generic-y += ipcbuf.h +header-y += bitfield.h  header-y += bitsperlong.h  header-y += break.h  header-y += byteorder.h diff --git a/arch/mips/include/uapi/asm/bitfield.h b/arch/mips/include/uapi/asm/bitfield.h new file mode 100644 index 00000000000..ad9861359ce --- /dev/null +++ b/arch/mips/include/uapi/asm/bitfield.h @@ -0,0 +1,29 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License.  See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2014 by Ralf Baechle <ralf@linux-mips.org> + */ +#ifndef __UAPI_ASM_BITFIELD_H +#define __UAPI_ASM_BITFIELD_H + +/* + *  * Damn ...  bitfields depend from byteorder :-( + *   */ +#ifdef __MIPSEB__ +#define __BITFIELD_FIELD(field, more)					\ +	field;								\ +	more + +#elif defined(__MIPSEL__) + +#define __BITFIELD_FIELD(field, more)					\ +	more								\ +	field; + +#else /* !defined (__MIPSEB__) && !defined (__MIPSEL__) */ +#error "MIPS but neither __MIPSEL__ nor __MIPSEB__?" +#endif + +#endif /* __UAPI_ASM_BITFIELD_H */ diff --git a/arch/mips/include/uapi/asm/errno.h b/arch/mips/include/uapi/asm/errno.h index 31575e2fd1b..02d645d7aa9 100644 --- a/arch/mips/include/uapi/asm/errno.h +++ b/arch/mips/include/uapi/asm/errno.h @@ -102,7 +102,7 @@  #define EWOULDBLOCK	EAGAIN	/* Operation would block */  #define EALREADY	149	/* Operation already in progress */  #define EINPROGRESS	150	/* Operation now in progress */ -#define ESTALE		151	/* Stale NFS file handle */ +#define ESTALE		151	/* Stale file handle */  #define ECANCELED	158	/* AIO operation canceled */  /* diff --git a/arch/mips/include/uapi/asm/inst.h b/arch/mips/include/uapi/asm/inst.h index e5a676e3d3c..4bfdb9d4c18 100644 --- a/arch/mips/include/uapi/asm/inst.h +++ b/arch/mips/include/uapi/asm/inst.h @@ -8,10 +8,13 @@   * Copyright (C) 1996, 2000 by Ralf Baechle   * Copyright (C) 2006 by Thiemo Seufer   * Copyright (C) 2012 MIPS Technologies, Inc.  All rights reserved. + * Copyright (C) 2014 Imagination Technologies Ltd.   */  #ifndef _UAPI_ASM_INST_H  #define _UAPI_ASM_INST_H +#include <asm/bitfield.h> +  /*   * Major opcodes; before MIPS IV cop1x was called cop3.   */ @@ -73,10 +76,17 @@ enum spec2_op {  enum spec3_op {  	ext_op, dextm_op, dextu_op, dext_op,  	ins_op, dinsm_op, dinsu_op, dins_op, -	lx_op = 0x0a, -	bshfl_op = 0x20, -	dbshfl_op = 0x24, -	rdhwr_op = 0x3b +	yield_op  = 0x09, lx_op     = 0x0a, +	lwle_op   = 0x19, lwre_op   = 0x1a, +	cachee_op = 0x1b, sbe_op    = 0x1c, +	she_op    = 0x1d, sce_op    = 0x1e, +	swe_op    = 0x1f, bshfl_op  = 0x20, +	swle_op   = 0x21, swre_op   = 0x22, +	prefe_op  = 0x23, dbshfl_op = 0x24, +	lbue_op   = 0x28, lhue_op   = 0x29, +	lbe_op    = 0x2c, lhe_op    = 0x2d, +	lle_op    = 0x2e, lwe_op    = 0x2f, +	rdhwr_op  = 0x3b  };  /* @@ -98,8 +108,9 @@ enum rt_op {   */  enum cop_op {  	mfc_op	      = 0x00, dmfc_op	    = 0x01, -	cfc_op	      = 0x02, mtc_op	    = 0x04, -	dmtc_op	      = 0x05, ctc_op	    = 0x06, +	cfc_op	      = 0x02, mfhc_op	    = 0x03, +	mtc_op        = 0x04, dmtc_op	    = 0x05, +	ctc_op	      = 0x06, mthc_op	    = 0x07,  	bc_op	      = 0x08, cop_op	    = 0x10,  	copm_op	      = 0x18  }; @@ -117,7 +128,8 @@ enum bcop_op {  enum cop0_coi_func {  	tlbr_op	      = 0x01, tlbwi_op	    = 0x02,  	tlbwr_op      = 0x06, tlbp_op	    = 0x08, -	rfe_op	      = 0x10, eret_op	    = 0x18 +	rfe_op	      = 0x10, eret_op	    = 0x18, +	wait_op       = 0x20,  };  /* @@ -162,8 +174,8 @@ enum cop1_sdw_func {   */  enum cop1x_func {  	lwxc1_op     =	0x00, ldxc1_op	   =  0x01, -	pfetch_op    =	0x07, swxc1_op	   =  0x08, -	sdxc1_op     =	0x09, madd_s_op	   =  0x20, +	swxc1_op     =  0x08, sdxc1_op	   =  0x09, +	pfetch_op    =	0x0f, madd_s_op	   =  0x20,  	madd_d_op    =	0x21, madd_e_op	   =  0x22,  	msub_s_op    =	0x28, msub_d_op	   =  0x29,  	msub_e_op    =	0x2a, nmadd_s_op   =  0x30, @@ -194,6 +206,16 @@ enum lx_func {  };  /* + * BSHFL opcodes + */ +enum bshfl_func { +	wsbh_op = 0x2, +	dshd_op = 0x5, +	seb_op  = 0x10, +	seh_op  = 0x18, +}; + +/*   * (microMIPS) Major opcodes.   */  enum mm_major_op { @@ -236,17 +258,23 @@ enum mm_32i_minor_op {  enum mm_32a_minor_op {  	mm_sll32_op = 0x000,  	mm_ins_op = 0x00c, +	mm_sllv32_op = 0x010,  	mm_ext_op = 0x02c,  	mm_pool32axf_op = 0x03c,  	mm_srl32_op = 0x040,  	mm_sra_op = 0x080, +	mm_srlv32_op = 0x090,  	mm_rotr_op = 0x0c0,  	mm_lwxs_op = 0x118,  	mm_addu32_op = 0x150,  	mm_subu32_op = 0x1d0, +	mm_wsbh_op = 0x1ec, +	mm_mul_op = 0x210,  	mm_and_op = 0x250,  	mm_or32_op = 0x290,  	mm_xor32_op = 0x310, +	mm_slt_op = 0x350, +	mm_sltu_op = 0x390,  };  /* @@ -286,15 +314,20 @@ enum mm_32axf_minor_op {  	mm_mfc0_op = 0x003,  	mm_mtc0_op = 0x00b,  	mm_tlbp_op = 0x00d, +	mm_mfhi32_op = 0x035,  	mm_jalr_op = 0x03c,  	mm_tlbr_op = 0x04d, +	mm_mflo32_op = 0x075,  	mm_jalrhb_op = 0x07c,  	mm_tlbwi_op = 0x08d,  	mm_tlbwr_op = 0x0cd,  	mm_jalrs_op = 0x13c,  	mm_jalrshb_op = 0x17c, +	mm_sync_op = 0x1ad,  	mm_syscall_op = 0x22d, +	mm_wait_op = 0x24d,  	mm_eret_op = 0x3cd, +	mm_divu_op = 0x5dc,  };  /* @@ -397,8 +430,10 @@ enum mm_32f_73_minor_op {  	mm_movt1_op = 0xa5,  	mm_ftruncw_op = 0xac,  	mm_fneg1_op = 0xad, +	mm_mfhc1_op = 0xc0,  	mm_froundl_op = 0xcc,  	mm_fcvtd1_op = 0xcd, +	mm_mthc1_op = 0xe0,  	mm_froundw_op = 0xec,  	mm_fcvts1_op = 0xed,  }; @@ -470,125 +505,116 @@ enum MIPS6e_i8_func {   */  #define MM_NOP16	0x0c00 -/* - * Damn ...  bitfields depend from byteorder :-( - */ -#ifdef __MIPSEB__ -#define BITFIELD_FIELD(field, more)					\ -	field;								\ -	more - -#elif defined(__MIPSEL__) - -#define BITFIELD_FIELD(field, more)					\ -	more								\ -	field; - -#else /* !defined (__MIPSEB__) && !defined (__MIPSEL__) */ -#error "MIPS but neither __MIPSEL__ nor __MIPSEB__?" -#endif -  struct j_format { -	BITFIELD_FIELD(unsigned int opcode : 6, /* Jump format */ -	BITFIELD_FIELD(unsigned int target : 26, +	__BITFIELD_FIELD(unsigned int opcode : 6, /* Jump format */ +	__BITFIELD_FIELD(unsigned int target : 26,  	;))  };  struct i_format {			/* signed immediate format */ -	BITFIELD_FIELD(unsigned int opcode : 6, -	BITFIELD_FIELD(unsigned int rs : 5, -	BITFIELD_FIELD(unsigned int rt : 5, -	BITFIELD_FIELD(signed int simmediate : 16, +	__BITFIELD_FIELD(unsigned int opcode : 6, +	__BITFIELD_FIELD(unsigned int rs : 5, +	__BITFIELD_FIELD(unsigned int rt : 5, +	__BITFIELD_FIELD(signed int simmediate : 16,  	;))))  };  struct u_format {			/* unsigned immediate format */ -	BITFIELD_FIELD(unsigned int opcode : 6, -	BITFIELD_FIELD(unsigned int rs : 5, -	BITFIELD_FIELD(unsigned int rt : 5, -	BITFIELD_FIELD(unsigned int uimmediate : 16, +	__BITFIELD_FIELD(unsigned int opcode : 6, +	__BITFIELD_FIELD(unsigned int rs : 5, +	__BITFIELD_FIELD(unsigned int rt : 5, +	__BITFIELD_FIELD(unsigned int uimmediate : 16,  	;))))  };  struct c_format {			/* Cache (>= R6000) format */ -	BITFIELD_FIELD(unsigned int opcode : 6, -	BITFIELD_FIELD(unsigned int rs : 5, -	BITFIELD_FIELD(unsigned int c_op : 3, -	BITFIELD_FIELD(unsigned int cache : 2, -	BITFIELD_FIELD(unsigned int simmediate : 16, +	__BITFIELD_FIELD(unsigned int opcode : 6, +	__BITFIELD_FIELD(unsigned int rs : 5, +	__BITFIELD_FIELD(unsigned int c_op : 3, +	__BITFIELD_FIELD(unsigned int cache : 2, +	__BITFIELD_FIELD(unsigned int simmediate : 16,  	;)))))  };  struct r_format {			/* Register format */ -	BITFIELD_FIELD(unsigned int opcode : 6, -	BITFIELD_FIELD(unsigned int rs : 5, -	BITFIELD_FIELD(unsigned int rt : 5, -	BITFIELD_FIELD(unsigned int rd : 5, -	BITFIELD_FIELD(unsigned int re : 5, -	BITFIELD_FIELD(unsigned int func : 6, +	__BITFIELD_FIELD(unsigned int opcode : 6, +	__BITFIELD_FIELD(unsigned int rs : 5, +	__BITFIELD_FIELD(unsigned int rt : 5, +	__BITFIELD_FIELD(unsigned int rd : 5, +	__BITFIELD_FIELD(unsigned int re : 5, +	__BITFIELD_FIELD(unsigned int func : 6,  	;))))))  };  struct p_format {		/* Performance counter format (R10000) */ -	BITFIELD_FIELD(unsigned int opcode : 6, -	BITFIELD_FIELD(unsigned int rs : 5, -	BITFIELD_FIELD(unsigned int rt : 5, -	BITFIELD_FIELD(unsigned int rd : 5, -	BITFIELD_FIELD(unsigned int re : 5, -	BITFIELD_FIELD(unsigned int func : 6, +	__BITFIELD_FIELD(unsigned int opcode : 6, +	__BITFIELD_FIELD(unsigned int rs : 5, +	__BITFIELD_FIELD(unsigned int rt : 5, +	__BITFIELD_FIELD(unsigned int rd : 5, +	__BITFIELD_FIELD(unsigned int re : 5, +	__BITFIELD_FIELD(unsigned int func : 6,  	;))))))  };  struct f_format {			/* FPU register format */ -	BITFIELD_FIELD(unsigned int opcode : 6, -	BITFIELD_FIELD(unsigned int : 1, -	BITFIELD_FIELD(unsigned int fmt : 4, -	BITFIELD_FIELD(unsigned int rt : 5, -	BITFIELD_FIELD(unsigned int rd : 5, -	BITFIELD_FIELD(unsigned int re : 5, -	BITFIELD_FIELD(unsigned int func : 6, +	__BITFIELD_FIELD(unsigned int opcode : 6, +	__BITFIELD_FIELD(unsigned int : 1, +	__BITFIELD_FIELD(unsigned int fmt : 4, +	__BITFIELD_FIELD(unsigned int rt : 5, +	__BITFIELD_FIELD(unsigned int rd : 5, +	__BITFIELD_FIELD(unsigned int re : 5, +	__BITFIELD_FIELD(unsigned int func : 6,  	;)))))))  };  struct ma_format {		/* FPU multiply and add format (MIPS IV) */ -	BITFIELD_FIELD(unsigned int opcode : 6, -	BITFIELD_FIELD(unsigned int fr : 5, -	BITFIELD_FIELD(unsigned int ft : 5, -	BITFIELD_FIELD(unsigned int fs : 5, -	BITFIELD_FIELD(unsigned int fd : 5, -	BITFIELD_FIELD(unsigned int func : 4, -	BITFIELD_FIELD(unsigned int fmt : 2, +	__BITFIELD_FIELD(unsigned int opcode : 6, +	__BITFIELD_FIELD(unsigned int fr : 5, +	__BITFIELD_FIELD(unsigned int ft : 5, +	__BITFIELD_FIELD(unsigned int fs : 5, +	__BITFIELD_FIELD(unsigned int fd : 5, +	__BITFIELD_FIELD(unsigned int func : 4, +	__BITFIELD_FIELD(unsigned int fmt : 2,  	;)))))))  };  struct b_format {			/* BREAK and SYSCALL */ -	BITFIELD_FIELD(unsigned int opcode : 6, -	BITFIELD_FIELD(unsigned int code : 20, -	BITFIELD_FIELD(unsigned int func : 6, +	__BITFIELD_FIELD(unsigned int opcode : 6, +	__BITFIELD_FIELD(unsigned int code : 20, +	__BITFIELD_FIELD(unsigned int func : 6,  	;)))  };  struct ps_format {			/* MIPS-3D / paired single format */ -	BITFIELD_FIELD(unsigned int opcode : 6, -	BITFIELD_FIELD(unsigned int rs : 5, -	BITFIELD_FIELD(unsigned int ft : 5, -	BITFIELD_FIELD(unsigned int fs : 5, -	BITFIELD_FIELD(unsigned int fd : 5, -	BITFIELD_FIELD(unsigned int func : 6, +	__BITFIELD_FIELD(unsigned int opcode : 6, +	__BITFIELD_FIELD(unsigned int rs : 5, +	__BITFIELD_FIELD(unsigned int ft : 5, +	__BITFIELD_FIELD(unsigned int fs : 5, +	__BITFIELD_FIELD(unsigned int fd : 5, +	__BITFIELD_FIELD(unsigned int func : 6,  	;))))))  };  struct v_format {				/* MDMX vector format */ -	BITFIELD_FIELD(unsigned int opcode : 6, -	BITFIELD_FIELD(unsigned int sel : 4, -	BITFIELD_FIELD(unsigned int fmt : 1, -	BITFIELD_FIELD(unsigned int vt : 5, -	BITFIELD_FIELD(unsigned int vs : 5, -	BITFIELD_FIELD(unsigned int vd : 5, -	BITFIELD_FIELD(unsigned int func : 6, +	__BITFIELD_FIELD(unsigned int opcode : 6, +	__BITFIELD_FIELD(unsigned int sel : 4, +	__BITFIELD_FIELD(unsigned int fmt : 1, +	__BITFIELD_FIELD(unsigned int vt : 5, +	__BITFIELD_FIELD(unsigned int vs : 5, +	__BITFIELD_FIELD(unsigned int vd : 5, +	__BITFIELD_FIELD(unsigned int func : 6,  	;)))))))  }; +struct spec3_format {   /* SPEC3 */ +	__BITFIELD_FIELD(unsigned int opcode:6, +	__BITFIELD_FIELD(unsigned int rs:5, +	__BITFIELD_FIELD(unsigned int rt:5, +	__BITFIELD_FIELD(signed int simmediate:9, +	__BITFIELD_FIELD(unsigned int func:7, +	;))))) +}; +  /*   * microMIPS instruction formats (32-bit length)   * @@ -597,141 +623,141 @@ struct v_format {				/* MDMX vector format */   *	if it is MIPS32 instruction re-encoded for use in the microMIPS ASE.   */  struct fb_format {		/* FPU branch format (MIPS32) */ -	BITFIELD_FIELD(unsigned int opcode : 6, -	BITFIELD_FIELD(unsigned int bc : 5, -	BITFIELD_FIELD(unsigned int cc : 3, -	BITFIELD_FIELD(unsigned int flag : 2, -	BITFIELD_FIELD(signed int simmediate : 16, +	__BITFIELD_FIELD(unsigned int opcode : 6, +	__BITFIELD_FIELD(unsigned int bc : 5, +	__BITFIELD_FIELD(unsigned int cc : 3, +	__BITFIELD_FIELD(unsigned int flag : 2, +	__BITFIELD_FIELD(signed int simmediate : 16,  	;)))))  };  struct fp0_format {		/* FPU multiply and add format (MIPS32) */ -	BITFIELD_FIELD(unsigned int opcode : 6, -	BITFIELD_FIELD(unsigned int fmt : 5, -	BITFIELD_FIELD(unsigned int ft : 5, -	BITFIELD_FIELD(unsigned int fs : 5, -	BITFIELD_FIELD(unsigned int fd : 5, -	BITFIELD_FIELD(unsigned int func : 6, +	__BITFIELD_FIELD(unsigned int opcode : 6, +	__BITFIELD_FIELD(unsigned int fmt : 5, +	__BITFIELD_FIELD(unsigned int ft : 5, +	__BITFIELD_FIELD(unsigned int fs : 5, +	__BITFIELD_FIELD(unsigned int fd : 5, +	__BITFIELD_FIELD(unsigned int func : 6,  	;))))))  };  struct mm_fp0_format {		/* FPU multipy and add format (microMIPS) */ -	BITFIELD_FIELD(unsigned int opcode : 6, -	BITFIELD_FIELD(unsigned int ft : 5, -	BITFIELD_FIELD(unsigned int fs : 5, -	BITFIELD_FIELD(unsigned int fd : 5, -	BITFIELD_FIELD(unsigned int fmt : 3, -	BITFIELD_FIELD(unsigned int op : 2, -	BITFIELD_FIELD(unsigned int func : 6, +	__BITFIELD_FIELD(unsigned int opcode : 6, +	__BITFIELD_FIELD(unsigned int ft : 5, +	__BITFIELD_FIELD(unsigned int fs : 5, +	__BITFIELD_FIELD(unsigned int fd : 5, +	__BITFIELD_FIELD(unsigned int fmt : 3, +	__BITFIELD_FIELD(unsigned int op : 2, +	__BITFIELD_FIELD(unsigned int func : 6,  	;)))))))  };  struct fp1_format {		/* FPU mfc1 and cfc1 format (MIPS32) */ -	BITFIELD_FIELD(unsigned int opcode : 6, -	BITFIELD_FIELD(unsigned int op : 5, -	BITFIELD_FIELD(unsigned int rt : 5, -	BITFIELD_FIELD(unsigned int fs : 5, -	BITFIELD_FIELD(unsigned int fd : 5, -	BITFIELD_FIELD(unsigned int func : 6, +	__BITFIELD_FIELD(unsigned int opcode : 6, +	__BITFIELD_FIELD(unsigned int op : 5, +	__BITFIELD_FIELD(unsigned int rt : 5, +	__BITFIELD_FIELD(unsigned int fs : 5, +	__BITFIELD_FIELD(unsigned int fd : 5, +	__BITFIELD_FIELD(unsigned int func : 6,  	;))))))  };  struct mm_fp1_format {		/* FPU mfc1 and cfc1 format (microMIPS) */ -	BITFIELD_FIELD(unsigned int opcode : 6, -	BITFIELD_FIELD(unsigned int rt : 5, -	BITFIELD_FIELD(unsigned int fs : 5, -	BITFIELD_FIELD(unsigned int fmt : 2, -	BITFIELD_FIELD(unsigned int op : 8, -	BITFIELD_FIELD(unsigned int func : 6, +	__BITFIELD_FIELD(unsigned int opcode : 6, +	__BITFIELD_FIELD(unsigned int rt : 5, +	__BITFIELD_FIELD(unsigned int fs : 5, +	__BITFIELD_FIELD(unsigned int fmt : 2, +	__BITFIELD_FIELD(unsigned int op : 8, +	__BITFIELD_FIELD(unsigned int func : 6,  	;))))))  };  struct mm_fp2_format {		/* FPU movt and movf format (microMIPS) */ -	BITFIELD_FIELD(unsigned int opcode : 6, -	BITFIELD_FIELD(unsigned int fd : 5, -	BITFIELD_FIELD(unsigned int fs : 5, -	BITFIELD_FIELD(unsigned int cc : 3, -	BITFIELD_FIELD(unsigned int zero : 2, -	BITFIELD_FIELD(unsigned int fmt : 2, -	BITFIELD_FIELD(unsigned int op : 3, -	BITFIELD_FIELD(unsigned int func : 6, +	__BITFIELD_FIELD(unsigned int opcode : 6, +	__BITFIELD_FIELD(unsigned int fd : 5, +	__BITFIELD_FIELD(unsigned int fs : 5, +	__BITFIELD_FIELD(unsigned int cc : 3, +	__BITFIELD_FIELD(unsigned int zero : 2, +	__BITFIELD_FIELD(unsigned int fmt : 2, +	__BITFIELD_FIELD(unsigned int op : 3, +	__BITFIELD_FIELD(unsigned int func : 6,  	;))))))))  };  struct mm_fp3_format {		/* FPU abs and neg format (microMIPS) */ -	BITFIELD_FIELD(unsigned int opcode : 6, -	BITFIELD_FIELD(unsigned int rt : 5, -	BITFIELD_FIELD(unsigned int fs : 5, -	BITFIELD_FIELD(unsigned int fmt : 3, -	BITFIELD_FIELD(unsigned int op : 7, -	BITFIELD_FIELD(unsigned int func : 6, +	__BITFIELD_FIELD(unsigned int opcode : 6, +	__BITFIELD_FIELD(unsigned int rt : 5, +	__BITFIELD_FIELD(unsigned int fs : 5, +	__BITFIELD_FIELD(unsigned int fmt : 3, +	__BITFIELD_FIELD(unsigned int op : 7, +	__BITFIELD_FIELD(unsigned int func : 6,  	;))))))  };  struct mm_fp4_format {		/* FPU c.cond format (microMIPS) */ -	BITFIELD_FIELD(unsigned int opcode : 6, -	BITFIELD_FIELD(unsigned int rt : 5, -	BITFIELD_FIELD(unsigned int fs : 5, -	BITFIELD_FIELD(unsigned int cc : 3, -	BITFIELD_FIELD(unsigned int fmt : 3, -	BITFIELD_FIELD(unsigned int cond : 4, -	BITFIELD_FIELD(unsigned int func : 6, +	__BITFIELD_FIELD(unsigned int opcode : 6, +	__BITFIELD_FIELD(unsigned int rt : 5, +	__BITFIELD_FIELD(unsigned int fs : 5, +	__BITFIELD_FIELD(unsigned int cc : 3, +	__BITFIELD_FIELD(unsigned int fmt : 3, +	__BITFIELD_FIELD(unsigned int cond : 4, +	__BITFIELD_FIELD(unsigned int func : 6,  	;)))))))  };  struct mm_fp5_format {		/* FPU lwxc1 and swxc1 format (microMIPS) */ -	BITFIELD_FIELD(unsigned int opcode : 6, -	BITFIELD_FIELD(unsigned int index : 5, -	BITFIELD_FIELD(unsigned int base : 5, -	BITFIELD_FIELD(unsigned int fd : 5, -	BITFIELD_FIELD(unsigned int op : 5, -	BITFIELD_FIELD(unsigned int func : 6, +	__BITFIELD_FIELD(unsigned int opcode : 6, +	__BITFIELD_FIELD(unsigned int index : 5, +	__BITFIELD_FIELD(unsigned int base : 5, +	__BITFIELD_FIELD(unsigned int fd : 5, +	__BITFIELD_FIELD(unsigned int op : 5, +	__BITFIELD_FIELD(unsigned int func : 6,  	;))))))  };  struct fp6_format {		/* FPU madd and msub format (MIPS IV) */ -	BITFIELD_FIELD(unsigned int opcode : 6, -	BITFIELD_FIELD(unsigned int fr : 5, -	BITFIELD_FIELD(unsigned int ft : 5, -	BITFIELD_FIELD(unsigned int fs : 5, -	BITFIELD_FIELD(unsigned int fd : 5, -	BITFIELD_FIELD(unsigned int func : 6, +	__BITFIELD_FIELD(unsigned int opcode : 6, +	__BITFIELD_FIELD(unsigned int fr : 5, +	__BITFIELD_FIELD(unsigned int ft : 5, +	__BITFIELD_FIELD(unsigned int fs : 5, +	__BITFIELD_FIELD(unsigned int fd : 5, +	__BITFIELD_FIELD(unsigned int func : 6,  	;))))))  };  struct mm_fp6_format {		/* FPU madd and msub format (microMIPS) */ -	BITFIELD_FIELD(unsigned int opcode : 6, -	BITFIELD_FIELD(unsigned int ft : 5, -	BITFIELD_FIELD(unsigned int fs : 5, -	BITFIELD_FIELD(unsigned int fd : 5, -	BITFIELD_FIELD(unsigned int fr : 5, -	BITFIELD_FIELD(unsigned int func : 6, +	__BITFIELD_FIELD(unsigned int opcode : 6, +	__BITFIELD_FIELD(unsigned int ft : 5, +	__BITFIELD_FIELD(unsigned int fs : 5, +	__BITFIELD_FIELD(unsigned int fd : 5, +	__BITFIELD_FIELD(unsigned int fr : 5, +	__BITFIELD_FIELD(unsigned int func : 6,  	;))))))  };  struct mm_i_format {		/* Immediate format (microMIPS) */ -	BITFIELD_FIELD(unsigned int opcode : 6, -	BITFIELD_FIELD(unsigned int rt : 5, -	BITFIELD_FIELD(unsigned int rs : 5, -	BITFIELD_FIELD(signed int simmediate : 16, +	__BITFIELD_FIELD(unsigned int opcode : 6, +	__BITFIELD_FIELD(unsigned int rt : 5, +	__BITFIELD_FIELD(unsigned int rs : 5, +	__BITFIELD_FIELD(signed int simmediate : 16,  	;))))  };  struct mm_m_format {		/* Multi-word load/store format (microMIPS) */ -	BITFIELD_FIELD(unsigned int opcode : 6, -	BITFIELD_FIELD(unsigned int rd : 5, -	BITFIELD_FIELD(unsigned int base : 5, -	BITFIELD_FIELD(unsigned int func : 4, -	BITFIELD_FIELD(signed int simmediate : 12, +	__BITFIELD_FIELD(unsigned int opcode : 6, +	__BITFIELD_FIELD(unsigned int rd : 5, +	__BITFIELD_FIELD(unsigned int base : 5, +	__BITFIELD_FIELD(unsigned int func : 4, +	__BITFIELD_FIELD(signed int simmediate : 12,  	;)))))  };  struct mm_x_format {		/* Scaled indexed load format (microMIPS) */ -	BITFIELD_FIELD(unsigned int opcode : 6, -	BITFIELD_FIELD(unsigned int index : 5, -	BITFIELD_FIELD(unsigned int base : 5, -	BITFIELD_FIELD(unsigned int rd : 5, -	BITFIELD_FIELD(unsigned int func : 11, +	__BITFIELD_FIELD(unsigned int opcode : 6, +	__BITFIELD_FIELD(unsigned int index : 5, +	__BITFIELD_FIELD(unsigned int base : 5, +	__BITFIELD_FIELD(unsigned int rd : 5, +	__BITFIELD_FIELD(unsigned int func : 11,  	;)))))  }; @@ -739,51 +765,51 @@ struct mm_x_format {		/* Scaled indexed load format (microMIPS) */   * microMIPS instruction formats (16-bit length)   */  struct mm_b0_format {		/* Unconditional branch format (microMIPS) */ -	BITFIELD_FIELD(unsigned int opcode : 6, -	BITFIELD_FIELD(signed int simmediate : 10, -	BITFIELD_FIELD(unsigned int : 16, /* Ignored */ +	__BITFIELD_FIELD(unsigned int opcode : 6, +	__BITFIELD_FIELD(signed int simmediate : 10, +	__BITFIELD_FIELD(unsigned int : 16, /* Ignored */  	;)))  };  struct mm_b1_format {		/* Conditional branch format (microMIPS) */ -	BITFIELD_FIELD(unsigned int opcode : 6, -	BITFIELD_FIELD(unsigned int rs : 3, -	BITFIELD_FIELD(signed int simmediate : 7, -	BITFIELD_FIELD(unsigned int : 16, /* Ignored */ +	__BITFIELD_FIELD(unsigned int opcode : 6, +	__BITFIELD_FIELD(unsigned int rs : 3, +	__BITFIELD_FIELD(signed int simmediate : 7, +	__BITFIELD_FIELD(unsigned int : 16, /* Ignored */  	;))))  };  struct mm16_m_format {		/* Multi-word load/store format */ -	BITFIELD_FIELD(unsigned int opcode : 6, -	BITFIELD_FIELD(unsigned int func : 4, -	BITFIELD_FIELD(unsigned int rlist : 2, -	BITFIELD_FIELD(unsigned int imm : 4, -	BITFIELD_FIELD(unsigned int : 16, /* Ignored */ +	__BITFIELD_FIELD(unsigned int opcode : 6, +	__BITFIELD_FIELD(unsigned int func : 4, +	__BITFIELD_FIELD(unsigned int rlist : 2, +	__BITFIELD_FIELD(unsigned int imm : 4, +	__BITFIELD_FIELD(unsigned int : 16, /* Ignored */  	;)))))  };  struct mm16_rb_format {		/* Signed immediate format */ -	BITFIELD_FIELD(unsigned int opcode : 6, -	BITFIELD_FIELD(unsigned int rt : 3, -	BITFIELD_FIELD(unsigned int base : 3, -	BITFIELD_FIELD(signed int simmediate : 4, -	BITFIELD_FIELD(unsigned int : 16, /* Ignored */ +	__BITFIELD_FIELD(unsigned int opcode : 6, +	__BITFIELD_FIELD(unsigned int rt : 3, +	__BITFIELD_FIELD(unsigned int base : 3, +	__BITFIELD_FIELD(signed int simmediate : 4, +	__BITFIELD_FIELD(unsigned int : 16, /* Ignored */  	;)))))  };  struct mm16_r3_format {		/* Load from global pointer format */ -	BITFIELD_FIELD(unsigned int opcode : 6, -	BITFIELD_FIELD(unsigned int rt : 3, -	BITFIELD_FIELD(signed int simmediate : 7, -	BITFIELD_FIELD(unsigned int : 16, /* Ignored */ +	__BITFIELD_FIELD(unsigned int opcode : 6, +	__BITFIELD_FIELD(unsigned int rt : 3, +	__BITFIELD_FIELD(signed int simmediate : 7, +	__BITFIELD_FIELD(unsigned int : 16, /* Ignored */  	;))))  };  struct mm16_r5_format {		/* Load/store from stack pointer format */ -	BITFIELD_FIELD(unsigned int opcode : 6, -	BITFIELD_FIELD(unsigned int rt : 5, -	BITFIELD_FIELD(signed int simmediate : 5, -	BITFIELD_FIELD(unsigned int : 16, /* Ignored */ +	__BITFIELD_FIELD(unsigned int opcode : 6, +	__BITFIELD_FIELD(unsigned int rt : 5, +	__BITFIELD_FIELD(signed int simmediate : 5, +	__BITFIELD_FIELD(unsigned int : 16, /* Ignored */  	;))))  }; @@ -791,57 +817,57 @@ struct mm16_r5_format {		/* Load/store from stack pointer format */   * MIPS16e instruction formats (16-bit length)   */  struct m16e_rr { -	BITFIELD_FIELD(unsigned int opcode : 5, -	BITFIELD_FIELD(unsigned int rx : 3, -	BITFIELD_FIELD(unsigned int nd : 1, -	BITFIELD_FIELD(unsigned int l : 1, -	BITFIELD_FIELD(unsigned int ra : 1, -	BITFIELD_FIELD(unsigned int func : 5, +	__BITFIELD_FIELD(unsigned int opcode : 5, +	__BITFIELD_FIELD(unsigned int rx : 3, +	__BITFIELD_FIELD(unsigned int nd : 1, +	__BITFIELD_FIELD(unsigned int l : 1, +	__BITFIELD_FIELD(unsigned int ra : 1, +	__BITFIELD_FIELD(unsigned int func : 5,  	;))))))  };  struct m16e_jal { -	BITFIELD_FIELD(unsigned int opcode : 5, -	BITFIELD_FIELD(unsigned int x : 1, -	BITFIELD_FIELD(unsigned int imm20_16 : 5, -	BITFIELD_FIELD(signed int imm25_21 : 5, +	__BITFIELD_FIELD(unsigned int opcode : 5, +	__BITFIELD_FIELD(unsigned int x : 1, +	__BITFIELD_FIELD(unsigned int imm20_16 : 5, +	__BITFIELD_FIELD(signed int imm25_21 : 5,  	;))))  };  struct m16e_i64 { -	BITFIELD_FIELD(unsigned int opcode : 5, -	BITFIELD_FIELD(unsigned int func : 3, -	BITFIELD_FIELD(unsigned int imm : 8, +	__BITFIELD_FIELD(unsigned int opcode : 5, +	__BITFIELD_FIELD(unsigned int func : 3, +	__BITFIELD_FIELD(unsigned int imm : 8,  	;)))  };  struct m16e_ri64 { -	BITFIELD_FIELD(unsigned int opcode : 5, -	BITFIELD_FIELD(unsigned int func : 3, -	BITFIELD_FIELD(unsigned int ry : 3, -	BITFIELD_FIELD(unsigned int imm : 5, +	__BITFIELD_FIELD(unsigned int opcode : 5, +	__BITFIELD_FIELD(unsigned int func : 3, +	__BITFIELD_FIELD(unsigned int ry : 3, +	__BITFIELD_FIELD(unsigned int imm : 5,  	;))))  };  struct m16e_ri { -	BITFIELD_FIELD(unsigned int opcode : 5, -	BITFIELD_FIELD(unsigned int rx : 3, -	BITFIELD_FIELD(unsigned int imm : 8, +	__BITFIELD_FIELD(unsigned int opcode : 5, +	__BITFIELD_FIELD(unsigned int rx : 3, +	__BITFIELD_FIELD(unsigned int imm : 8,  	;)))  };  struct m16e_rri { -	BITFIELD_FIELD(unsigned int opcode : 5, -	BITFIELD_FIELD(unsigned int rx : 3, -	BITFIELD_FIELD(unsigned int ry : 3, -	BITFIELD_FIELD(unsigned int imm : 5, +	__BITFIELD_FIELD(unsigned int opcode : 5, +	__BITFIELD_FIELD(unsigned int rx : 3, +	__BITFIELD_FIELD(unsigned int ry : 3, +	__BITFIELD_FIELD(unsigned int imm : 5,  	;))))  };  struct m16e_i8 { -	BITFIELD_FIELD(unsigned int opcode : 5, -	BITFIELD_FIELD(unsigned int func : 3, -	BITFIELD_FIELD(unsigned int imm : 8, +	__BITFIELD_FIELD(unsigned int opcode : 5, +	__BITFIELD_FIELD(unsigned int func : 3, +	__BITFIELD_FIELD(unsigned int imm : 8,  	;)))  }; @@ -860,6 +886,7 @@ union mips_instruction {  	struct b_format b_format;  	struct ps_format ps_format;  	struct v_format v_format; +	struct spec3_format spec3_format;  	struct fb_format fb_format;  	struct fp0_format fp0_format;  	struct mm_fp0_format mm_fp0_format; diff --git a/arch/mips/include/uapi/asm/kvm.h b/arch/mips/include/uapi/asm/kvm.h index f09ff5ae205..2c04b6d9ff8 100644 --- a/arch/mips/include/uapi/asm/kvm.h +++ b/arch/mips/include/uapi/asm/kvm.h @@ -106,6 +106,41 @@ struct kvm_fpu {  #define KVM_REG_MIPS_LO (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 33)  #define KVM_REG_MIPS_PC (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 34) +/* KVM specific control registers */ + +/* + * CP0_Count control + * DC:    Set 0: Master disable CP0_Count and set COUNT_RESUME to now + *        Set 1: Master re-enable CP0_Count with unchanged bias, handling timer + *               interrupts since COUNT_RESUME + *        This can be used to freeze the timer to get a consistent snapshot of + *        the CP0_Count and timer interrupt pending state, while also resuming + *        safely without losing time or guest timer interrupts. + * Other: Reserved, do not change. + */ +#define KVM_REG_MIPS_COUNT_CTL		(KVM_REG_MIPS | KVM_REG_SIZE_U64 | \ +					 0x20000 | 0) +#define KVM_REG_MIPS_COUNT_CTL_DC	0x00000001 + +/* + * CP0_Count resume monotonic nanoseconds + * The monotonic nanosecond time of the last set of COUNT_CTL.DC (master + * disable). Any reads and writes of Count related registers while + * COUNT_CTL.DC=1 will appear to occur at this time. When COUNT_CTL.DC is + * cleared again (master enable) any timer interrupts since this time will be + * emulated. + * Modifications to times in the future are rejected. + */ +#define KVM_REG_MIPS_COUNT_RESUME	(KVM_REG_MIPS | KVM_REG_SIZE_U64 | \ +					 0x20000 | 1) +/* + * CP0_Count rate in Hz + * Specifies the rate of the CP0_Count timer in Hz. Modifications occur without + * discontinuities in CP0_Count. + */ +#define KVM_REG_MIPS_COUNT_HZ		(KVM_REG_MIPS | KVM_REG_SIZE_U64 | \ +					 0x20000 | 2) +  /*   * KVM MIPS specific structures and definitions   * diff --git a/arch/mips/include/uapi/asm/kvm_para.h b/arch/mips/include/uapi/asm/kvm_para.h index 14fab8f0b95..7e16d7c42e6 100644 --- a/arch/mips/include/uapi/asm/kvm_para.h +++ b/arch/mips/include/uapi/asm/kvm_para.h @@ -1 +1,5 @@ -#include <asm-generic/kvm_para.h> +#ifndef _UAPI_ASM_MIPS_KVM_PARA_H +#define _UAPI_ASM_MIPS_KVM_PARA_H + + +#endif /* _UAPI_ASM_MIPS_KVM_PARA_H */ diff --git a/arch/mips/include/uapi/asm/siginfo.h b/arch/mips/include/uapi/asm/siginfo.h index 88e292b7719..e81174432ba 100644 --- a/arch/mips/include/uapi/asm/siginfo.h +++ b/arch/mips/include/uapi/asm/siginfo.h @@ -33,6 +33,8 @@ struct siginfo;  #error _MIPS_SZLONG neither 32 nor 64  #endif +#define __ARCH_SIGSYS +  #include <asm-generic/siginfo.h>  typedef struct siginfo { @@ -97,6 +99,13 @@ typedef struct siginfo {  			__ARCH_SI_BAND_T _band; /* POLL_IN, POLL_OUT, POLL_MSG */  			int _fd;  		} _sigpoll; + +		/* SIGSYS */ +		struct { +			void __user *_call_addr; /* calling user insn */ +			int _syscall;	/* triggering system call number */ +			unsigned int _arch;	/* AUDIT_ARCH_* of syscall */ +		} _sigsys;  	} _sifields;  } siginfo_t; diff --git a/arch/mips/include/uapi/asm/socket.h b/arch/mips/include/uapi/asm/socket.h index 61c01f054d1..a14baa218c7 100644 --- a/arch/mips/include/uapi/asm/socket.h +++ b/arch/mips/include/uapi/asm/socket.h @@ -94,4 +94,8 @@  #define SO_BUSY_POLL		46 +#define SO_MAX_PACING_RATE	47 + +#define SO_BPF_EXTENSIONS	48 +  #endif /* _UAPI_ASM_SOCKET_H */ diff --git a/arch/mips/include/uapi/asm/types.h b/arch/mips/include/uapi/asm/types.h index 7ac9d0baad8..f3dd9ff0cc0 100644 --- a/arch/mips/include/uapi/asm/types.h +++ b/arch/mips/include/uapi/asm/types.h @@ -14,9 +14,12 @@  /*   * We don't use int-l64.h for the kernel anymore but still use it for   * userspace to avoid code changes. + * + * However, some user programs (e.g. perf) may not want this. They can + * flag __SANE_USERSPACE_TYPES__ to get int-ll64.h here.   */  #ifndef __KERNEL__ -# if _MIPS_SZLONG == 64 +# if _MIPS_SZLONG == 64 && !defined(__SANE_USERSPACE_TYPES__)  #  include <asm-generic/int-l64.h>  # else  #  include <asm-generic/int-ll64.h> diff --git a/arch/mips/include/uapi/asm/unistd.h b/arch/mips/include/uapi/asm/unistd.h index 1dee279f966..5805414777e 100644 --- a/arch/mips/include/uapi/asm/unistd.h +++ b/arch/mips/include/uapi/asm/unistd.h @@ -369,16 +369,19 @@  #define __NR_process_vm_writev		(__NR_Linux + 346)  #define __NR_kcmp			(__NR_Linux + 347)  #define __NR_finit_module		(__NR_Linux + 348) +#define __NR_sched_setattr		(__NR_Linux + 349) +#define __NR_sched_getattr		(__NR_Linux + 350) +#define __NR_renameat2			(__NR_Linux + 351)  /*   * Offset of the last Linux o32 flavoured syscall   */ -#define __NR_Linux_syscalls		348 +#define __NR_Linux_syscalls		351  #endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */  #define __NR_O32_Linux			4000 -#define __NR_O32_Linux_syscalls		348 +#define __NR_O32_Linux_syscalls		351  #if _MIPS_SIM == _MIPS_SIM_ABI64 @@ -695,16 +698,19 @@  #define __NR_kcmp			(__NR_Linux + 306)  #define __NR_finit_module		(__NR_Linux + 307)  #define __NR_getdents64			(__NR_Linux + 308) +#define __NR_sched_setattr		(__NR_Linux + 309) +#define __NR_sched_getattr		(__NR_Linux + 310) +#define __NR_renameat2			(__NR_Linux + 311)  /*   * Offset of the last Linux 64-bit flavoured syscall   */ -#define __NR_Linux_syscalls		308 +#define __NR_Linux_syscalls		311  #endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */  #define __NR_64_Linux			5000 -#define __NR_64_Linux_syscalls		308 +#define __NR_64_Linux_syscalls		311  #if _MIPS_SIM == _MIPS_SIM_NABI32 @@ -1025,15 +1031,18 @@  #define __NR_process_vm_writev		(__NR_Linux + 310)  #define __NR_kcmp			(__NR_Linux + 311)  #define __NR_finit_module		(__NR_Linux + 312) +#define __NR_sched_setattr		(__NR_Linux + 313) +#define __NR_sched_getattr		(__NR_Linux + 314) +#define __NR_renameat2			(__NR_Linux + 315)  /*   * Offset of the last N32 flavoured syscall   */ -#define __NR_Linux_syscalls		312 +#define __NR_Linux_syscalls		315  #endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */  #define __NR_N32_Linux			6000 -#define __NR_N32_Linux_syscalls		312 +#define __NR_N32_Linux_syscalls		315  #endif /* _UAPI_ASM_UNISTD_H */  | 
