diff options
Diffstat (limited to 'arch/mips/include/asm/processor.h')
| -rw-r--r-- | arch/mips/include/asm/processor.h | 45 | 
1 files changed, 38 insertions, 7 deletions
diff --git a/arch/mips/include/asm/processor.h b/arch/mips/include/asm/processor.h index 3605b844ad8..ad70cba8daf 100644 --- a/arch/mips/include/asm/processor.h +++ b/arch/mips/include/asm/processor.h @@ -97,18 +97,48 @@ extern unsigned int vced_count, vcei_count;  #define NUM_FPU_REGS	32 -typedef __u64 fpureg_t; +#ifdef CONFIG_CPU_HAS_MSA +# define FPU_REG_WIDTH	128 +#else +# define FPU_REG_WIDTH	64 +#endif + +union fpureg { +	__u32	val32[FPU_REG_WIDTH / 32]; +	__u64	val64[FPU_REG_WIDTH / 64]; +}; + +#ifdef CONFIG_CPU_LITTLE_ENDIAN +# define FPR_IDX(width, idx)	(idx) +#else +# define FPR_IDX(width, idx)	((FPU_REG_WIDTH / (width)) - 1 - (idx)) +#endif + +#define BUILD_FPR_ACCESS(width) \ +static inline u##width get_fpr##width(union fpureg *fpr, unsigned idx)	\ +{									\ +	return fpr->val##width[FPR_IDX(width, idx)];			\ +}									\ +									\ +static inline void set_fpr##width(union fpureg *fpr, unsigned idx,	\ +				  u##width val)				\ +{									\ +	fpr->val##width[FPR_IDX(width, idx)] = val;			\ +} + +BUILD_FPR_ACCESS(32) +BUILD_FPR_ACCESS(64)  /* - * It would be nice to add some more fields for emulator statistics, but there - * are a number of fixed offsets in offset.h and elsewhere that would have to - * be recalculated by hand.  So the additional information will be private to - * the FPU emulator for now.  See asm-mips/fpu_emulator.h. + * It would be nice to add some more fields for emulator statistics, + * the additional information is private to the FPU emulator for now. + * See arch/mips/include/asm/fpu_emulator.h.   */  struct mips_fpu_struct { -	fpureg_t	fpr[NUM_FPU_REGS]; +	union fpureg	fpr[NUM_FPU_REGS];  	unsigned int	fcr31; +	unsigned int	msacsr;  };  #define NUM_DSP_REGS   6 @@ -284,8 +314,9 @@ struct thread_struct {  	 * Saved FPU/FPU emulator stuff				\  	 */							\  	.fpu			= {				\ -		.fpr		= {0,},				\ +		.fpr		= {{{0,},},},			\  		.fcr31		= 0,				\ +		.msacsr		= 0,				\  	},							\  	/*							\  	 * FPU affinity state (null if not FPAFF)		\  | 
