diff options
Diffstat (limited to 'arch/mips/include/asm/mach-sibyte')
| -rw-r--r-- | arch/mips/include/asm/mach-sibyte/cpu-feature-overrides.h | 1 | ||||
| -rw-r--r-- | arch/mips/include/asm/mach-sibyte/war.h | 5 |
2 files changed, 3 insertions, 3 deletions
diff --git a/arch/mips/include/asm/mach-sibyte/cpu-feature-overrides.h b/arch/mips/include/asm/mach-sibyte/cpu-feature-overrides.h index 1c1f92415b9..92927b62b5a 100644 --- a/arch/mips/include/asm/mach-sibyte/cpu-feature-overrides.h +++ b/arch/mips/include/asm/mach-sibyte/cpu-feature-overrides.h @@ -26,6 +26,7 @@ #define cpu_has_dc_aliases 0 #define cpu_has_ic_fills_f_dc 0 #define cpu_has_dsp 0 +#define cpu_has_dsp2 0 #define cpu_has_mipsmt 0 #define cpu_has_userlocal 0 #define cpu_icache_snoops_remote_store 0 diff --git a/arch/mips/include/asm/mach-sibyte/war.h b/arch/mips/include/asm/mach-sibyte/war.h index 743385d7b5f..0a227d426b9 100644 --- a/arch/mips/include/asm/mach-sibyte/war.h +++ b/arch/mips/include/asm/mach-sibyte/war.h @@ -21,19 +21,18 @@ extern int sb1250_m3_workaround_needed(void); #endif #define BCM1250_M3_WAR sb1250_m3_workaround_needed() -#define SIBYTE_1956_WAR 1 +#define SIBYTE_1956_WAR 1 #else #define BCM1250_M3_WAR 0 -#define SIBYTE_1956_WAR 0 +#define SIBYTE_1956_WAR 0 #endif #define MIPS4K_ICACHE_REFILL_WAR 0 #define MIPS_CACHE_SYNC_WAR 0 #define TX49XX_ICACHE_INDEX_INV_WAR 0 -#define RM9000_CDEX_SMP_WAR 0 #define ICACHE_REFILLS_WORKAROUND_WAR 0 #define R10000_LLSC_WAR 0 #define MIPS34K_MISSED_ITLB_WAR 0 |