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Diffstat (limited to 'arch/mips/include/asm/mach-rc32434/gpio.h')
-rw-r--r--arch/mips/include/asm/mach-rc32434/gpio.h14
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/mips/include/asm/mach-rc32434/gpio.h b/arch/mips/include/asm/mach-rc32434/gpio.h
index b5cf6457305..4dee0a34250 100644
--- a/arch/mips/include/asm/mach-rc32434/gpio.h
+++ b/arch/mips/include/asm/mach-rc32434/gpio.h
@@ -5,7 +5,7 @@
* GPIO register definition.
*
* Author : ryan.holmQVist@idt.com
- * Date : 20011005
+ * Date : 20011005
* Copyright (C) 2001, 2002 Ryan Holm <ryan.holmQVist@idt.com>
* Copyright (C) 2008 Florian Fainelli <florian@openwrt.org>
*/
@@ -26,9 +26,9 @@
#define irq_to_gpio(irq) (irq - (8 + 4 * 32))
struct rb532_gpio_reg {
- u32 gpiofunc; /* GPIO Function Register
+ u32 gpiofunc; /* GPIO Function Register
* gpiofunc[x]==0 bit = gpio
- * func[x]==1 bit = altfunc
+ * func[x]==1 bit = altfunc
*/
u32 gpiocfg; /* GPIO Configuration Register
* gpiocfg[x]==0 bit = input
@@ -80,11 +80,11 @@ struct rb532_gpio_reg {
/* Compact Flash GPIO pin */
#define CF_GPIO_NUM 13
-extern void set_434_reg(unsigned reg_offs, unsigned bit, unsigned len, unsigned val);
-extern unsigned get_434_reg(unsigned reg_offs);
-extern void set_latch_u5(unsigned char or_mask, unsigned char nand_mask);
-extern unsigned char get_latch_u5(void);
+/* S1 button GPIO (shared with UART0_SIN) */
+#define GPIO_BTN_S1 1
+
extern void rb532_gpio_set_ilevel(int bit, unsigned gpio);
extern void rb532_gpio_set_istat(int bit, unsigned gpio);
+extern void rb532_gpio_set_func(unsigned gpio);
#endif /* _RC32434_GPIO_H_ */