diff options
Diffstat (limited to 'arch/mips/include/asm/dec')
| -rw-r--r-- | arch/mips/include/asm/dec/ioasic.h | 2 | ||||
| -rw-r--r-- | arch/mips/include/asm/dec/ioasic_addrs.h | 20 | ||||
| -rw-r--r-- | arch/mips/include/asm/dec/kn05.h | 15 | ||||
| -rw-r--r-- | arch/mips/include/asm/dec/prom.h | 50 |
4 files changed, 48 insertions, 39 deletions
diff --git a/arch/mips/include/asm/dec/ioasic.h b/arch/mips/include/asm/dec/ioasic.h index 98badd6bf22..be4d62a5a10 100644 --- a/arch/mips/include/asm/dec/ioasic.h +++ b/arch/mips/include/asm/dec/ioasic.h @@ -33,6 +33,6 @@ static inline u32 ioasic_read(unsigned int reg) extern void init_ioasic_irqs(int base); -extern void dec_ioasic_clocksource_init(void); +extern int dec_ioasic_clocksource_init(void); #endif /* __ASM_DEC_IOASIC_H */ diff --git a/arch/mips/include/asm/dec/ioasic_addrs.h b/arch/mips/include/asm/dec/ioasic_addrs.h index 4cbc1f8a112..8bd95971fe2 100644 --- a/arch/mips/include/asm/dec/ioasic_addrs.h +++ b/arch/mips/include/asm/dec/ioasic_addrs.h @@ -25,20 +25,20 @@ */ #define IOASIC_SYS_ROM (0*IOASIC_SLOT_SIZE) /* system board ROM */ #define IOASIC_IOCTL (1*IOASIC_SLOT_SIZE) /* I/O ASIC */ -#define IOASIC_ESAR (2*IOASIC_SLOT_SIZE) /* LANCE MAC address chip */ -#define IOASIC_LANCE (3*IOASIC_SLOT_SIZE) /* LANCE Ethernet */ -#define IOASIC_SCC0 (4*IOASIC_SLOT_SIZE) /* SCC #0 */ +#define IOASIC_ESAR (2*IOASIC_SLOT_SIZE) /* LANCE MAC address chip */ +#define IOASIC_LANCE (3*IOASIC_SLOT_SIZE) /* LANCE Ethernet */ +#define IOASIC_SCC0 (4*IOASIC_SLOT_SIZE) /* SCC #0 */ #define IOASIC_VDAC_HI (5*IOASIC_SLOT_SIZE) /* VDAC (maxine) */ -#define IOASIC_SCC1 (6*IOASIC_SLOT_SIZE) /* SCC #1 (3min, 3max+) */ +#define IOASIC_SCC1 (6*IOASIC_SLOT_SIZE) /* SCC #1 (3min, 3max+) */ #define IOASIC_VDAC_LO (7*IOASIC_SLOT_SIZE) /* VDAC (maxine) */ -#define IOASIC_TOY (8*IOASIC_SLOT_SIZE) /* RTC */ -#define IOASIC_ISDN (9*IOASIC_SLOT_SIZE) /* ISDN (maxine) */ +#define IOASIC_TOY (8*IOASIC_SLOT_SIZE) /* RTC */ +#define IOASIC_ISDN (9*IOASIC_SLOT_SIZE) /* ISDN (maxine) */ #define IOASIC_ERRADDR (9*IOASIC_SLOT_SIZE) /* bus error address (3max+) */ -#define IOASIC_CHKSYN (10*IOASIC_SLOT_SIZE) /* ECC syndrome (3max+) */ +#define IOASIC_CHKSYN (10*IOASIC_SLOT_SIZE) /* ECC syndrome (3max+) */ #define IOASIC_ACC_BUS (10*IOASIC_SLOT_SIZE) /* ACCESS.bus (maxine) */ -#define IOASIC_MCR (11*IOASIC_SLOT_SIZE) /* memory control (3max+) */ -#define IOASIC_FLOPPY (11*IOASIC_SLOT_SIZE) /* FDC (maxine) */ -#define IOASIC_SCSI (12*IOASIC_SLOT_SIZE) /* ASC SCSI */ +#define IOASIC_MCR (11*IOASIC_SLOT_SIZE) /* memory control (3max+) */ +#define IOASIC_FLOPPY (11*IOASIC_SLOT_SIZE) /* FDC (maxine) */ +#define IOASIC_SCSI (12*IOASIC_SLOT_SIZE) /* ASC SCSI */ #define IOASIC_FDC_DMA (13*IOASIC_SLOT_SIZE) /* FDC DMA (maxine) */ #define IOASIC_SCSI_DMA (14*IOASIC_SLOT_SIZE) /* ??? */ #define IOASIC_RES_15 (15*IOASIC_SLOT_SIZE) /* unused? */ diff --git a/arch/mips/include/asm/dec/kn05.h b/arch/mips/include/asm/dec/kn05.h index 56d22dc8803..8e14f677e5e 100644 --- a/arch/mips/include/asm/dec/kn05.h +++ b/arch/mips/include/asm/dec/kn05.h @@ -49,12 +49,20 @@ #define KN4K_RES_15 (15*IOASIC_SLOT_SIZE) /* unused? */ /* + * MB ASIC interrupt bits. + */ +#define KN4K_MB_INR_MB 4 /* ??? */ +#define KN4K_MB_INR_MT 3 /* memory, I/O bus read/write errors */ +#define KN4K_MB_INR_RES_2 2 /* unused */ +#define KN4K_MB_INR_RTC 1 /* RTC */ +#define KN4K_MB_INR_TC 0 /* I/O ASIC cascade */ + +/* * Bits for the MB interrupt register. * The register appears read-only. */ -#define KN4K_MB_INT_TC (1<<0) /* TURBOchannel? */ -#define KN4K_MB_INT_RTC (1<<1) /* RTC? */ -#define KN4K_MB_INT_MT (1<<3) /* I/O ASIC cascade */ +#define KN4K_MB_INT_IRQ (0x1f<<0) /* CPU Int[4:0] status. */ +#define KN4K_MB_INT_IRQ_N(n) (1<<(n)) /* Individual status bits. */ /* * Bits for the MB control & status register. @@ -70,6 +78,7 @@ #define KN4K_MB_CSR_NC (1<<14) /* ??? */ #define KN4K_MB_CSR_EE (1<<15) /* (bus) Exception Enable? */ #define KN4K_MB_CSR_MSK (0x1f<<16) /* CPU Int[4:0] mask */ +#define KN4K_MB_CSR_MSK_N(n) (1<<((n)+16)) /* Individual mask bits. */ #define KN4K_MB_CSR_FW (1<<21) /* ??? */ #define KN4K_MB_CSR_W (1<<31) /* ??? */ diff --git a/arch/mips/include/asm/dec/prom.h b/arch/mips/include/asm/dec/prom.h index b9c8203688d..b59a2103b61 100644 --- a/arch/mips/include/asm/dec/prom.h +++ b/arch/mips/include/asm/dec/prom.h @@ -108,36 +108,36 @@ extern int (*__pmax_close)(int); /* * On MIPS64 we have to call PROM functions via a helper - * dispatcher to accomodate ABI incompatibilities. + * dispatcher to accommodate ABI incompatibilities. */ #define __DEC_PROM_O32(fun, arg) fun arg __asm__(#fun); \ __asm__(#fun " = call_o32") -int __DEC_PROM_O32(_rex_bootinit, (int (*)(void))); -int __DEC_PROM_O32(_rex_bootread, (int (*)(void))); -int __DEC_PROM_O32(_rex_getbitmap, (int (*)(memmap *), memmap *)); +int __DEC_PROM_O32(_rex_bootinit, (int (*)(void), void *)); +int __DEC_PROM_O32(_rex_bootread, (int (*)(void), void *)); +int __DEC_PROM_O32(_rex_getbitmap, (int (*)(memmap *), void *, memmap *)); unsigned long *__DEC_PROM_O32(_rex_slot_address, - (unsigned long *(*)(int), int)); -void *__DEC_PROM_O32(_rex_gettcinfo, (void *(*)(void))); -int __DEC_PROM_O32(_rex_getsysid, (int (*)(void))); -void __DEC_PROM_O32(_rex_clear_cache, (void (*)(void))); - -int __DEC_PROM_O32(_prom_getchar, (int (*)(void))); -char *__DEC_PROM_O32(_prom_getenv, (char *(*)(char *), char *)); -int __DEC_PROM_O32(_prom_printf, (int (*)(char *, ...), char *, ...)); - - -#define rex_bootinit() _rex_bootinit(__rex_bootinit) -#define rex_bootread() _rex_bootread(__rex_bootread) -#define rex_getbitmap(x) _rex_getbitmap(__rex_getbitmap, x) -#define rex_slot_address(x) _rex_slot_address(__rex_slot_address, x) -#define rex_gettcinfo() _rex_gettcinfo(__rex_gettcinfo) -#define rex_getsysid() _rex_getsysid(__rex_getsysid) -#define rex_clear_cache() _rex_clear_cache(__rex_clear_cache) - -#define prom_getchar() _prom_getchar(__prom_getchar) -#define prom_getenv(x) _prom_getenv(__prom_getenv, x) -#define prom_printf(x...) _prom_printf(__prom_printf, x) + (unsigned long *(*)(int), void *, int)); +void *__DEC_PROM_O32(_rex_gettcinfo, (void *(*)(void), void *)); +int __DEC_PROM_O32(_rex_getsysid, (int (*)(void), void *)); +void __DEC_PROM_O32(_rex_clear_cache, (void (*)(void), void *)); + +int __DEC_PROM_O32(_prom_getchar, (int (*)(void), void *)); +char *__DEC_PROM_O32(_prom_getenv, (char *(*)(char *), void *, char *)); +int __DEC_PROM_O32(_prom_printf, (int (*)(char *, ...), void *, char *, ...)); + + +#define rex_bootinit() _rex_bootinit(__rex_bootinit, NULL) +#define rex_bootread() _rex_bootread(__rex_bootread, NULL) +#define rex_getbitmap(x) _rex_getbitmap(__rex_getbitmap, NULL, x) +#define rex_slot_address(x) _rex_slot_address(__rex_slot_address, NULL, x) +#define rex_gettcinfo() _rex_gettcinfo(__rex_gettcinfo, NULL) +#define rex_getsysid() _rex_getsysid(__rex_getsysid, NULL) +#define rex_clear_cache() _rex_clear_cache(__rex_clear_cache, NULL) + +#define prom_getchar() _prom_getchar(__prom_getchar, NULL) +#define prom_getenv(x) _prom_getenv(__prom_getenv, NULL, x) +#define prom_printf(x...) _prom_printf(__prom_printf, NULL, x) #else /* !CONFIG_64BIT */ |