diff options
Diffstat (limited to 'arch/mips/include/asm/cpu-info.h')
| -rw-r--r-- | arch/mips/include/asm/cpu-info.h | 46 | 
1 files changed, 36 insertions, 10 deletions
diff --git a/arch/mips/include/asm/cpu-info.h b/arch/mips/include/asm/cpu-info.h index 21c8e29c8f9..47d5967ce7e 100644 --- a/arch/mips/include/asm/cpu-info.h +++ b/arch/mips/include/asm/cpu-info.h @@ -39,19 +39,23 @@ struct cache_desc {  #define MIPS_CACHE_PINDEX	0x00000020	/* Physically indexed cache */  struct cpuinfo_mips { -	unsigned int		udelay_val; -	unsigned int		asid_cache; +	unsigned long		asid_cache;  	/*  	 * Capability and feature descriptor structure for MIPS CPU  	 */  	unsigned long		options;  	unsigned long		ases; +	unsigned int		udelay_val;  	unsigned int		processor_id;  	unsigned int		fpu_id; +	unsigned int		msa_id;  	unsigned int		cputype;  	int			isa_level;  	int			tlbsize; +	int			tlbsizevtlb; +	int			tlbsizeftlbsets; +	int			tlbsizeftlbways;  	struct cache_desc	icache; /* Primary I-cache */  	struct cache_desc	dcache; /* Primary D or combined I/D cache */  	struct cache_desc	scache; /* Secondary cache */ @@ -61,18 +65,13 @@ struct cpuinfo_mips {  #ifdef CONFIG_64BIT  	int			vmbits; /* Virtual memory size in bits */  #endif -#if defined(CONFIG_MIPS_MT_SMP) || defined(CONFIG_MIPS_MT_SMTC) +#ifdef CONFIG_MIPS_MT_SMP  	/* -	 * In the MIPS MT "SMTC" model, each TC is considered -	 * to be a "CPU" for the purposes of scheduling, but -	 * exception resources, ASID spaces, etc, are common -	 * to all TCs within the same VPE. +	 * There is not necessarily a 1:1 mapping of VPE num to CPU number +	 * in particular on multi-core systems.  	 */  	int			vpe_id;	 /* Virtual Processor number */  #endif -#ifdef CONFIG_MIPS_MT_SMTC -	int			tc_id;	 /* Thread Context number */ -#endif  	void			*data;	/* Additional data */  	unsigned int		watch_reg_count;   /* Number that exist */  	unsigned int		watch_reg_use_cnt; /* Usable by ptrace */ @@ -92,4 +91,31 @@ extern void cpu_report(void);  extern const char *__cpu_name[];  #define cpu_name_string()	__cpu_name[smp_processor_id()] +struct seq_file; +struct notifier_block; + +extern int register_proc_cpuinfo_notifier(struct notifier_block *nb); +extern int proc_cpuinfo_notifier_call_chain(unsigned long val, void *v); + +#define proc_cpuinfo_notifier(fn, pri)					\ +({									\ +	static struct notifier_block fn##_nb = {			\ +		.notifier_call = fn,					\ +		.priority = pri						\ +	};								\ +									\ +	register_proc_cpuinfo_notifier(&fn##_nb);			\ +}) + +struct proc_cpuinfo_notifier_args { +	struct seq_file *m; +	unsigned long n; +}; + +#ifdef CONFIG_MIPS_MT_SMP +# define cpu_vpe_id(cpuinfo)	((cpuinfo)->vpe_id) +#else +# define cpu_vpe_id(cpuinfo)	0 +#endif +  #endif /* __ASM_CPU_INFO_H */  | 
