diff options
Diffstat (limited to 'arch/mips/dec')
| -rw-r--r-- | arch/mips/dec/Makefile | 3 | ||||
| -rw-r--r-- | arch/mips/dec/ecc-berr.c | 2 | ||||
| -rw-r--r-- | arch/mips/dec/int-handler.S | 90 | ||||
| -rw-r--r-- | arch/mips/dec/ioasic-irq.c | 95 | ||||
| -rw-r--r-- | arch/mips/dec/kn01-berr.c | 1 | ||||
| -rw-r--r-- | arch/mips/dec/kn02-irq.c | 25 | ||||
| -rw-r--r-- | arch/mips/dec/kn02xa-berr.c | 6 | ||||
| -rw-r--r-- | arch/mips/dec/platform.c | 44 | ||||
| -rw-r--r-- | arch/mips/dec/prom/Makefile | 1 | ||||
| -rw-r--r-- | arch/mips/dec/prom/call_o32.S | 89 | ||||
| -rw-r--r-- | arch/mips/dec/prom/dectypes.h | 2 | ||||
| -rw-r--r-- | arch/mips/dec/prom/init.c | 1 | ||||
| -rw-r--r-- | arch/mips/dec/prom/memory.c | 2 | ||||
| -rw-r--r-- | arch/mips/dec/promcon.c | 54 | ||||
| -rw-r--r-- | arch/mips/dec/setup.c | 12 | ||||
| -rw-r--r-- | arch/mips/dec/time.c | 29 | ||||
| -rw-r--r-- | arch/mips/dec/wbflush.c | 8 | 
17 files changed, 196 insertions, 268 deletions
diff --git a/arch/mips/dec/Makefile b/arch/mips/dec/Makefile index 9eb2f9c036a..bd74e05c90b 100644 --- a/arch/mips/dec/Makefile +++ b/arch/mips/dec/Makefile @@ -3,8 +3,7 @@  #  obj-y		:= ecc-berr.o int-handler.o ioasic-irq.o kn01-berr.o \ -		   kn02-irq.o kn02xa-berr.o reset.o setup.o time.o +		   kn02-irq.o kn02xa-berr.o platform.o reset.o setup.o time.o -obj-$(CONFIG_PROM_CONSOLE)	+= promcon.o  obj-$(CONFIG_TC)		+= tc.o  obj-$(CONFIG_CPU_HAS_WB)	+= wbflush.o diff --git a/arch/mips/dec/ecc-berr.c b/arch/mips/dec/ecc-berr.c index 7abce661b90..2a66e908f6a 100644 --- a/arch/mips/dec/ecc-berr.c +++ b/arch/mips/dec/ecc-berr.c @@ -21,10 +21,10 @@  #include <asm/addrspace.h>  #include <asm/bootinfo.h>  #include <asm/cpu.h> +#include <asm/cpu-type.h>  #include <asm/irq_regs.h>  #include <asm/processor.h>  #include <asm/ptrace.h> -#include <asm/system.h>  #include <asm/traps.h>  #include <asm/dec/ecc.h> diff --git a/arch/mips/dec/int-handler.S b/arch/mips/dec/int-handler.S index 82c85281878..41a2fa1fa12 100644 --- a/arch/mips/dec/int-handler.S +++ b/arch/mips/dec/int-handler.S @@ -55,67 +55,67 @@   * DS2100/3100's, aka kn01, aka Pmax:   *   *	MIPS IRQ	Source - *      --------        ------ - *             0	Software (ignored) - *             1        Software (ignored) - *             2        SCSI - *             3        Lance Ethernet - *             4        DZ11 serial - *             5        RTC - *             6        Memory Controller & Video - *             7        FPU + *	--------	------ + *	       0	Software (ignored) + *	       1	Software (ignored) + *	       2	SCSI + *	       3	Lance Ethernet + *	       4	DZ11 serial + *	       5	RTC + *	       6	Memory Controller & Video + *	       7	FPU   *   * DS5000/200, aka kn02, aka 3max:   *   *	MIPS IRQ	Source - *      --------        ------ - *             0	Software (ignored) - *             1        Software (ignored) - *             2        TurboChannel - *             3        RTC - *             4        Reserved - *             5        Memory Controller - *             6        Reserved - *             7        FPU + *	--------	------ + *	       0	Software (ignored) + *	       1	Software (ignored) + *	       2	TurboChannel + *	       3	RTC + *	       4	Reserved + *	       5	Memory Controller + *	       6	Reserved + *	       7	FPU   *   * DS5000/1xx's, aka kn02ba, aka 3min:   *   *	MIPS IRQ	Source - *      --------        ------ - *             0	Software (ignored) - *             1        Software (ignored) - *             2        TurboChannel Slot 0 - *             3        TurboChannel Slot 1 - *             4        TurboChannel Slot 2 - *             5        TurboChannel Slot 3 (ASIC) - *             6        Halt button - *             7        FPU/R4k timer + *	--------	------ + *	       0	Software (ignored) + *	       1	Software (ignored) + *	       2	TurboChannel Slot 0 + *	       3	TurboChannel Slot 1 + *	       4	TurboChannel Slot 2 + *	       5	TurboChannel Slot 3 (ASIC) + *	       6	Halt button + *	       7	FPU/R4k timer   *   * DS5000/2x's, aka kn02ca, aka maxine:   *   *	MIPS IRQ	Source - *      --------        ------ - *             0	Software (ignored) - *             1        Software (ignored) - *             2        Periodic Interrupt (100usec) - *             3        RTC - *             4        I/O write timeout - *             5        TurboChannel (ASIC) - *             6        Halt Keycode from Access.Bus keyboard (CTRL-ALT-ENTER) - *             7        FPU/R4k timer + *	--------	------ + *	       0	Software (ignored) + *	       1	Software (ignored) + *	       2	Periodic Interrupt (100usec) + *	       3	RTC + *	       4	I/O write timeout + *	       5	TurboChannel (ASIC) + *	       6	Halt Keycode from Access.Bus keyboard (CTRL-ALT-ENTER) + *	       7	FPU/R4k timer   *   * DS5000/2xx's, aka kn03, aka 3maxplus:   *   *	MIPS IRQ	Source - *      --------        ------ - *             0	Software (ignored) - *             1        Software (ignored) - *             2        System Board (ASIC) - *             3        RTC - *             4        Reserved - *             5        Memory - *             6        Halt Button - *             7        FPU/R4k timer + *	--------	------ + *	       0	Software (ignored) + *	       1	Software (ignored) + *	       2	System Board (ASIC) + *	       3	RTC + *	       4	Reserved + *	       5	Memory + *	       6	Halt Button + *	       7	FPU/R4k timer   *   * We handle the IRQ according to _our_ priority (see setup.c),   * then we just return.  If multiple IRQs are pending then we will diff --git a/arch/mips/dec/ioasic-irq.c b/arch/mips/dec/ioasic-irq.c index cb41954fc32..e04d973ce5a 100644 --- a/arch/mips/dec/ioasic-irq.c +++ b/arch/mips/dec/ioasic-irq.c @@ -1,7 +1,7 @@  /*   *	DEC I/O ASIC interrupts.   * - *	Copyright (c) 2002, 2003  Maciej W. Rozycki + *	Copyright (c) 2002, 2003, 2013  Maciej W. Rozycki   *   *	This program is free software; you can redistribute it and/or   *	modify it under the terms of the GNU General Public License @@ -17,79 +17,84 @@  #include <asm/dec/ioasic_addrs.h>  #include <asm/dec/ioasic_ints.h> -  static int ioasic_irq_base; - -static inline void unmask_ioasic_irq(unsigned int irq) +static void unmask_ioasic_irq(struct irq_data *d)  {  	u32 simr;  	simr = ioasic_read(IO_REG_SIMR); -	simr |= (1 << (irq - ioasic_irq_base)); +	simr |= (1 << (d->irq - ioasic_irq_base));  	ioasic_write(IO_REG_SIMR, simr);  } -static inline void mask_ioasic_irq(unsigned int irq) +static void mask_ioasic_irq(struct irq_data *d)  {  	u32 simr;  	simr = ioasic_read(IO_REG_SIMR); -	simr &= ~(1 << (irq - ioasic_irq_base)); +	simr &= ~(1 << (d->irq - ioasic_irq_base));  	ioasic_write(IO_REG_SIMR, simr);  } -static inline void clear_ioasic_irq(unsigned int irq) -{ -	u32 sir; - -	sir = ~(1 << (irq - ioasic_irq_base)); -	ioasic_write(IO_REG_SIR, sir); -} - -static inline void ack_ioasic_irq(unsigned int irq) +static void ack_ioasic_irq(struct irq_data *d)  { -	mask_ioasic_irq(irq); +	mask_ioasic_irq(d);  	fast_iob();  } -static inline void end_ioasic_irq(unsigned int irq) -{ -	if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) -		unmask_ioasic_irq(irq); -} -  static struct irq_chip ioasic_irq_type = {  	.name = "IO-ASIC", -	.ack = ack_ioasic_irq, -	.mask = mask_ioasic_irq, -	.mask_ack = ack_ioasic_irq, -	.unmask = unmask_ioasic_irq, +	.irq_ack = ack_ioasic_irq, +	.irq_mask = mask_ioasic_irq, +	.irq_mask_ack = ack_ioasic_irq, +	.irq_unmask = unmask_ioasic_irq,  }; - -#define unmask_ioasic_dma_irq unmask_ioasic_irq - -#define mask_ioasic_dma_irq mask_ioasic_irq - -#define ack_ioasic_dma_irq ack_ioasic_irq - -static inline void end_ioasic_dma_irq(unsigned int irq) +static void clear_ioasic_dma_irq(struct irq_data *d)  { -	clear_ioasic_irq(irq); +	u32 sir; + +	sir = ~(1 << (d->irq - ioasic_irq_base)); +	ioasic_write(IO_REG_SIR, sir);  	fast_iob(); -	end_ioasic_irq(irq);  }  static struct irq_chip ioasic_dma_irq_type = {  	.name = "IO-ASIC-DMA", -	.ack = ack_ioasic_dma_irq, -	.mask = mask_ioasic_dma_irq, -	.mask_ack = ack_ioasic_dma_irq, -	.unmask = unmask_ioasic_dma_irq, -	.end = end_ioasic_dma_irq, +	.irq_ack = clear_ioasic_dma_irq, +	.irq_mask = mask_ioasic_irq, +	.irq_unmask = unmask_ioasic_irq, +	.irq_eoi = clear_ioasic_dma_irq,  }; +/* + * I/O ASIC implements two kinds of DMA interrupts, informational and + * error interrupts. + * + * The formers do not stop DMA and should be cleared as soon as possible + * so that if they retrigger before the handler has completed, usually as + * a side effect of actions taken by the handler, then they are reissued. + * These use the `handle_edge_irq' handler that clears the request right + * away. + * + * The latters stop DMA and do not resume it until the interrupt has been + * cleared.  This cannot be done until after a corrective action has been + * taken and this also means they will not retrigger.  Therefore they use + * the `handle_fasteoi_irq' handler that only clears the request on the + * way out.  Because MIPS processor interrupt inputs, one of which the I/O + * ASIC is cascaded to, are level-triggered it is recommended that error + * DMA interrupt action handlers are registered with the IRQF_ONESHOT flag + * set so that they are run with the interrupt line masked. + * + * This mask has `1' bits in the positions of informational interrupts. + */ +#define IO_IRQ_DMA_INFO							\ +	(IO_IRQ_MASK(IO_INR_SCC0A_RXDMA) |				\ +	 IO_IRQ_MASK(IO_INR_SCC1A_RXDMA) |				\ +	 IO_IRQ_MASK(IO_INR_ISDN_TXDMA) |				\ +	 IO_IRQ_MASK(IO_INR_ISDN_RXDMA) |				\ +	 IO_IRQ_MASK(IO_INR_ASC_DMA))  void __init init_ioasic_irqs(int base)  { @@ -100,10 +105,12 @@ void __init init_ioasic_irqs(int base)  	fast_iob();  	for (i = base; i < base + IO_INR_DMA; i++) -		set_irq_chip_and_handler(i, &ioasic_irq_type, +		irq_set_chip_and_handler(i, &ioasic_irq_type,  					 handle_level_irq);  	for (; i < base + IO_IRQ_LINES; i++) -		set_irq_chip(i, &ioasic_dma_irq_type); +		irq_set_chip_and_handler(i, &ioasic_dma_irq_type, +					 1 << (i - base) & IO_IRQ_DMA_INFO ? +					 handle_edge_irq : handle_fasteoi_irq);  	ioasic_irq_base = base;  } diff --git a/arch/mips/dec/kn01-berr.c b/arch/mips/dec/kn01-berr.c index 94d23b4a7dc..44d8a87a8a6 100644 --- a/arch/mips/dec/kn01-berr.c +++ b/arch/mips/dec/kn01-berr.c @@ -22,7 +22,6 @@  #include <asm/mipsregs.h>  #include <asm/page.h>  #include <asm/ptrace.h> -#include <asm/system.h>  #include <asm/traps.h>  #include <asm/uaccess.h> diff --git a/arch/mips/dec/kn02-irq.c b/arch/mips/dec/kn02-irq.c index ed90a8deabc..37199f742c4 100644 --- a/arch/mips/dec/kn02-irq.c +++ b/arch/mips/dec/kn02-irq.c @@ -27,43 +27,40 @@   */  u32 cached_kn02_csr; -  static int kn02_irq_base; - -static inline void unmask_kn02_irq(unsigned int irq) +static void unmask_kn02_irq(struct irq_data *d)  {  	volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE +  						       KN02_CSR); -	cached_kn02_csr |= (1 << (irq - kn02_irq_base + 16)); +	cached_kn02_csr |= (1 << (d->irq - kn02_irq_base + 16));  	*csr = cached_kn02_csr;  } -static inline void mask_kn02_irq(unsigned int irq) +static void mask_kn02_irq(struct irq_data *d)  {  	volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE +  						       KN02_CSR); -	cached_kn02_csr &= ~(1 << (irq - kn02_irq_base + 16)); +	cached_kn02_csr &= ~(1 << (d->irq - kn02_irq_base + 16));  	*csr = cached_kn02_csr;  } -static void ack_kn02_irq(unsigned int irq) +static void ack_kn02_irq(struct irq_data *d)  { -	mask_kn02_irq(irq); +	mask_kn02_irq(d);  	iob();  }  static struct irq_chip kn02_irq_type = {  	.name = "KN02-CSR", -	.ack = ack_kn02_irq, -	.mask = mask_kn02_irq, -	.mask_ack = ack_kn02_irq, -	.unmask = unmask_kn02_irq, +	.irq_ack = ack_kn02_irq, +	.irq_mask = mask_kn02_irq, +	.irq_mask_ack = ack_kn02_irq, +	.irq_unmask = unmask_kn02_irq,  }; -  void __init init_kn02_irqs(int base)  {  	volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE + @@ -76,7 +73,7 @@ void __init init_kn02_irqs(int base)  	iob();  	for (i = base; i < base + KN02_IRQ_LINES; i++) -		set_irq_chip_and_handler(i, &kn02_irq_type, handle_level_irq); +		irq_set_chip_and_handler(i, &kn02_irq_type, handle_level_irq);  	kn02_irq_base = base;  } diff --git a/arch/mips/dec/kn02xa-berr.c b/arch/mips/dec/kn02xa-berr.c index 07ca5405d48..ec606363b80 100644 --- a/arch/mips/dec/kn02xa-berr.c +++ b/arch/mips/dec/kn02xa-berr.c @@ -19,9 +19,9 @@  #include <linux/types.h>  #include <asm/addrspace.h> +#include <asm/cpu-type.h>  #include <asm/irq_regs.h>  #include <asm/ptrace.h> -#include <asm/system.h>  #include <asm/traps.h>  #include <asm/dec/kn02ca.h> @@ -129,8 +129,8 @@ void __init dec_kn02xa_be_init(void)  {  	volatile u32 *mbcs = (void *)CKSEG1ADDR(KN4K_SLOT_BASE + KN4K_MB_CSR); -        /* For KN04 we need to make sure EE (?) is enabled in the MB.  */ -        if (current_cpu_type() == CPU_R4000SC) +	/* For KN04 we need to make sure EE (?) is enabled in the MB.  */ +	if (current_cpu_type() == CPU_R4000SC)  		*mbcs |= KN4K_MB_CSR_EE;  	fast_iob(); diff --git a/arch/mips/dec/platform.c b/arch/mips/dec/platform.c new file mode 100644 index 00000000000..c7ac86af847 --- /dev/null +++ b/arch/mips/dec/platform.c @@ -0,0 +1,44 @@ +/* + *	DEC platform devices. + * + *	Copyright (c) 2014  Maciej W. Rozycki + * + *	This program is free software; you can redistribute it and/or + *	modify it under the terms of the GNU General Public License + *	as published by the Free Software Foundation; either version + *	2 of the License, or (at your option) any later version. + */ + +#include <linux/ioport.h> +#include <linux/kernel.h> +#include <linux/mc146818rtc.h> +#include <linux/platform_device.h> + +static struct resource dec_rtc_resources[] = { +	{ +		.name = "rtc", +		.flags = IORESOURCE_MEM, +	}, +}; + +static struct cmos_rtc_board_info dec_rtc_info = { +	.flags = CMOS_RTC_FLAGS_NOFREQ, +	.address_space = 64, +}; + +static struct platform_device dec_rtc_device = { +	.name = "rtc_cmos", +	.id = PLATFORM_DEVID_NONE, +	.dev.platform_data = &dec_rtc_info, +	.resource = dec_rtc_resources, +	.num_resources = ARRAY_SIZE(dec_rtc_resources), +}; + +static int __init dec_add_devices(void) +{ +	dec_rtc_resources[0].start = RTC_PORT(0); +	dec_rtc_resources[0].end = RTC_PORT(0) + dec_kn_slot_size - 1; +	return platform_device_register(&dec_rtc_device); +} + +device_initcall(dec_add_devices); diff --git a/arch/mips/dec/prom/Makefile b/arch/mips/dec/prom/Makefile index 064ae7a76bd..ae73e42ac20 100644 --- a/arch/mips/dec/prom/Makefile +++ b/arch/mips/dec/prom/Makefile @@ -6,4 +6,3 @@  lib-y			+= init.o memory.o cmdline.o identify.o console.o  lib-$(CONFIG_32BIT)	+= locore.o -lib-$(CONFIG_64BIT)	+= call_o32.o diff --git a/arch/mips/dec/prom/call_o32.S b/arch/mips/dec/prom/call_o32.S deleted file mode 100644 index 8c8498159e4..00000000000 --- a/arch/mips/dec/prom/call_o32.S +++ /dev/null @@ -1,89 +0,0 @@ -/* - *	O32 interface for the 64 (or N32) ABI. - * - *	Copyright (C) 2002  Maciej W. Rozycki - * - *	This program is free software; you can redistribute it and/or - *	modify it under the terms of the GNU General Public License - *	as published by the Free Software Foundation; either version - *	2 of the License, or (at your option) any later version. - */ - -#include <asm/asm.h> -#include <asm/regdef.h> - -/* Maximum number of arguments supported.  Must be even!  */ -#define O32_ARGC	32 -/* Number of static registers we save.  */ -#define O32_STATC	11 -/* Frame size for both of the above.  */ -#define O32_FRAMESZ	(4 * O32_ARGC + SZREG * O32_STATC) - -		.text - -/* - * O32 function call dispatcher, for interfacing 32-bit ROM routines. - * - * The standard 64 (N32) calling sequence is supported, with a0 - * holding a function pointer, a1-a7 -- its first seven arguments - * and the stack -- remaining ones (up to O32_ARGC, including a1-a7). - * Static registers, gp and fp are preserved, v0 holds a result. - * This code relies on the called o32 function for sp and ra - * restoration and thus both this dispatcher and the current stack - * have to be placed in a KSEGx (or KUSEG) address space.  Any - * pointers passed have to point to addresses within one of these - * spaces as well. - */ -NESTED(call_o32, O32_FRAMESZ, ra) -		REG_SUBU	sp,O32_FRAMESZ - -		REG_S		ra,O32_FRAMESZ-1*SZREG(sp) -		REG_S		fp,O32_FRAMESZ-2*SZREG(sp) -		REG_S		gp,O32_FRAMESZ-3*SZREG(sp) -		REG_S		s7,O32_FRAMESZ-4*SZREG(sp) -		REG_S		s6,O32_FRAMESZ-5*SZREG(sp) -		REG_S		s5,O32_FRAMESZ-6*SZREG(sp) -		REG_S		s4,O32_FRAMESZ-7*SZREG(sp) -		REG_S		s3,O32_FRAMESZ-8*SZREG(sp) -		REG_S		s2,O32_FRAMESZ-9*SZREG(sp) -		REG_S		s1,O32_FRAMESZ-10*SZREG(sp) -		REG_S		s0,O32_FRAMESZ-11*SZREG(sp) - -		move		jp,a0 - -		sll		a0,a1,zero -		sll		a1,a2,zero -		sll		a2,a3,zero -		sll		a3,a4,zero -		sw		a5,0x10(sp) -		sw		a6,0x14(sp) -		sw		a7,0x18(sp) - -		PTR_LA		t0,O32_FRAMESZ(sp) -		PTR_LA		t1,0x1c(sp) -		li		t2,O32_ARGC-7 -1: -		lw		t3,(t0) -		REG_ADDU	t0,SZREG -		sw		t3,(t1) -		REG_SUBU	t2,1 -		REG_ADDU	t1,4 -		bnez		t2,1b - -		jalr		jp - -		REG_L		s0,O32_FRAMESZ-11*SZREG(sp) -		REG_L		s1,O32_FRAMESZ-10*SZREG(sp) -		REG_L		s2,O32_FRAMESZ-9*SZREG(sp) -		REG_L		s3,O32_FRAMESZ-8*SZREG(sp) -		REG_L		s4,O32_FRAMESZ-7*SZREG(sp) -		REG_L		s5,O32_FRAMESZ-6*SZREG(sp) -		REG_L		s6,O32_FRAMESZ-5*SZREG(sp) -		REG_L		s7,O32_FRAMESZ-4*SZREG(sp) -		REG_L		gp,O32_FRAMESZ-3*SZREG(sp) -		REG_L		fp,O32_FRAMESZ-2*SZREG(sp) -		REG_L		ra,O32_FRAMESZ-1*SZREG(sp) - -		REG_ADDU	sp,O32_FRAMESZ -		jr		ra -END(call_o32) diff --git a/arch/mips/dec/prom/dectypes.h b/arch/mips/dec/prom/dectypes.h index 707b6f1f5a9..69ea5b9c819 100644 --- a/arch/mips/dec/prom/dectypes.h +++ b/arch/mips/dec/prom/dectypes.h @@ -1,5 +1,5 @@  #ifndef DECTYPES -#define	DECTYPES +#define DECTYPES  #define DS2100_3100	1	/* DS2100/3100	Pmax		*/  #define DS5000_200	2	/* DS5000/200	3max		*/ diff --git a/arch/mips/dec/prom/init.c b/arch/mips/dec/prom/init.c index 93f1239af52..4e1761e0a09 100644 --- a/arch/mips/dec/prom/init.c +++ b/arch/mips/dec/prom/init.c @@ -13,6 +13,7 @@  #include <asm/bootinfo.h>  #include <asm/cpu.h> +#include <asm/cpu-type.h>  #include <asm/processor.h>  #include <asm/dec/prom.h> diff --git a/arch/mips/dec/prom/memory.c b/arch/mips/dec/prom/memory.c index e95ff3054ff..8c62316f22f 100644 --- a/arch/mips/dec/prom/memory.c +++ b/arch/mips/dec/prom/memory.c @@ -101,7 +101,7 @@ void __init prom_free_prom_memory(void)  	 * the first page reserved for the exception handlers.  	 */ -#if defined(CONFIG_DECLANCE) || defined(CONFIG_DECLANCE_MODULE) +#if IS_ENABLED(CONFIG_DECLANCE)  	/*  	 * Leave 128 KB reserved for Lance memory for  	 * IOASIC DECstations. diff --git a/arch/mips/dec/promcon.c b/arch/mips/dec/promcon.c deleted file mode 100644 index c239c25b79f..00000000000 --- a/arch/mips/dec/promcon.c +++ /dev/null @@ -1,54 +0,0 @@ -/* - * Wrap-around code for a console using the - * DECstation PROM io-routines. - * - * Copyright (c) 1998 Harald Koerfgen - */ - -#include <linux/tty.h> -#include <linux/ptrace.h> -#include <linux/init.h> -#include <linux/console.h> -#include <linux/fs.h> - -#include <asm/dec/prom.h> - -static void prom_console_write(struct console *co, const char *s, -			       unsigned count) -{ -	unsigned i; - -	/* -	 *    Now, do each character -	 */ -	for (i = 0; i < count; i++) { -		if (*s == 10) -			prom_printf("%c", 13); -		prom_printf("%c", *s++); -	} -} - -static int __init prom_console_setup(struct console *co, char *options) -{ -	return 0; -} - -static struct console sercons = { -	.name	= "ttyS", -	.write	= prom_console_write, -	.setup	= prom_console_setup, -	.flags	= CON_PRINTBUFFER, -	.index	= -1, -}; - -/* - *    Register console. - */ - -static int __init prom_console_init(void) -{ -	register_console(&sercons); - -	return 0; -} -console_initcall(prom_console_init); diff --git a/arch/mips/dec/setup.c b/arch/mips/dec/setup.c index fa45e924be0..41bbffd9cc0 100644 --- a/arch/mips/dec/setup.c +++ b/arch/mips/dec/setup.c @@ -23,6 +23,7 @@  #include <asm/bootinfo.h>  #include <asm/cpu.h>  #include <asm/cpu-features.h> +#include <asm/cpu-type.h>  #include <asm/irq.h>  #include <asm/irq_cpu.h>  #include <asm/mipsregs.h> @@ -65,7 +66,7 @@ EXPORT_SYMBOL(ioasic_base);  /*   * IRQ routing and priority tables.  Priorites are set as follows:   * - * 		KN01	KN230	KN02	KN02-BA	KN02-CA	KN03 + *		KN01	KN230	KN02	KN02-BA	KN02-CA	KN03   *   * MEMORY	CPU	CPU	CPU	ASIC	CPU	CPU   * RTC		CPU	CPU	CPU	ASIC	CPU	CPU @@ -101,20 +102,23 @@ int cpu_fpu_mask = DEC_CPU_IRQ_MASK(DEC_CPU_INR_FPU);  static struct irqaction ioirq = {  	.handler = no_action,  	.name = "cascade", +	.flags = IRQF_NO_THREAD,  };  static struct irqaction fpuirq = {  	.handler = no_action,  	.name = "fpu", +	.flags = IRQF_NO_THREAD,  };  static struct irqaction busirq = { -	.flags = IRQF_DISABLED,  	.name = "bus error", +	.flags = IRQF_NO_THREAD,  };  static struct irqaction haltirq = {  	.handler = dec_intr_halt,  	.name = "halt", +	.flags = IRQF_NO_THREAD,  }; @@ -745,6 +749,10 @@ void __init arch_init_irq(void)  		cpu_fpu_mask = 0;  		dec_interrupt[DEC_IRQ_FPU] = -1;  	} +	/* Free the halt interrupt unused on R4k systems.  */ +	if (current_cpu_type() == CPU_R4000SC || +	    current_cpu_type() == CPU_R4400SC) +		dec_interrupt[DEC_IRQ_HALT] = -1;  	/* Register board interrupts: FPU and cascade. */  	if (dec_interrupt[DEC_IRQ_FPU] >= 0) diff --git a/arch/mips/dec/time.c b/arch/mips/dec/time.c index 02f505f23c3..1914e56f0d9 100644 --- a/arch/mips/dec/time.c +++ b/arch/mips/dec/time.c @@ -104,7 +104,7 @@ int rtc_mips_set_mmss(unsigned long nowtime)  		CMOS_WRITE(real_seconds, RTC_SECONDS);  		CMOS_WRITE(real_minutes, RTC_MINUTES);  	} else { -		printk(KERN_WARNING +		printk_once(KERN_NOTICE  		       "set_rtc_mmss: can't update from %d to %d\n",  		       cmos_minutes, real_minutes);  		retval = -1; @@ -125,13 +125,18 @@ int rtc_mips_set_mmss(unsigned long nowtime)  void __init plat_time_init(void)  { +	int ioasic_clock = 0;  	u32 start, end; -	int i = HZ / 10; +	int i = HZ / 8;  	/* Set up the rate of periodic DS1287 interrupts. */  	ds1287_set_base_clock(HZ); +	/* On some I/O ASIC systems we have the I/O ASIC's counter.  */ +	if (IOASIC) +		ioasic_clock = dec_ioasic_clocksource_init() == 0;  	if (cpu_has_counter) { +		ds1287_timer_state();  		while (!ds1287_timer_state())  			; @@ -143,12 +148,24 @@ void __init plat_time_init(void)  		end = read_c0_count(); -		mips_hpt_frequency = (end - start) * 10; +		mips_hpt_frequency = (end - start) * 8;  		printk(KERN_INFO "MIPS counter frequency %dHz\n",  			mips_hpt_frequency); -	} else if (IOASIC) -		/* For pre-R4k systems we use the I/O ASIC's counter.  */ -		dec_ioasic_clocksource_init(); + +		/* +		 * All R4k DECstations suffer from the CP0 Count erratum, +		 * so we can't use the timer as a clock source, and a clock +		 * event both at a time.  An accurate wall clock is more +		 * important than a high-precision interval timer so only +		 * use the timer as a clock source, and not a clock event +		 * if there's no I/O ASIC counter available to serve as a +		 * clock source. +		 */ +		if (!ioasic_clock) { +			init_r4k_clocksource(); +			mips_hpt_frequency = 0; +		} +	}  	ds1287_clockevent_init(dec_interrupt[DEC_IRQ_RTC]);  } diff --git a/arch/mips/dec/wbflush.c b/arch/mips/dec/wbflush.c index 925c0525344..56bda4a396b 100644 --- a/arch/mips/dec/wbflush.c +++ b/arch/mips/dec/wbflush.c @@ -2,9 +2,9 @@   * Setup the right wbflush routine for the different DECstations.   *   * Created with information from: - *      DECstation 3100 Desktop Workstation Functional Specification - *      DECstation 5000/200 KN02 System Module Functional Specification - *      mipsel-linux-objdump --disassemble vmunix | grep "wbflush" :-) + *	DECstation 3100 Desktop Workstation Functional Specification + *	DECstation 5000/200 KN02 System Module Functional Specification + *	mipsel-linux-objdump --disassemble vmunix | grep "wbflush" :-)   *   * This file is subject to the terms and conditions of the GNU General Public   * License.  See the file "COPYING" in the main directory of this archive @@ -17,8 +17,8 @@  #include <linux/init.h>  #include <asm/bootinfo.h> -#include <asm/system.h>  #include <asm/wbflush.h> +#include <asm/barrier.h>  static void wbflush_kn01(void);  static void wbflush_kn210(void);  | 
