diff options
Diffstat (limited to 'arch/mips/Kconfig')
| -rw-r--r-- | arch/mips/Kconfig | 1560 |
1 files changed, 1105 insertions, 455 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index b4c4eaa5dd2..4e238e6e661 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -1,64 +1,155 @@ config MIPS bool default y + select ARCH_MIGHT_HAVE_PC_PARPORT + select ARCH_MIGHT_HAVE_PC_SERIO + select HAVE_CONTEXT_TRACKING + select HAVE_GENERIC_DMA_COHERENT select HAVE_IDE select HAVE_OPROFILE - # Horrible source of confusion. Die, die, die ... - select EMBEDDED - select RTC_LIB - -mainmenu "Linux/MIPS Kernel Configuration" + select HAVE_PERF_EVENTS + select PERF_USE_VMALLOC + select HAVE_ARCH_KGDB + select HAVE_ARCH_SECCOMP_FILTER + select HAVE_ARCH_TRACEHOOK + select HAVE_BPF_JIT if !CPU_MICROMIPS + select ARCH_HAVE_CUSTOM_GPIO_H + select HAVE_FUNCTION_TRACER + select HAVE_FUNCTION_TRACE_MCOUNT_TEST + select HAVE_DYNAMIC_FTRACE + select HAVE_FTRACE_MCOUNT_RECORD + select HAVE_C_RECORDMCOUNT + select HAVE_FUNCTION_GRAPH_TRACER + select HAVE_KPROBES + select HAVE_KRETPROBES + select HAVE_DEBUG_KMEMLEAK + select HAVE_SYSCALL_TRACEPOINTS + select ARCH_BINFMT_ELF_RANDOMIZE_PIE + select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT + select RTC_LIB if !MACH_LOONGSON + select GENERIC_ATOMIC64 if !64BIT + select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE + select HAVE_DMA_ATTRS + select HAVE_DMA_API_DEBUG + select GENERIC_IRQ_PROBE + select GENERIC_IRQ_SHOW + select GENERIC_PCI_IOMAP + select HAVE_ARCH_JUMP_LABEL + select ARCH_WANT_IPC_PARSE_VERSION + select IRQ_FORCED_THREADING + select HAVE_MEMBLOCK + select HAVE_MEMBLOCK_NODE_MAP + select ARCH_DISCARD_MEMBLOCK + select GENERIC_SMP_IDLE_THREAD + select BUILDTIME_EXTABLE_SORT + select GENERIC_CLOCKEVENTS + select GENERIC_CMOS_UPDATE + select HAVE_MOD_ARCH_SPECIFIC + select VIRT_TO_BUS + select MODULES_USE_ELF_REL if MODULES + select MODULES_USE_ELF_RELA if MODULES && 64BIT + select CLONE_BACKWARDS + select HAVE_DEBUG_STACKOVERFLOW + select HAVE_CC_STACKPROTECTOR + select CPU_PM if CPU_IDLE + select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST menu "Machine selection" -config ZONE_DMA - bool - choice prompt "System type" default SGI_IP22 -config MACH_ALCHEMY +config MIPS_ALCHEMY bool "Alchemy processor based machines" + select 64BIT_PHYS_ADDR + select CEVT_R4K + select CSRC_R4K + select IRQ_CPU + select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is + select SYS_HAS_CPU_MIPS32_R1 + select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_APM_EMULATION + select ARCH_REQUIRE_GPIOLIB + select SYS_SUPPORTS_ZBOOT -config BASLER_EXCITE - bool "Basler eXcite smart camera" +config AR7 + bool "Texas Instruments AR7" + select BOOT_ELF32 + select DMA_NONCOHERENT select CEVT_R4K select CSRC_R4K - select DMA_COHERENT - select HW_HAS_PCI select IRQ_CPU - select IRQ_CPU_RM7K - select IRQ_CPU_RM9K - select MIPS_RM9122 - select SYS_HAS_CPU_RM9000 + select NO_EXCEPT_FILL + select SWAP_IO_SPACE + select SYS_HAS_CPU_MIPS32_R1 + select SYS_HAS_EARLY_PRINTK + select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_LITTLE_ENDIAN + select SYS_SUPPORTS_MIPS16 + select SYS_SUPPORTS_ZBOOT_UART16550 + select ARCH_REQUIRE_GPIOLIB + select VLYNQ + select HAVE_CLK + help + Support for the Texas Instruments AR7 System-on-a-Chip + family: TNETD7100, 7200 and 7300. + +config ATH79 + bool "Atheros AR71XX/AR724X/AR913X based boards" + select ARCH_REQUIRE_GPIOLIB + select BOOT_RAW + select CEVT_R4K + select CSRC_R4K + select DMA_NONCOHERENT + select HAVE_CLK + select CLKDEV_LOOKUP + select IRQ_CPU + select MIPS_MACHINE + select SYS_HAS_CPU_MIPS32_R2 + select SYS_HAS_EARLY_PRINTK select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_BIG_ENDIAN - select SYS_SUPPORTS_KGDB + select SYS_SUPPORTS_MIPS16 help - The eXcite is a smart camera platform manufactured by - Basler Vision Technologies AG. + Support for the Atheros AR71XX/AR724X/AR913X SoCs. config BCM47XX - bool "BCM47XX based boards" + bool "Broadcom BCM47XX based boards" + select ARCH_WANT_OPTIONAL_GPIOLIB + select BOOT_RAW select CEVT_R4K select CSRC_R4K select DMA_NONCOHERENT select HW_HAS_PCI select IRQ_CPU select SYS_HAS_CPU_MIPS32_R1 + select NO_EXCEPT_FILL select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_LITTLE_ENDIAN - select SSB - select SSB_DRIVER_MIPS - select SSB_DRIVER_EXTIF - select SSB_PCICORE_HOSTMODE if PCI - select GENERIC_GPIO + select SYS_SUPPORTS_MIPS16 select SYS_HAS_EARLY_PRINTK - select CFE + select USE_GENERIC_EARLY_PRINTK_8250 help Support for BCM47XX based boards +config BCM63XX + bool "Broadcom BCM63XX based boards" + select BOOT_RAW + select CEVT_R4K + select CSRC_R4K + select DMA_NONCOHERENT + select IRQ_CPU + select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_BIG_ENDIAN + select SYS_HAS_EARLY_PRINTK + select SWAP_IO_SPACE + select ARCH_REQUIRE_GPIOLIB + select HAVE_CLK + select MIPS_L1_CACHE_SHIFT_4 + help + Support for BCM63XX based boards + config MIPS_COBALT bool "Cobalt Server" select CEVT_R4K @@ -71,34 +162,36 @@ config MIPS_COBALT select IRQ_CPU select IRQ_GT641XX select PCI_GT64XXX_PCI0 + select PCI select SYS_HAS_CPU_NEVADA select SYS_HAS_EARLY_PRINTK select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_64BIT_KERNEL select SYS_SUPPORTS_LITTLE_ENDIAN - select GENERIC_HARDIRQS_NO__DO_IRQ + select USE_GENERIC_EARLY_PRINTK_8250 config MACH_DECSTATION bool "DECstations" select BOOT_ELF32 select CEVT_DS1287 - select CEVT_R4K + select CEVT_R4K if CPU_R4X00 select CSRC_IOASIC - select CSRC_R4K + select CSRC_R4K if CPU_R4X00 select CPU_DADDI_WORKAROUNDS if 64BIT select CPU_R4000_WORKAROUNDS if 64BIT select CPU_R4400_WORKAROUNDS if 64BIT select DMA_NONCOHERENT - select NO_IOPORT + select NO_IOPORT_MAP select IRQ_CPU select SYS_HAS_CPU_R3000 select SYS_HAS_CPU_R4X00 select SYS_SUPPORTS_32BIT_KERNEL - select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL + select SYS_SUPPORTS_64BIT_KERNEL select SYS_SUPPORTS_LITTLE_ENDIAN select SYS_SUPPORTS_128HZ select SYS_SUPPORTS_256HZ select SYS_SUPPORTS_1024HZ + select MIPS_L1_CACHE_SHIFT_4 help This enables support for DEC's MIPS based workstations. For details see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the @@ -116,31 +209,67 @@ config MACH_DECSTATION config MACH_JAZZ bool "Jazz family of machines" - select ARC - select ARC32 + select FW_ARC + select FW_ARC32 select ARCH_MAY_HAVE_PC_FDC select CEVT_R4K select CSRC_R4K select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN select GENERIC_ISA_DMA + select HAVE_PCSPKR_PLATFORM select IRQ_CPU select I8253 select I8259 select ISA select SYS_HAS_CPU_R4X00 select SYS_SUPPORTS_32BIT_KERNEL - select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL + select SYS_SUPPORTS_64BIT_KERNEL select SYS_SUPPORTS_100HZ - select GENERIC_HARDIRQS_NO__DO_IRQ help This a family of machines based on the MIPS R4030 chipset which was used by several vendors to build RISC/os and Windows NT workstations. - Members include the Acer PICA, MIPS Magnum 4000, MIPS Millenium and + Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and Olivetti M700-10 workstations. +config MACH_JZ4740 + bool "Ingenic JZ4740 based machines" + select SYS_HAS_CPU_MIPS32_R1 + select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_LITTLE_ENDIAN + select SYS_SUPPORTS_ZBOOT_UART16550 + select DMA_NONCOHERENT + select IRQ_CPU + select ARCH_REQUIRE_GPIOLIB + select SYS_HAS_EARLY_PRINTK + select HAVE_CLK + select GENERIC_IRQ_CHIP + +config LANTIQ + bool "Lantiq based platforms" + select DMA_NONCOHERENT + select IRQ_CPU + select CEVT_R4K + select CSRC_R4K + select SYS_HAS_CPU_MIPS32_R1 + select SYS_HAS_CPU_MIPS32_R2 + select SYS_SUPPORTS_BIG_ENDIAN + select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_MIPS16 + select SYS_SUPPORTS_MULTITHREADING + select SYS_HAS_EARLY_PRINTK + select ARCH_REQUIRE_GPIOLIB + select SWAP_IO_SPACE + select BOOT_RAW + select HAVE_MACH_CLKDEV + select CLKDEV_LOOKUP + select USE_OF + select PINCTRL + select PINCTRL_LANTIQ + config LASAT bool "LASAT Networks platforms" select CEVT_R4K + select CRC32 select CSRC_R4K select DMA_NONCOHERENT select SYS_HAS_EARLY_PRINTK @@ -153,33 +282,27 @@ config LASAT select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_64BIT_KERNEL if BROKEN select SYS_SUPPORTS_LITTLE_ENDIAN - select GENERIC_HARDIRQS_NO__DO_IRQ -config LEMOTE_FULONG - bool "Lemote Fulong mini-PC" - select ARCH_SPARSEMEM_ENABLE - select CEVT_R4K - select CSRC_R4K - select SYS_HAS_CPU_LOONGSON2 - select DMA_NONCOHERENT - select BOOT_ELF32 - select BOARD_SCACHE - select HAVE_STD_PC_SERIAL_PORT - select HW_HAS_PCI - select I8259 - select ISA - select IRQ_CPU - select SYS_SUPPORTS_32BIT_KERNEL - select SYS_SUPPORTS_64BIT_KERNEL - select SYS_SUPPORTS_LITTLE_ENDIAN - select SYS_SUPPORTS_HIGHMEM - select SYS_HAS_EARLY_PRINTK - select GENERIC_HARDIRQS_NO__DO_IRQ - select GENERIC_ISA_DMA_SUPPORT_BROKEN - select CPU_HAS_WB +config MACH_LOONGSON + bool "Loongson family of machines" + select SYS_SUPPORTS_ZBOOT help - Lemote Fulong mini-PC board based on the Chinese Loongson-2E CPU and - an FPGA northbridge + This enables the support of Loongson family of machines. + + Loongson is a family of general-purpose MIPS-compatible CPUs. + developed at Institute of Computing Technology (ICT), + Chinese Academy of Sciences (CAS) in the People's Republic + of China. The chief architect is Professor Weiwu Hu. + +config MACH_LOONGSON1 + bool "Loongson 1 family of machines" + select SYS_SUPPORTS_ZBOOT + help + This enables support for the Loongson 1 based machines. + + Loongson 1 is a family of 32-bit MIPS-compatible SoCs developed by + the ICT (Institute of Computing Technology) and the Chinese Academy + of Sciences. config MIPS_MALTA bool "MIPS Malta board" @@ -188,14 +311,15 @@ config MIPS_MALTA select BOOT_RAW select CEVT_R4K select CSRC_R4K - select DMA_NONCOHERENT + select CSRC_GIC + select DMA_MAYBE_COHERENT select GENERIC_ISA_DMA + select HAVE_PCSPKR_PLATFORM select IRQ_CPU select IRQ_GIC select HW_HAS_PCI select I8253 select I8259 - select MIPS_BOARDS_GEN select MIPS_BONITO64 select MIPS_CPU_SCACHE select PCI_GT64XXX_PCI0 @@ -203,75 +327,89 @@ config MIPS_MALTA select SWAP_IO_SPACE select SYS_HAS_CPU_MIPS32_R1 select SYS_HAS_CPU_MIPS32_R2 + select SYS_HAS_CPU_MIPS32_R3_5 select SYS_HAS_CPU_MIPS64_R1 + select SYS_HAS_CPU_MIPS64_R2 select SYS_HAS_CPU_NEVADA select SYS_HAS_CPU_RM7000 - select SYS_HAS_EARLY_PRINTK select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_64BIT_KERNEL select SYS_SUPPORTS_BIG_ENDIAN select SYS_SUPPORTS_LITTLE_ENDIAN + select SYS_SUPPORTS_MIPS_CMP + select SYS_SUPPORTS_MIPS_CPS + select SYS_SUPPORTS_MIPS16 select SYS_SUPPORTS_MULTITHREADING select SYS_SUPPORTS_SMARTMIPS + select SYS_SUPPORTS_ZBOOT help This enables support for the MIPS Technologies Malta evaluation board. -config MIPS_SIM - bool 'MIPS simulator (MIPSsim)' +config MIPS_SEAD3 + bool "MIPS SEAD3 board" + select BOOT_ELF32 + select BOOT_RAW select CEVT_R4K select CSRC_R4K + select CSRC_GIC + select CPU_MIPSR2_IRQ_VI + select CPU_MIPSR2_IRQ_EI select DMA_NONCOHERENT - select SYS_HAS_EARLY_PRINTK select IRQ_CPU - select BOOT_RAW + select IRQ_GIC + select LIBFDT + select MIPS_MSC select SYS_HAS_CPU_MIPS32_R1 select SYS_HAS_CPU_MIPS32_R2 + select SYS_HAS_CPU_MIPS64_R1 select SYS_HAS_EARLY_PRINTK select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_64BIT_KERNEL select SYS_SUPPORTS_BIG_ENDIAN - select SYS_SUPPORTS_MULTITHREADING select SYS_SUPPORTS_LITTLE_ENDIAN + select SYS_SUPPORTS_SMARTMIPS + select SYS_SUPPORTS_MICROMIPS + select SYS_SUPPORTS_MIPS16 + select USB_EHCI_BIG_ENDIAN_DESC + select USB_EHCI_BIG_ENDIAN_MMIO + select USE_OF help - This option enables support for MIPS Technologies MIPSsim software - emulator. + This enables support for the MIPS Technologies SEAD3 evaluation + board. -config MARKEINS - bool "NEC EMMA2RH Mark-eins" - select CEVT_R4K - select CSRC_R4K - select DMA_NONCOHERENT +config NEC_MARKEINS + bool "NEC EMMA2RH Mark-eins board" + select SOC_EMMA2RH select HW_HAS_PCI - select IRQ_CPU - select SWAP_IO_SPACE - select SYS_SUPPORTS_32BIT_KERNEL - select SYS_SUPPORTS_BIG_ENDIAN - select SYS_SUPPORTS_LITTLE_ENDIAN - select SYS_HAS_CPU_R5000 help - This enables support for the R5432-based NEC Mark-eins - boards with R5500 CPU. + This enables support for the NEC Electronics Mark-eins boards. config MACH_VR41XX bool "NEC VR4100 series based machines" select CEVT_R4K select CSRC_R4K select SYS_HAS_CPU_VR41XX - select GENERIC_HARDIRQS_NO__DO_IRQ + select SYS_SUPPORTS_MIPS16 + select ARCH_REQUIRE_GPIOLIB -config PNX8550_JBS - bool "NXP PNX8550 based JBS board" - select PNX8550 - select SYS_SUPPORTS_LITTLE_ENDIAN +config NXP_STB220 + bool "NXP STB220 board" + select SOC_PNX833X + help + Support for NXP Semiconductors STB220 Development Board. -config PNX8550_STB810 - bool "NXP PNX8550 based STB810 board" - select PNX8550 - select SYS_SUPPORTS_LITTLE_ENDIAN +config NXP_STB225 + bool "NXP 225 board" + select SOC_PNX833X + select SOC_PNX8335 + help + Support for NXP Semiconductors STB225 Development Board. config PMC_MSP bool "PMC-Sierra MSP chipsets" - depends on EXPERIMENTAL + select CEVT_R4K + select CSRC_R4K select DMA_NONCOHERENT select SWAP_IO_SPACE select NO_EXCEPT_FILL @@ -280,42 +418,41 @@ config PMC_MSP select SYS_HAS_CPU_MIPS32_R2 select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_BIG_ENDIAN - select SYS_SUPPORTS_KGDB + select SYS_SUPPORTS_MIPS16 select IRQ_CPU select SERIAL_8250 select SERIAL_8250_CONSOLE + select USB_EHCI_BIG_ENDIAN_MMIO + select USB_EHCI_BIG_ENDIAN_DESC help This adds support for the PMC-Sierra family of Multi-Service Processor System-On-A-Chips. These parts include a number of integrated peripherals, interfaces and DSPs in addition to a variety of MIPS cores. -config PMC_YOSEMITE - bool "PMC-Sierra Yosemite eval board" +config RALINK + bool "Ralink based machines" select CEVT_R4K select CSRC_R4K - select DMA_COHERENT - select HW_HAS_PCI + select BOOT_RAW + select DMA_NONCOHERENT select IRQ_CPU - select IRQ_CPU_RM7K - select IRQ_CPU_RM9K - select SWAP_IO_SPACE - select SYS_HAS_CPU_RM9000 - select SYS_HAS_EARLY_PRINTK + select USE_OF + select SYS_HAS_CPU_MIPS32_R1 + select SYS_HAS_CPU_MIPS32_R2 select SYS_SUPPORTS_32BIT_KERNEL - select SYS_SUPPORTS_64BIT_KERNEL - select SYS_SUPPORTS_BIG_ENDIAN - select SYS_SUPPORTS_HIGHMEM - select SYS_SUPPORTS_KGDB - select SYS_SUPPORTS_SMP - help - Yosemite is an evaluation board for the RM9000x2 processor - manufactured by PMC-Sierra. + select SYS_SUPPORTS_LITTLE_ENDIAN + select SYS_SUPPORTS_MIPS16 + select SYS_HAS_EARLY_PRINTK + select HAVE_MACH_CLKDEV + select CLKDEV_LOOKUP + select ARCH_HAS_RESET_CONTROLLER + select RESET_CONTROLLER config SGI_IP22 bool "SGI IP22 (Indy/Indigo2)" - select ARC - select ARC32 + select FW_ARC + select FW_ARC32 select BOOT_ELF32 select CEVT_R4K select CSRC_R4K @@ -327,7 +464,6 @@ config SGI_IP22 select IP22_CPU_SCACHE select IRQ_CPU select GENERIC_ISA_DMA_SUPPORT_BROKEN - select SGI_HAS_DS1286 select SGI_HAS_I8042 select SGI_HAS_INDYDOG select SGI_HAS_HAL2 @@ -337,10 +473,18 @@ config SGI_IP22 select SWAP_IO_SPACE select SYS_HAS_CPU_R4X00 select SYS_HAS_CPU_R5000 - select SYS_HAS_EARLY_PRINTK + # + # Disable EARLY_PRINTK for now since it leads to overwritten prom + # memory during early boot on some machines. + # + # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com + # for a more details discussion + # + # select SYS_HAS_EARLY_PRINTK select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_64BIT_KERNEL select SYS_SUPPORTS_BIG_ENDIAN + select MIPS_L1_CACHE_SHIFT_7 help This are the SGI Indy, Challenge S and Indigo2, as well as certain OEM variants like the Tandem CMN B006S. To compile a Linux kernel @@ -348,31 +492,29 @@ config SGI_IP22 config SGI_IP27 bool "SGI IP27 (Origin200/2000)" - select ARC - select ARC64 + select FW_ARC + select FW_ARC64 select BOOT_ELF64 select DEFAULT_SGI_PARTITION - select DMA_IP27 + select DMA_COHERENT select SYS_HAS_EARLY_PRINTK select HW_HAS_PCI select NR_CPUS_DEFAULT_64 select SYS_HAS_CPU_R10000 select SYS_SUPPORTS_64BIT_KERNEL select SYS_SUPPORTS_BIG_ENDIAN - select SYS_SUPPORTS_KGDB select SYS_SUPPORTS_NUMA select SYS_SUPPORTS_SMP - select GENERIC_HARDIRQS_NO__DO_IRQ + select MIPS_L1_CACHE_SHIFT_7 help This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics workstations. To compile a Linux kernel that runs on these, say Y here. config SGI_IP28 - bool "SGI IP28 (Indigo2 R10k) (EXPERIMENTAL)" - depends on EXPERIMENTAL - select ARC - select ARC64 + bool "SGI IP28 (Indigo2 R10k)" + select FW_ARC + select FW_ARC64 select BOOT_ELF64 select CEVT_R4K select CSRC_R4K @@ -383,7 +525,6 @@ config SGI_IP28 select HW_HAS_EISA select I8253 select I8259 - select SGI_HAS_DS1286 select SGI_HAS_I8042 select SGI_HAS_INDYDOG select SGI_HAS_HAL2 @@ -392,7 +533,14 @@ config SGI_IP28 select SGI_HAS_ZILOG select SWAP_IO_SPACE select SYS_HAS_CPU_R10000 - select SYS_HAS_EARLY_PRINTK + # + # Disable EARLY_PRINTK for now since it leads to overwritten prom + # memory during early boot on some machines. + # + # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com + # for a more details discussion + # + # select SYS_HAS_EARLY_PRINTK select SYS_SUPPORTS_64BIT_KERNEL select SYS_SUPPORTS_BIG_ENDIAN help @@ -401,8 +549,8 @@ config SGI_IP28 config SGI_IP32 bool "SGI IP32 (O2)" - select ARC - select ARC32 + select FW_ARC + select FW_ARC32 select BOOT_ELF32 select CEVT_R4K select CSRC_R4K @@ -422,7 +570,6 @@ config SGI_IP32 config SIBYTE_CRHINE bool "Sibyte BCM91120C-CRhine" - depends on EXPERIMENTAL select BOOT_ELF32 select DMA_COHERENT select SIBYTE_BCM1120 @@ -433,7 +580,6 @@ config SIBYTE_CRHINE config SIBYTE_CARMEL bool "Sibyte BCM91120x-Carmel" - depends on EXPERIMENTAL select BOOT_ELF32 select DMA_COHERENT select SIBYTE_BCM1120 @@ -444,7 +590,6 @@ config SIBYTE_CARMEL config SIBYTE_CRHONE bool "Sibyte BCM91125C-CRhone" - depends on EXPERIMENTAL select BOOT_ELF32 select DMA_COHERENT select SIBYTE_BCM1125 @@ -456,7 +601,6 @@ config SIBYTE_CRHONE config SIBYTE_RHONE bool "Sibyte BCM91125E-Rhone" - depends on EXPERIMENTAL select BOOT_ELF32 select DMA_COHERENT select SIBYTE_BCM1125H @@ -469,22 +613,20 @@ config SIBYTE_SWARM bool "Sibyte BCM91250A-SWARM" select BOOT_ELF32 select DMA_COHERENT - select NR_CPUS_DEFAULT_2 + select HAVE_PATA_PLATFORM select SIBYTE_SB1250 select SWAP_IO_SPACE select SYS_HAS_CPU_SB1 select SYS_SUPPORTS_BIG_ENDIAN select SYS_SUPPORTS_HIGHMEM - select SYS_SUPPORTS_KGDB select SYS_SUPPORTS_LITTLE_ENDIAN select ZONE_DMA32 if 64BIT config SIBYTE_LITTLESUR bool "Sibyte BCM91250C2-LittleSur" - depends on EXPERIMENTAL select BOOT_ELF32 select DMA_COHERENT - select NR_CPUS_DEFAULT_2 + select HAVE_PATA_PLATFORM select SIBYTE_SB1250 select SWAP_IO_SPACE select SYS_HAS_CPU_SB1 @@ -494,10 +636,8 @@ config SIBYTE_LITTLESUR config SIBYTE_SENTOSA bool "Sibyte BCM91250E-Sentosa" - depends on EXPERIMENTAL select BOOT_ELF32 select DMA_COHERENT - select NR_CPUS_DEFAULT_2 select SIBYTE_SB1250 select SWAP_IO_SPACE select SYS_HAS_CPU_SB1 @@ -519,9 +659,9 @@ config SIBYTE_BIGSUR config SNI_RM bool "SNI RM200/300/400" - select ARC if CPU_LITTLE_ENDIAN - select ARC32 if CPU_LITTLE_ENDIAN - select SNIPROM if CPU_BIG_ENDIAN + select FW_ARC if CPU_LITTLE_ENDIAN + select FW_ARC32 if CPU_LITTLE_ENDIAN + select FW_SNIPROM if CPU_BIG_ENDIAN select ARCH_MAY_HAVE_PC_FDC select BOOT_ELF32 select CEVT_R4K @@ -529,6 +669,7 @@ config SNI_RM select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN select DMA_NONCOHERENT select GENERIC_ISA_DMA + select HAVE_PCSPKR_PLATFORM select HW_HAS_EISA select HW_HAS_PCI select IRQ_CPU @@ -542,7 +683,7 @@ config SNI_RM select R5000_CPU_SCACHE select SYS_HAS_EARLY_PRINTK select SYS_SUPPORTS_32BIT_KERNEL - select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL + select SYS_SUPPORTS_64BIT_KERNEL select SYS_SUPPORTS_BIG_ENDIAN select SYS_SUPPORTS_HIGHMEM select SYS_SUPPORTS_LITTLE_ENDIAN @@ -563,7 +704,6 @@ config MIKROTIK_RB532 select CEVT_R4K select CSRC_R4K select DMA_NONCOHERENT - select GENERIC_HARDIRQS_NO__DO_IRQ select HW_HAS_PCI select IRQ_CPU select SYS_HAS_CPU_MIPS32_R1 @@ -571,53 +711,144 @@ config MIKROTIK_RB532 select SYS_SUPPORTS_LITTLE_ENDIAN select SWAP_IO_SPACE select BOOT_RAW - select GENERIC_GPIO + select ARCH_REQUIRE_GPIOLIB + select MIPS_L1_CACHE_SHIFT_4 help Support the Mikrotik(tm) RouterBoard 532 series, based on the IDT RC32434 SoC. -config WR_PPMC - bool "Wind River PPMC board" +config CAVIUM_OCTEON_SOC + bool "Cavium Networks Octeon SoC based boards" + select CEVT_R4K + select 64BIT_PHYS_ADDR + select DMA_COHERENT + select SYS_SUPPORTS_64BIT_KERNEL + select SYS_SUPPORTS_BIG_ENDIAN + select EDAC_SUPPORT + select SYS_SUPPORTS_HOTPLUG_CPU + select SYS_HAS_EARLY_PRINTK + select SYS_HAS_CPU_CAVIUM_OCTEON + select SWAP_IO_SPACE + select HW_HAS_PCI + select ZONE_DMA32 + select HOLES_IN_ZONE + select ARCH_REQUIRE_GPIOLIB + select LIBFDT + select USE_OF + select ARCH_SPARSEMEM_ENABLE + select SYS_SUPPORTS_SMP + select NR_CPUS_DEFAULT_16 + help + This option supports all of the Octeon reference boards from Cavium + Networks. It builds a kernel that dynamically determines the Octeon + CPU type and supports all known board reference implementations. + Some of the supported boards are: + EBT3000 + EBH3000 + EBH3100 + Thunder + Kodama + Hikari + Say Y here for most Octeon reference boards. + +config NLM_XLR_BOARD + bool "Netlogic XLR/XLS based systems" + select BOOT_ELF32 + select NLM_COMMON + select SYS_HAS_CPU_XLR + select SYS_SUPPORTS_SMP + select HW_HAS_PCI + select SWAP_IO_SPACE + select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_64BIT_KERNEL + select 64BIT_PHYS_ADDR + select SYS_SUPPORTS_BIG_ENDIAN + select SYS_SUPPORTS_HIGHMEM + select DMA_COHERENT + select NR_CPUS_DEFAULT_32 select CEVT_R4K select CSRC_R4K select IRQ_CPU + select ZONE_DMA32 if 64BIT + select SYNC_R4K + select SYS_HAS_EARLY_PRINTK + select SYS_SUPPORTS_ZBOOT + select SYS_SUPPORTS_ZBOOT_UART16550 + help + Support for systems based on Netlogic XLR and XLS processors. + Say Y here if you have a XLR or XLS based board. + +config NLM_XLP_BOARD + bool "Netlogic XLP based systems" select BOOT_ELF32 - select DMA_NONCOHERENT + select NLM_COMMON + select SYS_HAS_CPU_XLP + select SYS_SUPPORTS_SMP select HW_HAS_PCI - select PCI_GT64XXX_PCI0 - select SWAP_IO_SPACE - select SYS_HAS_CPU_MIPS32_R1 - select SYS_HAS_CPU_MIPS32_R2 - select SYS_HAS_CPU_MIPS64_R1 - select SYS_HAS_CPU_NEVADA - select SYS_HAS_CPU_RM7000 select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_64BIT_KERNEL + select 64BIT_PHYS_ADDR select SYS_SUPPORTS_BIG_ENDIAN select SYS_SUPPORTS_LITTLE_ENDIAN + select SYS_SUPPORTS_HIGHMEM + select DMA_COHERENT + select NR_CPUS_DEFAULT_32 + select CEVT_R4K + select CSRC_R4K + select IRQ_CPU + select ZONE_DMA32 if 64BIT + select SYNC_R4K + select SYS_HAS_EARLY_PRINTK + select USE_OF + select SYS_SUPPORTS_ZBOOT + select SYS_SUPPORTS_ZBOOT_UART16550 help - This enables support for the Wind River MIPS32 4KC PPMC evaluation - board, which is based on GT64120 bridge chip. + This board is based on Netlogic XLP Processor. + Say Y here if you have a XLP based board. + +config MIPS_PARAVIRT + bool "Para-Virtualized guest system" + select CEVT_R4K + select CSRC_R4K + select DMA_COHERENT + select SYS_SUPPORTS_64BIT_KERNEL + select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_BIG_ENDIAN + select SYS_SUPPORTS_SMP + select NR_CPUS_DEFAULT_4 + select SYS_HAS_EARLY_PRINTK + select SYS_HAS_CPU_MIPS32_R2 + select SYS_HAS_CPU_MIPS64_R2 + select SYS_HAS_CPU_CAVIUM_OCTEON + select HW_HAS_PCI + select SWAP_IO_SPACE + help + This option supports guest running under ???? endchoice -source "arch/mips/au1000/Kconfig" -source "arch/mips/basler/excite/Kconfig" +source "arch/mips/alchemy/Kconfig" +source "arch/mips/ath79/Kconfig" +source "arch/mips/bcm47xx/Kconfig" +source "arch/mips/bcm63xx/Kconfig" source "arch/mips/jazz/Kconfig" +source "arch/mips/jz4740/Kconfig" +source "arch/mips/lantiq/Kconfig" source "arch/mips/lasat/Kconfig" -source "arch/mips/pmc-sierra/Kconfig" +source "arch/mips/pmcs-msp71xx/Kconfig" +source "arch/mips/ralink/Kconfig" source "arch/mips/sgi-ip27/Kconfig" source "arch/mips/sibyte/Kconfig" source "arch/mips/txx9/Kconfig" source "arch/mips/vr41xx/Kconfig" +source "arch/mips/cavium-octeon/Kconfig" +source "arch/mips/loongson/Kconfig" +source "arch/mips/loongson1/Kconfig" +source "arch/mips/netlogic/Kconfig" +source "arch/mips/paravirt/Kconfig" endmenu -config GENERIC_LOCKBREAK - bool - default y - depends on SMP && PREEMPT - config RWSEM_GENERIC_SPINLOCK bool default y @@ -633,14 +864,6 @@ config ARCH_HAS_ILOG2_U64 bool default n -config ARCH_SUPPORTS_OPROFILE - bool - default y if !MIPS_MT_SMTC - -config GENERIC_FIND_NEXT_BIT - bool - default y - config GENERIC_HWEIGHT bool default y @@ -649,30 +872,14 @@ config GENERIC_CALIBRATE_DELAY bool default y -config GENERIC_CLOCKEVENTS - bool - default y - -config GENERIC_TIME +config SCHED_OMIT_FRAME_POINTER bool default y -config GENERIC_CMOS_UPDATE - bool - default y - -config SCHED_NO_NO_OMIT_FRAME_POINTER - bool - default y - -config GENERIC_HARDIRQS_NO__DO_IRQ - bool - default n - # # Select some configuration options automatically based on user selections. # -config ARC +config FW_ARC bool config ARCH_MAY_HAVE_PC_FDC @@ -693,6 +900,10 @@ config CEVT_GT641XX config CEVT_R4K bool +config CEVT_GIC + select MIPS_CM + bool + config CEVT_SB1250 bool @@ -708,50 +919,52 @@ config CSRC_IOASIC config CSRC_R4K bool +config CSRC_GIC + select MIPS_CM + bool + config CSRC_SB1250 bool config GPIO_TXX9 - select GENERIC_GPIO select ARCH_REQUIRE_GPIOLIB bool -config CFE +config FW_CFE bool -config DMA_COHERENT +config ARCH_DMA_ADDR_T_64BIT + def_bool (HIGHMEM && 64BIT_PHYS_ADDR) || 64BIT + +config DMA_MAYBE_COHERENT + select DMA_NONCOHERENT bool -config DMA_IP27 +config DMA_COHERENT bool config DMA_NONCOHERENT bool - select DMA_NEED_PCI_MAP_STATE + select NEED_DMA_MAP_STATE -config DMA_NEED_PCI_MAP_STATE +config NEED_DMA_MAP_STATE bool -config EARLY_PRINTK - bool "Early printk" if EMBEDDED && DEBUG_KERNEL - depends on SYS_HAS_EARLY_PRINTK - default y - help - This option enables special console drivers which allow the kernel - to print messages very early in the bootup process. - - This is useful for kernel debugging when your machine crashes very - early before the console code is initialized. For normal operation, - it is not recommended because it looks ugly on some machines and - doesn't cooperate with an X server. You should normally say N here, - unless you want to debug such a crash. - config SYS_HAS_EARLY_PRINTK bool config HOTPLUG_CPU + bool "Support for hot-pluggable CPUs" + depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU + help + Say Y here to allow turning CPUs off and on. CPUs can be + controlled through /sys/devices/system/cpu. + (Note: power management support will enable this option + automatically on SMP systems. ) + Say N if you want to disable CPU hotplug. + +config SYS_SUPPORTS_HOTPLUG_CPU bool - default n config I8259 bool @@ -765,33 +978,37 @@ config MIPS_MSC config MIPS_NILE4 bool -config MIPS_DISABLE_OBSOLETE_IDE - bool - config SYNC_R4K bool -config NO_IOPORT +config MIPS_MACHINE + def_bool n + +config NO_IOPORT_MAP def_bool n config GENERIC_ISA_DMA bool select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n + select ISA_DMA_API config GENERIC_ISA_DMA_SUPPORT_BROKEN bool select GENERIC_ISA_DMA -config GENERIC_GPIO +config ISA_DMA_API + bool + +config HOLES_IN_ZONE bool # -# Endianess selection. Sufficiently obscure so many users don't know what to +# Endianness selection. Sufficiently obscure so many users don't know what to # answer,so we try hard to limit the available choices. Also the use of a # choice statement should be more obvious to the user. # choice - prompt "Endianess selection" + prompt "Endianness selection" help Some MIPS machines can be configured for either little or big endian byte order. These modes require different kernels and a different @@ -806,10 +1023,12 @@ config CPU_BIG_ENDIAN config CPU_LITTLE_ENDIAN bool "Little endian" depends on SYS_SUPPORTS_LITTLE_ENDIAN - help endchoice +config EXPORT_UASM + bool + config SYS_SUPPORTS_APM_EMULATION bool @@ -819,13 +1038,18 @@ config SYS_SUPPORTS_BIG_ENDIAN config SYS_SUPPORTS_LITTLE_ENDIAN bool -config IRQ_CPU +config SYS_SUPPORTS_HUGETLBFS bool + depends on CPU_SUPPORTS_HUGEPAGES && 64BIT + default y -config IRQ_CPU_RM7K +config MIPS_HUGE_TLB_SUPPORT + def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE + +config IRQ_CPU bool -config IRQ_CPU_RM9K +config IRQ_CPU_RM7K bool config IRQ_MSP_SLP @@ -841,9 +1065,7 @@ config IRQ_GT641XX bool config IRQ_GIC - bool - -config MIPS_BOARDS_GEN + select MIPS_CM bool config PCI_GT64XXX_PCI0 @@ -852,37 +1074,36 @@ config PCI_GT64XXX_PCI0 config NO_EXCEPT_FILL bool -config MIPS_RM9122 - bool - select SERIAL_RM9000 - -config PNX8550 - bool - select SOC_PNX8550 - -config SOC_PNX8550 +config SOC_EMMA2RH bool + select CEVT_R4K + select CSRC_R4K select DMA_NONCOHERENT - select HW_HAS_PCI - select SYS_HAS_CPU_MIPS32_R1 - select SYS_HAS_EARLY_PRINTK + select IRQ_CPU + select SWAP_IO_SPACE + select SYS_HAS_CPU_R5500 select SYS_SUPPORTS_32BIT_KERNEL - select GENERIC_HARDIRQS_NO__DO_IRQ - select SYS_SUPPORTS_KGDB - select GENERIC_GPIO - -config SWAP_IO_SPACE - bool + select SYS_SUPPORTS_64BIT_KERNEL + select SYS_SUPPORTS_BIG_ENDIAN -config EMMA2RH +config SOC_PNX833X bool - depends on MARKEINS - default y + select CEVT_R4K + select CSRC_R4K + select IRQ_CPU + select DMA_NONCOHERENT + select SYS_HAS_CPU_MIPS32_R2 + select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_LITTLE_ENDIAN + select SYS_SUPPORTS_BIG_ENDIAN + select SYS_SUPPORTS_MIPS16 + select CPU_MIPSR2_IRQ_VI -config SERIAL_RM9000 +config SOC_PNX8335 bool + select SOC_PNX833X -config SGI_HAS_DS1286 +config SWAP_IO_SPACE bool config SGI_HAS_INDYDOG @@ -906,20 +1127,33 @@ config SGI_HAS_I8042 config DEFAULT_SGI_PARTITION bool -config ARC32 +config FW_ARC32 bool -config SNIPROM +config FW_SNIPROM bool config BOOT_ELF32 bool +config MIPS_L1_CACHE_SHIFT_4 + bool + +config MIPS_L1_CACHE_SHIFT_5 + bool + +config MIPS_L1_CACHE_SHIFT_6 + bool + +config MIPS_L1_CACHE_SHIFT_7 + bool + config MIPS_L1_CACHE_SHIFT int - default "4" if MACH_DECSTATION || MIKROTIK_RB532 - default "7" if SGI_IP22 || SGI_IP27 || SGI_IP28 || SNI_RM - default "4" if PMC_MSP4200_EVAL + default "4" if MIPS_L1_CACHE_SHIFT_4 + default "5" if MIPS_L1_CACHE_SHIFT_5 + default "6" if MIPS_L1_CACHE_SHIFT_6 + default "7" if MIPS_L1_CACHE_SHIFT_7 default "5" config HAVE_STD_PC_SERIAL_PORT @@ -939,7 +1173,7 @@ config ARC_PROMLIB depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32 default y -config ARC64 +config FW_ARC64 bool config BOOT_ELF64 @@ -951,20 +1185,53 @@ choice prompt "CPU type" default CPU_R4X00 -config CPU_LOONGSON2 - bool "Loongson 2" - depends on SYS_HAS_CPU_LOONGSON2 - select CPU_SUPPORTS_32BIT_KERNEL +config CPU_LOONGSON3 + bool "Loongson 3 CPU" + depends on SYS_HAS_CPU_LOONGSON3 select CPU_SUPPORTS_64BIT_KERNEL select CPU_SUPPORTS_HIGHMEM + select CPU_SUPPORTS_HUGEPAGES + select WEAK_ORDERING + select WEAK_REORDERING_BEYOND_LLSC + help + The Loongson 3 processor implements the MIPS64R2 instruction + set with many extensions. + +config CPU_LOONGSON2E + bool "Loongson 2E" + depends on SYS_HAS_CPU_LOONGSON2E + select CPU_LOONGSON2 help The Loongson 2E processor implements the MIPS III instruction set with many extensions. + It has an internal FPGA northbridge, which is compatible to + bonito64. + +config CPU_LOONGSON2F + bool "Loongson 2F" + depends on SYS_HAS_CPU_LOONGSON2F + select CPU_LOONGSON2 + select ARCH_REQUIRE_GPIOLIB + help + The Loongson 2F processor implements the MIPS III instruction set + with many extensions. + + Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller + have a similar programming interface with FPGA northbridge used in + Loongson2E. + +config CPU_LOONGSON1B + bool "Loongson 1B" + depends on SYS_HAS_CPU_LOONGSON1B + select CPU_LOONGSON1 + help + The Loongson 1B is a 32-bit SoC, which implements the MIPS32 + release 2 instruction set. + config CPU_MIPS32_R1 bool "MIPS32 Release 1" depends on SYS_HAS_CPU_MIPS32_R1 - select CPU_HAS_LLSC select CPU_HAS_PREFETCH select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_HIGHMEM @@ -982,10 +1249,11 @@ config CPU_MIPS32_R1 config CPU_MIPS32_R2 bool "MIPS32 Release 2" depends on SYS_HAS_CPU_MIPS32_R2 - select CPU_HAS_LLSC select CPU_HAS_PREFETCH select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_HIGHMEM + select CPU_SUPPORTS_MSA + select HAVE_KVM help Choose this option to build a kernel for release 2 or later of the MIPS32 architecture. Most modern embedded systems with a 32-bit @@ -996,11 +1264,11 @@ config CPU_MIPS32_R2 config CPU_MIPS64_R1 bool "MIPS64 Release 1" depends on SYS_HAS_CPU_MIPS64_R1 - select CPU_HAS_LLSC select CPU_HAS_PREFETCH select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_64BIT_KERNEL select CPU_SUPPORTS_HIGHMEM + select CPU_SUPPORTS_HUGEPAGES help Choose this option to build a kernel for release 1 or later of the MIPS64 architecture. Many modern embedded systems with a 64-bit @@ -1015,11 +1283,12 @@ config CPU_MIPS64_R1 config CPU_MIPS64_R2 bool "MIPS64 Release 2" depends on SYS_HAS_CPU_MIPS64_R2 - select CPU_HAS_LLSC select CPU_HAS_PREFETCH select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_64BIT_KERNEL select CPU_SUPPORTS_HIGHMEM + select CPU_SUPPORTS_HUGEPAGES + select CPU_SUPPORTS_MSA help Choose this option to build a kernel for release 2 or later of the MIPS64 architecture. Many modern embedded systems with a 64-bit @@ -1060,7 +1329,6 @@ config CPU_VR41XX config CPU_R4300 bool "R4300" depends on SYS_HAS_CPU_R4300 - select CPU_HAS_LLSC select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_64BIT_KERNEL help @@ -1069,9 +1337,9 @@ config CPU_R4300 config CPU_R4X00 bool "R4x00" depends on SYS_HAS_CPU_R4X00 - select CPU_HAS_LLSC select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_64BIT_KERNEL + select CPU_SUPPORTS_HUGEPAGES help MIPS Technologies R4000-series processors other than 4300, including the R4000, R4400, R4600, and 4700. @@ -1079,31 +1347,39 @@ config CPU_R4X00 config CPU_TX49XX bool "R49XX" depends on SYS_HAS_CPU_TX49XX - select CPU_HAS_LLSC select CPU_HAS_PREFETCH select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_64BIT_KERNEL + select CPU_SUPPORTS_HUGEPAGES config CPU_R5000 bool "R5000" depends on SYS_HAS_CPU_R5000 - select CPU_HAS_LLSC select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_64BIT_KERNEL + select CPU_SUPPORTS_HUGEPAGES help MIPS Technologies R5000-series processors other than the Nevada. config CPU_R5432 bool "R5432" depends on SYS_HAS_CPU_R5432 - select CPU_HAS_LLSC select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_64BIT_KERNEL + select CPU_SUPPORTS_HUGEPAGES + +config CPU_R5500 + bool "R5500" + depends on SYS_HAS_CPU_R5500 + select CPU_SUPPORTS_32BIT_KERNEL + select CPU_SUPPORTS_64BIT_KERNEL + select CPU_SUPPORTS_HUGEPAGES + help + NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV + instruction set. config CPU_R6000 bool "R6000" - depends on EXPERIMENTAL - select CPU_HAS_LLSC depends on SYS_HAS_CPU_R6000 select CPU_SUPPORTS_32BIT_KERNEL help @@ -1113,17 +1389,15 @@ config CPU_R6000 config CPU_NEVADA bool "RM52xx" depends on SYS_HAS_CPU_NEVADA - select CPU_HAS_LLSC select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_64BIT_KERNEL + select CPU_SUPPORTS_HUGEPAGES help QED / PMC-Sierra RM52xx-series ("Nevada") processors. config CPU_R8000 bool "R8000" - depends on EXPERIMENTAL depends on SYS_HAS_CPU_R8000 - select CPU_HAS_LLSC select CPU_HAS_PREFETCH select CPU_SUPPORTS_64BIT_KERNEL help @@ -1133,45 +1407,201 @@ config CPU_R8000 config CPU_R10000 bool "R10000" depends on SYS_HAS_CPU_R10000 - select CPU_HAS_LLSC select CPU_HAS_PREFETCH select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_64BIT_KERNEL select CPU_SUPPORTS_HIGHMEM + select CPU_SUPPORTS_HUGEPAGES help MIPS Technologies R10000-series processors. config CPU_RM7000 bool "RM7000" depends on SYS_HAS_CPU_RM7000 - select CPU_HAS_LLSC select CPU_HAS_PREFETCH select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_64BIT_KERNEL select CPU_SUPPORTS_HIGHMEM + select CPU_SUPPORTS_HUGEPAGES -config CPU_RM9000 - bool "RM9000" - depends on SYS_HAS_CPU_RM9000 - select CPU_HAS_LLSC - select CPU_HAS_PREFETCH +config CPU_SB1 + bool "SB1" + depends on SYS_HAS_CPU_SB1 select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_64BIT_KERNEL select CPU_SUPPORTS_HIGHMEM + select CPU_SUPPORTS_HUGEPAGES select WEAK_ORDERING -config CPU_SB1 - bool "SB1" - depends on SYS_HAS_CPU_SB1 - select CPU_HAS_LLSC +config CPU_CAVIUM_OCTEON + bool "Cavium Octeon processor" + depends on SYS_HAS_CPU_CAVIUM_OCTEON + select CPU_HAS_PREFETCH + select CPU_SUPPORTS_64BIT_KERNEL + select WEAK_ORDERING + select CPU_SUPPORTS_HIGHMEM + select CPU_SUPPORTS_HUGEPAGES + select USB_EHCI_BIG_ENDIAN_MMIO + select MIPS_L1_CACHE_SHIFT_7 + help + The Cavium Octeon processor is a highly integrated chip containing + many ethernet hardware widgets for networking tasks. The processor + can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets. + Full details can be found at http://www.caviumnetworks.com. + +config CPU_BMIPS + bool "Broadcom BMIPS" + depends on SYS_HAS_CPU_BMIPS + select CPU_MIPS32 + select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300 + select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350 + select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380 + select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000 + select CPU_SUPPORTS_32BIT_KERNEL + select DMA_NONCOHERENT + select IRQ_CPU + select SWAP_IO_SPACE + select WEAK_ORDERING + select CPU_SUPPORTS_HIGHMEM + select CPU_HAS_PREFETCH + help + Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors. + +config CPU_XLR + bool "Netlogic XLR SoC" + depends on SYS_HAS_CPU_XLR select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_64BIT_KERNEL select CPU_SUPPORTS_HIGHMEM + select CPU_SUPPORTS_HUGEPAGES select WEAK_ORDERING + select WEAK_REORDERING_BEYOND_LLSC + help + Netlogic Microsystems XLR/XLS processors. +config CPU_XLP + bool "Netlogic XLP SoC" + depends on SYS_HAS_CPU_XLP + select CPU_SUPPORTS_32BIT_KERNEL + select CPU_SUPPORTS_64BIT_KERNEL + select CPU_SUPPORTS_HIGHMEM + select WEAK_ORDERING + select WEAK_REORDERING_BEYOND_LLSC + select CPU_HAS_PREFETCH + select CPU_MIPSR2 + help + Netlogic Microsystems XLP processors. endchoice -config SYS_HAS_CPU_LOONGSON2 +config CPU_MIPS32_3_5_FEATURES + bool "MIPS32 Release 3.5 Features" + depends on SYS_HAS_CPU_MIPS32_R3_5 + depends on CPU_MIPS32_R2 + help + Choose this option to build a kernel for release 2 or later of the + MIPS32 architecture including features from the 3.5 release such as + support for Enhanced Virtual Addressing (EVA). + +config CPU_MIPS32_3_5_EVA + bool "Enhanced Virtual Addressing (EVA)" + depends on CPU_MIPS32_3_5_FEATURES + select EVA + default y + help + Choose this option if you want to enable the Enhanced Virtual + Addressing (EVA) on your MIPS32 core (such as proAptiv). + One of its primary benefits is an increase in the maximum size + of lowmem (up to 3GB). If unsure, say 'N' here. + +if CPU_LOONGSON2F +config CPU_NOP_WORKAROUNDS + bool + +config CPU_JUMP_WORKAROUNDS + bool + +config CPU_LOONGSON2F_WORKAROUNDS + bool "Loongson 2F Workarounds" + default y + select CPU_NOP_WORKAROUNDS + select CPU_JUMP_WORKAROUNDS + help + Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which + require workarounds. Without workarounds the system may hang + unexpectedly. For more information please refer to the gas + -mfix-loongson2f-nop and -mfix-loongson2f-jump options. + + Loongson 2F03 and later have fixed these issues and no workarounds + are needed. The workarounds have no significant side effect on them + but may decrease the performance of the system so this option should + be disabled unless the kernel is intended to be run on 2F01 or 2F02 + systems. + + If unsure, please say Y. +endif # CPU_LOONGSON2F + +config SYS_SUPPORTS_ZBOOT + bool + select HAVE_KERNEL_GZIP + select HAVE_KERNEL_BZIP2 + select HAVE_KERNEL_LZ4 + select HAVE_KERNEL_LZMA + select HAVE_KERNEL_LZO + select HAVE_KERNEL_XZ + +config SYS_SUPPORTS_ZBOOT_UART16550 + bool + select SYS_SUPPORTS_ZBOOT + +config CPU_LOONGSON2 + bool + select CPU_SUPPORTS_32BIT_KERNEL + select CPU_SUPPORTS_64BIT_KERNEL + select CPU_SUPPORTS_HIGHMEM + select CPU_SUPPORTS_HUGEPAGES + +config CPU_LOONGSON1 + bool + select CPU_MIPS32 + select CPU_MIPSR2 + select CPU_HAS_PREFETCH + select CPU_SUPPORTS_32BIT_KERNEL + select CPU_SUPPORTS_HIGHMEM + +config CPU_BMIPS32_3300 + select SMP_UP if SMP + bool + +config CPU_BMIPS4350 + bool + select SYS_SUPPORTS_SMP + select SYS_SUPPORTS_HOTPLUG_CPU + +config CPU_BMIPS4380 + bool + select SYS_SUPPORTS_SMP + select SYS_SUPPORTS_HOTPLUG_CPU + +config CPU_BMIPS5000 + bool + select MIPS_CPU_SCACHE + select SYS_SUPPORTS_SMP + select SYS_SUPPORTS_HOTPLUG_CPU + +config SYS_HAS_CPU_LOONGSON3 + bool + select CPU_SUPPORTS_CPUFREQ + +config SYS_HAS_CPU_LOONGSON2E + bool + +config SYS_HAS_CPU_LOONGSON2F + bool + select CPU_SUPPORTS_CPUFREQ + select CPU_SUPPORTS_ADDRWINCFG if 64BIT + select CPU_SUPPORTS_UNCACHED_ACCELERATED + +config SYS_HAS_CPU_LOONGSON1B bool config SYS_HAS_CPU_MIPS32_R1 @@ -1180,6 +1610,9 @@ config SYS_HAS_CPU_MIPS32_R1 config SYS_HAS_CPU_MIPS32_R2 bool +config SYS_HAS_CPU_MIPS32_R3_5 + bool + config SYS_HAS_CPU_MIPS64_R1 bool @@ -1210,6 +1643,9 @@ config SYS_HAS_CPU_R5000 config SYS_HAS_CPU_R5432 bool +config SYS_HAS_CPU_R5500 + bool + config SYS_HAS_CPU_R6000 bool @@ -1225,11 +1661,42 @@ config SYS_HAS_CPU_R10000 config SYS_HAS_CPU_RM7000 bool -config SYS_HAS_CPU_RM9000 +config SYS_HAS_CPU_SB1 bool -config SYS_HAS_CPU_SB1 +config SYS_HAS_CPU_CAVIUM_OCTEON + bool + +config SYS_HAS_CPU_BMIPS + bool + +config SYS_HAS_CPU_BMIPS32_3300 + bool + select SYS_HAS_CPU_BMIPS + +config SYS_HAS_CPU_BMIPS4350 + bool + select SYS_HAS_CPU_BMIPS + +config SYS_HAS_CPU_BMIPS4380 + bool + select SYS_HAS_CPU_BMIPS + +config SYS_HAS_CPU_BMIPS5000 + bool + select SYS_HAS_CPU_BMIPS + +config SYS_HAS_CPU_XLR + bool + +config SYS_HAS_CPU_XLP + bool + +config MIPS_MALTA_PM + depends on MIPS_MALTA + depends on PCI bool + default y # # CPU may reorder R->R, R->W, W->R, W->W @@ -1266,7 +1733,10 @@ config CPU_MIPSR1 config CPU_MIPSR2 bool - default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 + default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON + +config EVA + bool config SYS_SUPPORTS_32BIT_KERNEL bool @@ -1276,11 +1746,28 @@ config CPU_SUPPORTS_32BIT_KERNEL bool config CPU_SUPPORTS_64BIT_KERNEL bool +config CPU_SUPPORTS_CPUFREQ + bool +config CPU_SUPPORTS_ADDRWINCFG + bool +config CPU_SUPPORTS_HUGEPAGES + bool +config CPU_SUPPORTS_UNCACHED_ACCELERATED + bool +config MIPS_PGD_C0_CONTEXT + bool + default y if 64BIT && CPU_MIPSR2 && !CPU_XLP + +# +# Set to y for ptrace access to watch registers. +# +config HARDWARE_WATCHPOINTS + bool + default y if CPU_MIPSR1 || CPU_MIPSR2 menu "Kernel type" choice - prompt "Kernel code model" help You should only select this option if you have a workload that @@ -1302,12 +1789,28 @@ config 64BIT endchoice +config KVM_GUEST + bool "KVM Guest Kernel" + depends on BROKEN_ON_SMP + help + Select this option if building a guest kernel for KVM (Trap & Emulate) mode + +config KVM_GUEST_TIMER_FREQ + int "Count/Compare Timer Frequency (MHz)" + depends on KVM_GUEST + default 100 + help + Set this to non-zero if building a guest kernel for KVM to skip RTC + emulation when determining guest CPU Frequency. Instead, the guest's + timer frequency is specified directly. + choice prompt "Kernel page size" default PAGE_SIZE_4KB config PAGE_SIZE_4KB bool "4kB" + depends on !CPU_LOONGSON2 && !CPU_LOONGSON3 help This option select the standard 4kB Linux page size. On some R3000-family processors this is the only available page size. Using @@ -1316,13 +1819,12 @@ config PAGE_SIZE_4KB config PAGE_SIZE_8KB bool "8kB" - depends on EXPERIMENTAL && CPU_R8000 + depends on CPU_R8000 || CPU_CAVIUM_OCTEON help Using 8kB page size will result in higher performance kernel at the price of higher memory consumption. This option is available - only on the R8000 processor. Not that at the time of this writing - this option is still high experimental; there are also issues with - compatibility of user applications. + only on R8000 and cnMIPS processors. Note that you will need a + suitable Linux distribution to support this. config PAGE_SIZE_16KB bool "16kB" @@ -1333,9 +1835,18 @@ config PAGE_SIZE_16KB all non-R3000 family processors. Note that you will need a suitable Linux distribution to support this. +config PAGE_SIZE_32KB + bool "32kB" + depends on CPU_CAVIUM_OCTEON + help + Using 32kB page size will result in higher performance kernel at + the price of higher memory consumption. This option is available + only on cnMIPS cores. Note that you will need a suitable Linux + distribution to support this. + config PAGE_SIZE_64KB bool "64kB" - depends on EXPERIMENTAL && !CPU_R3000 && !CPU_TX39XX + depends on !CPU_R3000 && !CPU_TX39XX help Using 64kB page size will result in higher performance kernel at the price of higher memory consumption. This option is available on @@ -1344,6 +1855,39 @@ config PAGE_SIZE_64KB endchoice +config FORCE_MAX_ZONEORDER + int "Maximum zone order" + range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB + default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB + range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB + default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB + range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB + default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB + range 11 64 + default "11" + help + The kernel memory allocator divides physically contiguous memory + blocks into "zones", where each zone is a power of two number of + pages. This option selects the largest power of two that the kernel + keeps in the memory allocator. If you need to allocate very large + blocks of physically contiguous memory, then you may need to + increase this value. + + This config option is actually maximum order plus one. For example, + a value of 11 means that the largest free memory block is 2^10 pages. + + The page size is not necessarily 4KB. Keep this in mind + when choosing a value for this option. + +config CEVT_GIC + bool "Use GIC global counter for clock events" + depends on IRQ_GIC && !MIPS_SEAD3 + help + Use the GIC global counter for the clock events. The R4K clock + event driver is always present, so if the platform ends up not + detecting a GIC, it will fall back to the R4K timer for the + generation of clock events. + config BOARD_SCACHE bool @@ -1357,6 +1901,7 @@ config IP22_CPU_SCACHE config MIPS_CPU_SCACHE bool select BOARD_SCACHE + select MIPS_L1_CACHE_SHIFT_6 config R5000_CPU_SCACHE bool @@ -1377,50 +1922,37 @@ config SIBYTE_DMA_PAGEOPS config CPU_HAS_PREFETCH bool -choice - prompt "MIPS MT options" +config CPU_GENERIC_DUMP_TLB + bool + default y if !(CPU_R3000 || CPU_R6000 || CPU_R8000 || CPU_TX39XX) -config MIPS_MT_DISABLED - bool "Disable multithreading support." - help - Use this option if your workload can't take advantage of - MIPS hardware multithreading support. On systems that don't have - the option of an MT-enabled processor this option will be the only - option in this menu. +config CPU_R4K_FPU + bool + default y if !(CPU_R3000 || CPU_R6000 || CPU_TX39XX || CPU_CAVIUM_OCTEON) + +config CPU_R4K_CACHE_TLB + bool + default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON) config MIPS_MT_SMP - bool "Use 1 TC on each available VPE for SMP" + bool "MIPS MT SMP support (1 TC on each available VPE)" depends on SYS_SUPPORTS_MULTITHREADING select CPU_MIPSR2_IRQ_VI select CPU_MIPSR2_IRQ_EI + select SYNC_R4K + select MIPS_GIC_IPI select MIPS_MT - select NR_CPUS_DEFAULT_2 select SMP - select SYS_SUPPORTS_SCHED_SMT if SMP - select SYS_SUPPORTS_SMP select SMP_UP - help - This is a kernel model which is also known a VSMP or lately - has been marketesed into SMVP. - -config MIPS_MT_SMTC - bool "SMTC: Use all TCs on all VPEs for SMP" - depends on CPU_MIPS32_R2 - #depends on CPU_MIPS64_R2 # once there is hardware ... - depends on SYS_SUPPORTS_MULTITHREADING - select GENERIC_CLOCKEVENTS_BROADCAST - select CPU_MIPSR2_IRQ_VI - select CPU_MIPSR2_IRQ_EI - select MIPS_MT - select NR_CPUS_DEFAULT_8 - select SMP select SYS_SUPPORTS_SMP - select SMP_UP + select SYS_SUPPORTS_SCHED_SMT + select MIPS_PERF_SHARED_TC_COUNTERS help - This is a kernel model which is known a SMTC or lately has been - marketesed into SMVP. - -endchoice + This is a kernel model which is known as SMVP. This is supported + on cores with the MT ASE and uses the available VPEs to implement + virtual processors which supports SMP. This is equivalent to the + Intel Hyperthreading feature. For further information go to + <http://www.imgtec.com/mips/mips-multithreading.asp>. config MIPS_MT bool @@ -1437,18 +1969,17 @@ config SCHED_SMT config SYS_SUPPORTS_SCHED_SMT bool - config SYS_SUPPORTS_MULTITHREADING bool config MIPS_MT_FPAFF bool "Dynamic FPU affinity for FP-intensive threads" default y - depends on MIPS_MT_SMP || MIPS_MT_SMTC + depends on MIPS_MT_SMP config MIPS_VPE_LOADER bool "VPE loader support." - depends on SYS_SUPPORTS_MULTITHREADING + depends on SYS_SUPPORTS_MULTITHREADING && MODULES select CPU_MIPSR2_IRQ_VI select CPU_MIPSR2_IRQ_EI select MIPS_MT @@ -1456,45 +1987,15 @@ config MIPS_VPE_LOADER Includes a loader for loading an elf relocatable object onto another VPE and running it. -config MIPS_MT_SMTC_INSTANT_REPLAY - bool "Low-latency Dispatch of Deferred SMTC IPIs" - depends on MIPS_MT_SMTC && !PREEMPT - default y - help - SMTC pseudo-interrupts between TCs are deferred and queued - if the target TC is interrupt-inhibited (IXMT). In the first - SMTC prototypes, these queued IPIs were serviced on return - to user mode, or on entry into the kernel idle loop. The - INSTANT_REPLAY option dispatches them as part of local_irq_restore() - processing, which adds runtime overhead (hence the option to turn - it off), but ensures that IPIs are handled promptly even under - heavy I/O interrupt load. - -config MIPS_MT_SMTC_IM_BACKSTOP - bool "Use per-TC register bits as backstop for inhibited IM bits" - depends on MIPS_MT_SMTC - default y - help - To support multiple TC microthreads acting as "CPUs" within - a VPE, VPE-wide interrupt mask bits must be specially manipulated - during interrupt handling. To support legacy drivers and interrupt - controller management code, SMTC has a "backstop" to track and - if necessary restore the interrupt mask. This has some performance - impact on interrupt service overhead. Disable it only if you know - what you are doing. - -config MIPS_MT_SMTC_IRQAFF - bool "Support IRQ affinity API" - depends on MIPS_MT_SMTC - default n - help - Enables SMP IRQ affinity API (/proc/irq/*/smp_affinity, etc.) - for SMTC Linux kernel. Requires platform support, of which - an example can be found in the MIPS kernel i8259 and Malta - platform code. It is recommended that MIPS_MT_SMTC_INSTANT_REPLAY - be enabled if MIPS_MT_SMTC_IRQAFF is used. Adds overhead to - interrupt dispatch, and should be used only if you know what - you are doing. +config MIPS_VPE_LOADER_CMP + bool + default "y" + depends on MIPS_VPE_LOADER && MIPS_CMP + +config MIPS_VPE_LOADER_MT + bool + default "y" + depends on MIPS_VPE_LOADER && !MIPS_CMP config MIPS_VPE_LOADER_TOM bool "Load VPE program into memory hidden from linux" @@ -1506,21 +2007,66 @@ config MIPS_VPE_LOADER_TOM you to ensure the amount you put in the option and the space your program requires is less or equal to the amount physically present. -# this should possibly be in drivers/char, but it is rather cpu related. Hmmm config MIPS_VPE_APSP_API bool "Enable support for AP/SP API (RTLX)" depends on MIPS_VPE_LOADER help -config MIPS_APSP_KSPD - bool "Enable KSPD" - depends on MIPS_VPE_APSP_API - default y +config MIPS_VPE_APSP_API_CMP + bool + default "y" + depends on MIPS_VPE_APSP_API && MIPS_CMP + +config MIPS_VPE_APSP_API_MT + bool + default "y" + depends on MIPS_VPE_APSP_API && !MIPS_CMP + +config MIPS_CMP + bool "MIPS CMP framework support (DEPRECATED)" + depends on SYS_SUPPORTS_MIPS_CMP + select MIPS_GIC_IPI + select SYNC_R4K + select WEAK_ORDERING + default n help - KSPD is a kernel daemon that accepts syscall requests from the SP - side, actions them and returns the results. It also handles the - "exit" syscall notifying other kernel modules the SP program is - exiting. You probably want to say yes here. + Select this if you are using a bootloader which implements the "CMP + framework" protocol (ie. YAMON) and want your kernel to make use of + its ability to start secondary CPUs. + + Unless you have a specific need, you should use CONFIG_MIPS_CPS + instead of this. + +config MIPS_CPS + bool "MIPS Coherent Processing System support" + depends on SYS_SUPPORTS_MIPS_CPS + select MIPS_CM + select MIPS_CPC + select MIPS_CPS_PM if HOTPLUG_CPU + select MIPS_GIC_IPI + select SMP + select SYNC_R4K if (CEVT_R4K || CSRC_R4K) + select SYS_SUPPORTS_HOTPLUG_CPU + select SYS_SUPPORTS_SMP + select WEAK_ORDERING + help + Select this if you wish to run an SMP kernel across multiple cores + within a MIPS Coherent Processing System. When this option is + enabled the kernel will probe for other cores and boot them with + no external assistance. It is safe to enable this when hardware + support is unavailable. + +config MIPS_CPS_PM + bool + +config MIPS_GIC_IPI + bool + +config MIPS_CM + bool + +config MIPS_CPC + bool config SB1_PASS_1_WORKAROUNDS bool @@ -1537,11 +2083,12 @@ config SB1_PASS_2_1_WORKAROUNDS depends on CPU_SB1 && CPU_SB1_PASS_2 default y + config 64BIT_PHYS_ADDR bool -config CPU_HAS_LLSC - bool +config ARCH_PHYS_ADDR_T_64BIT + def_bool 64BIT_PHYS_ADDR config CPU_HAS_SMARTMIPS depends on SYS_SUPPORTS_SMARTMIPS @@ -1555,9 +2102,34 @@ config CPU_HAS_SMARTMIPS you don't know you probably don't have SmartMIPS and should say N here. +config CPU_MICROMIPS + depends on SYS_SUPPORTS_MICROMIPS + bool "Build kernel using microMIPS ISA" + help + When this option is enabled the kernel will be built using the + microMIPS ISA + +config CPU_HAS_MSA + bool "Support for the MIPS SIMD Architecture" + depends on CPU_SUPPORTS_MSA + default y + help + MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers + and a set of SIMD instructions to operate on them. When this option + is enabled the kernel will support allocating & switching MSA + vector register contexts. If you know that your kernel will only be + running on CPUs which do not support MSA or that your userland will + not be making use of it then you may wish to say N here to reduce + the size & complexity of your kernel. + + If unsure, say Y. + config CPU_HAS_WB bool +config XKS01 + bool + # # Vectored interrupt mode is an R2 feature # @@ -1575,9 +2147,6 @@ config CPU_HAS_SYNC depends on !CPU_R3000 default y -config GENERIC_CLOCKEVENTS_BROADCAST - bool - # # CPU non-features # @@ -1592,20 +2161,6 @@ config CPU_R4400_WORKAROUNDS bool # -# Use the generic interrupt handling code in kernel/irq/: -# -config GENERIC_HARDIRQS - bool - default y - -config GENERIC_IRQ_PROBE - bool - default y - -config IRQ_PER_CPU - bool - -# # - Highmem only makes sense for the 32-bit kernel. # - The current highmem code will only work properly on physically indexed # caches such as R3000, SB1, R7000 or those that look like they're virtually @@ -1620,7 +2175,7 @@ config IRQ_PER_CPU # config HIGHMEM bool "High Memory Support" - depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM + depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA config CPU_SUPPORTS_HIGHMEM bool @@ -1631,9 +2186,22 @@ config SYS_SUPPORTS_HIGHMEM config SYS_SUPPORTS_SMARTMIPS bool +config SYS_SUPPORTS_MICROMIPS + bool + +config SYS_SUPPORTS_MIPS16 + bool + help + This option must be set if a kernel might be executed on a MIPS16- + enabled CPU even if MIPS16 is not actually being used. In other + words, it makes the kernel MIPS16-tolerant. + +config CPU_SUPPORTS_MSA + bool + config ARCH_FLATMEM_ENABLE def_bool y - depends on !NUMA + depends on !NUMA && !CPU_LOONGSON2 config ARCH_DISCONTIGMEM_ENABLE bool @@ -1644,9 +2212,6 @@ config ARCH_DISCONTIGMEM_ENABLE or have huge holes in the physical address space for other reasons. See <file:Documentation/vm/numa> for more. -config ARCH_POPULATES_NODE_MAP - def_bool y - config ARCH_SPARSEMEM_ENABLE bool select SPARSEMEM_STATIC @@ -1669,22 +2234,28 @@ config NODES_SHIFT default "6" depends on NEED_MULTIPLE_NODES +config HW_PERF_EVENTS + bool "Enable hardware performance counter support for perf events" + depends on PERF_EVENTS && OPROFILE=n && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP) + default y + help + Enable hardware performance counter support for perf events. If + disabled, perf events will use software events only. + source "mm/Kconfig" config SMP bool "Multi-Processing support" depends on SYS_SUPPORTS_SMP - select IRQ_PER_CPU - select USE_GENERIC_SMP_HELPERS help This enables support for systems with more than one CPU. If you have - a system with only one CPU, like most personal computers, say N. If - you have a system with more than one CPU, say Y. + a system with only one CPU, say N. If you have a system with more + than one CPU, say Y. - If you say N here, the kernel will run on single and multiprocessor + If you say N here, the kernel will run on uni- and multiprocessor machines, but will use only one CPU of a multiprocessor machine. If you say Y here, the kernel will run on many, but not all, - singleprocessor machines. On a singleprocessor machine, the kernel + uniprocessor machines. On a uniprocessor machine, the kernel will run faster if you say N here. People using multiprocessor machines who say Y here should also say @@ -1698,13 +2269,13 @@ config SMP config SMP_UP bool -config SYS_SUPPORTS_SMP +config SYS_SUPPORTS_MIPS_CMP bool -config NR_CPUS_DEFAULT_1 +config SYS_SUPPORTS_MIPS_CPS bool -config NR_CPUS_DEFAULT_2 +config SYS_SUPPORTS_SMP bool config NR_CPUS_DEFAULT_4 @@ -1723,11 +2294,9 @@ config NR_CPUS_DEFAULT_64 bool config NR_CPUS - int "Maximum number of CPUs (2-64)" - range 1 64 if NR_CPUS_DEFAULT_1 + int "Maximum number of CPUs (2-256)" + range 2 256 depends on SMP - default "1" if NR_CPUS_DEFAULT_1 - default "2" if NR_CPUS_DEFAULT_2 default "4" if NR_CPUS_DEFAULT_4 default "8" if NR_CPUS_DEFAULT_8 default "16" if NR_CPUS_DEFAULT_16 @@ -1745,18 +2314,8 @@ config NR_CPUS performance should round up your number of processors to the next power of two. -config MIPS_CMP - bool "MIPS CMP framework support" - depends on SMP - select SYNC_R4K - select SYS_SUPPORTS_SCHED_SMT - select WEAK_ORDERING - default n - help - This is a placeholder option for the GCMP work. It will need to - be handled differently... - -source "kernel/time/Kconfig" +config MIPS_PERF_SHARED_TC_COUNTERS + bool # # Timer Interrupt Frequency Configuration @@ -1831,19 +2390,8 @@ config HZ source "kernel/Kconfig.preempt" -config MIPS_INSANE_LARGE - bool "Support for large 64-bit configurations" - depends on CPU_R10000 && 64BIT - help - MIPS R10000 does support a 44 bit / 16TB address space as opposed to - previous 64-bit processors which only supported 40 bit / 1TB. If you - need processes of more than 1TB virtual address space, say Y here. - This will result in additional memory usage, so it is not - recommended for normal users. - config KEXEC - bool "Kexec system call (EXPERIMENTAL)" - depends on EXPERIMENTAL + bool "Kexec system call" help kexec is a system call that implements the ability to shutdown your current kernel, and to start another kernel. It is like a reboot @@ -1854,9 +2402,32 @@ config KEXEC It is an ongoing process to be certain the hardware in a machine is properly shutdown, so do not be surprised if this code does not - initially work for you. It may help to enable device hotplugging - support. As of this writing the exact hardware interface is - strongly in flux, so no good recommendation can be made. + initially work for you. As of this writing the exact hardware + interface is strongly in flux, so no good recommendation can be + made. + +config CRASH_DUMP + bool "Kernel crash dumps" + help + Generate crash dump after being started by kexec. + This should be normally only set in special crash dump kernels + which are loaded in the main kernel with kexec-tools into + a specially reserved region and then later executed after + a crash by kdump/kexec. The crash dump kernel must be compiled + to a memory address not used by the main kernel or firmware using + PHYSICAL_START. + +config PHYSICAL_START + hex "Physical address where the kernel is loaded" + default "0xffffffff84000000" if 64BIT + default "0x84000000" if 32BIT + depends on CRASH_DUMP + help + This gives the CKSEG0 or KSEG0 address where the kernel is loaded. + If you plan to use kernel for capturing the crash dump change + this value to start of the reserved region (the "X" value as + specified in the "crashkernel=YM@XM" command line boot parameter + passed to the panic-ed kernel). config SECCOMP bool "Enable seccomp to safely compute untrusted bytecode" @@ -1875,11 +2446,36 @@ config SECCOMP If unsure, say Y. Only embedded should say N here. -endmenu +config MIPS_O32_FP64_SUPPORT + bool "Support for O32 binaries using 64-bit FP (EXPERIMENTAL)" + depends on 32BIT || MIPS32_O32 + help + When this is enabled, the kernel will support use of 64-bit floating + point registers with binaries using the O32 ABI along with the + EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On + 32-bit MIPS systems this support is at the cost of increasing the + size and complexity of the compiled FPU emulator. Thus if you are + running a MIPS32 system and know that none of your userland binaries + will require 64-bit floating point, you may wish to reduce the size + of your kernel & potentially improve FP emulation performance by + saying N here. + + Although binutils currently supports use of this flag the details + concerning its effect upon the O32 ABI in userland are still being + worked on. In order to avoid userland becoming dependant upon current + behaviour before the details have been finalised, this option should + be considered experimental and only enabled by those working upon + said details. -config RWSEM_GENERIC_SPINLOCK + If unsure, say N. + +config USE_OF bool - default y + select OF + select OF_EARLY_FLATTREE + select IRQ_DOMAIN + +endmenu config LOCKDEP_SUPPORT bool @@ -1891,6 +2487,8 @@ config STACKTRACE_SUPPORT source "init/Kconfig" +source "kernel/Kconfig.freezer" + menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)" config HW_HAS_EISA @@ -1902,17 +2500,31 @@ config PCI bool "Support for PCI controller" depends on HW_HAS_PCI select PCI_DOMAINS + select NO_GENERIC_PCI_IOPORT_MAP help Find out whether you have a PCI motherboard. PCI is the name of a bus system, i.e. the way the CPU talks to the other stuff inside your box. Other bus systems are ISA, EISA, or VESA. If you have PCI, say Y, otherwise N. +config HT_PCI + bool "Support for HT-linked PCI" + default y + depends on CPU_LOONGSON3 + select PCI + select PCI_DOMAINS + help + Loongson family machines use Hyper-Transport bus for inter-core + connection and device connection. The PCI bus is a subordinate + linked at HT. Choose Y for Loongson-3 based machines. + config PCI_DOMAINS bool source "drivers/pci/Kconfig" +source "drivers/pci/pcie/Kconfig" + # # ISA support is now enabled via select. Too many systems still have the one # or other ISA chip on the board that users don't know about so don't expect @@ -1945,14 +2557,14 @@ config TC bool "TURBOchannel support" depends on MACH_DECSTATION help - TurboChannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS - processors. Documentation on writing device drivers for TurboChannel - is available at: - <http://www.cs.arizona.edu/computer.help/policy/DIGITAL_unix/AA-PS3HD-TET1_html/TITLE.html>. - -#config ACCESSBUS -# bool "Access.Bus support" -# depends on TC + TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS + processors. TURBOchannel programming specifications are available + at: + <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/> + and: + <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/> + Linux driver support status is documented at: + <http://www.linux-mips.org/wiki/DECstation> config MMU bool @@ -1960,6 +2572,12 @@ config MMU config I8253 bool + select CLKSRC_I8253 + select CLKEVT_I8253 + select MIPS_EXTERNAL_TIMER + +config ZONE_DMA + bool config ZONE_DMA32 bool @@ -1968,6 +2586,16 @@ source "drivers/pcmcia/Kconfig" source "drivers/pci/hotplug/Kconfig" +config RAPIDIO + tristate "RapidIO support" + depends on PCI + default n + help + If you say Y here, the kernel will include drivers and + infrastructure code to support RapidIO interconnect devices. + +source "drivers/rapidio/Kconfig" + endmenu menu "Executable file formats" @@ -1988,6 +2616,7 @@ config MIPS32_COMPAT config COMPAT bool depends on MIPS32_COMPAT + select ARCH_WANT_OLD_COMPAT_IPC default y config SYSVIPC_COMPAT @@ -2024,18 +2653,37 @@ endmenu menu "Power management options" +config ARCH_HIBERNATION_POSSIBLE + def_bool y + depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP + config ARCH_SUSPEND_POSSIBLE def_bool y - depends on !SMP + depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP source "kernel/power/Kconfig" endmenu +config MIPS_EXTERNAL_TIMER + bool + +menu "CPU Power Management" + +if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER +source "drivers/cpufreq/Kconfig" +endif + +source "drivers/cpuidle/Kconfig" + +endmenu + source "net/Kconfig" source "drivers/Kconfig" +source "drivers/firmware/Kconfig" + source "fs/Kconfig" source "arch/mips/Kconfig.debug" @@ -2045,3 +2693,5 @@ source "security/Kconfig" source "crypto/Kconfig" source "lib/Kconfig" + +source "arch/mips/kvm/Kconfig" |