aboutsummaryrefslogtreecommitdiff
path: root/arch/m68k/platform/coldfire/sltimers.c
diff options
context:
space:
mode:
Diffstat (limited to 'arch/m68k/platform/coldfire/sltimers.c')
-rw-r--r--arch/m68k/platform/coldfire/sltimers.c15
1 files changed, 9 insertions, 6 deletions
diff --git a/arch/m68k/platform/coldfire/sltimers.c b/arch/m68k/platform/coldfire/sltimers.c
index 54e1452f853..831a08cf6f4 100644
--- a/arch/m68k/platform/coldfire/sltimers.c
+++ b/arch/m68k/platform/coldfire/sltimers.c
@@ -32,7 +32,7 @@
/*
* By default use Slice Timer 1 as the profiler clock timer.
*/
-#define PA(a) (MCF_MBAR + MCFSLT_TIMER1 + (a))
+#define PA(a) (MCFSLT_TIMER1 + (a))
/*
* Choose a reasonably fast profile timer. Make it an odd value to
@@ -51,7 +51,7 @@ irqreturn_t mcfslt_profile_tick(int irq, void *dummy)
static struct irqaction mcfslt_profile_irq = {
.name = "profile timer",
- .flags = IRQF_DISABLED | IRQF_TIMER,
+ .flags = IRQF_TIMER,
.handler = mcfslt_profile_tick,
};
@@ -76,22 +76,24 @@ void mcfslt_profile_init(void)
/*
* By default use Slice Timer 0 as the system clock timer.
*/
-#define TA(a) (MCF_MBAR + MCFSLT_TIMER0 + (a))
+#define TA(a) (MCFSLT_TIMER0 + (a))
static u32 mcfslt_cycles_per_jiffy;
static u32 mcfslt_cnt;
+static irq_handler_t timer_interrupt;
+
static irqreturn_t mcfslt_tick(int irq, void *dummy)
{
/* Reset Slice Timer 0 */
__raw_writel(MCFSLT_SSR_BE | MCFSLT_SSR_TE, TA(MCFSLT_SSR));
mcfslt_cnt += mcfslt_cycles_per_jiffy;
- return arch_timer_interrupt(irq, dummy);
+ return timer_interrupt(irq, dummy);
}
static struct irqaction mcfslt_timer_irq = {
.name = "timer",
- .flags = IRQF_DISABLED | IRQF_TIMER,
+ .flags = IRQF_TIMER,
.handler = mcfslt_tick,
};
@@ -121,7 +123,7 @@ static struct clocksource mcfslt_clk = {
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
};
-void hw_timer_init(void)
+void hw_timer_init(irq_handler_t handler)
{
mcfslt_cycles_per_jiffy = MCF_BUSCLK / HZ;
/*
@@ -136,6 +138,7 @@ void hw_timer_init(void)
/* initialize mcfslt_cnt knowing that slice timers count down */
mcfslt_cnt = mcfslt_cycles_per_jiffy;
+ timer_interrupt = handler;
setup_irq(MCF_IRQ_TIMER, &mcfslt_timer_irq);
clocksource_register_hz(&mcfslt_clk, MCF_BUSCLK);