aboutsummaryrefslogtreecommitdiff
path: root/arch/ia64/include/asm/sn
diff options
context:
space:
mode:
Diffstat (limited to 'arch/ia64/include/asm/sn')
-rw-r--r--arch/ia64/include/asm/sn/bte.h2
-rw-r--r--arch/ia64/include/asm/sn/pda.h1
-rw-r--r--arch/ia64/include/asm/sn/shub_mmr.h2
-rw-r--r--arch/ia64/include/asm/sn/shubio.h6
-rw-r--r--arch/ia64/include/asm/sn/sn_sal.h2
-rw-r--r--arch/ia64/include/asm/sn/tioce.h2
6 files changed, 7 insertions, 8 deletions
diff --git a/arch/ia64/include/asm/sn/bte.h b/arch/ia64/include/asm/sn/bte.h
index 96798d2da7c..cc6c4dbf53a 100644
--- a/arch/ia64/include/asm/sn/bte.h
+++ b/arch/ia64/include/asm/sn/bte.h
@@ -216,7 +216,7 @@ extern void bte_error_handler(unsigned long);
bte_copy(0, dest, len, ((mode) | BTE_ZERO_FILL), notification)
/*
- * The following is the prefered way of calling bte_unaligned_copy
+ * The following is the preferred way of calling bte_unaligned_copy
* If the copy is fully cache line aligned, then bte_copy is
* used instead. Since bte_copy is inlined, this saves a call
* stack. NOTE: bte_copy is called synchronously and does block
diff --git a/arch/ia64/include/asm/sn/pda.h b/arch/ia64/include/asm/sn/pda.h
index 1c5108d44d8..22ae358c8d1 100644
--- a/arch/ia64/include/asm/sn/pda.h
+++ b/arch/ia64/include/asm/sn/pda.h
@@ -10,7 +10,6 @@
#include <linux/cache.h>
#include <asm/percpu.h>
-#include <asm/system.h>
/*
diff --git a/arch/ia64/include/asm/sn/shub_mmr.h b/arch/ia64/include/asm/sn/shub_mmr.h
index 7de1d1d4b71..a84d870f429 100644
--- a/arch/ia64/include/asm/sn/shub_mmr.h
+++ b/arch/ia64/include/asm/sn/shub_mmr.h
@@ -459,7 +459,7 @@
/* ==================================================================== */
/* Some MMRs are functionally identical (or close enough) on both SHUB1 */
/* and SHUB2 that it makes sense to define a geberic name for the MMR. */
-/* It is acceptible to use (for example) SH_IPI_INT to reference the */
+/* It is acceptable to use (for example) SH_IPI_INT to reference the */
/* the IPI MMR. The value of SH_IPI_INT is determined at runtime based */
/* on the type of the SHUB. Do not use these #defines in performance */
/* critical code or loops - there is a small performance penalty. */
diff --git a/arch/ia64/include/asm/sn/shubio.h b/arch/ia64/include/asm/sn/shubio.h
index 22a6f18a531..ecb8a49476b 100644
--- a/arch/ia64/include/asm/sn/shubio.h
+++ b/arch/ia64/include/asm/sn/shubio.h
@@ -1383,7 +1383,7 @@ typedef union ii_ibcr_u {
* response is capture in IXSM and IXSS, and IXSS[VALID] is set. The *
* errant header is thereby captured, and no further spurious read *
* respones are captured until IXSS[VALID] is cleared by setting the *
- * appropriate bit in IECLR.Everytime a spurious read response is *
+ * appropriate bit in IECLR. Every time a spurious read response is *
* detected, the SPUR_RD bit of the PRB corresponding to the incoming *
* message's SIDN field is set. This always happens, regarless of *
* whether a header is captured. The programmer should check *
@@ -2738,7 +2738,7 @@ typedef union ii_ippr_u {
/************************************************************************
* *
* The following defines which were not formed into structures are *
- * probably indentical to another register, and the name of the *
+ * probably identical to another register, and the name of the *
* register is provided against each of these registers. This *
* information needs to be checked carefully *
* *
@@ -3289,7 +3289,7 @@ typedef ii_icrb0_e_u_t icrbe_t;
#define IIO_IIDSR_LVL_SHIFT 0
#define IIO_IIDSR_LVL_MASK 0x000000ff
-/* Xtalk timeout threshhold register (IIO_IXTT) */
+/* Xtalk timeout threshold register (IIO_IXTT) */
#define IXTT_RRSP_TO_SHFT 55 /* read response timeout */
#define IXTT_RRSP_TO_MASK (0x1FULL << IXTT_RRSP_TO_SHFT)
#define IXTT_RRSP_PS_SHFT 32 /* read responsed TO prescalar */
diff --git a/arch/ia64/include/asm/sn/sn_sal.h b/arch/ia64/include/asm/sn/sn_sal.h
index e310fc0135d..1f5ff470a5a 100644
--- a/arch/ia64/include/asm/sn/sn_sal.h
+++ b/arch/ia64/include/asm/sn/sn_sal.h
@@ -929,7 +929,7 @@ ia64_sn_sysctl_tio_clock_reset(nasid_t nasid)
/*
* Get the associated ioboard type for a given nasid.
*/
-static inline s64
+static inline long
ia64_sn_sysctl_ioboard_get(nasid_t nasid, u16 *ioboard)
{
struct ia64_sal_retval isrv;
diff --git a/arch/ia64/include/asm/sn/tioce.h b/arch/ia64/include/asm/sn/tioce.h
index 893468e1b41..6eae8ada90f 100644
--- a/arch/ia64/include/asm/sn/tioce.h
+++ b/arch/ia64/include/asm/sn/tioce.h
@@ -467,7 +467,7 @@ typedef volatile struct tioce {
#define CE_LSI_GB_CFG1_RXL0S_THS_SHFT 0
#define CE_LSI_GB_CFG1_RXL0S_THS_MASK (0xffULL << 0)
#define CE_LSI_GB_CFG1_RXL0S_SMP_SHFT 8
-#define CE_LSI_GB_CFG1_RXL0S_SMP_MASK (0xfULL << 8);
+#define CE_LSI_GB_CFG1_RXL0S_SMP_MASK (0xfULL << 8)
#define CE_LSI_GB_CFG1_RXL0S_ADJ_SHFT 12
#define CE_LSI_GB_CFG1_RXL0S_ADJ_MASK (0x7ULL << 12)
#define CE_LSI_GB_CFG1_RXL0S_FLT_SHFT 15