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-rw-r--r--arch/blackfin/mach-common/smp.c479
1 files changed, 216 insertions, 263 deletions
diff --git a/arch/blackfin/mach-common/smp.c b/arch/blackfin/mach-common/smp.c
index 93eab614607..ba6c30d8534 100644
--- a/arch/blackfin/mach-common/smp.c
+++ b/arch/blackfin/mach-common/smp.c
@@ -1,24 +1,10 @@
/*
- * File: arch/blackfin/kernel/smp.c
- * Author: Philippe Gerum <rpm@xenomai.org>
- * IPI management based on arch/arm/kernel/smp.c.
+ * IPI management based on arch/arm/kernel/smp.c (Copyright 2002 ARM Limited)
*
- * Copyright 2007 Analog Devices Inc.
+ * Copyright 2007-2009 Analog Devices Inc.
+ * Philippe Gerum <rpm@xenomai.org>
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, see the file COPYING, or write
- * to the Free Software Foundation, Inc.,
- * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ * Licensed under the GPL-2.
*/
#include <linux/module.h>
@@ -28,38 +14,47 @@
#include <linux/sched.h>
#include <linux/interrupt.h>
#include <linux/cache.h>
+#include <linux/clockchips.h>
#include <linux/profile.h>
#include <linux/errno.h>
#include <linux/mm.h>
#include <linux/cpu.h>
#include <linux/smp.h>
+#include <linux/cpumask.h>
#include <linux/seq_file.h>
#include <linux/irq.h>
-#include <asm/atomic.h>
+#include <linux/slab.h>
+#include <linux/atomic.h>
#include <asm/cacheflush.h>
+#include <asm/irq_handler.h>
#include <asm/mmu_context.h>
#include <asm/pgtable.h>
#include <asm/pgalloc.h>
#include <asm/processor.h>
#include <asm/ptrace.h>
#include <asm/cpu.h>
+#include <asm/time.h>
#include <linux/err.h>
+/*
+ * Anomaly notes:
+ * 05000120 - we always define corelock as 32-bit integer in L2
+ */
struct corelock_slot corelock __attribute__ ((__section__(".l2.bss")));
-void __cpuinitdata *init_retx_coreb, *init_saved_retx_coreb,
- *init_saved_seqstat_coreb, *init_saved_icplb_fault_addr_coreb,
- *init_saved_dcplb_fault_addr_coreb;
-
-cpumask_t cpu_possible_map;
-EXPORT_SYMBOL(cpu_possible_map);
+#ifdef CONFIG_ICACHE_FLUSH_L1
+unsigned long blackfin_iflush_l1_entry[NR_CPUS];
+#endif
-cpumask_t cpu_online_map;
-EXPORT_SYMBOL(cpu_online_map);
+struct blackfin_initial_pda initial_pda_coreb;
-#define BFIN_IPI_RESCHEDULE 0
-#define BFIN_IPI_CALL_FUNC 1
-#define BFIN_IPI_CPU_STOP 2
+enum ipi_message_type {
+ BFIN_IPI_NONE,
+ BFIN_IPI_TIMER,
+ BFIN_IPI_RESCHEDULE,
+ BFIN_IPI_CALL_FUNC,
+ BFIN_IPI_CPU_STOP,
+};
struct blackfin_flush_data {
unsigned long start;
@@ -68,32 +63,20 @@ struct blackfin_flush_data {
void *secondary_stack;
-
-struct smp_call_struct {
- void (*func)(void *info);
- void *info;
- int wait;
- cpumask_t pending;
- cpumask_t waitmask;
-};
-
static struct blackfin_flush_data smp_flush_data;
static DEFINE_SPINLOCK(stop_lock);
-struct ipi_message {
- struct list_head list;
- unsigned long type;
- struct smp_call_struct call_struct;
-};
+/* A magic number - stress test shows this is safe for common cases */
+#define BFIN_IPI_MSGQ_LEN 5
-struct ipi_message_queue {
- struct list_head head;
- spinlock_t lock;
- unsigned long count;
+/* Simple FIFO buffer, overflow leads to panic */
+struct ipi_data {
+ atomic_t count;
+ atomic_t bits;
};
-static DEFINE_PER_CPU(struct ipi_message_queue, ipi_msg_queue);
+static DEFINE_PER_CPU(struct ipi_data, bfin_ipi);
static void ipi_cpu_stop(unsigned int cpu)
{
@@ -102,7 +85,7 @@ static void ipi_cpu_stop(unsigned int cpu)
dump_stack();
spin_unlock(&stop_lock);
- cpu_clear(cpu, cpu_online_map);
+ set_cpu_online(cpu, false);
local_irq_disable();
@@ -118,243 +101,166 @@ static void ipi_flush_icache(void *info)
blackfin_dcache_invalidate_range((unsigned long)fdata,
(unsigned long)fdata + sizeof(*fdata));
+ /* Make sure all write buffers in the data side of the core
+ * are flushed before trying to invalidate the icache. This
+ * needs to be after the data flush and before the icache
+ * flush so that the SSYNC does the right thing in preventing
+ * the instruction prefetcher from hitting things in cached
+ * memory at the wrong time -- it runs much further ahead than
+ * the pipeline.
+ */
+ SSYNC();
+
+ /* ipi_flaush_icache is invoked by generic flush_icache_range,
+ * so call blackfin arch icache flush directly here.
+ */
blackfin_icache_flush_range(fdata->start, fdata->end);
}
-static void ipi_call_function(unsigned int cpu, struct ipi_message *msg)
+/* Use IRQ_SUPPLE_0 to request reschedule.
+ * When returning from interrupt to user space,
+ * there is chance to reschedule */
+static irqreturn_t ipi_handler_int0(int irq, void *dev_instance)
{
- int wait;
- void (*func)(void *info);
- void *info;
- func = msg->call_struct.func;
- info = msg->call_struct.info;
- wait = msg->call_struct.wait;
- cpu_clear(cpu, msg->call_struct.pending);
- func(info);
- if (wait)
- cpu_clear(cpu, msg->call_struct.waitmask);
- else
- kfree(msg);
+ unsigned int cpu = smp_processor_id();
+
+ platform_clear_ipi(cpu, IRQ_SUPPLE_0);
+ return IRQ_HANDLED;
}
-static irqreturn_t ipi_handler(int irq, void *dev_instance)
+DECLARE_PER_CPU(struct clock_event_device, coretmr_events);
+void ipi_timer(void)
{
- struct ipi_message *msg, *mg;
- struct ipi_message_queue *msg_queue;
+ int cpu = smp_processor_id();
+ struct clock_event_device *evt = &per_cpu(coretmr_events, cpu);
+ evt->event_handler(evt);
+}
+
+static irqreturn_t ipi_handler_int1(int irq, void *dev_instance)
+{
+ struct ipi_data *bfin_ipi_data;
unsigned int cpu = smp_processor_id();
+ unsigned long pending;
+ unsigned long msg;
+
+ platform_clear_ipi(cpu, IRQ_SUPPLE_1);
+
+ smp_rmb();
+ bfin_ipi_data = &__get_cpu_var(bfin_ipi);
+ while ((pending = atomic_xchg(&bfin_ipi_data->bits, 0)) != 0) {
+ msg = 0;
+ do {
+ msg = find_next_bit(&pending, BITS_PER_LONG, msg + 1);
+ switch (msg) {
+ case BFIN_IPI_TIMER:
+ ipi_timer();
+ break;
+ case BFIN_IPI_RESCHEDULE:
+ scheduler_ipi();
+ break;
+ case BFIN_IPI_CALL_FUNC:
+ generic_smp_call_function_interrupt();
+ break;
+ case BFIN_IPI_CPU_STOP:
+ ipi_cpu_stop(cpu);
+ break;
+ default:
+ goto out;
+ }
+ atomic_dec(&bfin_ipi_data->count);
+ } while (msg < BITS_PER_LONG);
- platform_clear_ipi(cpu);
-
- msg_queue = &__get_cpu_var(ipi_msg_queue);
- msg_queue->count++;
-
- spin_lock(&msg_queue->lock);
- list_for_each_entry_safe(msg, mg, &msg_queue->head, list) {
- list_del(&msg->list);
- switch (msg->type) {
- case BFIN_IPI_RESCHEDULE:
- /* That's the easiest one; leave it to
- * return_from_int. */
- kfree(msg);
- break;
- case BFIN_IPI_CALL_FUNC:
- spin_unlock(&msg_queue->lock);
- ipi_call_function(cpu, msg);
- spin_lock(&msg_queue->lock);
- break;
- case BFIN_IPI_CPU_STOP:
- spin_unlock(&msg_queue->lock);
- ipi_cpu_stop(cpu);
- spin_lock(&msg_queue->lock);
- kfree(msg);
- break;
- default:
- printk(KERN_CRIT "CPU%u: Unknown IPI message \
- 0x%lx\n", cpu, msg->type);
- kfree(msg);
- break;
- }
}
- spin_unlock(&msg_queue->lock);
+out:
return IRQ_HANDLED;
}
-static void ipi_queue_init(void)
+static void bfin_ipi_init(void)
{
unsigned int cpu;
- struct ipi_message_queue *msg_queue;
+ struct ipi_data *bfin_ipi_data;
for_each_possible_cpu(cpu) {
- msg_queue = &per_cpu(ipi_msg_queue, cpu);
- INIT_LIST_HEAD(&msg_queue->head);
- spin_lock_init(&msg_queue->lock);
- msg_queue->count = 0;
+ bfin_ipi_data = &per_cpu(bfin_ipi, cpu);
+ atomic_set(&bfin_ipi_data->bits, 0);
+ atomic_set(&bfin_ipi_data->count, 0);
}
}
-int smp_call_function(void (*func)(void *info), void *info, int wait)
+void send_ipi(const struct cpumask *cpumask, enum ipi_message_type msg)
{
unsigned int cpu;
- cpumask_t callmap;
+ struct ipi_data *bfin_ipi_data;
unsigned long flags;
- struct ipi_message_queue *msg_queue;
- struct ipi_message *msg;
-
- callmap = cpu_online_map;
- cpu_clear(smp_processor_id(), callmap);
- if (cpus_empty(callmap))
- return 0;
-
- msg = kmalloc(sizeof(*msg), GFP_ATOMIC);
- INIT_LIST_HEAD(&msg->list);
- msg->call_struct.func = func;
- msg->call_struct.info = info;
- msg->call_struct.wait = wait;
- msg->call_struct.pending = callmap;
- msg->call_struct.waitmask = callmap;
- msg->type = BFIN_IPI_CALL_FUNC;
-
- for_each_cpu_mask(cpu, callmap) {
- msg_queue = &per_cpu(ipi_msg_queue, cpu);
- spin_lock_irqsave(&msg_queue->lock, flags);
- list_add(&msg->list, &msg_queue->head);
- spin_unlock_irqrestore(&msg_queue->lock, flags);
- platform_send_ipi_cpu(cpu);
- }
- if (wait) {
- while (!cpus_empty(msg->call_struct.waitmask))
- blackfin_dcache_invalidate_range(
- (unsigned long)(&msg->call_struct.waitmask),
- (unsigned long)(&msg->call_struct.waitmask));
- kfree(msg);
+
+ local_irq_save(flags);
+ for_each_cpu(cpu, cpumask) {
+ bfin_ipi_data = &per_cpu(bfin_ipi, cpu);
+ atomic_set_mask((1 << msg), &bfin_ipi_data->bits);
+ atomic_inc(&bfin_ipi_data->count);
}
- return 0;
+ local_irq_restore(flags);
+ smp_wmb();
+ for_each_cpu(cpu, cpumask)
+ platform_send_ipi_cpu(cpu, IRQ_SUPPLE_1);
}
-EXPORT_SYMBOL_GPL(smp_call_function);
-int smp_call_function_single(int cpuid, void (*func) (void *info), void *info,
- int wait)
+void arch_send_call_function_single_ipi(int cpu)
{
- unsigned int cpu = cpuid;
- cpumask_t callmap;
- unsigned long flags;
- struct ipi_message_queue *msg_queue;
- struct ipi_message *msg;
-
- if (cpu_is_offline(cpu))
- return 0;
- cpus_clear(callmap);
- cpu_set(cpu, callmap);
-
- msg = kmalloc(sizeof(*msg), GFP_ATOMIC);
- INIT_LIST_HEAD(&msg->list);
- msg->call_struct.func = func;
- msg->call_struct.info = info;
- msg->call_struct.wait = wait;
- msg->call_struct.pending = callmap;
- msg->call_struct.waitmask = callmap;
- msg->type = BFIN_IPI_CALL_FUNC;
-
- msg_queue = &per_cpu(ipi_msg_queue, cpu);
- spin_lock_irqsave(&msg_queue->lock, flags);
- list_add(&msg->list, &msg_queue->head);
- spin_unlock_irqrestore(&msg_queue->lock, flags);
- platform_send_ipi_cpu(cpu);
-
- if (wait) {
- while (!cpus_empty(msg->call_struct.waitmask))
- blackfin_dcache_invalidate_range(
- (unsigned long)(&msg->call_struct.waitmask),
- (unsigned long)(&msg->call_struct.waitmask));
- kfree(msg);
- }
- return 0;
+ send_ipi(cpumask_of(cpu), BFIN_IPI_CALL_FUNC);
}
-EXPORT_SYMBOL_GPL(smp_call_function_single);
-void smp_send_reschedule(int cpu)
+void arch_send_call_function_ipi_mask(const struct cpumask *mask)
{
- unsigned long flags;
- struct ipi_message_queue *msg_queue;
- struct ipi_message *msg;
+ send_ipi(mask, BFIN_IPI_CALL_FUNC);
+}
- if (cpu_is_offline(cpu))
- return;
+void smp_send_reschedule(int cpu)
+{
+ send_ipi(cpumask_of(cpu), BFIN_IPI_RESCHEDULE);
- msg = kmalloc(sizeof(*msg), GFP_ATOMIC);
- memset(msg, 0, sizeof(msg));
- INIT_LIST_HEAD(&msg->list);
- msg->type = BFIN_IPI_RESCHEDULE;
+ return;
+}
- msg_queue = &per_cpu(ipi_msg_queue, cpu);
- spin_lock_irqsave(&msg_queue->lock, flags);
- list_add(&msg->list, &msg_queue->head);
- spin_unlock_irqrestore(&msg_queue->lock, flags);
- platform_send_ipi_cpu(cpu);
+void smp_send_msg(const struct cpumask *mask, unsigned long type)
+{
+ send_ipi(mask, type);
+}
- return;
+void smp_timer_broadcast(const struct cpumask *mask)
+{
+ smp_send_msg(mask, BFIN_IPI_TIMER);
}
void smp_send_stop(void)
{
- unsigned int cpu;
cpumask_t callmap;
- unsigned long flags;
- struct ipi_message_queue *msg_queue;
- struct ipi_message *msg;
-
- callmap = cpu_online_map;
- cpu_clear(smp_processor_id(), callmap);
- if (cpus_empty(callmap))
- return;
-
- msg = kmalloc(sizeof(*msg), GFP_ATOMIC);
- memset(msg, 0, sizeof(msg));
- INIT_LIST_HEAD(&msg->list);
- msg->type = BFIN_IPI_CPU_STOP;
-
- for_each_cpu_mask(cpu, callmap) {
- msg_queue = &per_cpu(ipi_msg_queue, cpu);
- spin_lock_irqsave(&msg_queue->lock, flags);
- list_add(&msg->list, &msg_queue->head);
- spin_unlock_irqrestore(&msg_queue->lock, flags);
- platform_send_ipi_cpu(cpu);
- }
+
+ preempt_disable();
+ cpumask_copy(&callmap, cpu_online_mask);
+ cpumask_clear_cpu(smp_processor_id(), &callmap);
+ if (!cpumask_empty(&callmap))
+ send_ipi(&callmap, BFIN_IPI_CPU_STOP);
+
+ preempt_enable();
+
return;
}
-int __cpuinit __cpu_up(unsigned int cpu)
+int __cpu_up(unsigned int cpu, struct task_struct *idle)
{
- struct task_struct *idle;
int ret;
- idle = fork_idle(cpu);
- if (IS_ERR(idle)) {
- printk(KERN_ERR "CPU%u: fork() failed\n", cpu);
- return PTR_ERR(idle);
- }
-
secondary_stack = task_stack_page(idle) + THREAD_SIZE;
- smp_wmb();
ret = platform_boot_secondary(cpu, idle);
- if (ret) {
- cpu_clear(cpu, cpu_present_map);
- printk(KERN_CRIT "CPU%u: processor failed to boot (%d)\n", cpu, ret);
- free_task(idle);
- } else
- cpu_set(cpu, cpu_online_map);
-
secondary_stack = NULL;
return ret;
}
-static void __cpuinit setup_secondary(unsigned int cpu)
+static void setup_secondary(unsigned int cpu)
{
-#if !(defined(CONFIG_TICK_SOURCE_SYSTMR0) || defined(CONFIG_IPIPE))
- struct irq_desc *timer_desc;
-#endif
unsigned long ilat;
bfin_write_IMASK(0);
@@ -364,28 +270,14 @@ static void __cpuinit setup_secondary(unsigned int cpu)
bfin_write_ILAT(ilat);
CSYNC();
- /* Reserve the PDA space for the secondary CPU. */
- reserve_pda();
-
/* Enable interrupt levels IVG7-15. IARs have been already
* programmed by the boot CPU. */
bfin_irq_flags |= IMASK_IVG15 |
IMASK_IVG14 | IMASK_IVG13 | IMASK_IVG12 | IMASK_IVG11 |
IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW;
-
-#if defined(CONFIG_TICK_SOURCE_SYSTMR0) || defined(CONFIG_IPIPE)
- /* Power down the core timer, just to play safe. */
- bfin_write_TCNTL(0);
-
- /* system timer0 has been setup by CoreA. */
-#else
- timer_desc = irq_desc + IRQ_CORETMR;
- setup_core_timer();
- timer_desc->chip->enable(IRQ_CORETMR);
-#endif
}
-void __cpuinit secondary_start_kernel(void)
+void secondary_start_kernel(void)
{
unsigned int cpu = smp_processor_id();
struct mm_struct *mm = &init_mm;
@@ -393,13 +285,16 @@ void __cpuinit secondary_start_kernel(void)
if (_bfin_swrst & SWRST_DBL_FAULT_B) {
printk(KERN_EMERG "CoreB Recovering from DOUBLE FAULT event\n");
#ifdef CONFIG_DEBUG_DOUBLEFAULT
- printk(KERN_EMERG " While handling exception (EXCAUSE = 0x%x) at %pF\n",
- (int)init_saved_seqstat_coreb & SEQSTAT_EXCAUSE, init_saved_retx_coreb);
- printk(KERN_NOTICE " DCPLB_FAULT_ADDR: %pF\n", init_saved_dcplb_fault_addr_coreb);
- printk(KERN_NOTICE " ICPLB_FAULT_ADDR: %pF\n", init_saved_icplb_fault_addr_coreb);
+ printk(KERN_EMERG " While handling exception (EXCAUSE = %#x) at %pF\n",
+ initial_pda_coreb.seqstat_doublefault & SEQSTAT_EXCAUSE,
+ initial_pda_coreb.retx_doublefault);
+ printk(KERN_NOTICE " DCPLB_FAULT_ADDR: %pF\n",
+ initial_pda_coreb.dcplb_doublefault_addr);
+ printk(KERN_NOTICE " ICPLB_FAULT_ADDR: %pF\n",
+ initial_pda_coreb.icplb_doublefault_addr);
#endif
printk(KERN_NOTICE " The instruction at %pF caused a double exception\n",
- init_retx_coreb);
+ initial_pda_coreb.retx);
}
/*
@@ -409,25 +304,36 @@ void __cpuinit secondary_start_kernel(void)
*/
init_exception_vectors();
- bfin_setup_caches(cpu);
-
local_irq_disable();
/* Attach the new idle task to the global mm. */
atomic_inc(&mm->mm_users);
atomic_inc(&mm->mm_count);
current->active_mm = mm;
- BUG_ON(current->mm); /* Can't be, but better be safe than sorry. */
preempt_disable();
setup_secondary(cpu);
+ platform_secondary_init(cpu);
+ /* setup local core timer */
+ bfin_local_timer_setup();
+
local_irq_enable();
- platform_secondary_init(cpu);
+ bfin_setup_caches(cpu);
- cpu_idle();
+ notify_cpu_starting(cpu);
+ /*
+ * Calibrate loops per jiffy value.
+ * IRQs need to be enabled here - D-cache can be invalidated
+ * in timer irq handler, so core B can read correct jiffies.
+ */
+ calibrate_delay();
+
+ /* We are done with local CPU inits, unblock the boot CPU. */
+ set_cpu_online(cpu, true);
+ cpu_startup_entry(CPUHP_ONLINE);
}
void __init smp_prepare_boot_cpu(void)
@@ -437,8 +343,9 @@ void __init smp_prepare_boot_cpu(void)
void __init smp_prepare_cpus(unsigned int max_cpus)
{
platform_prepare_cpus(max_cpus);
- ipi_queue_init();
- platform_request_ipi(&ipi_handler);
+ bfin_ipi_init();
+ platform_request_ipi(IRQ_SUPPLE_0, ipi_handler_int0);
+ platform_request_ipi(IRQ_SUPPLE_1, ipi_handler_int1);
}
void __init smp_cpus_done(unsigned int max_cpus)
@@ -447,7 +354,7 @@ void __init smp_cpus_done(unsigned int max_cpus)
unsigned int cpu;
for_each_online_cpu(cpu)
- bogosum += per_cpu(cpu_data, cpu).loops_per_jiffy;
+ bogosum += loops_per_jiffy;
printk(KERN_INFO "SMP: Total of %d processors activated "
"(%lu.%02lu BogoMIPS).\n",
@@ -461,20 +368,66 @@ void smp_icache_flush_range_others(unsigned long start, unsigned long end)
smp_flush_data.start = start;
smp_flush_data.end = end;
- if (smp_call_function(&ipi_flush_icache, &smp_flush_data, 0))
+ preempt_disable();
+ if (smp_call_function(&ipi_flush_icache, &smp_flush_data, 1))
printk(KERN_WARNING "SMP: failed to run I-cache flush request on other CPUs\n");
+ preempt_enable();
}
EXPORT_SYMBOL_GPL(smp_icache_flush_range_others);
+#ifdef __ARCH_SYNC_CORE_ICACHE
+unsigned long icache_invld_count[NR_CPUS];
+void resync_core_icache(void)
+{
+ unsigned int cpu = get_cpu();
+ blackfin_invalidate_entire_icache();
+ icache_invld_count[cpu]++;
+ put_cpu();
+}
+EXPORT_SYMBOL(resync_core_icache);
+#endif
+
#ifdef __ARCH_SYNC_CORE_DCACHE
+unsigned long dcache_invld_count[NR_CPUS];
unsigned long barrier_mask __attribute__ ((__section__(".l2.bss")));
void resync_core_dcache(void)
{
unsigned int cpu = get_cpu();
blackfin_invalidate_entire_dcache();
- ++per_cpu(cpu_data, cpu).dcache_invld_count;
+ dcache_invld_count[cpu]++;
put_cpu();
}
EXPORT_SYMBOL(resync_core_dcache);
#endif
+
+#ifdef CONFIG_HOTPLUG_CPU
+int __cpu_disable(void)
+{
+ unsigned int cpu = smp_processor_id();
+
+ if (cpu == 0)
+ return -EPERM;
+
+ set_cpu_online(cpu, false);
+ return 0;
+}
+
+static DECLARE_COMPLETION(cpu_killed);
+
+int __cpu_die(unsigned int cpu)
+{
+ return wait_for_completion_timeout(&cpu_killed, 5000);
+}
+
+void cpu_die(void)
+{
+ complete(&cpu_killed);
+
+ atomic_dec(&init_mm.mm_users);
+ atomic_dec(&init_mm.mm_count);
+
+ local_irq_disable();
+ platform_cpu_die();
+}
+#endif