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-rw-r--r--arch/blackfin/mach-bf518/Kconfig144
1 files changed, 115 insertions, 29 deletions
diff --git a/arch/blackfin/mach-bf518/Kconfig b/arch/blackfin/mach-bf518/Kconfig
index f397ede006b..bde92a19970 100644
--- a/arch/blackfin/mach-bf518/Kconfig
+++ b/arch/blackfin/mach-bf518/Kconfig
@@ -1,3 +1,7 @@
+config BF51x
+ def_bool y
+ depends on (BF512 || BF514 || BF516 || BF518)
+
if (BF51x)
source "arch/blackfin/mach-bf518/boards/Kconfig"
@@ -7,57 +11,138 @@ menu "BF518 Specific Configuration"
comment "Alternative Multiplexing Scheme"
choice
- prompt "SPORT0"
- default BF518_SPORT0_PORTG
+ prompt "PWM Channel Pins"
+ default BF518_PWM_ALL_PORTF
help
- Select PORT used for SPORT0. See Hardware Reference Manual
+ Select pins used for the PWM channels:
+ PWM_AH PWM_AL PWM_BH PWM_BL PWM_CH PWM_CL
+
+ See the Hardware Reference Manual for more details.
-config BF518_SPORT0_PORTF
- bool "PORT F"
+config BF518_PWM_ALL_PORTF
+ bool "PF1 - PF6"
help
- PORT F
+ PF{1,2,3,4,5,6} <-> PWM_{AH,AL,BH,BL,CH,CL}
-config BF518_SPORT0_PORTG
- bool "PORT G"
+config BF518_PWM_PORTF_PORTG
+ bool "PF11 - PF14 / PG1 - PG2"
help
- PORT G
+ PF{11,12,13,14} <-> PWM_{AH,AL,BH,BL}
+ PG{1,2} <-> PWM_{CH,CL}
+
endchoice
choice
- prompt "SPORT0 TSCLK Location"
- depends on BF518_SPORT0_PORTG
- default BF518_SPORT0_TSCLK_PG10
+ prompt "PWM Sync Pin"
+ default BF518_PWM_SYNC_PF7
help
- Select PIN used for SPORT0_TSCLK. See Hardware Reference Manual
+ Select the pin used for PWM_SYNC.
-config BF518_SPORT0_TSCLK_PG10
- bool "PORT PG10"
- help
- PORT PG10
+ See the Hardware Reference Manual for more details.
+
+config BF518_PWM_SYNC_PF7
+ bool "PF7"
+config BF518_PWM_SYNC_PF15
+ bool "PF15"
+endchoice
-config BF518_SPORT0_TSCLK_PG14
- bool "PORT PG14"
+choice
+ prompt "PWM Trip B Pin"
+ default BF518_PWM_TRIPB_PG10
help
- PORT PG14
+ Select the pin used for PWM_TRIPB.
+
+ See the Hardware Reference Manual for more details.
+
+config BF518_PWM_TRIPB_PG10
+ bool "PG10"
+config BF518_PWM_TRIPB_PG14
+ bool "PG14"
endchoice
choice
- prompt "UART1"
- default BF518_UART1_PORTF
+ prompt "PPI / Timer Pins"
+ default BF518_PPI_TMR_PG5
help
- Select PORT used for UART1. See Hardware Reference Manual
+ Select pins used for PPI/Timer:
+ PPICLK PPIFS1 PPIFS2
+ TMRCLK TMR0 TMR1
-config BF518_UART1_PORTF
- bool "PORT F"
+ See the Hardware Reference Manual for more details.
+
+config BF518_PPI_TMR_PG5
+ bool "PG5 - PG7"
help
- PORT F
+ PG{5,6,7} <-> {PPICLK/TMRCLK,TMR0/PPIFS1,TMR1/PPIFS2}
-config BF518_UART1_PORTG
- bool "PORT G"
+config BF518_PPI_TMR_PG12
+ bool "PG12 - PG14"
help
- PORT G
+ PG{12,13,14} <-> {PPICLK/TMRCLK,TMR0/PPIFS1,TMR1/PPIFS2}
+
endchoice
+comment "Hysteresis/Schmitt Trigger Control"
+config BFIN_HYSTERESIS_CONTROL
+ bool "Enable Hysteresis Control"
+ help
+ The ADSP-BF51x allows to control input hysteresis for Port F,
+ Port G and Port H and other processor signal inputs.
+ The Schmitt trigger enables can be set only for pin groups.
+ Saying Y will overwrite the default reset or boot loader
+ initialization.
+
+menu "PORT F"
+ depends on BFIN_HYSTERESIS_CONTROL
+config GPIO_HYST_PORTF_0_7
+ bool "Enable Hysteresis on PORTF {0...7}"
+config GPIO_HYST_PORTF_8_9
+ bool "Enable Hysteresis on PORTF {8, 9}"
+config GPIO_HYST_PORTF_10
+ bool "Enable Hysteresis on PORTF 10"
+config GPIO_HYST_PORTF_11
+ bool "Enable Hysteresis on PORTF 11"
+config GPIO_HYST_PORTF_12_13
+ bool "Enable Hysteresis on PORTF {12, 13}"
+config GPIO_HYST_PORTF_14_15
+ bool "Enable Hysteresis on PORTF {14, 15}"
+endmenu
+
+menu "PORT G"
+ depends on BFIN_HYSTERESIS_CONTROL
+config GPIO_HYST_PORTG_0
+ bool "Enable Hysteresis on PORTG 0"
+config GPIO_HYST_PORTG_1_4
+ bool "Enable Hysteresis on PORTG {1...4}"
+config GPIO_HYST_PORTG_5_6
+ bool "Enable Hysteresis on PORTG {5, 6}"
+config GPIO_HYST_PORTG_7_8
+ bool "Enable Hysteresis on PORTG {7, 8}"
+config GPIO_HYST_PORTG_9
+ bool "Enable Hysteresis on PORTG 9"
+config GPIO_HYST_PORTG_10
+ bool "Enable Hysteresis on PORTG 10"
+config GPIO_HYST_PORTG_11_13
+ bool "Enable Hysteresis on PORTG {11...13}"
+config GPIO_HYST_PORTG_14_15
+ bool "Enable Hysteresis on PORTG {14, 15}"
+endmenu
+
+menu "PORT H"
+ depends on BFIN_HYSTERESIS_CONTROL
+config GPIO_HYST_PORTH_0_7
+ bool "Enable Hysteresis on PORTH {0...7}"
+
+endmenu
+
+menu "None-GPIO"
+ depends on BFIN_HYSTERESIS_CONTROL
+config NONEGPIO_HYST_NMI_RST_BMODE
+ bool "Enable Hysteresis on {NMI, RESET, BMODE}"
+config NONEGPIO_HYST_JTAG
+ bool "Enable Hysteresis on JTAG"
+endmenu
+
comment "Interrupt Priority Assignment"
menu "Priority"
@@ -156,6 +241,7 @@ config IRQ_PORTH_INTB
default 11
config IRQ_TIMER0
int "IRQ_TIMER0"
+ default 7 if TICKSOURCE_GPTMR0
default 8
config IRQ_TIMER1
int "IRQ_TIMER1"