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Diffstat (limited to 'arch/blackfin/include/asm/traps.h')
-rw-r--r--arch/blackfin/include/asm/traps.h21
1 files changed, 9 insertions, 12 deletions
diff --git a/arch/blackfin/include/asm/traps.h b/arch/blackfin/include/asm/traps.h
index 34f7295fb07..cec771b8100 100644
--- a/arch/blackfin/include/asm/traps.h
+++ b/arch/blackfin/include/asm/traps.h
@@ -1,13 +1,10 @@
/*
- * linux/include/asm/traps.h
+ * Copyright 2004-2009 Analog Devices Inc.
+ * 2001 Lineo, Inc
+ * Tony Kou
+ * 1993 Hamish Macdonald
*
- * Copyright (C) 1993 Hamish Macdonald
- *
- * Lineo, Inc Jul 2001 Tony Kou
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file COPYING in the main directory of this archive
- * for more details.
+ * Licensed under the GPL-2
*/
#ifndef _BFIN_TRAPS_H
@@ -60,7 +57,7 @@
#define HWC_x3(level) \
"External Memory Addressing Error\n"
#define EXC_0x04(level) \
- "Unimplmented exception occured\n" \
+ "Unimplmented exception occurred\n" \
level " - Maybe you forgot to install a custom exception handler?\n"
#define HWC_x12(level) \
"Performance Monitor Overflow\n"
@@ -111,9 +108,7 @@
level " bits in the Watchpoint Instruction Address Control register (WPIACTL) is set.\n"
#define EXC_0x2A(level) \
"Instruction fetch misaligned address violation\n" \
- level " - Attempted misaligned instruction cache fetch. On a misaligned instruction fetch\n" \
- level " exception, the return address provided in RETX is the destination address which is\n" \
- level " misaligned, rather than the address of the offending instruction.\n"
+ level " - Attempted misaligned instruction cache fetch.\n"
#define EXC_0x2B(level) \
"CPLB protection violation\n" \
level " - Illegal instruction fetch access (memory protection violation).\n"
@@ -130,5 +125,7 @@
level " for Supervisor use: Supervisor only registers, all MMRs, and Supervisor\n" \
level " only instructions.\n"
+extern void double_fault_c(struct pt_regs *fp);
+
#endif /* __ASSEMBLY__ */
#endif /* _BFIN_TRAPS_H */