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Diffstat (limited to 'arch/avr32/boards/favr-32/setup.c')
-rw-r--r--arch/avr32/boards/favr-32/setup.c54
1 files changed, 28 insertions, 26 deletions
diff --git a/arch/avr32/boards/favr-32/setup.c b/arch/avr32/boards/favr-32/setup.c
index 1ee4faf0742..1f121497b51 100644
--- a/arch/avr32/boards/favr-32/setup.c
+++ b/arch/avr32/boards/favr-32/setup.c
@@ -17,10 +17,13 @@
#include <linux/linkage.h>
#include <linux/gpio.h>
#include <linux/leds.h>
+#include <linux/atmel-mci.h>
#include <linux/atmel-pwm-bl.h>
#include <linux/spi/spi.h>
#include <linux/spi/ads7846.h>
+#include <sound/atmel-abdac.h>
+
#include <video/atmel_lcdc.h>
#include <asm/setup.h>
@@ -40,11 +43,14 @@ unsigned long at32_board_osc_rates[3] = {
/* Initialized by bootloader-specific startup code. */
struct tag *bootloader_tags __initdata;
+static struct atmel_abdac_pdata __initdata abdac0_data = {
+};
+
struct eth_addr {
u8 addr[6];
};
static struct eth_addr __initdata hw_addr[1];
-static struct eth_platform_data __initdata eth_data[1] = {
+static struct macb_platform_data __initdata eth_data[1] = {
{
.phy_mask = ~(1U << 1),
},
@@ -66,6 +72,10 @@ static struct ads7846_platform_data ads7843_data = {
.debounce_max = 20,
.debounce_rep = 4,
.debounce_tol = 5,
+
+ .keep_vref_on = true,
+ .settle_delay_usecs = 500,
+ .penirq_recheck_delay_usecs = 100,
};
static struct spi_board_info __initdata spi1_board_info[] = {
@@ -79,6 +89,14 @@ static struct spi_board_info __initdata spi1_board_info[] = {
},
};
+static struct mci_platform_data __initdata mci0_data = {
+ .slot[0] = {
+ .bus_width = 4,
+ .detect_pin = -ENODEV,
+ .wp_pin = -ENODEV,
+ },
+};
+
static struct fb_videomode __initdata lb104v03_modes[] = {
{
.name = "640x480 @ 50",
@@ -107,7 +125,7 @@ static struct fb_monspecs __initdata favr32_default_monspecs = {
.dclkmax = 28000000,
};
-struct atmel_lcdfb_info __initdata favr32_lcdc_data = {
+struct atmel_lcdfb_pdata __initdata favr32_lcdc_data = {
.default_bpp = 16,
.default_dmacon = ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN,
.default_lcdcon2 = (ATMEL_LCDC_DISTYPE_TFT
@@ -188,7 +206,7 @@ static void __init set_hw_addr(struct platform_device *pdev)
*/
regs = (void __iomem __force *)res->start;
pclk = clk_get(&pdev->dev, "pclk");
- if (!pclk)
+ if (IS_ERR(pclk))
return;
clk_enable(pclk);
@@ -236,7 +254,7 @@ static void __init favr32_setup_atmel_pwm_bl(void)
void __init setup_board(void)
{
- at32_map_usart(3, 0); /* USART 3 => /dev/ttyS0 */
+ at32_map_usart(3, 0, 0); /* USART 3 => /dev/ttyS0 */
at32_setup_serial_console(0);
}
@@ -280,8 +298,10 @@ static int __init set_abdac_rate(struct platform_device *pdev)
*/
retval = clk_round_rate(pll1,
CONFIG_BOARD_FAVR32_ABDAC_RATE * 256 * 16);
- if (retval < 0)
+ if (retval <= 0) {
+ retval = -EINVAL;
goto out_abdac;
+ }
retval = clk_set_rate(pll1, retval);
if (retval != 0)
@@ -307,39 +327,21 @@ static int __init favr32_init(void)
* Favr-32 uses 32-bit SDRAM interface. Reserve the SDRAM-specific
* pins so that nobody messes with them.
*/
- at32_reserve_pin(GPIO_PIN_PE(0)); /* DATA[16] */
- at32_reserve_pin(GPIO_PIN_PE(1)); /* DATA[17] */
- at32_reserve_pin(GPIO_PIN_PE(2)); /* DATA[18] */
- at32_reserve_pin(GPIO_PIN_PE(3)); /* DATA[19] */
- at32_reserve_pin(GPIO_PIN_PE(4)); /* DATA[20] */
- at32_reserve_pin(GPIO_PIN_PE(5)); /* DATA[21] */
- at32_reserve_pin(GPIO_PIN_PE(6)); /* DATA[22] */
- at32_reserve_pin(GPIO_PIN_PE(7)); /* DATA[23] */
- at32_reserve_pin(GPIO_PIN_PE(8)); /* DATA[24] */
- at32_reserve_pin(GPIO_PIN_PE(9)); /* DATA[25] */
- at32_reserve_pin(GPIO_PIN_PE(10)); /* DATA[26] */
- at32_reserve_pin(GPIO_PIN_PE(11)); /* DATA[27] */
- at32_reserve_pin(GPIO_PIN_PE(12)); /* DATA[28] */
- at32_reserve_pin(GPIO_PIN_PE(13)); /* DATA[29] */
- at32_reserve_pin(GPIO_PIN_PE(14)); /* DATA[30] */
- at32_reserve_pin(GPIO_PIN_PE(15)); /* DATA[31] */
- at32_reserve_pin(GPIO_PIN_PE(26)); /* SDCS */
+ at32_reserve_pin(GPIO_PIOE_BASE, ATMEL_EBI_PE_DATA_ALL);
at32_select_gpio(GPIO_PIN_PB(3), 0); /* IRQ from ADS7843 */
- at32_add_system_devices();
-
at32_add_device_usart(0);
set_hw_addr(at32_add_device_eth(0, &eth_data[0]));
spi1_board_info[0].irq = gpio_to_irq(GPIO_PIN_PB(3));
- set_abdac_rate(at32_add_device_abdac(0));
+ set_abdac_rate(at32_add_device_abdac(0, &abdac0_data));
at32_add_device_pwm(1 << atmel_pwm_bl_pdata.pwm_channel);
at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
- at32_add_device_mci(0, NULL);
+ at32_add_device_mci(0, &mci0_data);
at32_add_device_usba(0, NULL);
at32_add_device_lcdc(0, &favr32_lcdc_data, fbmem_start, fbmem_size, 0);