diff options
Diffstat (limited to 'arch/arm/plat-versatile/platsmp.c')
| -rw-r--r-- | arch/arm/plat-versatile/platsmp.c | 19 |
1 files changed, 5 insertions, 14 deletions
diff --git a/arch/arm/plat-versatile/platsmp.c b/arch/arm/plat-versatile/platsmp.c index 04ca4937d8c..53feb90c840 100644 --- a/arch/arm/plat-versatile/platsmp.c +++ b/arch/arm/plat-versatile/platsmp.c @@ -17,33 +17,24 @@ #include <asm/cacheflush.h> #include <asm/smp_plat.h> -#include <asm/hardware/gic.h> /* * Write pen_release in a way that is guaranteed to be visible to all * observers, irrespective of whether they're taking part in coherency * or not. This is necessary for the hotplug code to work reliably. */ -static void __cpuinit write_pen_release(int val) +static void write_pen_release(int val) { pen_release = val; smp_wmb(); - __cpuc_flush_dcache_area((void *)&pen_release, sizeof(pen_release)); - outer_clean_range(__pa(&pen_release), __pa(&pen_release + 1)); + sync_cache_w(&pen_release); } static DEFINE_SPINLOCK(boot_lock); -void __cpuinit versatile_secondary_init(unsigned int cpu) +void versatile_secondary_init(unsigned int cpu) { /* - * if any interrupts are already enabled for the primary - * core (e.g. timer irq), then they will not have been enabled - * for us: do so - */ - gic_secondary_init(0); - - /* * let the primary processor know we're out of the * pen, then head off into the C entry point */ @@ -56,7 +47,7 @@ void __cpuinit versatile_secondary_init(unsigned int cpu) spin_unlock(&boot_lock); } -int __cpuinit versatile_boot_secondary(unsigned int cpu, struct task_struct *idle) +int versatile_boot_secondary(unsigned int cpu, struct task_struct *idle) { unsigned long timeout; @@ -79,7 +70,7 @@ int __cpuinit versatile_boot_secondary(unsigned int cpu, struct task_struct *idl * the boot monitor to read the system wide flags register, * and branch to the address found there. */ - gic_raise_softirq(cpumask_of(cpu), 0); + arch_send_wakeup_ipi_mask(cpumask_of(cpu)); timeout = jiffies + (1 * HZ); while (time_before(jiffies, timeout)) { |